kernel: refresh 6.6 patches (#13179)

target/linux/bcm27xx/patches-6.6/950-0092-MMC-added-alternative-MMC-driver.patch

@@ -285,7 +285,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.com>
  static inline int mmc_blk_part_switch(struct mmc_card *card,
  				      unsigned int part_type);
  static void mmc_blk_rw_rq_prep(struct mmc_queue_req *mqrq,
-@@ -3066,6 +3073,8 @@ static int mmc_blk_probe(struct mmc_card
+@@ -3016,6 +3023,8 @@ static int mmc_blk_probe(struct mmc_card
  {
  	struct mmc_blk_data *md;
  	int ret = 0;
@@ -294,7 +294,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.com>
  
  	/*
  	 * Check that the card supports the command class(es) we need.
-@@ -3073,7 +3082,16 @@ static int mmc_blk_probe(struct mmc_card
+@@ -3023,7 +3032,16 @@ static int mmc_blk_probe(struct mmc_card
  	if (!(card->csd.cmdclass & CCC_BLOCK_READ))
  		return -ENODEV;
  
@@ -312,7 +312,7 @@ Signed-off-by: Phil Elwell <phil@raspberrypi.com>
  
  	card->complete_wq = alloc_workqueue("mmc_complete",
  					WQ_MEM_RECLAIM | WQ_HIGHPRI, 0);
-@@ -3088,6 +3106,17 @@ static int mmc_blk_probe(struct mmc_card
+@@ -3038,6 +3056,17 @@ static int mmc_blk_probe(struct mmc_card
  		goto out_free;
  	}
  

target/linux/generic/backport-6.6/780-22-v6.12-r8169-add-support-for-RTL8126A-rev.b.patch

@@ -44,7 +44,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  };
  
  static const struct pci_device_id rtl8169_pci_tbl[] = {
-@@ -1201,7 +1203,7 @@ static void rtl_writephy(struct rtl8169_
+@@ -1228,7 +1230,7 @@ static void rtl_writephy(struct rtl8169_
  	case RTL_GIGA_MAC_VER_31:
  		r8168dp_2_mdio_write(tp, location, val);
  		break;
@@ -53,7 +53,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  		r8168g_mdio_write(tp, location, val);
  		break;
  	default:
-@@ -1216,7 +1218,7 @@ static int rtl_readphy(struct rtl8169_pr
+@@ -1243,7 +1245,7 @@ static int rtl_readphy(struct rtl8169_pr
  	case RTL_GIGA_MAC_VER_28:
  	case RTL_GIGA_MAC_VER_31:
  		return r8168dp_2_mdio_read(tp, location);
@@ -62,7 +62,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  		return r8168g_mdio_read(tp, location);
  	default:
  		return r8169_mdio_read(tp, location);
-@@ -1425,7 +1427,7 @@ static void rtl_set_d3_pll_down(struct r
+@@ -1452,7 +1454,7 @@ static void rtl_set_d3_pll_down(struct r
  	case RTL_GIGA_MAC_VER_25 ... RTL_GIGA_MAC_VER_26:
  	case RTL_GIGA_MAC_VER_29 ... RTL_GIGA_MAC_VER_30:
  	case RTL_GIGA_MAC_VER_32 ... RTL_GIGA_MAC_VER_37:
@@ -71,7 +71,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  		if (enable)
  			RTL_W8(tp, PMCH, RTL_R8(tp, PMCH) & ~D3_NO_PLL_DOWN);
  		else
-@@ -1592,7 +1594,7 @@ static void __rtl8169_set_wol(struct rtl
+@@ -1619,7 +1621,7 @@ static void __rtl8169_set_wol(struct rtl
  		break;
  	case RTL_GIGA_MAC_VER_34:
  	case RTL_GIGA_MAC_VER_37:
@@ -80,7 +80,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  		if (wolopts)
  			rtl_mod_config2(tp, 0, PME_SIGNAL);
  		else
-@@ -2071,6 +2073,7 @@ static void rtl_set_eee_txidle_timer(str
+@@ -2098,6 +2100,7 @@ static void rtl_set_eee_txidle_timer(str
  	case RTL_GIGA_MAC_VER_61:
  	case RTL_GIGA_MAC_VER_63:
  	case RTL_GIGA_MAC_VER_65:
@@ -88,7 +88,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  		tp->tx_lpi_timer = timer_val;
  		RTL_W16(tp, EEE_TXIDLE_TIMER_8125, timer_val);
  		break;
-@@ -2200,6 +2203,7 @@ static enum mac_version rtl8169_get_mac_
+@@ -2227,6 +2230,7 @@ static enum mac_version rtl8169_get_mac_
  		enum mac_version ver;
  	} mac_info[] = {
  		/* 8126A family. */
@@ -96,7 +96,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  		{ 0x7cf, 0x649,	RTL_GIGA_MAC_VER_65 },
  
  		/* 8125B family. */
-@@ -2471,6 +2475,7 @@ static void rtl_init_rxcfg(struct rtl816
+@@ -2498,6 +2502,7 @@ static void rtl_init_rxcfg(struct rtl816
  		break;
  	case RTL_GIGA_MAC_VER_63:
  	case RTL_GIGA_MAC_VER_65:
@@ -104,7 +104,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  		RTL_W32(tp, RxConfig, RX_FETCH_DFLT_8125 | RX_DMA_BURST |
  			RX_PAUSE_SLOT_ON);
  		break;
-@@ -2657,7 +2662,7 @@ static void rtl_wait_txrx_fifo_empty(str
+@@ -2684,7 +2689,7 @@ static void rtl_wait_txrx_fifo_empty(str
  	case RTL_GIGA_MAC_VER_61 ... RTL_GIGA_MAC_VER_61:
  		rtl_loop_wait_high(tp, &rtl_rxtx_empty_cond, 100, 42);
  		break;
@@ -113,7 +113,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  		RTL_W8(tp, ChipCmd, RTL_R8(tp, ChipCmd) | StopReq);
  		rtl_loop_wait_high(tp, &rtl_rxtx_empty_cond, 100, 42);
  		rtl_loop_wait_high(tp, &rtl_rxtx_empty_cond_2, 100, 42);
-@@ -2900,7 +2905,7 @@ static void rtl_enable_exit_l1(struct rt
+@@ -2927,7 +2932,7 @@ static void rtl_enable_exit_l1(struct rt
  	case RTL_GIGA_MAC_VER_37 ... RTL_GIGA_MAC_VER_38:
  		rtl_eri_set_bits(tp, 0xd4, 0x0c00);
  		break;
@@ -122,7 +122,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  		r8168_mac_ocp_modify(tp, 0xc0ac, 0, 0x1f80);
  		break;
  	default:
-@@ -2914,7 +2919,7 @@ static void rtl_disable_exit_l1(struct r
+@@ -2941,7 +2946,7 @@ static void rtl_disable_exit_l1(struct r
  	case RTL_GIGA_MAC_VER_34 ... RTL_GIGA_MAC_VER_38:
  		rtl_eri_clear_bits(tp, 0xd4, 0x1f00);
  		break;
@@ -131,7 +131,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  		r8168_mac_ocp_modify(tp, 0xc0ac, 0x1f80, 0);
  		break;
  	default:
-@@ -2941,6 +2946,7 @@ static void rtl_hw_aspm_clkreq_enable(st
+@@ -2968,6 +2973,7 @@ static void rtl_hw_aspm_clkreq_enable(st
  		rtl_mod_config5(tp, 0, ASPM_en);
  		switch (tp->mac_version) {
  		case RTL_GIGA_MAC_VER_65:
@@ -139,7 +139,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  			val8 = RTL_R8(tp, INT_CFG0_8125) | INT_CFG0_CLKREQEN;
  			RTL_W8(tp, INT_CFG0_8125, val8);
  			break;
-@@ -2951,7 +2957,7 @@ static void rtl_hw_aspm_clkreq_enable(st
+@@ -2978,7 +2984,7 @@ static void rtl_hw_aspm_clkreq_enable(st
  
  		switch (tp->mac_version) {
  		case RTL_GIGA_MAC_VER_46 ... RTL_GIGA_MAC_VER_48:
@@ -148,7 +148,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  			/* reset ephy tx/rx disable timer */
  			r8168_mac_ocp_modify(tp, 0xe094, 0xff00, 0);
  			/* chip can trigger L1.2 */
-@@ -2963,7 +2969,7 @@ static void rtl_hw_aspm_clkreq_enable(st
+@@ -2990,7 +2996,7 @@ static void rtl_hw_aspm_clkreq_enable(st
  	} else {
  		switch (tp->mac_version) {
  		case RTL_GIGA_MAC_VER_46 ... RTL_GIGA_MAC_VER_48:
@@ -157,7 +157,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  			r8168_mac_ocp_modify(tp, 0xe092, 0x00ff, 0);
  			break;
  		default:
-@@ -2972,6 +2978,7 @@ static void rtl_hw_aspm_clkreq_enable(st
+@@ -2999,6 +3005,7 @@ static void rtl_hw_aspm_clkreq_enable(st
  
  		switch (tp->mac_version) {
  		case RTL_GIGA_MAC_VER_65:
@@ -165,7 +165,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  			val8 = RTL_R8(tp, INT_CFG0_8125) & ~INT_CFG0_CLKREQEN;
  			RTL_W8(tp, INT_CFG0_8125, val8);
  			break;
-@@ -3691,10 +3698,12 @@ static void rtl_hw_start_8125_common(str
+@@ -3718,10 +3725,12 @@ static void rtl_hw_start_8125_common(str
  	/* disable new tx descriptor format */
  	r8168_mac_ocp_modify(tp, 0xeb58, 0x0001, 0x0000);
  
@@ -180,7 +180,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  		r8168_mac_ocp_modify(tp, 0xe614, 0x0700, 0x0400);
  	else if (tp->mac_version == RTL_GIGA_MAC_VER_63)
  		r8168_mac_ocp_modify(tp, 0xe614, 0x0700, 0x0200);
-@@ -3712,7 +3721,8 @@ static void rtl_hw_start_8125_common(str
+@@ -3739,7 +3748,8 @@ static void rtl_hw_start_8125_common(str
  	r8168_mac_ocp_modify(tp, 0xe056, 0x00f0, 0x0030);
  	r8168_mac_ocp_modify(tp, 0xe040, 0x1000, 0x0000);
  	r8168_mac_ocp_modify(tp, 0xea1c, 0x0003, 0x0001);
@@ -190,7 +190,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  		r8168_mac_ocp_modify(tp, 0xea1c, 0x0300, 0x0000);
  	else
  		r8168_mac_ocp_modify(tp, 0xea1c, 0x0004, 0x0000);
-@@ -3826,6 +3836,7 @@ static void rtl_hw_config(struct rtl8169
+@@ -3853,6 +3863,7 @@ static void rtl_hw_config(struct rtl8169
  		[RTL_GIGA_MAC_VER_61] = rtl_hw_start_8125a_2,
  		[RTL_GIGA_MAC_VER_63] = rtl_hw_start_8125b,
  		[RTL_GIGA_MAC_VER_65] = rtl_hw_start_8126a,
@@ -198,7 +198,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  	};
  
  	if (hw_configs[tp->mac_version])
-@@ -3846,6 +3857,7 @@ static void rtl_hw_start_8125(struct rtl
+@@ -3873,6 +3884,7 @@ static void rtl_hw_start_8125(struct rtl
  		break;
  	case RTL_GIGA_MAC_VER_63:
  	case RTL_GIGA_MAC_VER_65:
@@ -206,7 +206,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  		for (i = 0xa00; i < 0xa80; i += 4)
  			RTL_W32(tp, i, 0);
  		RTL_W16(tp, INT_CFG1_8125, 0x0000);
-@@ -4074,7 +4086,7 @@ static void rtl8169_cleanup(struct rtl81
+@@ -4101,7 +4113,7 @@ static void rtl8169_cleanup(struct rtl81
  		RTL_W8(tp, ChipCmd, RTL_R8(tp, ChipCmd) | StopReq);
  		rtl_loop_wait_high(tp, &rtl_txcfg_empty_cond, 100, 666);
  		break;
@@ -215,7 +215,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  		rtl_enable_rxdvgate(tp);
  		fsleep(2000);
  		break;
-@@ -4225,7 +4237,7 @@ static unsigned int rtl_quirk_packet_pad
+@@ -4252,7 +4264,7 @@ static unsigned int rtl_quirk_packet_pad
  
  	switch (tp->mac_version) {
  	case RTL_GIGA_MAC_VER_34:
@@ -224,7 +224,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  		padto = max_t(unsigned int, padto, ETH_ZLEN);
  		break;
  	default:
-@@ -5259,7 +5271,7 @@ static void rtl_hw_initialize(struct rtl
+@@ -5288,7 +5300,7 @@ static void rtl_hw_initialize(struct rtl
  	case RTL_GIGA_MAC_VER_40 ... RTL_GIGA_MAC_VER_48:
  		rtl_hw_init_8168g(tp);
  		break;
@@ -235,7 +235,7 @@ Signed-off-by: Jakub Kicinski <kuba@kernel.org>
  	default:
 --- a/drivers/net/ethernet/realtek/r8169_phy_config.c
 +++ b/drivers/net/ethernet/realtek/r8169_phy_config.c
-@@ -1159,6 +1159,7 @@ void r8169_hw_phy_config(struct rtl8169_
+@@ -1161,6 +1161,7 @@ void r8169_hw_phy_config(struct rtl8169_
  		[RTL_GIGA_MAC_VER_61] = rtl8125a_2_hw_phy_config,
  		[RTL_GIGA_MAC_VER_63] = rtl8125b_hw_phy_config,
  		[RTL_GIGA_MAC_VER_65] = rtl8126a_hw_phy_config,

target/linux/mediatek/patches-6.6/041-block-fit-partition-parser.patch

@@ -92,7 +92,7 @@ Subject: [PATCH] kernel: add block fit partition parser
  #ifdef CONFIG_SGI_PARTITION
  	sgi_partition,
  #endif
-@@ -462,6 +468,11 @@ static struct block_device *add_partitio
+@@ -464,6 +470,11 @@ static struct block_device *add_partitio
  			goto out_del;
  	}
  
@@ -104,7 +104,7 @@ Subject: [PATCH] kernel: add block fit partition parser
  	/* everything is up and running, commence */
  	err = xa_insert(&disk->part_tbl, partno, bdev, GFP_KERNEL);
  	if (err)
-@@ -654,6 +665,11 @@ static bool blk_add_partition(struct gen
+@@ -658,6 +669,11 @@ static bool blk_add_partition(struct gen
  	    (state->parts[p].flags & ADDPART_FLAG_RAID))
  		md_autodetect_dev(part->bd_dev);
  

target/linux/qualcommax/patches-6.6/0065-v6.7-arm64-dts-qcom-ipq5018-add-watchdog.patch

@@ -13,12 +13,10 @@ Signed-off-by: Bjorn Andersson <andersson@kernel.org>
  arch/arm64/boot/dts/qcom/ipq5018.dtsi | 7 +++++++
  1 file changed, 7 insertions(+)
 
-diff --git a/arch/arm64/boot/dts/qcom/ipq5018.dtsi b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
-index 9f13d2dcdfd589..288758c91379df 100644
 --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
 +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
-@@ -181,6 +181,13 @@
+@@ -391,6 +391,13 @@
- 			};
+ 			clock-names = "xo";
  		};
  
 +		watchdog: watchdog@b017000 {

target/linux/qualcommax/patches-6.6/0068-v6.7-dt-bindings-qcom-scm-document-IPQ5018-compatible.patch

@@ -13,8 +13,6 @@ Signed-off-by: Bjorn Andersson <andersson@kernel.org>
  Documentation/devicetree/bindings/firmware/qcom,scm.yaml | 1 +
  1 file changed, 1 insertion(+)
 
-diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.yaml b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml
-index cb706145ae04c1..0613a37a851af4 100644
 --- a/Documentation/devicetree/bindings/firmware/qcom,scm.yaml
 +++ b/Documentation/devicetree/bindings/firmware/qcom,scm.yaml
 @@ -24,6 +24,7 @@ properties:

target/linux/qualcommax/patches-6.6/0069-v6.7-arm64-dts-qcom-IPQ5018-indicate-that-SDI-shoud-be-disabled.patch

@@ -1,28 +0,0 @@
-From 79796e87215db9587d6c66ec6f6781e091bc6464 Mon Sep 17 00:00:00 2001
-From: Robert Marko <robimarko@gmail.com>
-Date: Wed, 16 Aug 2023 18:45:41 +0200
-Subject: [PATCH] arm64: dts: qcom: ipq5018: indicate that SDI should be
- disabled
-
-Now that SCM has support for indicating that SDI has been enabled by
-default, lets set the property so SCM disables it during probing.
-
-Signed-off-by: Robert Marko <robimarko@gmail.com>
-Link: https://lore.kernel.org/r/20230816164641.3371878-4-robimarko@gmail.com
-Signed-off-by: Bjorn Andersson <andersson@kernel.org>
----
- arch/arm64/boot/dts/qcom/ipq5018.dtsi | 1 +
- 1 file changed, 1 insertion(+)
-
-diff --git a/arch/arm64/boot/dts/qcom/ipq5018.dtsi b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
-index 288758c91379df..38ffdc3cbdcd7c 100644
---- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
-+++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
-@@ -57,6 +57,7 @@
- 	firmware {
- 		scm {
- 			compatible = "qcom,scm-ipq5018", "qcom,scm";
-+			qcom,sdi-enabled;
- 		};
- 	};
- 

target/linux/qualcommax/patches-6.6/0070-v6.7-dt-bindings-phy-qcom-m31-Add-IPQ5018-compatible.patch

@@ -13,8 +13,6 @@ Signed-off-by: Vinod Koul <vkoul@kernel.org>
  .../devicetree/bindings/phy/qcom,ipq5332-usb-hsphy.yaml       | 4 +++-
  1 file changed, 3 insertions(+), 1 deletion(-)
 
-diff --git a/Documentation/devicetree/bindings/phy/qcom,ipq5332-usb-hsphy.yaml b/Documentation/devicetree/bindings/phy/qcom,ipq5332-usb-hsphy.yaml
-index 2671a048c926c2..e77576d06c0e4e 100644
 --- a/Documentation/devicetree/bindings/phy/qcom,ipq5332-usb-hsphy.yaml
 +++ b/Documentation/devicetree/bindings/phy/qcom,ipq5332-usb-hsphy.yaml
 @@ -17,7 +17,9 @@ description:

target/linux/qualcommax/patches-6.6/0072-v6.7-dt-bindings-usb-dwc3-Add-IPQ5018-compatible.patch

@@ -13,8 +13,6 @@ Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
  Documentation/devicetree/bindings/usb/qcom,dwc3.yaml | 3 +++
  1 file changed, 3 insertions(+)
 
-diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
-index 67591057f2349b..1ad62e55dfe2e2 100644
 --- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
 +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
 @@ -14,6 +14,7 @@ properties:

target/linux/qualcommax/patches-6.6/0073-v6.8-arm64-dts-qcom-ipq5018-Add-USB-related-nodes.patch

@@ -14,13 +14,11 @@ Signed-off-by: Bjorn Andersson <andersson@kernel.org>
  arch/arm64/boot/dts/qcom/ipq5018.dtsi | 54 +++++++++++++++++++++++++++
  1 file changed, 54 insertions(+)
 
-diff --git a/arch/arm64/boot/dts/qcom/ipq5018.dtsi b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
-index 38ffdc3cbdcd7c..340b90cc17db85 100644
 --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
 +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
-@@ -94,6 +94,19 @@
+@@ -204,6 +204,19 @@
- 		#size-cells = <1>;
+ 			status = "disabled";
- 		ranges = <0 0 0 0xffffffff>;
+ 		};
  
 +		usbphy0: phy@5b000 {
 +			compatible = "qcom,ipq5018-usb-hsphy";
@@ -38,11 +36,10 @@ index 38ffdc3cbdcd7c..340b90cc17db85 100644
  		tlmm: pinctrl@1000000 {
  			compatible = "qcom,ipq5018-tlmm";
  			reg = <0x01000000 0x300000>;
-@@ -156,6 +169,47 @@
+@@ -300,6 +313,47 @@
- 			status = "disabled";
  		};
  
-+		usb: usb@8af8800 {
+ 		usb: usb@8af8800 {
 +			compatible = "qcom,ipq5018-dwc3", "qcom,dwc3";
 +			reg = <0x08af8800 0x400>;
 +
@@ -83,6 +80,7 @@ index 38ffdc3cbdcd7c..340b90cc17db85 100644
 +			};
 +		};
 +
- 		intc: interrupt-controller@b000000 {
++		usb: usb@8af8800 {
- 			compatible = "qcom,msm-qgic2";
+ 			compatible = "qcom,ipq5018-dwc3", "qcom,dwc3";
- 			reg = <0x0b000000 0x1000>,  /* GICD */
+ 			reg = <0x08af8800 0x400>;
+ 

target/linux/qualcommax/patches-6.6/0074-v6.8-arm64-dts-qcom-ipq5018-add-QUP1-SPI-controller.patch

@@ -14,12 +14,10 @@ Signed-off-by: Bjorn Andersson <andersson@kernel.org>
  arch/arm64/boot/dts/qcom/ipq5018.dtsi | 24 ++++++++++++++++++++++++
  1 file changed, 24 insertions(+)
 
-diff --git a/arch/arm64/boot/dts/qcom/ipq5018.dtsi b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
-index 340b90cc17db85..0b739077ed7079 100644
 --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
 +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
-@@ -159,6 +159,16 @@
+@@ -288,6 +288,16 @@
- 			status = "disabled";
+ 			qcom,ee = <0>;
  		};
  
 +		blsp_dma: dma-controller@7884000 {
@@ -35,7 +33,7 @@ index 340b90cc17db85..0b739077ed7079 100644
  		blsp1_uart1: serial@78af000 {
  			compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
  			reg = <0x078af000 0x200>;
-@@ -169,6 +179,20 @@
+@@ -298,6 +308,20 @@
  			status = "disabled";
  		};
  
@@ -53,6 +51,6 @@ index 340b90cc17db85..0b739077ed7079 100644
 +			status = "disabled";
 +		};
 +
- 		usb: usb@8af8800 {
+ 		blsp1_spi1: spi@78b5000 {
- 			compatible = "qcom,ipq5018-dwc3", "qcom,dwc3";
+ 			compatible = "qcom,spi-qup-v2.2.1";
- 			reg = <0x08af8800 0x400>;
+ 			#address-cells = <1>;

target/linux/qualcommax/patches-6.6/0075-v6.8-dt-bindings-clock-qcom-a53pll-add-IPQ5018-compatible.patch

@@ -13,8 +13,6 @@ Signed-off-by: Bjorn Andersson <andersson@kernel.org>
  Documentation/devicetree/bindings/clock/qcom,a53pll.yaml | 1 +
  1 file changed, 1 insertion(+)
 
-diff --git a/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml b/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml
-index 9436266828afaf..5ca927a8b1d538 100644
 --- a/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml
 +++ b/Documentation/devicetree/bindings/clock/qcom,a53pll.yaml
 @@ -16,6 +16,7 @@ description:

target/linux/qualcommax/patches-6.6/0076-v6.8-clk-qcom-apss-ipq-pll-add-support-for-IPQ5018.patch

@@ -16,11 +16,9 @@ Signed-off-by: Bjorn Andersson <andersson@kernel.org>
  drivers/clk/qcom/apss-ipq-pll.c | 21 +++++++++++++++++++++
  1 file changed, 21 insertions(+)
 
-diff --git a/drivers/clk/qcom/apss-ipq-pll.c b/drivers/clk/qcom/apss-ipq-pll.c
-index 41279e5437a620..678b805f13d455 100644
 --- a/drivers/clk/qcom/apss-ipq-pll.c
 +++ b/drivers/clk/qcom/apss-ipq-pll.c
-@@ -73,6 +73,20 @@ static struct clk_alpha_pll ipq_pll_stromer_plus = {
+@@ -73,6 +73,20 @@ static struct clk_alpha_pll ipq_pll_stro
  	},
  };
  
@@ -54,7 +52,7 @@ index 41279e5437a620..678b805f13d455 100644
  static struct apss_pll_data ipq5332_pll_data = {
  	.pll_type = CLK_ALPHA_PLL_TYPE_STROMER_PLUS,
  	.pll = &ipq_pll_stromer_plus,
-@@ -195,6 +215,7 @@ static int apss_ipq_pll_probe(struct platform_device *pdev)
+@@ -195,6 +215,7 @@ static int apss_ipq_pll_probe(struct pla
  }
  
  static const struct of_device_id apss_ipq_pll_match_table[] = {

target/linux/qualcommax/patches-6.6/0077-v6.8-arm64-dts-qcom-ipq5018-enable-the-CPUFreq-support.patch

@@ -14,40 +14,12 @@ Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 Link: https://lore.kernel.org/r/20230925102826.405446-4-quic_gokulsri@quicinc.com
 Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 ---
- arch/arm64/boot/dts/qcom/ipq5018.dtsi | 40 +++++++++++++++++++++++++++
+ arch/arm64/boot/dts/qcom/ipq5018.dtsi | 37 +++++++++++++++++++++++++++
- 1 file changed, 40 insertions(+)
+ 1 file changed, 37 insertions(+)
 
-diff --git a/arch/arm64/boot/dts/qcom/ipq5018.dtsi b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
-index 0b739077ed7079..ae31bd72f0b739 100644
 --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
 +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
-@@ -5,6 +5,7 @@
+@@ -76,6 +76,25 @@
-  * Copyright (c) 2023 The Linux Foundation. All rights reserved.
-  */
- 
-+#include <dt-bindings/clock/qcom,apss-ipq.h>
- #include <dt-bindings/interrupt-controller/arm-gic.h>
- #include <dt-bindings/clock/qcom,gcc-ipq5018.h>
- #include <dt-bindings/reset/qcom,gcc-ipq5018.h>
-@@ -36,6 +37,8 @@
- 			reg = <0x0>;
- 			enable-method = "psci";
- 			next-level-cache = <&L2_0>;
-+			clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>;
-+			operating-points-v2 = <&cpu_opp_table>;
- 		};
- 
- 		CPU1: cpu@1 {
-@@ -44,6 +47,8 @@
- 			reg = <0x1>;
- 			enable-method = "psci";
- 			next-level-cache = <&L2_0>;
-+			clocks = <&apcs_glb APCS_ALIAS0_CORE_CLK>;
-+			operating-points-v2 = <&cpu_opp_table>;
- 		};
- 
- 		L2_0: l2-cache {
-@@ -54,6 +59,25 @@
  		};
  	};
  
@@ -73,7 +45,7 @@ index 0b739077ed7079..ae31bd72f0b739 100644
  	firmware {
  		scm {
  			compatible = "qcom,scm-ipq5018", "qcom,scm";
-@@ -267,6 +291,24 @@
+@@ -476,6 +495,24 @@
  			clocks = <&sleep_clk>;
  		};
  

target/linux/qualcommax/patches-6.6/0078-v6.8-arm64-dts-qcom-ipq5018-add-few-more-reserved-memory-regions.patch

@@ -26,9 +26,9 @@ Signed-off-by: Bjorn Andersson <andersson@kernel.org>
 
 --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
 +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
-@@ -106,6 +106,24 @@
+@@ -141,6 +141,24 @@
- 		#size-cells = <2>;
+ 			hwlocks = <&tcsr_mutex 3>;
- 		ranges;
+ 		};
  
 +		bootloader@4a800000 {
 +			reg = <0x0 0x4a800000 0x0 0x200000>;
@@ -51,16 +51,16 @@ Signed-off-by: Bjorn Andersson <andersson@kernel.org>
  		tz_region: tz@4ac00000 {
  			reg = <0x0 0x4ac00000 0x0 0x200000>;
  			no-map;
-@@ -166,6 +184,12 @@
+@@ -275,6 +293,12 @@
- 			#power-domain-cells = <1>;
  		};
  
-+		tcsr_mutex: hwlock@1905000 {
+ 		tcsr_mutex: hwlock@1905000 {
 +			compatible = "qcom,tcsr-mutex";
 +			reg = <0x01905000 0x20000>;
 +			#hwlock-cells = <1>;
 +		};
 +
- 		sdhc_1: mmc@7804000 {
++		tcsr_mutex: hwlock@1905000 {
- 			compatible = "qcom,ipq5018-sdhci", "qcom,sdhci-msm-v5";
+ 			compatible = "qcom,tcsr-mutex";
- 			reg = <0x7804000 0x1000>;
+ 			reg = <0x01905000 0x20000>;
+ 			#hwlock-cells = <1>;

target/linux/qualcommax/patches-6.6/0140-dt-bindings-pwm-add-IPQ6018-binding.patch

@@ -10,9 +10,6 @@ Co-developed-by: Baruch Siach <baruch.siach@siklu.com>
 Signed-off-by: Baruch Siach <baruch.siach@siklu.com>
 Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
 ---
-diff --git a/Documentation/devicetree/bindings/pwm/qcom,ipq6018-pwm.yaml b/Documentation/devicetree/bindings/pwm/qcom,ipq6018-pwm.yaml
-new file mode 100644
-index 000000000000..6d0d7ed271f7
 --- /dev/null
 +++ b/Documentation/devicetree/bindings/pwm/qcom,ipq6018-pwm.yaml
 @@ -0,0 +1,45 @@

target/linux/qualcommax/patches-6.6/0141-pwm-driver-for-qualcomm-ipq6018-pwm-block.patch

@@ -12,8 +12,6 @@ Co-developed-by: Baruch Siach <baruch.siach@siklu.com>
 Signed-off-by: Baruch Siach <baruch.siach@siklu.com>
 Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
 ---
-diff --git a/drivers/pwm/Kconfig b/drivers/pwm/Kconfig
-index 8ebcddf91f7b..c2d51680823a 100644
 --- a/drivers/pwm/Kconfig
 +++ b/drivers/pwm/Kconfig
 @@ -282,6 +282,18 @@ config PWM_INTEL_LGM
@@ -35,8 +33,6 @@ index 8ebcddf91f7b..c2d51680823a 100644
  config PWM_IQS620A
  	tristate "Azoteq IQS620A PWM support"
  	depends on MFD_IQS62X || COMPILE_TEST
-diff --git a/drivers/pwm/Makefile b/drivers/pwm/Makefile
-index c822389c2a24..1b69e8cb2b91 100644
 --- a/drivers/pwm/Makefile
 +++ b/drivers/pwm/Makefile
 @@ -24,6 +24,7 @@ obj-$(CONFIG_PWM_IMX1)		+= pwm-imx1.o
@@ -47,9 +43,6 @@ index c822389c2a24..1b69e8cb2b91 100644
  obj-$(CONFIG_PWM_IQS620A)	+= pwm-iqs620a.o
  obj-$(CONFIG_PWM_JZ4740)	+= pwm-jz4740.o
  obj-$(CONFIG_PWM_KEEMBAY)	+= pwm-keembay.o
-diff --git a/drivers/pwm/pwm-ipq.c b/drivers/pwm/pwm-ipq.c
-new file mode 100644
-index 000000000000..5dbe46bb56d6
 --- /dev/null
 +++ b/drivers/pwm/pwm-ipq.c
 @@ -0,0 +1,282 @@

target/linux/qualcommax/patches-6.6/0153-thermal-qcom-tsens-add-support-for-IPQ5018-tsens.patch

@@ -13,11 +13,9 @@ Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
  drivers/thermal/qcom/tsens.h    |  2 +-
  3 files changed, 64 insertions(+), 1 deletion(-)
 
-diff --git a/drivers/thermal/qcom/tsens-v1.c b/drivers/thermal/qcom/tsens-v1.c
-index dc1c4ae2d8b0..acee2064f83e 100644
 --- a/drivers/thermal/qcom/tsens-v1.c
 +++ b/drivers/thermal/qcom/tsens-v1.c
-@@ -79,6 +79,18 @@ static struct tsens_features tsens_v1_feat = {
+@@ -79,6 +79,18 @@ static struct tsens_features tsens_v1_fe
  	.trip_max_temp	= 120000,
  };
  
@@ -36,7 +34,7 @@ index dc1c4ae2d8b0..acee2064f83e 100644
  static const struct reg_field tsens_v1_regfields[MAX_REGFIELDS] = {
  	/* ----- SROT ------ */
  	/* VERSION */
-@@ -150,6 +162,41 @@ static int __init init_8956(struct tsens_priv *priv) {
+@@ -150,6 +162,41 @@ static int __init init_8956(struct tsens
  	return init_common(priv);
  }
  
@@ -95,11 +93,9 @@ index dc1c4ae2d8b0..acee2064f83e 100644
 +	.feat		= &tsens_v1_ipq5018_feat,
 +	.fields		= tsens_v1_regfields,
 +};
-diff --git a/drivers/thermal/qcom/tsens.c b/drivers/thermal/qcom/tsens.c
-index 0a43ccf02ec4..c792b9dc6676 100644
 --- a/drivers/thermal/qcom/tsens.c
 +++ b/drivers/thermal/qcom/tsens.c
-@@ -1101,6 +1101,9 @@ static SIMPLE_DEV_PM_OPS(tsens_pm_ops, tsens_suspend, tsens_resume);
+@@ -1101,6 +1101,9 @@ static SIMPLE_DEV_PM_OPS(tsens_pm_ops, t
  
  static const struct of_device_id tsens_table[] = {
  	{
@@ -109,8 +105,6 @@ index 0a43ccf02ec4..c792b9dc6676 100644
  		.compatible = "qcom,ipq8064-tsens",
  		.data = &data_8960,
  	}, {
-diff --git a/drivers/thermal/qcom/tsens.h b/drivers/thermal/qcom/tsens.h
-index e254cd2df904..b6594b546d11 100644
 --- a/drivers/thermal/qcom/tsens.h
 +++ b/drivers/thermal/qcom/tsens.h
 @@ -645,7 +645,7 @@ extern struct tsens_plat_data data_8960;

target/linux/qualcommax/patches-6.6/0154-dts-qcom-IPQ5018-add-tsens-node.patch

@@ -15,7 +15,7 @@ Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
 
 --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
 +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
-@@ -149,6 +149,117 @@
+@@ -254,6 +254,117 @@
  			status = "disabled";
  		};
  
@@ -133,11 +133,10 @@ Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
  		tlmm: pinctrl@1000000 {
  			compatible = "qcom,ipq5018-tlmm";
  			reg = <0x01000000 0x300000>;
-@@ -391,6 +502,64 @@
+@@ -651,6 +762,64 @@
- 			};
+ 		};		
- 		};
  	};
-+
+ 
 +	thermal-zones {
 +		cpu-thermal {
 +			polling-delay-passive = <0>;
@@ -195,6 +194,7 @@ Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
 +			};
 +		};
 +	};
- 
++
  	timer {
  		compatible = "arm,armv8-timer";
+ 		interrupts = <GIC_PPI 2 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,

target/linux/qualcommax/patches-6.6/0155-dt-bindings-phy-qcom-document-PCIe-uniphy.patch

@@ -10,9 +10,6 @@ Signed-off-by: Nitheesh Sekar <quic_nsekar@quicinc.com>
  1 file changed, 77 insertions(+)
  create mode 100644 Documentation/devicetree/bindings/phy/qcom,uniphy-pcie-28lp.yaml
 
-diff --git a/Documentation/devicetree/bindings/phy/qcom,ipq5018-uniphy-pcie.yaml b/Documentation/devicetree/bindings/phy/qcom,ipq5018-uniphy-pcie.yaml
-new file mode 100644
-index 000000000000..6b2574f9532e
 --- /dev/null
 +++ b/Documentation/devicetree/bindings/phy/qcom,ipq5018-uniphy-pcie.yaml
 @@ -0,0 +1,77 @@

target/linux/qualcommax/patches-6.6/0159-arm64-dts-qcom-IPQ5018-add-PCIe-related-nodes.patch

@@ -12,7 +12,7 @@ Signed-off-by: Nitheesh Sekar <quic_nsekar@quicinc.com>
 
 --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
 +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
-@@ -149,6 +149,38 @@
+@@ -254,6 +254,38 @@
  			status = "disabled";
  		};
  
@@ -51,7 +51,7 @@ Signed-off-by: Nitheesh Sekar <quic_nsekar@quicinc.com>
  		qfprom: qfprom@a0000 {
  			compatible = "qcom,ipq5018-qfprom", "qcom,qfprom";
  			reg = <0xa0000 0x1000>;
-@@ -283,8 +315,8 @@
+@@ -388,8 +420,8 @@
  			reg = <0x01800000 0x80000>;
  			clocks = <&xo_board_clk>,
  				 <&sleep_clk>,
@@ -62,8 +62,8 @@ Signed-off-by: Nitheesh Sekar <quic_nsekar@quicinc.com>
  				 <0>,
  				 <0>,
  				 <0>,
-@@ -501,6 +533,142 @@
+@@ -818,6 +850,142 @@
- 				status = "disabled";
+ 				};
  			};
  		};
 +
@@ -204,4 +204,4 @@ Signed-off-by: Nitheesh Sekar <quic_nsekar@quicinc.com>
 +		};
  	};
  
- 	thermal-zones {
+ 	timer {

target/linux/qualcommax/patches-6.6/0162-clk-qcom-apss-ipq-pll-use-stromer-ops-for-IPQ5018-to-fix-boot-failure.patch

@@ -28,8 +28,6 @@ Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
  drivers/clk/qcom/apss-ipq-pll.c | 30 +++++++++++++++++++++++++++---
  1 file changed, 27 insertions(+), 3 deletions(-)
 
-diff --git a/drivers/clk/qcom/apss-ipq-pll.c b/drivers/clk/qcom/apss-ipq-pll.c
-index 678b805f13d45..dfffec2f06ae7 100644
 --- a/drivers/clk/qcom/apss-ipq-pll.c
 +++ b/drivers/clk/qcom/apss-ipq-pll.c
 @@ -55,6 +55,29 @@ static struct clk_alpha_pll ipq_pll_huay

target/linux/qualcommax/patches-6.6/0163-clk-qcom-apss-ipq-pll-fix-PLL-rate-for-IPQ5018.patch

@@ -19,8 +19,6 @@ Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
  drivers/clk/qcom/apss-ipq-pll.c | 3 ++-
  1 file changed, 2 insertions(+), 1 deletion(-)
 
-diff --git a/drivers/clk/qcom/apss-ipq-pll.c b/drivers/clk/qcom/apss-ipq-pll.c
-index 678b805f13d45..5e3da5558f4e0 100644
 --- a/drivers/clk/qcom/apss-ipq-pll.c
 +++ b/drivers/clk/qcom/apss-ipq-pll.c
 @@ -97,7 +97,7 @@ static struct clk_alpha_pll ipq_pll_stro

target/linux/qualcommax/patches-6.6/0302-arm64-dts-qcom-IPQ5018-add-TCSR-node.patch

@@ -8,7 +8,7 @@ Signed-off-by: George Moussalem <george.moussalem@outlook.com>
 ---
 --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
 +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
-@@ -333,6 +333,11 @@
+@@ -447,6 +447,11 @@
  			#hwlock-cells = <1>;
  		};
  

target/linux/qualcommax/patches-6.6/0303-arm64-dts-qcom-IPQ5018-enable-the-download-mode-support.patch

@@ -9,7 +9,7 @@ Signed-off-by: George Moussalem <george.moussalem@outlook.com>
 ---
 --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
 +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
-@@ -82,6 +82,7 @@
+@@ -99,6 +99,7 @@
  		scm {
  			compatible = "qcom,scm-ipq5018", "qcom,scm";
  			qcom,sdi-enabled;

target/linux/qualcommax/patches-6.6/0306-arm64-dts-qcom-ipq5018-Add-PWM-node.patch

@@ -8,7 +8,7 @@ Signed-off-by: George Moussalem <george.moussalem@outlook.com>
 ---
 --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
 +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
-@@ -339,6 +339,16 @@
+@@ -453,6 +453,16 @@
  			reg = <0x01937000 0x21000>;
  		};
  

target/linux/qualcommax/patches-6.6/0324-arm64-dts-qcom-ipq5018-Add-crypto-nodes.patch

@@ -8,7 +8,7 @@ Signed-off-by: George Moussalem <george.moussalem@outlook.com>
 ---
 --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
 +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
-@@ -293,6 +293,30 @@
+@@ -398,6 +398,30 @@
  			#thermal-sensor-cells = <1>;
  		};
  

target/linux/qualcommax/patches-6.6/0337-arm64-dts-qcom-ipq5018-Add-PRNG-node.patch

@@ -8,7 +8,7 @@ Signed-off-by: George Moussalem <george.moussalem@outlook.com>
 ---
 --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
 +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
-@@ -254,6 +254,14 @@
+@@ -359,6 +359,14 @@
  			};
  		};
  

target/linux/qualcommax/patches-6.6/0339-arm64-dts-qcom-ipq5018-Add-QUP1-UART2-node.patch

@@ -8,7 +8,7 @@ Signed-off-by: George Moussalem <george.moussalem@outlook.com>
 ---
 --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
 +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
-@@ -418,6 +418,16 @@
+@@ -542,6 +542,16 @@
  			status = "disabled";
  		};
  

target/linux/qualcommax/patches-6.6/0340-arm64-dts-qcom-ipq5018-Add-QUP3-I2C-node.patch

@@ -8,7 +8,7 @@ Signed-off-by: George Moussalem <george.moussalem@outlook.com>
 ---
 --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
 +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
-@@ -442,6 +442,21 @@
+@@ -580,6 +580,21 @@
  			status = "disabled";
  		};
  

target/linux/qualcommax/patches-6.6/0401-spi-dt-bindings-Introduce-qcom-spi-qpic-snand.patch

@@ -9,9 +9,6 @@ SPI-NAND page cache operations.
 Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com>
 ---
-diff --git a/Documentation/devicetree/bindings/spi/qcom,spi-qpic-snand.yaml b/Documentation/devicetree/bindings/spi/qcom,spi-qpic-snand.yaml
-new file mode 100644
-index 000000000000..f0d9f7643849
 --- /dev/null
 +++ b/Documentation/devicetree/bindings/spi/qcom,spi-qpic-snand.yaml
 @@ -0,0 +1,83 @@

target/linux/qualcommax/patches-6.6/0402-mtd-rawnand-qcom-cleanup-qcom_nandc-driver.patch

@@ -14,8 +14,6 @@ cleanup qcom_nandc driver as below
 
 Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com>
 ---
-diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c
-index b8cff9240b28..d134329330fe 100644
 --- a/drivers/mtd/nand/raw/qcom_nandc.c
 +++ b/drivers/mtd/nand/raw/qcom_nandc.c
 @@ -189,17 +189,6 @@
@@ -90,7 +88,7 @@ index b8cff9240b28..d134329330fe 100644
  	bool use_codeword_fixup;
  };
  
-@@ -613,19 +599,11 @@ static void clear_bam_transaction(struct qcom_nand_controller *nandc)
+@@ -613,19 +599,11 @@ static void clear_bam_transaction(struct
  {
  	struct bam_transaction *bam_txn = nandc->bam_txn;
  
@@ -112,7 +110,7 @@ index b8cff9240b28..d134329330fe 100644
  
  	sg_init_table(bam_txn->cmd_sgl, nandc->max_cwperpage *
  		      QPIC_PER_CW_CMD_SGL);
-@@ -640,17 +618,7 @@ static void qpic_bam_dma_done(void *data)
+@@ -640,17 +618,7 @@ static void qpic_bam_dma_done(void *data
  {
  	struct bam_transaction *bam_txn = data;
  
@@ -131,7 +129,7 @@ index b8cff9240b28..d134329330fe 100644
  }
  
  static inline struct qcom_nand_host *to_qcom_nand_host(struct nand_chip *chip)
-@@ -676,10 +644,9 @@ static inline void nandc_write(struct qcom_nand_controller *nandc, int offset,
+@@ -676,10 +644,9 @@ static inline void nandc_write(struct qc
  	iowrite32(val, nandc->base + offset);
  }
  
@@ -144,7 +142,7 @@ index b8cff9240b28..d134329330fe 100644
  		return;
  
  	if (is_cpu)
-@@ -694,93 +661,90 @@ static inline void nandc_read_buffer_sync(struct qcom_nand_controller *nandc,
+@@ -694,93 +661,90 @@ static inline void nandc_read_buffer_syn
  					   DMA_FROM_DEVICE);
  }
  
@@ -200,14 +198,27 @@ index b8cff9240b28..d134329330fe 100644
 -	default:
 -		return NULL;
 -	}
-+/* Helper to check the code word, whether it is last cw or not */
+-}
-+static bool qcom_nandc_is_last_cw(struct nand_ecc_ctrl *ecc, int cw)
+-
-+{
-+	return cw == (ecc->steps - 1);
- }
- 
 -static void nandc_set_reg(struct nand_chip *chip, int offset,
 -			  u32 val)
+-{
+-	struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
+-	struct nandc_regs *regs = nandc->regs;
+-	__le32 *reg;
+-
+-	reg = offset_to_nandc_reg(regs, offset);
+-
+-	if (reg)
+-		*reg = cpu_to_le32(val);
+-}
+-
+ /* Helper to check the code word, whether it is last cw or not */
+ static bool qcom_nandc_is_last_cw(struct nand_ecc_ctrl *ecc, int cw)
+ {
+ 	return cw == (ecc->steps - 1);
+ }
+ 
 +/**
 + * nandc_set_read_loc_first() - to set read location first register
 + * @chip:		NAND Private Flash Chip Data
@@ -221,12 +232,8 @@ index b8cff9240b28..d134329330fe 100644
 +static void nandc_set_read_loc_first(struct nand_chip *chip,
 +				     int reg_base, u32 cw_offset,
 +				     u32 read_size, u32 is_last_read_loc)
- {
++{
- 	struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
++	struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
--	struct nandc_regs *regs = nandc->regs;
--	__le32 *reg;
--
--	reg = offset_to_nandc_reg(regs, offset);
 +	__le32 locreg_val;
 +	u32 val = (((cw_offset) << READ_LOCATION_OFFSET) |
 +		  ((read_size) << READ_LOCATION_SIZE) |
@@ -263,16 +270,9 @@ index b8cff9240b28..d134329330fe 100644
 +	u32 val = (((cw_offset) << READ_LOCATION_OFFSET) |
 +		  ((read_size) << READ_LOCATION_SIZE) |
 +		  ((is_last_read_loc) << READ_LOCATION_LAST));
- 
++
--	if (reg)
--		*reg = cpu_to_le32(val);
--}
 +	locreg_val = cpu_to_le32(val);
- 
++
--/* Helper to check the code word, whether it is last cw or not */
--static bool qcom_nandc_is_last_cw(struct nand_ecc_ctrl *ecc, int cw)
--{
--	return cw == (ecc->steps - 1);
 +	if (reg_base == NAND_READ_LOCATION_LAST_CW_0)
 +		nandc->regs->read_location_last0 = locreg_val;
 +	else if (reg_base == NAND_READ_LOCATION_LAST_CW_1)
@@ -281,8 +281,8 @@ index b8cff9240b28..d134329330fe 100644
 +		nandc->regs->read_location_last2 = locreg_val;
 +	else if (reg_base == NAND_READ_LOCATION_LAST_CW_3)
 +		nandc->regs->read_location_last3 = locreg_val;
- }
++}
- 
++
  /* helper to configure location register values */
  static void nandc_set_read_loc(struct nand_chip *chip, int cw, int reg,
 -			       int cw_offset, int read_size, int is_last_read_loc)
@@ -303,7 +303,7 @@ index b8cff9240b28..d134329330fe 100644
  		return nandc_set_read_loc_last(chip, reg_base, cw_offset,
  				read_size, is_last_read_loc);
  	else
-@@ -792,12 +756,13 @@ static void nandc_set_read_loc(struct nand_chip *chip, int cw, int reg,
+@@ -792,12 +756,13 @@ static void nandc_set_read_loc(struct na
  static void set_address(struct qcom_nand_host *host, u16 column, int page)
  {
  	struct nand_chip *chip = &host->chip;
@@ -319,7 +319,7 @@ index b8cff9240b28..d134329330fe 100644
  }
  
  /*
-@@ -811,41 +776,43 @@ static void set_address(struct qcom_nand_host *host, u16 column, int page)
+@@ -811,41 +776,43 @@ static void set_address(struct qcom_nand
  static void update_rw_regs(struct qcom_nand_host *host, int num_cw, bool read, int cw)
  {
  	struct nand_chip *chip = &host->chip;
@@ -384,7 +384,7 @@ index b8cff9240b28..d134329330fe 100644
  
  	if (read)
  		nandc_set_read_loc(chip, cw, 0, 0, host->use_ecc ?
-@@ -1121,7 +1088,7 @@ static int read_reg_dma(struct qcom_nand_controller *nandc, int first,
+@@ -1121,7 +1088,7 @@ static int read_reg_dma(struct qcom_nand
  	if (first == NAND_DEV_CMD_VLD || first == NAND_DEV_CMD1)
  		first = dev_cmd_reg_addr(nandc, first);
  
@@ -393,7 +393,7 @@ index b8cff9240b28..d134329330fe 100644
  		return prep_bam_dma_desc_cmd(nandc, true, first, vaddr,
  					     num_regs, flags);
  
-@@ -1136,25 +1103,16 @@ static int read_reg_dma(struct qcom_nand_controller *nandc, int first,
+@@ -1136,25 +1103,16 @@ static int read_reg_dma(struct qcom_nand
   * write_reg_dma:	prepares a descriptor to write a given number of
   *			contiguous registers
   *
@@ -423,7 +423,7 @@ index b8cff9240b28..d134329330fe 100644
  
  	if (first == NAND_EXEC_CMD)
  		flags |= NAND_BAM_NWD;
-@@ -1165,7 +1123,7 @@ static int write_reg_dma(struct qcom_nand_controller *nandc, int first,
+@@ -1165,7 +1123,7 @@ static int write_reg_dma(struct qcom_nan
  	if (first == NAND_DEV_CMD_VLD_RESTORE || first == NAND_DEV_CMD_VLD)
  		first = dev_cmd_reg_addr(nandc, NAND_DEV_CMD_VLD);
  
@@ -432,7 +432,7 @@ index b8cff9240b28..d134329330fe 100644
  		return prep_bam_dma_desc_cmd(nandc, false, first, vaddr,
  					     num_regs, flags);
  
-@@ -1188,7 +1146,7 @@ static int write_reg_dma(struct qcom_nand_controller *nandc, int first,
+@@ -1188,7 +1146,7 @@ static int write_reg_dma(struct qcom_nan
  static int read_data_dma(struct qcom_nand_controller *nandc, int reg_off,
  			 const u8 *vaddr, int size, unsigned int flags)
  {
@@ -441,7 +441,7 @@ index b8cff9240b28..d134329330fe 100644
  		return prep_bam_dma_desc_data(nandc, true, vaddr, size, flags);
  
  	return prep_adm_dma_desc(nandc, true, reg_off, vaddr, size, false);
-@@ -1206,7 +1164,7 @@ static int read_data_dma(struct qcom_nand_controller *nandc, int reg_off,
+@@ -1206,7 +1164,7 @@ static int read_data_dma(struct qcom_nan
  static int write_data_dma(struct qcom_nand_controller *nandc, int reg_off,
  			  const u8 *vaddr, int size, unsigned int flags)
  {
@@ -450,7 +450,7 @@ index b8cff9240b28..d134329330fe 100644
  		return prep_bam_dma_desc_data(nandc, false, vaddr, size, flags);
  
  	return prep_adm_dma_desc(nandc, false, reg_off, vaddr, size, false);
-@@ -1220,13 +1178,14 @@ static void config_nand_page_read(struct nand_chip *chip)
+@@ -1220,13 +1178,14 @@ static void config_nand_page_read(struct
  {
  	struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
  
@@ -472,7 +472,7 @@ index b8cff9240b28..d134329330fe 100644
  }
  
  /*
-@@ -1239,16 +1198,16 @@ config_nand_cw_read(struct nand_chip *chip, bool use_ecc, int cw)
+@@ -1239,16 +1198,16 @@ config_nand_cw_read(struct nand_chip *ch
  	struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
  	struct nand_ecc_ctrl *ecc = &chip->ecc;
  
@@ -496,7 +496,7 @@ index b8cff9240b28..d134329330fe 100644
  
  	if (use_ecc) {
  		read_reg_dma(nandc, NAND_FLASH_STATUS, 2, 0);
-@@ -1279,10 +1238,10 @@ static void config_nand_page_write(struct nand_chip *chip)
+@@ -1279,10 +1238,10 @@ static void config_nand_page_write(struc
  {
  	struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
  
@@ -511,7 +511,7 @@ index b8cff9240b28..d134329330fe 100644
  			      NAND_BAM_NEXT_SGL);
  }
  
-@@ -1294,13 +1253,13 @@ static void config_nand_cw_write(struct nand_chip *chip)
+@@ -1294,13 +1253,13 @@ static void config_nand_cw_write(struct
  {
  	struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
  
@@ -529,7 +529,7 @@ index b8cff9240b28..d134329330fe 100644
  }
  
  /* helpers to submit/free our list of dma descriptors */
-@@ -1311,7 +1270,7 @@ static int submit_descs(struct qcom_nand_controller *nandc)
+@@ -1311,7 +1270,7 @@ static int submit_descs(struct qcom_nand
  	struct bam_transaction *bam_txn = nandc->bam_txn;
  	int ret = 0;
  
@@ -538,7 +538,7 @@ index b8cff9240b28..d134329330fe 100644
  		if (bam_txn->rx_sgl_pos > bam_txn->rx_sgl_start) {
  			ret = prepare_bam_async_desc(nandc, nandc->rx_chan, 0);
  			if (ret)
-@@ -1336,14 +1295,9 @@ static int submit_descs(struct qcom_nand_controller *nandc)
+@@ -1336,14 +1295,9 @@ static int submit_descs(struct qcom_nand
  	list_for_each_entry(desc, &nandc->desc_list, node)
  		cookie = dmaengine_submit(desc->dma_desc);
  
@@ -554,7 +554,7 @@ index b8cff9240b28..d134329330fe 100644
  
  		dma_async_issue_pending(nandc->tx_chan);
  		dma_async_issue_pending(nandc->rx_chan);
-@@ -1365,7 +1319,7 @@ static int submit_descs(struct qcom_nand_controller *nandc)
+@@ -1365,7 +1319,7 @@ err_unmap_free_desc:
  	list_for_each_entry_safe(desc, n, &nandc->desc_list, node) {
  		list_del(&desc->node);
  
@@ -563,7 +563,7 @@ index b8cff9240b28..d134329330fe 100644
  			dma_unmap_sg(nandc->dev, desc->bam_sgl,
  				     desc->sgl_cnt, desc->dir);
  		else
-@@ -1382,7 +1336,7 @@ static int submit_descs(struct qcom_nand_controller *nandc)
+@@ -1382,7 +1336,7 @@ err_unmap_free_desc:
  static void clear_read_regs(struct qcom_nand_controller *nandc)
  {
  	nandc->reg_read_pos = 0;
@@ -572,7 +572,7 @@ index b8cff9240b28..d134329330fe 100644
  }
  
  /*
-@@ -1446,7 +1400,7 @@ static int check_flash_errors(struct qcom_nand_host *host, int cw_cnt)
+@@ -1446,7 +1400,7 @@ static int check_flash_errors(struct qco
  	struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
  	int i;
  
@@ -581,7 +581,7 @@ index b8cff9240b28..d134329330fe 100644
  
  	for (i = 0; i < cw_cnt; i++) {
  		u32 flash = le32_to_cpu(nandc->reg_read_buf[i]);
-@@ -1476,7 +1430,7 @@ qcom_nandc_read_cw_raw(struct mtd_info *mtd, struct nand_chip *chip,
+@@ -1476,7 +1430,7 @@ qcom_nandc_read_cw_raw(struct mtd_info *
  	clear_read_regs(nandc);
  	host->use_ecc = false;
  
@@ -590,7 +590,7 @@ index b8cff9240b28..d134329330fe 100644
  		raw_cw = ecc->steps - 1;
  
  	clear_bam_transaction(nandc);
-@@ -1497,7 +1451,7 @@ qcom_nandc_read_cw_raw(struct mtd_info *mtd, struct nand_chip *chip,
+@@ -1497,7 +1451,7 @@ qcom_nandc_read_cw_raw(struct mtd_info *
  		oob_size2 = host->ecc_bytes_hw + host->spare_bytes;
  	}
  
@@ -599,7 +599,7 @@ index b8cff9240b28..d134329330fe 100644
  		nandc_set_read_loc(chip, cw, 0, read_loc, data_size1, 0);
  		read_loc += data_size1;
  
-@@ -1621,7 +1575,7 @@ static int parse_read_errors(struct qcom_nand_host *host, u8 *data_buf,
+@@ -1621,7 +1575,7 @@ static int parse_read_errors(struct qcom
  	u8 *data_buf_start = data_buf, *oob_buf_start = oob_buf;
  
  	buf = (struct read_stats *)nandc->reg_read_buf;
@@ -608,7 +608,7 @@ index b8cff9240b28..d134329330fe 100644
  
  	for (i = 0; i < ecc->steps; i++, buf++) {
  		u32 flash, buffer, erased_cw;
-@@ -1734,7 +1688,7 @@ static int read_page_ecc(struct qcom_nand_host *host, u8 *data_buf,
+@@ -1734,7 +1688,7 @@ static int read_page_ecc(struct qcom_nan
  			oob_size = host->ecc_bytes_hw + host->spare_bytes;
  		}
  
@@ -617,7 +617,7 @@ index b8cff9240b28..d134329330fe 100644
  			if (data_buf && oob_buf) {
  				nandc_set_read_loc(chip, i, 0, 0, data_size, 0);
  				nandc_set_read_loc(chip, i, 1, data_size,
-@@ -2455,14 +2409,14 @@ static int qcom_nand_attach_chip(struct nand_chip *chip)
+@@ -2455,14 +2409,14 @@ static int qcom_nand_attach_chip(struct
  
  	mtd_set_ooblayout(mtd, &qcom_nand_ooblayout_ops);
  	/* Free the initially allocated BAM transaction for reading the ONFI params */
@@ -634,7 +634,7 @@ index b8cff9240b28..d134329330fe 100644
  		nandc->bam_txn = alloc_bam_transaction(nandc);
  		if (!nandc->bam_txn) {
  			dev_err(nandc->dev,
-@@ -2522,7 +2476,7 @@ static int qcom_nand_attach_chip(struct nand_chip *chip)
+@@ -2522,7 +2476,7 @@ static int qcom_nand_attach_chip(struct
  				| ecc_mode << ECC_MODE
  				| host->ecc_bytes_hw << ECC_PARITY_SIZE_BYTES_BCH;
  
@@ -643,7 +643,7 @@ index b8cff9240b28..d134329330fe 100644
  		host->ecc_buf_cfg = 0x203 << NUM_STEPS;
  
  	host->clrflashstatus = FS_READY_BSY_N;
-@@ -2556,7 +2510,7 @@ static int qcom_op_cmd_mapping(struct nand_chip *chip, u8 opcode,
+@@ -2556,7 +2510,7 @@ static int qcom_op_cmd_mapping(struct na
  		cmd = OP_FETCH_ID;
  		break;
  	case NAND_CMD_PARAM:
@@ -652,7 +652,7 @@ index b8cff9240b28..d134329330fe 100644
  			cmd = OP_PAGE_READ_ONFI_READ;
  		else
  			cmd = OP_PAGE_READ;
-@@ -2609,7 +2563,7 @@ static int qcom_parse_instructions(struct nand_chip *chip,
+@@ -2609,7 +2563,7 @@ static int qcom_parse_instructions(struc
  			if (ret < 0)
  				return ret;
  
@@ -661,7 +661,7 @@ index b8cff9240b28..d134329330fe 100644
  			q_op->rdy_delay_ns = instr->delay_ns;
  			break;
  
-@@ -2619,10 +2573,10 @@ static int qcom_parse_instructions(struct nand_chip *chip,
+@@ -2619,10 +2573,10 @@ static int qcom_parse_instructions(struc
  			addrs = &instr->ctx.addr.addrs[offset];
  
  			for (i = 0; i < min_t(unsigned int, 4, naddrs); i++)
@@ -674,7 +674,7 @@ index b8cff9240b28..d134329330fe 100644
  
  			q_op->rdy_delay_ns = instr->delay_ns;
  			break;
-@@ -2663,7 +2617,7 @@ static int qcom_wait_rdy_poll(struct nand_chip *chip, unsigned int time_ms)
+@@ -2663,7 +2617,7 @@ static int qcom_wait_rdy_poll(struct nan
  	unsigned long start = jiffies + msecs_to_jiffies(time_ms);
  	u32 flash;
  
@@ -683,7 +683,7 @@ index b8cff9240b28..d134329330fe 100644
  
  	do {
  		flash = le32_to_cpu(nandc->reg_read_buf[0]);
-@@ -2706,11 +2660,11 @@ static int qcom_read_status_exec(struct nand_chip *chip,
+@@ -2706,11 +2660,11 @@ static int qcom_read_status_exec(struct
  	clear_read_regs(nandc);
  	clear_bam_transaction(nandc);
  
@@ -699,7 +699,7 @@ index b8cff9240b28..d134329330fe 100644
  	read_reg_dma(nandc, NAND_FLASH_STATUS, 1, NAND_BAM_NEXT_SGL);
  
  	ret = submit_descs(nandc);
-@@ -2719,7 +2673,7 @@ static int qcom_read_status_exec(struct nand_chip *chip,
+@@ -2719,7 +2673,7 @@ static int qcom_read_status_exec(struct
  		goto err_out;
  	}
  
@@ -708,7 +708,7 @@ index b8cff9240b28..d134329330fe 100644
  
  	for (i = 0; i < num_cw; i++) {
  		flash_status = le32_to_cpu(nandc->reg_read_buf[i]);
-@@ -2763,16 +2717,14 @@ static int qcom_read_id_type_exec(struct nand_chip *chip, const struct nand_subo
+@@ -2763,16 +2717,14 @@ static int qcom_read_id_type_exec(struct
  	clear_read_regs(nandc);
  	clear_bam_transaction(nandc);
  
@@ -717,14 +717,14 @@ index b8cff9240b28..d134329330fe 100644
 -	nandc_set_reg(chip, NAND_ADDR1, q_op.addr2_reg);
 -	nandc_set_reg(chip, NAND_FLASH_CHIP_SELECT,
 -		      nandc->props->is_bam ? 0 : DM_EN);
--
--	nandc_set_reg(chip, NAND_EXEC_CMD, 1);
 +	nandc->regs->cmd = q_op.cmd_reg;
 +	nandc->regs->addr0 = q_op.addr1_reg;
 +	nandc->regs->addr1 = q_op.addr2_reg;
 +	nandc->regs->chip_sel = cpu_to_le32(nandc->props->supports_bam ? 0 : DM_EN);
 +	nandc->regs->exec = cpu_to_le32(1);
  
+-	nandc_set_reg(chip, NAND_EXEC_CMD, 1);
+-
 -	write_reg_dma(nandc, NAND_FLASH_CMD, 4, NAND_BAM_NEXT_SGL);
 -	write_reg_dma(nandc, NAND_EXEC_CMD, 1, NAND_BAM_NEXT_SGL);
 +	write_reg_dma(nandc, &nandc->regs->cmd, NAND_FLASH_CMD, 4, NAND_BAM_NEXT_SGL);
@@ -732,7 +732,7 @@ index b8cff9240b28..d134329330fe 100644
  
  	read_reg_dma(nandc, NAND_READ_ID, 1, NAND_BAM_NEXT_SGL);
  
-@@ -2786,7 +2738,7 @@ static int qcom_read_id_type_exec(struct nand_chip *chip, const struct nand_subo
+@@ -2786,7 +2738,7 @@ static int qcom_read_id_type_exec(struct
  	op_id = q_op.data_instr_idx;
  	len = nand_subop_get_data_len(subop, op_id);
  
@@ -741,7 +741,7 @@ index b8cff9240b28..d134329330fe 100644
  	memcpy(instr->ctx.data.buf.in, nandc->reg_read_buf, len);
  
  err_out:
-@@ -2807,15 +2759,14 @@ static int qcom_misc_cmd_type_exec(struct nand_chip *chip, const struct nand_sub
+@@ -2807,15 +2759,14 @@ static int qcom_misc_cmd_type_exec(struc
  
  	if (q_op.flag == OP_PROGRAM_PAGE) {
  		goto wait_rdy;
@@ -764,7 +764,7 @@ index b8cff9240b28..d134329330fe 100644
  		return 0;
  	}
  
-@@ -2826,14 +2777,14 @@ static int qcom_misc_cmd_type_exec(struct nand_chip *chip, const struct nand_sub
+@@ -2826,14 +2777,14 @@ static int qcom_misc_cmd_type_exec(struc
  	clear_read_regs(nandc);
  	clear_bam_transaction(nandc);
  
@@ -785,7 +785,7 @@ index b8cff9240b28..d134329330fe 100644
  	read_reg_dma(nandc, NAND_FLASH_STATUS, 1, NAND_BAM_NEXT_SGL);
  
  	ret = submit_descs(nandc);
-@@ -2864,7 +2815,7 @@ static int qcom_param_page_type_exec(struct nand_chip *chip,  const struct nand_
+@@ -2864,7 +2815,7 @@ static int qcom_param_page_type_exec(str
  	if (ret)
  		return ret;
  
@@ -794,27 +794,11 @@ index b8cff9240b28..d134329330fe 100644
  
  	nandc->buf_count = 0;
  	nandc->buf_start = 0;
-@@ -2872,38 +2823,38 @@ static int qcom_param_page_type_exec(struct nand_chip *chip,  const struct nand_
+@@ -2872,38 +2823,38 @@ static int qcom_param_page_type_exec(str
  	clear_read_regs(nandc);
  	clear_bam_transaction(nandc);
  
 -	nandc_set_reg(chip, NAND_FLASH_CMD, q_op.cmd_reg);
--
--	nandc_set_reg(chip, NAND_ADDR0, 0);
--	nandc_set_reg(chip, NAND_ADDR1, 0);
--	nandc_set_reg(chip, NAND_DEV0_CFG0, 0 << CW_PER_PAGE
--					| 512 << UD_SIZE_BYTES
--					| 5 << NUM_ADDR_CYCLES
--					| 0 << SPARE_SIZE_BYTES);
--	nandc_set_reg(chip, NAND_DEV0_CFG1, 7 << NAND_RECOVERY_CYCLES
--					| 0 << CS_ACTIVE_BSY
--					| 17 << BAD_BLOCK_BYTE_NUM
--					| 1 << BAD_BLOCK_IN_SPARE_AREA
--					| 2 << WR_RD_BSY_GAP
--					| 0 << WIDE_FLASH
--					| 1 << DEV0_CFG1_ECC_DISABLE);
--	if (!nandc->props->qpic_v2)
--		nandc_set_reg(chip, NAND_EBI2_ECC_BUF_CFG, 1 << ECC_CFG_ECC_DISABLE);
 +	nandc->regs->cmd = q_op.cmd_reg;
 +	nandc->regs->addr0 = 0;
 +	nandc->regs->addr1 = 0;
@@ -831,7 +815,22 @@ index b8cff9240b28..d134329330fe 100644
 +			    | 2 << WR_RD_BSY_GAP
 +			    | 0 << WIDE_FLASH
 +			    | 1 << DEV0_CFG1_ECC_DISABLE);
-+
+ 
+-	nandc_set_reg(chip, NAND_ADDR0, 0);
+-	nandc_set_reg(chip, NAND_ADDR1, 0);
+-	nandc_set_reg(chip, NAND_DEV0_CFG0, 0 << CW_PER_PAGE
+-					| 512 << UD_SIZE_BYTES
+-					| 5 << NUM_ADDR_CYCLES
+-					| 0 << SPARE_SIZE_BYTES);
+-	nandc_set_reg(chip, NAND_DEV0_CFG1, 7 << NAND_RECOVERY_CYCLES
+-					| 0 << CS_ACTIVE_BSY
+-					| 17 << BAD_BLOCK_BYTE_NUM
+-					| 1 << BAD_BLOCK_IN_SPARE_AREA
+-					| 2 << WR_RD_BSY_GAP
+-					| 0 << WIDE_FLASH
+-					| 1 << DEV0_CFG1_ECC_DISABLE);
+-	if (!nandc->props->qpic_v2)
+-		nandc_set_reg(chip, NAND_EBI2_ECC_BUF_CFG, 1 << ECC_CFG_ECC_DISABLE);
 +	if (!nandc->props->qpic_version2)
 +		nandc->regs->ecc_buf_cfg = cpu_to_le32(1 << ECC_CFG_ECC_DISABLE);
  
@@ -849,18 +848,19 @@ index b8cff9240b28..d134329330fe 100644
  	}
  
 -	nandc_set_reg(chip, NAND_EXEC_CMD, 1);
-+	nandc->regs->exec = cpu_to_le32(1);
+-
- 
 -	if (!nandc->props->qpic_v2) {
 -		nandc_set_reg(chip, NAND_DEV_CMD1_RESTORE, nandc->cmd1);
 -		nandc_set_reg(chip, NAND_DEV_CMD_VLD_RESTORE, nandc->vld);
++	nandc->regs->exec = cpu_to_le32(1);
++
 +	if (!nandc->props->qpic_version2) {
 +		nandc->regs->orig_cmd1 = cpu_to_le32(nandc->cmd1);
 +		nandc->regs->orig_vld = cpu_to_le32(nandc->vld);
  	}
  
  	instr = q_op.data_instr;
-@@ -2912,9 +2863,9 @@ static int qcom_param_page_type_exec(struct nand_chip *chip,  const struct nand_
+@@ -2912,9 +2863,9 @@ static int qcom_param_page_type_exec(str
  
  	nandc_set_read_loc(chip, 0, 0, 0, len, 1);
  
@@ -873,7 +873,7 @@ index b8cff9240b28..d134329330fe 100644
  	}
  
  	nandc->buf_count = len;
-@@ -2926,9 +2877,10 @@ static int qcom_param_page_type_exec(struct nand_chip *chip,  const struct nand_
+@@ -2926,9 +2877,10 @@ static int qcom_param_page_type_exec(str
  		      nandc->buf_count, 0);
  
  	/* restore CMD1 and VLD regs */
@@ -887,7 +887,7 @@ index b8cff9240b28..d134329330fe 100644
  	}
  
  	ret = submit_descs(nandc);
-@@ -3017,7 +2969,7 @@ static const struct nand_controller_ops qcom_nandc_ops = {
+@@ -3017,7 +2969,7 @@ static const struct nand_controller_ops
  
  static void qcom_nandc_unalloc(struct qcom_nand_controller *nandc)
  {
@@ -896,7 +896,7 @@ index b8cff9240b28..d134329330fe 100644
  		if (!dma_mapping_error(nandc->dev, nandc->reg_read_dma))
  			dma_unmap_single(nandc->dev, nandc->reg_read_dma,
  					 MAX_REG_RD *
-@@ -3070,7 +3022,7 @@ static int qcom_nandc_alloc(struct qcom_nand_controller *nandc)
+@@ -3070,7 +3022,7 @@ static int qcom_nandc_alloc(struct qcom_
  	if (!nandc->reg_read_buf)
  		return -ENOMEM;
  
@@ -905,7 +905,7 @@ index b8cff9240b28..d134329330fe 100644
  		nandc->reg_read_dma =
  			dma_map_single(nandc->dev, nandc->reg_read_buf,
  				       MAX_REG_RD *
-@@ -3151,15 +3103,15 @@ static int qcom_nandc_setup(struct qcom_nand_controller *nandc)
+@@ -3151,15 +3103,15 @@ static int qcom_nandc_setup(struct qcom_
  	u32 nand_ctrl;
  
  	/* kill onenand */
@@ -924,7 +924,7 @@ index b8cff9240b28..d134329330fe 100644
  		nand_ctrl = nandc_read(nandc, NAND_CTRL);
  
  		/*
-@@ -3176,7 +3128,7 @@ static int qcom_nandc_setup(struct qcom_nand_controller *nandc)
+@@ -3176,7 +3128,7 @@ static int qcom_nandc_setup(struct qcom_
  	}
  
  	/* save the original values of these registers */
@@ -933,7 +933,7 @@ index b8cff9240b28..d134329330fe 100644
  		nandc->cmd1 = nandc_read(nandc, dev_cmd_reg_addr(nandc, NAND_DEV_CMD1));
  		nandc->vld = NAND_DEV_CMD_VLD_VAL;
  	}
-@@ -3349,7 +3301,7 @@ static int qcom_nandc_parse_dt(struct platform_device *pdev)
+@@ -3349,7 +3301,7 @@ static int qcom_nandc_parse_dt(struct pl
  	struct device_node *np = nandc->dev->of_node;
  	int ret;
  
@@ -942,7 +942,7 @@ index b8cff9240b28..d134329330fe 100644
  		ret = of_property_read_u32(np, "qcom,cmd-crci",
  					   &nandc->cmd_crci);
  		if (ret) {
-@@ -3474,30 +3426,30 @@ static void qcom_nandc_remove(struct platform_device *pdev)
+@@ -3474,30 +3426,30 @@ static void qcom_nandc_remove(struct pla
  
  static const struct qcom_nandc_props ipq806x_nandc_props = {
  	.ecc_modes = (ECC_RS_4BIT | ECC_BCH_8BIT),

target/linux/qualcommax/patches-6.6/0403-mtd-rawnand-qcom-Add-qcom-prefix-to-common-api.patch

@@ -7,8 +7,6 @@ used by spi nand driver and raw nand driver.
 
 Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com>
 ---
-diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c
-index d134329330fe..daf8f73b25bc 100644
 --- a/drivers/mtd/nand/raw/qcom_nandc.c
 +++ b/drivers/mtd/nand/raw/qcom_nandc.c
 @@ -53,7 +53,7 @@
@@ -38,7 +36,7 @@ index d134329330fe..daf8f73b25bc 100644
  {
  	struct bam_transaction *bam_txn = nandc->bam_txn;
  
-@@ -559,7 +559,7 @@ static void free_bam_transaction(struct qcom_nand_controller *nandc)
+@@ -559,7 +559,7 @@ static void free_bam_transaction(struct
  
  /* Allocates and Initializes the BAM transaction */
  static struct bam_transaction *
@@ -47,7 +45,7 @@ index d134329330fe..daf8f73b25bc 100644
  {
  	struct bam_transaction *bam_txn;
  	size_t bam_txn_size;
-@@ -595,7 +595,7 @@ alloc_bam_transaction(struct qcom_nand_controller *nandc)
+@@ -595,7 +595,7 @@ alloc_bam_transaction(struct qcom_nand_c
  }
  
  /* Clears the BAM transaction indexes */
@@ -56,7 +54,7 @@ index d134329330fe..daf8f73b25bc 100644
  {
  	struct bam_transaction *bam_txn = nandc->bam_txn;
  
-@@ -614,7 +614,7 @@ static void clear_bam_transaction(struct qcom_nand_controller *nandc)
+@@ -614,7 +614,7 @@ static void clear_bam_transaction(struct
  }
  
  /* Callback for DMA descriptor completion */
@@ -65,7 +63,7 @@ index d134329330fe..daf8f73b25bc 100644
  {
  	struct bam_transaction *bam_txn = data;
  
-@@ -644,7 +644,7 @@ static inline void nandc_write(struct qcom_nand_controller *nandc, int offset,
+@@ -644,7 +644,7 @@ static inline void nandc_write(struct qc
  	iowrite32(val, nandc->base + offset);
  }
  
@@ -74,7 +72,7 @@ index d134329330fe..daf8f73b25bc 100644
  {
  	if (!nandc->props->supports_bam)
  		return;
-@@ -824,9 +824,9 @@ static void update_rw_regs(struct qcom_nand_host *host, int num_cw, bool read, i
+@@ -824,9 +824,9 @@ static void update_rw_regs(struct qcom_n
   * for BAM. This descriptor will be added in the NAND DMA descriptor queue
   * which will be submitted to DMA engine.
   */
@@ -87,7 +85,7 @@ index d134329330fe..daf8f73b25bc 100644
  {
  	struct desc_info *desc;
  	struct scatterlist *sgl;
-@@ -903,9 +903,9 @@ static int prepare_bam_async_desc(struct qcom_nand_controller *nandc,
+@@ -903,9 +903,9 @@ static int prepare_bam_async_desc(struct
   * NAND_BAM_NEXT_SGL will be used for starting the separate SGL
   * after the current command element.
   */
@@ -100,7 +98,7 @@ index d134329330fe..daf8f73b25bc 100644
  {
  	int bam_ce_size;
  	int i, ret;
-@@ -943,9 +943,9 @@ static int prep_bam_dma_desc_cmd(struct qcom_nand_controller *nandc, bool read,
+@@ -943,9 +943,9 @@ static int prep_bam_dma_desc_cmd(struct
  		bam_txn->bam_ce_start = bam_txn->bam_ce_pos;
  
  		if (flags & NAND_BAM_NWD) {
@@ -113,7 +111,7 @@ index d134329330fe..daf8f73b25bc 100644
  			if (ret)
  				return ret;
  		}
-@@ -958,9 +958,8 @@ static int prep_bam_dma_desc_cmd(struct qcom_nand_controller *nandc, bool read,
+@@ -958,9 +958,8 @@ static int prep_bam_dma_desc_cmd(struct
   * Prepares the data descriptor for BAM DMA which will be used for NAND
   * data reads and writes.
   */
@@ -125,7 +123,7 @@ index d134329330fe..daf8f73b25bc 100644
  {
  	int ret;
  	struct bam_transaction *bam_txn = nandc->bam_txn;
-@@ -979,8 +978,8 @@ static int prep_bam_dma_desc_data(struct qcom_nand_controller *nandc, bool read,
+@@ -979,8 +978,8 @@ static int prep_bam_dma_desc_data(struct
  		 * is not set, form the DMA descriptor
  		 */
  		if (!(flags & NAND_BAM_NO_EOT)) {
@@ -136,7 +134,7 @@ index d134329330fe..daf8f73b25bc 100644
  			if (ret)
  				return ret;
  		}
-@@ -989,9 +988,9 @@ static int prep_bam_dma_desc_data(struct qcom_nand_controller *nandc, bool read,
+@@ -989,9 +988,9 @@ static int prep_bam_dma_desc_data(struct
  	return 0;
  }
  
@@ -149,7 +147,7 @@ index d134329330fe..daf8f73b25bc 100644
  {
  	struct desc_info *desc;
  	struct dma_async_tx_descriptor *dma_desc;
-@@ -1069,15 +1068,15 @@ static int prep_adm_dma_desc(struct qcom_nand_controller *nandc, bool read,
+@@ -1069,15 +1068,15 @@ err:
  }
  
  /*
@@ -168,7 +166,7 @@ index d134329330fe..daf8f73b25bc 100644
  {
  	bool flow_control = false;
  	void *vaddr;
-@@ -1089,18 +1088,18 @@ static int read_reg_dma(struct qcom_nand_controller *nandc, int first,
+@@ -1089,18 +1088,18 @@ static int read_reg_dma(struct qcom_nand
  		first = dev_cmd_reg_addr(nandc, first);
  
  	if (nandc->props->supports_bam)
@@ -190,7 +188,7 @@ index d134329330fe..daf8f73b25bc 100644
   *			contiguous registers
   *
   * @vaddr:		contnigeous memory from where register value will
-@@ -1109,8 +1108,8 @@ static int read_reg_dma(struct qcom_nand_controller *nandc, int first,
+@@ -1109,8 +1108,8 @@ static int read_reg_dma(struct qcom_nand
   * @num_regs:		number of registers to write
   * @flags:		flags to control DMA descriptor preparation
   */
@@ -201,7 +199,7 @@ index d134329330fe..daf8f73b25bc 100644
  {
  	bool flow_control = false;
  
-@@ -1124,18 +1123,18 @@ static int write_reg_dma(struct qcom_nand_controller *nandc, __le32 *vaddr,
+@@ -1124,18 +1123,18 @@ static int write_reg_dma(struct qcom_nan
  		first = dev_cmd_reg_addr(nandc, NAND_DEV_CMD_VLD);
  
  	if (nandc->props->supports_bam)
@@ -223,7 +221,7 @@ index d134329330fe..daf8f73b25bc 100644
   *			controller's internal buffer to the buffer 'vaddr'
   *
   * @reg_off:		offset within the controller's data buffer
-@@ -1143,17 +1142,17 @@ static int write_reg_dma(struct qcom_nand_controller *nandc, __le32 *vaddr,
+@@ -1143,17 +1142,17 @@ static int write_reg_dma(struct qcom_nan
   * @size:		DMA transaction size in bytes
   * @flags:		flags to control DMA descriptor preparation
   */
@@ -246,7 +244,7 @@ index d134329330fe..daf8f73b25bc 100644
   *			'vaddr' to the controller's internal buffer
   *
   * @reg_off:		offset within the controller's data buffer
-@@ -1161,13 +1160,13 @@ static int read_data_dma(struct qcom_nand_controller *nandc, int reg_off,
+@@ -1161,13 +1160,13 @@ static int read_data_dma(struct qcom_nan
   * @size:		DMA transaction size in bytes
   * @flags:		flags to control DMA descriptor preparation
   */
@@ -264,7 +262,7 @@ index d134329330fe..daf8f73b25bc 100644
  }
  
  /*
-@@ -1178,14 +1177,14 @@ static void config_nand_page_read(struct nand_chip *chip)
+@@ -1178,14 +1177,14 @@ static void config_nand_page_read(struct
  {
  	struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
  
@@ -286,7 +284,7 @@ index d134329330fe..daf8f73b25bc 100644
  }
  
  /*
-@@ -1204,17 +1203,17 @@ config_nand_cw_read(struct nand_chip *chip, bool use_ecc, int cw)
+@@ -1204,17 +1203,17 @@ config_nand_cw_read(struct nand_chip *ch
  		reg = &nandc->regs->read_location_last0;
  
  	if (nandc->props->supports_bam)
@@ -311,7 +309,7 @@ index d134329330fe..daf8f73b25bc 100644
  	}
  }
  
-@@ -1238,11 +1237,11 @@ static void config_nand_page_write(struct nand_chip *chip)
+@@ -1238,11 +1237,11 @@ static void config_nand_page_write(struc
  {
  	struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
  
@@ -327,7 +325,7 @@ index d134329330fe..daf8f73b25bc 100644
  }
  
  /*
-@@ -1253,17 +1252,18 @@ static void config_nand_cw_write(struct nand_chip *chip)
+@@ -1253,17 +1252,18 @@ static void config_nand_cw_write(struct
  {
  	struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
  
@@ -352,7 +350,7 @@ index d134329330fe..daf8f73b25bc 100644
  {
  	struct desc_info *desc, *n;
  	dma_cookie_t cookie = 0;
-@@ -1272,21 +1272,21 @@ static int submit_descs(struct qcom_nand_controller *nandc)
+@@ -1272,21 +1272,21 @@ static int submit_descs(struct qcom_nand
  
  	if (nandc->props->supports_bam) {
  		if (bam_txn->rx_sgl_pos > bam_txn->rx_sgl_start) {
@@ -379,7 +377,7 @@ index d134329330fe..daf8f73b25bc 100644
  			if (ret)
  				goto err_unmap_free_desc;
  		}
-@@ -1296,7 +1296,7 @@ static int submit_descs(struct qcom_nand_controller *nandc)
+@@ -1296,7 +1296,7 @@ static int submit_descs(struct qcom_nand
  		cookie = dmaengine_submit(desc->dma_desc);
  
  	if (nandc->props->supports_bam) {
@@ -388,7 +386,7 @@ index d134329330fe..daf8f73b25bc 100644
  		bam_txn->last_cmd_desc->callback_param = bam_txn;
  
  		dma_async_issue_pending(nandc->tx_chan);
-@@ -1314,7 +1314,7 @@ static int submit_descs(struct qcom_nand_controller *nandc)
+@@ -1314,7 +1314,7 @@ static int submit_descs(struct qcom_nand
  err_unmap_free_desc:
  	/*
  	 * Unmap the dma sg_list and free the desc allocated by both
@@ -397,7 +395,7 @@ index d134329330fe..daf8f73b25bc 100644
  	 */
  	list_for_each_entry_safe(desc, n, &nandc->desc_list, node) {
  		list_del(&desc->node);
-@@ -1333,10 +1333,10 @@ static int submit_descs(struct qcom_nand_controller *nandc)
+@@ -1333,10 +1333,10 @@ err_unmap_free_desc:
  }
  
  /* reset the register read buffer for next NAND operation */
@@ -410,7 +408,7 @@ index d134329330fe..daf8f73b25bc 100644
  }
  
  /*
-@@ -1400,7 +1400,7 @@ static int check_flash_errors(struct qcom_nand_host *host, int cw_cnt)
+@@ -1400,7 +1400,7 @@ static int check_flash_errors(struct qco
  	struct qcom_nand_controller *nandc = get_qcom_nand_controller(chip);
  	int i;
  
@@ -419,7 +417,7 @@ index d134329330fe..daf8f73b25bc 100644
  
  	for (i = 0; i < cw_cnt; i++) {
  		u32 flash = le32_to_cpu(nandc->reg_read_buf[i]);
-@@ -1427,13 +1427,13 @@ qcom_nandc_read_cw_raw(struct mtd_info *mtd, struct nand_chip *chip,
+@@ -1427,13 +1427,13 @@ qcom_nandc_read_cw_raw(struct mtd_info *
  	nand_read_page_op(chip, page, 0, NULL, 0);
  	nandc->buf_count = 0;
  	nandc->buf_start = 0;
@@ -435,7 +433,7 @@ index d134329330fe..daf8f73b25bc 100644
  	set_address(host, host->cw_size * cw, page);
  	update_rw_regs(host, 1, true, raw_cw);
  	config_nand_page_read(chip);
-@@ -1466,18 +1466,18 @@ qcom_nandc_read_cw_raw(struct mtd_info *mtd, struct nand_chip *chip,
+@@ -1466,18 +1466,18 @@ qcom_nandc_read_cw_raw(struct mtd_info *
  
  	config_nand_cw_read(chip, false, raw_cw);
  
@@ -459,7 +457,7 @@ index d134329330fe..daf8f73b25bc 100644
  	if (ret) {
  		dev_err(nandc->dev, "failure to read raw cw %d\n", cw);
  		return ret;
-@@ -1575,7 +1575,7 @@ static int parse_read_errors(struct qcom_nand_host *host, u8 *data_buf,
+@@ -1575,7 +1575,7 @@ static int parse_read_errors(struct qcom
  	u8 *data_buf_start = data_buf, *oob_buf_start = oob_buf;
  
  	buf = (struct read_stats *)nandc->reg_read_buf;
@@ -468,7 +466,7 @@ index d134329330fe..daf8f73b25bc 100644
  
  	for (i = 0; i < ecc->steps; i++, buf++) {
  		u32 flash, buffer, erased_cw;
-@@ -1704,8 +1704,8 @@ static int read_page_ecc(struct qcom_nand_host *host, u8 *data_buf,
+@@ -1704,8 +1704,8 @@ static int read_page_ecc(struct qcom_nan
  		config_nand_cw_read(chip, true, i);
  
  		if (data_buf)
@@ -479,7 +477,7 @@ index d134329330fe..daf8f73b25bc 100644
  
  		/*
  		 * when ecc is enabled, the controller doesn't read the real
-@@ -1720,8 +1720,8 @@ static int read_page_ecc(struct qcom_nand_host *host, u8 *data_buf,
+@@ -1720,8 +1720,8 @@ static int read_page_ecc(struct qcom_nan
  			for (j = 0; j < host->bbm_size; j++)
  				*oob_buf++ = 0xff;
  
@@ -490,7 +488,7 @@ index d134329330fe..daf8f73b25bc 100644
  		}
  
  		if (data_buf)
-@@ -1730,7 +1730,7 @@ static int read_page_ecc(struct qcom_nand_host *host, u8 *data_buf,
+@@ -1730,7 +1730,7 @@ static int read_page_ecc(struct qcom_nan
  			oob_buf += oob_size;
  	}
  
@@ -499,7 +497,7 @@ index d134329330fe..daf8f73b25bc 100644
  	if (ret) {
  		dev_err(nandc->dev, "failure to read page/oob\n");
  		return ret;
-@@ -1751,7 +1751,7 @@ static int copy_last_cw(struct qcom_nand_host *host, int page)
+@@ -1751,7 +1751,7 @@ static int copy_last_cw(struct qcom_nand
  	int size;
  	int ret;
  
@@ -508,7 +506,7 @@ index d134329330fe..daf8f73b25bc 100644
  
  	size = host->use_ecc ? host->cw_data : host->cw_size;
  
-@@ -1763,9 +1763,9 @@ static int copy_last_cw(struct qcom_nand_host *host, int page)
+@@ -1763,9 +1763,9 @@ static int copy_last_cw(struct qcom_nand
  
  	config_nand_single_cw_page_read(chip, host->use_ecc, ecc->steps - 1);
  
@@ -520,7 +518,7 @@ index d134329330fe..daf8f73b25bc 100644
  	if (ret)
  		dev_err(nandc->dev, "failed to copy last codeword\n");
  
-@@ -1851,14 +1851,14 @@ static int qcom_nandc_read_page(struct nand_chip *chip, u8 *buf,
+@@ -1851,14 +1851,14 @@ static int qcom_nandc_read_page(struct n
  	nandc->buf_count = 0;
  	nandc->buf_start = 0;
  	host->use_ecc = true;
@@ -537,7 +535,7 @@ index d134329330fe..daf8f73b25bc 100644
  
  	return read_page_ecc(host, data_buf, oob_buf, page);
  }
-@@ -1899,8 +1899,8 @@ static int qcom_nandc_read_oob(struct nand_chip *chip, int page)
+@@ -1899,8 +1899,8 @@ static int qcom_nandc_read_oob(struct na
  	if (host->nr_boot_partitions)
  		qcom_nandc_codeword_fixup(host, page);
  
@@ -548,7 +546,7 @@ index d134329330fe..daf8f73b25bc 100644
  
  	host->use_ecc = true;
  	set_address(host, 0, page);
-@@ -1927,8 +1927,8 @@ static int qcom_nandc_write_page(struct nand_chip *chip, const u8 *buf,
+@@ -1927,8 +1927,8 @@ static int qcom_nandc_write_page(struct
  	set_address(host, 0, page);
  	nandc->buf_count = 0;
  	nandc->buf_start = 0;
@@ -559,7 +557,7 @@ index d134329330fe..daf8f73b25bc 100644
  
  	data_buf = (u8 *)buf;
  	oob_buf = chip->oob_poi;
-@@ -1949,8 +1949,8 @@ static int qcom_nandc_write_page(struct nand_chip *chip, const u8 *buf,
+@@ -1949,8 +1949,8 @@ static int qcom_nandc_write_page(struct
  			oob_size = ecc->bytes;
  		}
  
@@ -570,7 +568,7 @@ index d134329330fe..daf8f73b25bc 100644
  
  		/*
  		 * when ECC is enabled, we don't really need to write anything
-@@ -1962,8 +1962,8 @@ static int qcom_nandc_write_page(struct nand_chip *chip, const u8 *buf,
+@@ -1962,8 +1962,8 @@ static int qcom_nandc_write_page(struct
  		if (qcom_nandc_is_last_cw(ecc, i)) {
  			oob_buf += host->bbm_size;
  
@@ -581,7 +579,7 @@ index d134329330fe..daf8f73b25bc 100644
  		}
  
  		config_nand_cw_write(chip);
-@@ -1972,7 +1972,7 @@ static int qcom_nandc_write_page(struct nand_chip *chip, const u8 *buf,
+@@ -1972,7 +1972,7 @@ static int qcom_nandc_write_page(struct
  		oob_buf += oob_size;
  	}
  
@@ -590,7 +588,7 @@ index d134329330fe..daf8f73b25bc 100644
  	if (ret) {
  		dev_err(nandc->dev, "failure to write page\n");
  		return ret;
-@@ -1997,8 +1997,8 @@ static int qcom_nandc_write_page_raw(struct nand_chip *chip,
+@@ -1997,8 +1997,8 @@ static int qcom_nandc_write_page_raw(str
  		qcom_nandc_codeword_fixup(host, page);
  
  	nand_prog_page_begin_op(chip, page, 0, NULL, 0);
@@ -601,7 +599,7 @@ index d134329330fe..daf8f73b25bc 100644
  
  	data_buf = (u8 *)buf;
  	oob_buf = chip->oob_poi;
-@@ -2024,28 +2024,28 @@ static int qcom_nandc_write_page_raw(struct nand_chip *chip,
+@@ -2024,28 +2024,28 @@ static int qcom_nandc_write_page_raw(str
  			oob_size2 = host->ecc_bytes_hw + host->spare_bytes;
  		}
  
@@ -638,7 +636,7 @@ index d134329330fe..daf8f73b25bc 100644
  	if (ret) {
  		dev_err(nandc->dev, "failure to write raw page\n");
  		return ret;
-@@ -2075,7 +2075,7 @@ static int qcom_nandc_write_oob(struct nand_chip *chip, int page)
+@@ -2075,7 +2075,7 @@ static int qcom_nandc_write_oob(struct n
  		qcom_nandc_codeword_fixup(host, page);
  
  	host->use_ecc = true;
@@ -647,7 +645,7 @@ index d134329330fe..daf8f73b25bc 100644
  
  	/* calculate the data and oob size for the last codeword/step */
  	data_size = ecc->size - ((ecc->steps - 1) << 2);
-@@ -2090,11 +2090,11 @@ static int qcom_nandc_write_oob(struct nand_chip *chip, int page)
+@@ -2090,11 +2090,11 @@ static int qcom_nandc_write_oob(struct n
  	update_rw_regs(host, 1, false, 0);
  
  	config_nand_page_write(chip);
@@ -662,7 +660,7 @@ index d134329330fe..daf8f73b25bc 100644
  	if (ret) {
  		dev_err(nandc->dev, "failure to write oob\n");
  		return ret;
-@@ -2121,7 +2121,7 @@ static int qcom_nandc_block_bad(struct nand_chip *chip, loff_t ofs)
+@@ -2121,7 +2121,7 @@ static int qcom_nandc_block_bad(struct n
  	 */
  	host->use_ecc = false;
  
@@ -671,7 +669,7 @@ index d134329330fe..daf8f73b25bc 100644
  	ret = copy_last_cw(host, page);
  	if (ret)
  		goto err;
-@@ -2148,8 +2148,8 @@ static int qcom_nandc_block_markbad(struct nand_chip *chip, loff_t ofs)
+@@ -2148,8 +2148,8 @@ static int qcom_nandc_block_markbad(stru
  	struct nand_ecc_ctrl *ecc = &chip->ecc;
  	int page, ret;
  
@@ -682,7 +680,7 @@ index d134329330fe..daf8f73b25bc 100644
  
  	/*
  	 * to mark the BBM as bad, we flash the entire last codeword with 0s.
-@@ -2166,11 +2166,11 @@ static int qcom_nandc_block_markbad(struct nand_chip *chip, loff_t ofs)
+@@ -2166,11 +2166,11 @@ static int qcom_nandc_block_markbad(stru
  	update_rw_regs(host, 1, false, ecc->steps - 1);
  
  	config_nand_page_write(chip);
@@ -697,7 +695,7 @@ index d134329330fe..daf8f73b25bc 100644
  	if (ret) {
  		dev_err(nandc->dev, "failure to update BBM\n");
  		return ret;
-@@ -2410,14 +2410,14 @@ static int qcom_nand_attach_chip(struct nand_chip *chip)
+@@ -2410,14 +2410,14 @@ static int qcom_nand_attach_chip(struct
  	mtd_set_ooblayout(mtd, &qcom_nand_ooblayout_ops);
  	/* Free the initially allocated BAM transaction for reading the ONFI params */
  	if (nandc->props->supports_bam)
@@ -714,7 +712,7 @@ index d134329330fe..daf8f73b25bc 100644
  		if (!nandc->bam_txn) {
  			dev_err(nandc->dev,
  				"failed to allocate bam transaction\n");
-@@ -2617,7 +2617,7 @@ static int qcom_wait_rdy_poll(struct nand_chip *chip, unsigned int time_ms)
+@@ -2617,7 +2617,7 @@ static int qcom_wait_rdy_poll(struct nan
  	unsigned long start = jiffies + msecs_to_jiffies(time_ms);
  	u32 flash;
  
@@ -723,7 +721,7 @@ index d134329330fe..daf8f73b25bc 100644
  
  	do {
  		flash = le32_to_cpu(nandc->reg_read_buf[0]);
-@@ -2657,23 +2657,23 @@ static int qcom_read_status_exec(struct nand_chip *chip,
+@@ -2657,23 +2657,23 @@ static int qcom_read_status_exec(struct
  	nandc->buf_start = 0;
  	host->use_ecc = false;
  
@@ -754,7 +752,7 @@ index d134329330fe..daf8f73b25bc 100644
  
  	for (i = 0; i < num_cw; i++) {
  		flash_status = le32_to_cpu(nandc->reg_read_buf[i]);
-@@ -2714,8 +2714,8 @@ static int qcom_read_id_type_exec(struct nand_chip *chip, const struct nand_subo
+@@ -2714,8 +2714,8 @@ static int qcom_read_id_type_exec(struct
  	nandc->buf_start = 0;
  	host->use_ecc = false;
  
@@ -765,7 +763,7 @@ index d134329330fe..daf8f73b25bc 100644
  
  	nandc->regs->cmd = q_op.cmd_reg;
  	nandc->regs->addr0 = q_op.addr1_reg;
-@@ -2723,12 +2723,12 @@ static int qcom_read_id_type_exec(struct nand_chip *chip, const struct nand_subo
+@@ -2723,12 +2723,12 @@ static int qcom_read_id_type_exec(struct
  	nandc->regs->chip_sel = cpu_to_le32(nandc->props->supports_bam ? 0 : DM_EN);
  	nandc->regs->exec = cpu_to_le32(1);
  
@@ -782,7 +780,7 @@ index d134329330fe..daf8f73b25bc 100644
  	if (ret) {
  		dev_err(nandc->dev, "failure in submitting read id descriptor\n");
  		goto err_out;
-@@ -2738,7 +2738,7 @@ static int qcom_read_id_type_exec(struct nand_chip *chip, const struct nand_subo
+@@ -2738,7 +2738,7 @@ static int qcom_read_id_type_exec(struct
  	op_id = q_op.data_instr_idx;
  	len = nand_subop_get_data_len(subop, op_id);
  
@@ -791,7 +789,7 @@ index d134329330fe..daf8f73b25bc 100644
  	memcpy(instr->ctx.data.buf.in, nandc->reg_read_buf, len);
  
  err_out:
-@@ -2774,20 +2774,20 @@ static int qcom_misc_cmd_type_exec(struct nand_chip *chip, const struct nand_sub
+@@ -2774,20 +2774,20 @@ static int qcom_misc_cmd_type_exec(struc
  	nandc->buf_start = 0;
  	host->use_ecc = false;
  
@@ -819,7 +817,7 @@ index d134329330fe..daf8f73b25bc 100644
  	if (ret) {
  		dev_err(nandc->dev, "failure in submitting misc descriptor\n");
  		goto err_out;
-@@ -2820,8 +2820,8 @@ static int qcom_param_page_type_exec(struct nand_chip *chip,  const struct nand_
+@@ -2820,8 +2820,8 @@ static int qcom_param_page_type_exec(str
  	nandc->buf_count = 0;
  	nandc->buf_start = 0;
  	host->use_ecc = false;
@@ -830,7 +828,7 @@ index d134329330fe..daf8f73b25bc 100644
  
  	nandc->regs->cmd = q_op.cmd_reg;
  	nandc->regs->addr0 = 0;
-@@ -2864,8 +2864,8 @@ static int qcom_param_page_type_exec(struct nand_chip *chip,  const struct nand_
+@@ -2864,8 +2864,8 @@ static int qcom_param_page_type_exec(str
  	nandc_set_read_loc(chip, 0, 0, 0, len, 1);
  
  	if (!nandc->props->qpic_version2) {
@@ -841,7 +839,7 @@ index d134329330fe..daf8f73b25bc 100644
  	}
  
  	nandc->buf_count = len;
-@@ -2873,17 +2873,17 @@ static int qcom_param_page_type_exec(struct nand_chip *chip,  const struct nand_
+@@ -2873,17 +2873,17 @@ static int qcom_param_page_type_exec(str
  
  	config_nand_single_cw_page_read(chip, false, 0);
  
@@ -865,7 +863,7 @@ index d134329330fe..daf8f73b25bc 100644
  	if (ret) {
  		dev_err(nandc->dev, "failure in submitting param page descriptor\n");
  		goto err_out;
-@@ -3067,7 +3067,7 @@ static int qcom_nandc_alloc(struct qcom_nand_controller *nandc)
+@@ -3067,7 +3067,7 @@ static int qcom_nandc_alloc(struct qcom_
  		 * maximum codeword size
  		 */
  		nandc->max_cwperpage = 1;

target/linux/qualcommax/patches-6.6/0404-mtd-nand-Add-qpic_common-API-file.patch

@@ -8,13 +8,11 @@ driver and qpic spi nand driver.
 
 Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com>
 ---
-diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
-index 19e1291ac4d5..760a6e4efdac 100644
 --- a/drivers/mtd/nand/Makefile
 +++ b/drivers/mtd/nand/Makefile
-@@ -4,6 +4,10 @@ nandcore-objs := core.o bbt.o
+@@ -5,6 +5,10 @@ obj-$(CONFIG_MTD_NAND_CORE) += nandcore.
- obj-$(CONFIG_MTD_NAND_CORE) += nandcore.o
  obj-$(CONFIG_MTD_NAND_ECC_MEDIATEK) += ecc-mtk.o
+ obj-$(CONFIG_MTD_NAND_MTK_BMT)	+= mtk_bmt.o mtk_bmt_v2.o mtk_bmt_bbt.o mtk_bmt_nmbm.o
  
 +ifeq ($(CONFIG_MTD_NAND_QCOM),y)
 +obj-y	+= qpic_common.o
@@ -23,9 +21,6 @@ index 19e1291ac4d5..760a6e4efdac 100644
  obj-y	+= onenand/
  obj-y	+= raw/
  obj-y	+= spi/
-diff --git a/drivers/mtd/nand/qpic_common.c b/drivers/mtd/nand/qpic_common.c
-new file mode 100644
-index 000000000000..2fe1a82307b4
 --- /dev/null
 +++ b/drivers/mtd/nand/qpic_common.c
 @@ -0,0 +1,738 @@
@@ -767,8 +762,6 @@ index 000000000000..2fe1a82307b4
 +	qcom_nandc_unalloc(nandc);
 +	return ret;
 +}
-diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig
-index d0aaccf72d78..47f5a7561a73 100644
 --- a/drivers/mtd/nand/raw/Kconfig
 +++ b/drivers/mtd/nand/raw/Kconfig
 @@ -330,7 +330,7 @@ config MTD_NAND_HISI504
@@ -780,8 +773,6 @@ index d0aaccf72d78..47f5a7561a73 100644
  	depends on ARCH_QCOM || COMPILE_TEST
  	depends on HAS_IOMEM
  	help
-diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c
-index daf8f73b25bc..91f1eb781cb2 100644
 --- a/drivers/mtd/nand/raw/qcom_nandc.c
 +++ b/drivers/mtd/nand/raw/qcom_nandc.c
 @@ -15,417 +15,7 @@
@@ -1301,7 +1292,7 @@ index daf8f73b25bc..91f1eb781cb2 100644
  static inline struct qcom_nand_host *to_qcom_nand_host(struct nand_chip *chip)
  {
  	return container_of(chip, struct qcom_nand_host, chip);
-@@ -629,8 +128,8 @@ static inline struct qcom_nand_host *to_qcom_nand_host(struct nand_chip *chip)
+@@ -629,8 +128,8 @@ static inline struct qcom_nand_host *to_
  static inline struct qcom_nand_controller *
  get_qcom_nand_controller(struct nand_chip *chip)
  {
@@ -1312,7 +1303,7 @@ index daf8f73b25bc..91f1eb781cb2 100644
  }
  
  static inline u32 nandc_read(struct qcom_nand_controller *nandc, int offset)
-@@ -644,23 +143,6 @@ static inline void nandc_write(struct qcom_nand_controller *nandc, int offset,
+@@ -644,23 +143,6 @@ static inline void nandc_write(struct qc
  	iowrite32(val, nandc->base + offset);
  }
  
@@ -1336,11 +1327,10 @@ index daf8f73b25bc..91f1eb781cb2 100644
  /* Helper to check the code word, whether it is last cw or not */
  static bool qcom_nandc_is_last_cw(struct nand_ecc_ctrl *ecc, int cw)
  {
-@@ -819,356 +301,6 @@ static void update_rw_regs(struct qcom_nand_host *host, int num_cw, bool read, i
+@@ -820,356 +302,6 @@ static void update_rw_regs(struct qcom_n
- 				   host->cw_data : host->cw_size, 1);
  }
  
--/*
+ /*
 - * Maps the scatter gather list for DMA transfer and forms the DMA descriptor
 - * for BAM. This descriptor will be added in the NAND DMA descriptor queue
 - * which will be submitted to DMA engine.
@@ -1690,10 +1680,11 @@ index daf8f73b25bc..91f1eb781cb2 100644
 -	return qcom_prep_adm_dma_desc(nandc, false, reg_off, vaddr, size, false);
 -}
 -
- /*
+-/*
   * Helper to prepare DMA descriptors for configuring registers
   * before reading a NAND page.
-@@ -1262,83 +394,6 @@ static void config_nand_cw_write(struct nand_chip *chip)
+  */
+@@ -1262,83 +394,6 @@ static void config_nand_cw_write(struct
  			   NAND_BAM_NEXT_SGL);
  }
  
@@ -1777,7 +1768,7 @@ index daf8f73b25bc..91f1eb781cb2 100644
  /*
   * when using BCH ECC, the HW flags an error in NAND_FLASH_STATUS if it read
   * an erased CW, and reports an erased CW in NAND_ERASED_CW_DETECT_STATUS.
-@@ -2967,141 +2022,14 @@ static const struct nand_controller_ops qcom_nandc_ops = {
+@@ -2967,141 +2022,14 @@ static const struct nand_controller_ops
  	.exec_op = qcom_nand_exec_op,
  };
  
@@ -1922,7 +1913,7 @@ index daf8f73b25bc..91f1eb781cb2 100644
  	/* kill onenand */
  	if (!nandc->props->nandc_part_of_qpic)
  		nandc_write(nandc, SFLASHC_BURST_CFG, 0);
-@@ -3240,7 +2168,7 @@ static int qcom_nand_host_init_and_register(struct qcom_nand_controller *nandc,
+@@ -3240,7 +2168,7 @@ static int qcom_nand_host_init_and_regis
  	chip->legacy.block_bad		= qcom_nandc_block_bad;
  	chip->legacy.block_markbad	= qcom_nandc_block_markbad;
  
@@ -1931,7 +1922,7 @@ index daf8f73b25bc..91f1eb781cb2 100644
  	chip->options |= NAND_NO_SUBPAGE_WRITE | NAND_USES_DMA |
  			 NAND_SKIP_BBTSCAN;
  
-@@ -3323,17 +2251,21 @@ static int qcom_nandc_parse_dt(struct platform_device *pdev)
+@@ -3323,17 +2251,21 @@ static int qcom_nandc_parse_dt(struct pl
  static int qcom_nandc_probe(struct platform_device *pdev)
  {
  	struct qcom_nand_controller *nandc;
@@ -1954,9 +1945,6 @@ index daf8f73b25bc..91f1eb781cb2 100644
  
  	dev_data = of_device_get_match_data(dev);
  	if (!dev_data) {
-diff --git a/include/linux/mtd/nand-qpic-common.h b/include/linux/mtd/nand-qpic-common.h
-new file mode 100644
-index 000000000000..425994429387
 --- /dev/null
 +++ b/include/linux/mtd/nand-qpic-common.h
 @@ -0,0 +1,468 @@

target/linux/qualcommax/patches-6.6/0405-mtd-rawnand-qcom-use-FIELD_PREP-and-GENMASK.patch

@@ -8,11 +8,9 @@ more readable.
 
 Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com>
 ---
-diff --git a/drivers/mtd/nand/raw/qcom_nandc.c b/drivers/mtd/nand/raw/qcom_nandc.c
-index 91f1eb781cb2..c1159dbc8eba 100644
 --- a/drivers/mtd/nand/raw/qcom_nandc.c
 +++ b/drivers/mtd/nand/raw/qcom_nandc.c
-@@ -281,7 +281,7 @@ static void update_rw_regs(struct qcom_nand_host *host, int num_cw, bool read, i
+@@ -281,7 +281,7 @@ static void update_rw_regs(struct qcom_n
  				(num_cw - 1) << CW_PER_PAGE);
  
  		cfg1 = cpu_to_le32(host->cfg1_raw);
@@ -21,7 +19,7 @@ index 91f1eb781cb2..c1159dbc8eba 100644
  	}
  
  	nandc->regs->cmd = cmd;
-@@ -1494,42 +1494,41 @@ static int qcom_nand_attach_chip(struct nand_chip *chip)
+@@ -1494,42 +1494,41 @@ static int qcom_nand_attach_chip(struct
  	host->cw_size = host->cw_data + ecc->bytes;
  	bad_block_byte = mtd->writesize - host->cw_size * (cwperpage - 1) + 1;
  
@@ -99,7 +97,7 @@ index 91f1eb781cb2..c1159dbc8eba 100644
  
  	if (!nandc->props->qpic_version2)
  		host->ecc_buf_cfg = 0x203 << NUM_STEPS;
-@@ -1882,21 +1881,21 @@ static int qcom_param_page_type_exec(struct nand_chip *chip,  const struct nand_
+@@ -1882,21 +1881,21 @@ static int qcom_param_page_type_exec(str
  	nandc->regs->addr0 = 0;
  	nandc->regs->addr1 = 0;
  
@@ -107,11 +105,7 @@ index 91f1eb781cb2..c1159dbc8eba 100644
 -			    | 512 << UD_SIZE_BYTES
 -			    | 5 << NUM_ADDR_CYCLES
 -			    | 0 << SPARE_SIZE_BYTES);
-+	host->cfg0 = FIELD_PREP(CW_PER_PAGE_MASK, 0) |
+-
-+		     FIELD_PREP(UD_SIZE_BYTES_MASK, 512) |
-+		     FIELD_PREP(NUM_ADDR_CYCLES_MASK, 5) |
-+		     FIELD_PREP(SPARE_SIZE_BYTES_MASK, 0);
- 
 -	nandc->regs->cfg1 = cpu_to_le32(7 << NAND_RECOVERY_CYCLES
 -			    | 0 << CS_ACTIVE_BSY
 -			    | 17 << BAD_BLOCK_BYTE_NUM
@@ -119,6 +113,11 @@ index 91f1eb781cb2..c1159dbc8eba 100644
 -			    | 2 << WR_RD_BSY_GAP
 -			    | 0 << WIDE_FLASH
 -			    | 1 << DEV0_CFG1_ECC_DISABLE);
++	host->cfg0 = FIELD_PREP(CW_PER_PAGE_MASK, 0) |
++		     FIELD_PREP(UD_SIZE_BYTES_MASK, 512) |
++		     FIELD_PREP(NUM_ADDR_CYCLES_MASK, 5) |
++		     FIELD_PREP(SPARE_SIZE_BYTES_MASK, 0);
++
 +	host->cfg1 = FIELD_PREP(NAND_RECOVERY_CYCLES_MASK, 7) |
 +		     FIELD_PREP(BAD_BLOCK_BYTE_NUM_MASK, 17) |
 +		     FIELD_PREP(CS_ACTIVE_BSY, 0) |
@@ -133,8 +132,6 @@ index 91f1eb781cb2..c1159dbc8eba 100644
  
  	/* configure CMD1 and VLD for ONFI param probing in QPIC v1 */
  	if (!nandc->props->qpic_version2) {
-diff --git a/include/linux/mtd/nand-qpic-common.h b/include/linux/mtd/nand-qpic-common.h
-index 425994429387..e79c79775eb8 100644
 --- a/include/linux/mtd/nand-qpic-common.h
 +++ b/include/linux/mtd/nand-qpic-common.h
 @@ -70,35 +70,42 @@

target/linux/qualcommax/patches-6.6/0408-spi-spi-qpic-fixes-compilation-issues.patch

@@ -27,3 +27,4 @@
 +	.remove_new = qcom_spi_remove,
  };
  module_platform_driver(qcom_spi_driver);
+ 

target/linux/qualcommax/patches-6.6/0412-mtd-spinand-qpic-only-support-max-4-bytes-ID.patch

@@ -8,11 +8,9 @@ Signed-off-by: hzy <hzyitc@outlook.com>
  drivers/mtd/nand/spi/core.c | 2 +-
  1 file changed, 1 insertion(+), 1 deletion(-)
 
-diff --git a/drivers/mtd/nand/spi/core.c b/drivers/mtd/nand/spi/core.c
-index 4c54a962c5d6..1a8ac8e20f6e 100644
 --- a/drivers/mtd/nand/spi/core.c
 +++ b/drivers/mtd/nand/spi/core.c
-@@ -1086,7 +1086,7 @@ int spinand_match_and_init(struct spinand_device *spinand,
+@@ -1086,7 +1086,7 @@ int spinand_match_and_init(struct spinan
  		if (rdid_method != info->devid.method)
  			continue;
  
@@ -21,6 +19,3 @@ index 4c54a962c5d6..1a8ac8e20f6e 100644
  			continue;
  
  		nand->memorg = table[i].memorg;
--- 
-2.40.1
-

target/linux/qualcommax/patches-6.6/0421-arm64-dts-qcom-ipq5018-Add-nand-node.patch

@@ -10,7 +10,7 @@ Signed-off-by: hzy <hzyitc@outlook.com>
 
 --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
 +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
-@@ -457,6 +457,36 @@
+@@ -595,6 +595,36 @@
  			status = "disabled";
  		};
  

target/linux/qualcommax/patches-6.6/0431-arm64-dts-qcom-ipq5018-Add-more-nand-compatible-for-.patch

@@ -11,7 +11,7 @@ Signed-off-by: hzy <hzyitc@outlook.com>
 
 --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
 +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
-@@ -469,7 +469,7 @@
+@@ -607,7 +607,7 @@
  		};
  
  		qpic_nand: qpic-nand@79b0000 {

target/linux/qualcommax/patches-6.6/0701-dt-bindings-clock-qcom-Add-CMN-PLL-clock-controller-.patch

@@ -20,9 +20,6 @@ Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
  create mode 100644 Documentation/devicetree/bindings/clock/qcom,ipq9574-cmn-pll.yaml
  create mode 100644 include/dt-bindings/clock/qcom,ipq-cmn-pll.h
 
-diff --git a/Documentation/devicetree/bindings/clock/qcom,ipq9574-cmn-pll.yaml b/Documentation/devicetree/bindings/clock/qcom,ipq9574-cmn-pll.yaml
-new file mode 100644
-index 000000000000..7ad04b58a698
 --- /dev/null
 +++ b/Documentation/devicetree/bindings/clock/qcom,ipq9574-cmn-pll.yaml
 @@ -0,0 +1,70 @@
@@ -96,9 +93,6 @@ index 000000000000..7ad04b58a698
 +        #clock-cells = <1>;
 +    };
 +...
-diff --git a/include/dt-bindings/clock/qcom,ipq-cmn-pll.h b/include/dt-bindings/clock/qcom,ipq-cmn-pll.h
-new file mode 100644
-index 000000000000..64b228659389
 --- /dev/null
 +++ b/include/dt-bindings/clock/qcom,ipq-cmn-pll.h
 @@ -0,0 +1,15 @@
@@ -117,6 +111,3 @@ index 000000000000..64b228659389
 +#define ETH2_50MHZ_CLK			3
 +#define ETH_25MHZ_CLK			4
 +#endif
--- 
-2.40.1
-

target/linux/qualcommax/patches-6.6/0702-clk-qcom-Add-CMN-PLL-clock-controller-driver-for-IPQ.patch

@@ -27,8 +27,6 @@ Signed-off-by: Luo Jie <quic_luoj@quicinc.com>
  3 files changed, 238 insertions(+)
  create mode 100644 drivers/clk/qcom/clk-ipq-cmn-pll.c
 
-diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
-index a79b83758389..5a8a09f9c08c 100644
 --- a/drivers/clk/qcom/Kconfig
 +++ b/drivers/clk/qcom/Kconfig
 @@ -139,6 +139,16 @@ config IPQ_APSS_6018
@@ -48,11 +46,9 @@ index a79b83758389..5a8a09f9c08c 100644
  config IPQ_GCC_4019
  	tristate "IPQ4019 Global Clock Controller"
  	help
-diff --git a/drivers/clk/qcom/Makefile b/drivers/clk/qcom/Makefile
-index 4790c8cca426..6214dfbad90f 100644
 --- a/drivers/clk/qcom/Makefile
 +++ b/drivers/clk/qcom/Makefile
-@@ -23,6 +23,7 @@ obj-$(CONFIG_APQ_MMCC_8084) += mmcc-apq8084.o
+@@ -23,6 +23,7 @@ obj-$(CONFIG_APQ_MMCC_8084) += mmcc-apq8
  obj-$(CONFIG_CLK_GFM_LPASS_SM8250) += lpass-gfm-sm8250.o
  obj-$(CONFIG_IPQ_APSS_PLL) += apss-ipq-pll.o
  obj-$(CONFIG_IPQ_APSS_6018) += apss-ipq6018.o
@@ -60,9 +56,6 @@ index 4790c8cca426..6214dfbad90f 100644
  obj-$(CONFIG_IPQ_GCC_4019) += gcc-ipq4019.o
  obj-$(CONFIG_IPQ_GCC_5018) += gcc-ipq5018.o
  obj-$(CONFIG_IPQ_GCC_5332) += gcc-ipq5332.o
-diff --git a/drivers/clk/qcom/clk-ipq-cmn-pll.c b/drivers/clk/qcom/clk-ipq-cmn-pll.c
-new file mode 100644
-index 000000000000..72030a61a131
 --- /dev/null
 +++ b/drivers/clk/qcom/clk-ipq-cmn-pll.c
 @@ -0,0 +1,227 @@
@@ -293,6 +286,3 @@ index 000000000000..72030a61a131
 +
 +MODULE_DESCRIPTION("Qualcomm Technologies, Inc. IPQ CMN PLL Driver");
 +MODULE_LICENSE("GPL");
--- 
-2.40.1
-

target/linux/qualcommax/patches-6.6/0703-clk-qcom-cmn-pll-add-IPQ5018-support.patch

@@ -9,8 +9,6 @@ Signed-off-by: hzy <hzyitc@outlook.com>
  drivers/clk/qcom/clk-ipq-cmn-pll.c | 29 +++++++++++++++++++++++++++++
  2 files changed, 29 insertions(+), 1 deletion(-)
 
-diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
-index 5a8a09f9c08c..556a5a20a78a 100644
 --- a/drivers/clk/qcom/Kconfig
 +++ b/drivers/clk/qcom/Kconfig
 @@ -141,7 +141,6 @@ config IPQ_APSS_6018
@@ -21,8 +19,6 @@ index 5a8a09f9c08c..556a5a20a78a 100644
  	help
  	  Support for CMN PLL clock controller on IPQ platform. The
  	  CMN PLL feeds the reference clocks to the Ethernet devices
-diff --git a/drivers/clk/qcom/clk-ipq-cmn-pll.c b/drivers/clk/qcom/clk-ipq-cmn-pll.c
-index 72030a61a131..8f2459af3105 100644
 --- a/drivers/clk/qcom/clk-ipq-cmn-pll.c
 +++ b/drivers/clk/qcom/clk-ipq-cmn-pll.c
 @@ -42,6 +42,9 @@
@@ -35,7 +31,7 @@ index 72030a61a131..8f2459af3105 100644
  #define CMN_PLL_REFCLK_SRC_SELECTION		0x28
  #define CMN_PLL_REFCLK_SRC_DIV			GENMASK(9, 8)
  
-@@ -79,6 +82,28 @@ static const struct cmn_pll_fixed_output_clk ipq9574_output_clks[] = {
+@@ -79,6 +82,28 @@ static const struct cmn_pll_fixed_output
  	CLK_PLL_OUTPUT(ETH_25MHZ_CLK, "eth-25mhz", 25000000UL),
  };
  
@@ -64,7 +60,7 @@ index 72030a61a131..8f2459af3105 100644
  static int ipq_cmn_pll_config(struct device *dev, unsigned long parent_rate)
  {
  	void __iomem *base;
-@@ -181,6 +206,10 @@ static int ipq_cmn_pll_clk_probe(struct platform_device *pdev)
+@@ -181,6 +206,10 @@ static int ipq_cmn_pll_clk_probe(struct
  	struct clk *clk;
  	int ret;
  
@@ -75,6 +71,3 @@ index 72030a61a131..8f2459af3105 100644
  	/*
  	 * To access the CMN PLL registers, the GCC AHB & SYSY clocks
  	 * for CMN PLL block need to be enabled.
--- 
-2.40.1
-

target/linux/qualcommax/patches-6.6/0704-arm64-dts-qcom-ipq5018-Add-ethernet-cmn-node.patch

@@ -23,7 +23,7 @@ Signed-off-by: hzy <hzyitc@outlook.com>
  		sleep_clk: sleep-clk {
  			compatible = "fixed-clock";
  			#clock-cells = <0>;
-@@ -182,6 +188,19 @@
+@@ -287,6 +293,19 @@
  			status = "disabled";
  		};
  

target/linux/qualcommax/patches-6.6/0711-net-phy-qcom-Introduce-IPQ5018-internal-PHY-driver.patch

@@ -11,8 +11,6 @@ Signed-off-by: hzy <hzyitc@outlook.com>
  3 files changed, 145 insertions(+)
  create mode 100644 drivers/net/phy/qcom/ipq5018.c
 
-diff --git a/drivers/net/phy/qcom/Kconfig b/drivers/net/phy/qcom/Kconfig
-index 570626cc8e14..6487e6f93011 100644
 --- a/drivers/net/phy/qcom/Kconfig
 +++ b/drivers/net/phy/qcom/Kconfig
 @@ -9,6 +9,12 @@ config AT803X_PHY
@@ -28,8 +26,6 @@ index 570626cc8e14..6487e6f93011 100644
  config QCA83XX_PHY
  	tristate "Qualcomm Atheros QCA833x PHYs"
  	select QCOM_NET_PHYLIB
-diff --git a/drivers/net/phy/qcom/Makefile b/drivers/net/phy/qcom/Makefile
-index f24fb550babd..7ebedd3ed0a2 100644
 --- a/drivers/net/phy/qcom/Makefile
 +++ b/drivers/net/phy/qcom/Makefile
 @@ -1,6 +1,7 @@
@@ -40,9 +36,6 @@ index f24fb550babd..7ebedd3ed0a2 100644
  obj-$(CONFIG_QCA83XX_PHY)	+= qca83xx.o
  obj-$(CONFIG_QCA808X_PHY)	+= qca808x.o
  obj-$(CONFIG_QCA807X_PHY)	+= qca807x.o
-diff --git a/drivers/net/phy/qcom/ipq5018.c b/drivers/net/phy/qcom/ipq5018.c
-new file mode 100644
-index 000000000000..497ad28fe63f
 --- /dev/null
 +++ b/drivers/net/phy/qcom/ipq5018.c
 @@ -0,0 +1,138 @@
@@ -184,6 +177,3 @@ index 000000000000..497ad28fe63f
 +
 +MODULE_DESCRIPTION("Qualcomm IPQ5018 internal PHY driver");
 +MODULE_AUTHOR("Ziyang Huang <hzyitc@outlook.com>");
--- 
-2.40.1
-

target/linux/qualcommax/patches-6.6/0712-arm64-dts-qcom-ipq5018-add-mdio-node.patch

@@ -10,7 +10,7 @@ Signed-off-by: hzy <hzyitc@outlook.com>
 
 --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
 +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
-@@ -188,6 +188,26 @@
+@@ -293,6 +293,26 @@
  			status = "disabled";
  		};
  

target/linux/qualcommax/patches-6.6/0713-arm64-dts-qcom-ipq5018-add-ge_phy-node.patch

@@ -10,7 +10,7 @@ Signed-off-by: hzy <hzyitc@outlook.com>
 
 --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
 +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
-@@ -196,6 +196,18 @@
+@@ -301,6 +301,18 @@
  			clocks = <&gcc GCC_MDIO0_AHB_CLK>;
  			clock-names = "gcc_mdio_ahb_clk";
  			status = "disabled";
@@ -29,7 +29,7 @@ Signed-off-by: hzy <hzyitc@outlook.com>
  		};
  
  		mdio1: mdio@90000 {
-@@ -390,8 +402,8 @@
+@@ -495,8 +507,8 @@
  				 <&pcie_x2phy>,
  				 <&pcie_x1phy>,
  				 <0>,
@@ -38,5 +38,5 @@ Signed-off-by: hzy <hzyitc@outlook.com>
 +				 <&ge_phy 0>,
 +				 <&ge_phy 1>,
  				 <0>,
- 				 <0>;
+ 				 <0>,
- 			#clock-cells = <1>;
+ 				 <&gephy 0>,

target/linux/qualcommax/patches-6.6/0721-clk-gcc-ipq5018-remove-the-unsupported-clk-combinati.patch

@@ -9,11 +9,9 @@ Signed-off-by: hzy <hzyitc@outlook.com>
  drivers/clk/qcom/gcc-ipq5018.c | 4 ++--
  1 file changed, 2 insertions(+), 2 deletions(-)
 
-diff --git a/drivers/clk/qcom/gcc-ipq5018.c b/drivers/clk/qcom/gcc-ipq5018.c
-index 3136ba1c2a59..4a8511d5f3a5 100644
 --- a/drivers/clk/qcom/gcc-ipq5018.c
 +++ b/drivers/clk/qcom/gcc-ipq5018.c
-@@ -677,7 +677,7 @@ static const struct freq_tbl ftbl_gmac1_rx_clk_src[] = {
+@@ -677,7 +677,7 @@ static const struct freq_tbl ftbl_gmac1_
  	F(2500000, P_UNIPHY_RX, 12.5, 0, 0),
  	F(24000000, P_XO, 1, 0, 0),
  	F(25000000, P_UNIPHY_RX, 2.5, 0, 0),
@@ -22,7 +20,7 @@ index 3136ba1c2a59..4a8511d5f3a5 100644
  	F(125000000, P_UNIPHY_RX, 1, 0, 0),
  	F(312500000, P_UNIPHY_RX, 1, 0, 0),
  	{ }
-@@ -717,7 +717,7 @@ static const struct freq_tbl ftbl_gmac1_tx_clk_src[] = {
+@@ -717,7 +717,7 @@ static const struct freq_tbl ftbl_gmac1_
  	F(2500000, P_UNIPHY_TX, 12.5, 0, 0),
  	F(24000000, P_XO, 1, 0, 0),
  	F(25000000, P_UNIPHY_TX, 2.5, 0, 0),
@@ -31,6 +29,3 @@ index 3136ba1c2a59..4a8511d5f3a5 100644
  	F(125000000, P_UNIPHY_TX, 1, 0, 0),
  	F(312500000, P_UNIPHY_TX, 1, 0, 0),
  	{ }
--- 
-2.40.1
-

target/linux/qualcommax/patches-6.6/0722-clk-gcc-ipq5018-hack-for-qca-ssdk.patch

@@ -8,11 +8,9 @@ Signed-off-by: hzy <hzyitc@outlook.com>
  drivers/clk/qcom/gcc-ipq5018.c | 16 ++++++++--------
  1 file changed, 8 insertions(+), 8 deletions(-)
 
-diff --git a/drivers/clk/qcom/gcc-ipq5018.c b/drivers/clk/qcom/gcc-ipq5018.c
-index 4a8511d5f3a5..3d65b7dce59d 100644
 --- a/drivers/clk/qcom/gcc-ipq5018.c
 +++ b/drivers/clk/qcom/gcc-ipq5018.c
-@@ -335,8 +335,8 @@ static const struct parent_map gcc_xo_gpll4_gpll0_gpll0_out_main_div2_map2[] = {
+@@ -335,8 +335,8 @@ static const struct parent_map gcc_xo_gp
  
  static const struct clk_parent_data gcc_xo_gephy_gcc_rx_gephy_gcc_tx_ubi32_pll_gpll0[] = {
  	{ .index = DT_XO },
@@ -23,7 +21,7 @@ index 4a8511d5f3a5..3d65b7dce59d 100644
  	{ .hw = &ubi32_pll.clkr.hw },
  	{ .hw = &gpll0.clkr.hw },
  };
-@@ -351,8 +351,8 @@ static const struct parent_map gcc_xo_gephy_gcc_rx_gephy_gcc_tx_ubi32_pll_gpll0_
+@@ -351,8 +351,8 @@ static const struct parent_map gcc_xo_ge
  
  static const struct clk_parent_data gcc_xo_gephy_gcc_tx_gephy_gcc_rx_ubi32_pll_gpll0[] = {
  	{ .index = DT_XO },
@@ -34,7 +32,7 @@ index 4a8511d5f3a5..3d65b7dce59d 100644
  	{ .hw = &ubi32_pll.clkr.hw },
  	{ .hw = &gpll0.clkr.hw },
  };
-@@ -367,8 +367,8 @@ static const struct parent_map gcc_xo_gephy_gcc_tx_gephy_gcc_rx_ubi32_pll_gpll0_
+@@ -367,8 +367,8 @@ static const struct parent_map gcc_xo_ge
  
  static const struct clk_parent_data gcc_xo_uniphy_gcc_rx_uniphy_gcc_tx_ubi32_pll_gpll0[] = {
  	{ .index = DT_XO },
@@ -45,7 +43,7 @@ index 4a8511d5f3a5..3d65b7dce59d 100644
  	{ .hw = &ubi32_pll.clkr.hw },
  	{ .hw = &gpll0.clkr.hw },
  };
-@@ -383,8 +383,8 @@ static const struct parent_map gcc_xo_uniphy_gcc_rx_uniphy_gcc_tx_ubi32_pll_gpll
+@@ -383,8 +383,8 @@ static const struct parent_map gcc_xo_un
  
  static const struct clk_parent_data gcc_xo_uniphy_gcc_tx_uniphy_gcc_rx_ubi32_pll_gpll0[] = {
  	{ .index = DT_XO },
@@ -56,6 +54,3 @@ index 4a8511d5f3a5..3d65b7dce59d 100644
  	{ .hw = &ubi32_pll.clkr.hw },
  	{ .hw = &gpll0.clkr.hw },
  };
--- 
-2.40.1
-

target/linux/qualcommax/patches-6.6/0751-net-dsa-qca8k-always-enable-SGMII-auto-negotiation.patch

@@ -10,11 +10,9 @@ Signed-off-by: hzy <hzyitc@outlook.com>
  drivers/net/dsa/qca/qca8k-8xxx.c | 9 ++++-----
  1 file changed, 4 insertions(+), 5 deletions(-)
 
-diff --git a/drivers/net/dsa/qca/qca8k-8xxx.c b/drivers/net/dsa/qca/qca8k-8xxx.c
-index 052fc67339d3..c76c11a7aa39 100644
 --- a/drivers/net/dsa/qca/qca8k-8xxx.c
 +++ b/drivers/net/dsa/qca/qca8k-8xxx.c
-@@ -1545,11 +1545,10 @@ static int qca8k_pcs_config(struct phylink_pcs *pcs, unsigned int neg_mode,
+@@ -1545,11 +1545,10 @@ static int qca8k_pcs_config(struct phyli
  		return -EINVAL;
  	}
  
@@ -30,6 +28,3 @@ index 052fc67339d3..c76c11a7aa39 100644
  	if (ret)
  		return ret;
  
--- 
-2.40.1
-

target/linux/qualcommax/patches-6.6/0801-dt-bindings-remoteproc-qcom-Add-support-for-multipd-model.patch

@@ -8,9 +8,6 @@ IPQ5332, IPQ9574 follows multipd model.
 Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
 Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
 ---
-diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,multipd-pil.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,multipd-pil.yaml
-new file mode 100644
-index 000000000000..c52ac1640d7a
 --- /dev/null
 +++ b/Documentation/devicetree/bindings/remoteproc/qcom,multipd-pil.yaml
 @@ -0,0 +1,189 @@

target/linux/qualcommax/patches-6.6/0802-firmware-qcom_scm-ipq5332-add-support-to-pass-metada.patch

@@ -14,11 +14,9 @@ Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
  drivers/firmware/qcom_scm.h | 1 +
  2 files changed, 9 insertions(+)
 
-diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c
-index ea4780eb1fb9..e85c0b513938 100644
 --- a/drivers/firmware/qcom_scm.c
 +++ b/drivers/firmware/qcom_scm.c
-@@ -592,6 +592,14 @@ int qcom_scm_pas_mem_setup(u32 peripheral, phys_addr_t addr, phys_addr_t size)
+@@ -592,6 +592,14 @@ int qcom_scm_pas_mem_setup(u32 periphera
  	if (ret)
  		goto disable_clk;
  
@@ -33,11 +31,9 @@ index ea4780eb1fb9..e85c0b513938 100644
  	ret = qcom_scm_call(__scm->dev, &desc, &res);
  	qcom_scm_bw_disable();
  
-diff --git a/drivers/firmware/qcom_scm.h b/drivers/firmware/qcom_scm.h
-index 7b68fa820495..e5050af85371 100644
 --- a/drivers/firmware/qcom_scm.h
 +++ b/drivers/firmware/qcom_scm.h
-@@ -92,6 +92,7 @@ extern int scm_legacy_call(struct device *dev, const struct qcom_scm_desc *desc,
+@@ -92,6 +92,7 @@ extern int scm_legacy_call(struct device
  
  #define QCOM_SCM_SVC_PIL		0x02
  #define QCOM_SCM_PIL_PAS_INIT_IMAGE	0x01
@@ -45,6 +41,3 @@ index 7b68fa820495..e5050af85371 100644
  #define QCOM_SCM_PIL_PAS_MEM_SETUP	0x02
  #define QCOM_SCM_PIL_PAS_AUTH_AND_RESET	0x05
  #define QCOM_SCM_PIL_PAS_SHUTDOWN	0x06
--- 
-2.40.1
-

target/linux/qualcommax/patches-6.6/0803-firmware-qcom_scm-ipq5332-add-msa-lock-unlock-suppor.patch

@@ -15,11 +15,9 @@ Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
  include/linux/firmware/qcom/qcom_scm.h |  2 +
  3 files changed, 82 insertions(+)
 
-diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c
-index e85c0b513938..70fca012d672 100644
 --- a/drivers/firmware/qcom_scm.c
 +++ b/drivers/firmware/qcom_scm.c
-@@ -712,6 +712,84 @@ bool qcom_scm_pas_supported(u32 peripheral)
+@@ -712,6 +712,84 @@ bool qcom_scm_pas_supported(u32 peripher
  }
  EXPORT_SYMBOL_GPL(qcom_scm_pas_supported);
  
@@ -104,11 +102,9 @@ index e85c0b513938..70fca012d672 100644
  static int __qcom_scm_pas_mss_reset(struct device *dev, bool reset)
  {
  	struct qcom_scm_desc desc = {
-diff --git a/drivers/firmware/qcom_scm.h b/drivers/firmware/qcom_scm.h
-index e5050af85371..345410b56a82 100644
 --- a/drivers/firmware/qcom_scm.h
 +++ b/drivers/firmware/qcom_scm.h
-@@ -98,6 +98,8 @@ extern int scm_legacy_call(struct device *dev, const struct qcom_scm_desc *desc,
+@@ -98,6 +98,8 @@ extern int scm_legacy_call(struct device
  #define QCOM_SCM_PIL_PAS_SHUTDOWN	0x06
  #define QCOM_SCM_PIL_PAS_IS_SUPPORTED	0x07
  #define QCOM_SCM_PIL_PAS_MSS_RESET	0x0a
@@ -117,11 +113,9 @@ index e5050af85371..345410b56a82 100644
  
  #define QCOM_SCM_SVC_IO			0x05
  #define QCOM_SCM_IO_READ		0x01
-diff --git a/include/linux/firmware/qcom/qcom_scm.h b/include/linux/firmware/qcom/qcom_scm.h
-index 0c091a3f6d49..58c476941e71 100644
 --- a/include/linux/firmware/qcom/qcom_scm.h
 +++ b/include/linux/firmware/qcom/qcom_scm.h
-@@ -81,6 +81,8 @@ extern int qcom_scm_pas_mem_setup(u32 peripheral, phys_addr_t addr,
+@@ -81,6 +81,8 @@ extern int qcom_scm_pas_mem_setup(u32 pe
  extern int qcom_scm_pas_auth_and_reset(u32 peripheral);
  extern int qcom_scm_pas_shutdown(u32 peripheral);
  extern bool qcom_scm_pas_supported(u32 peripheral);
@@ -130,5 +124,3 @@ index 0c091a3f6d49..58c476941e71 100644
  
  extern int qcom_scm_io_readl(phys_addr_t addr, unsigned int *val);
  extern int qcom_scm_io_writel(phys_addr_t addr, unsigned int val);
--- 
-2.40.1

target/linux/qualcommax/patches-6.6/0804-remoteproc-qcom-q6v5-Add-multipd-interrupts-support.patch

@@ -17,11 +17,9 @@ Signed-off-by: Manikanta Mylavarapu <quic_mmanikan@quicinc.com>
  drivers/remoteproc/qcom_q6v5.h | 11 +++++++++
  2 files changed, 49 insertions(+), 3 deletions(-)
 
-diff --git a/drivers/remoteproc/qcom_q6v5.c b/drivers/remoteproc/qcom_q6v5.c
-index 4ee5e67a9f03..0e32f13c196d 100644
 --- a/drivers/remoteproc/qcom_q6v5.c
 +++ b/drivers/remoteproc/qcom_q6v5.c
-@@ -112,7 +112,7 @@ static irqreturn_t q6v5_wdog_interrupt(int irq, void *data)
+@@ -112,7 +112,7 @@ static irqreturn_t q6v5_wdog_interrupt(i
  	return IRQ_HANDLED;
  }
  
@@ -30,7 +28,7 @@ index 4ee5e67a9f03..0e32f13c196d 100644
  {
  	struct qcom_q6v5 *q6v5 = data;
  	size_t len;
-@@ -132,8 +132,9 @@ static irqreturn_t q6v5_fatal_interrupt(int irq, void *data)
+@@ -132,8 +132,9 @@ static irqreturn_t q6v5_fatal_interrupt(
  
  	return IRQ_HANDLED;
  }
@@ -41,7 +39,7 @@ index 4ee5e67a9f03..0e32f13c196d 100644
  {
  	struct qcom_q6v5 *q6v5 = data;
  
-@@ -141,6 +142,7 @@ static irqreturn_t q6v5_ready_interrupt(int irq, void *data)
+@@ -141,6 +142,7 @@ static irqreturn_t q6v5_ready_interrupt(
  
  	return IRQ_HANDLED;
  }
@@ -49,7 +47,7 @@ index 4ee5e67a9f03..0e32f13c196d 100644
  
  /**
   * qcom_q6v5_wait_for_start() - wait for remote processor start signal
-@@ -177,7 +179,17 @@ static irqreturn_t q6v5_handover_interrupt(int irq, void *data)
+@@ -177,7 +179,17 @@ static irqreturn_t q6v5_handover_interru
  	return IRQ_HANDLED;
  }
  
@@ -68,7 +66,7 @@ index 4ee5e67a9f03..0e32f13c196d 100644
  {
  	struct qcom_q6v5 *q6v5 = data;
  
-@@ -185,6 +197,7 @@ static irqreturn_t q6v5_stop_interrupt(int irq, void *data)
+@@ -185,6 +197,7 @@ static irqreturn_t q6v5_stop_interrupt(i
  
  	return IRQ_HANDLED;
  }
@@ -76,11 +74,10 @@ index 4ee5e67a9f03..0e32f13c196d 100644
  
  /**
   * qcom_q6v5_request_stop() - request the remote processor to stop
-@@ -214,6 +227,28 @@ int qcom_q6v5_request_stop(struct qcom_q6v5 *q6v5, struct qcom_sysmon *sysmon)
+@@ -215,6 +228,28 @@ int qcom_q6v5_request_stop(struct qcom_q
- }
  EXPORT_SYMBOL_GPL(qcom_q6v5_request_stop);
  
-+/**
+ /**
 + * qcom_q6v5_request_spawn() - request the remote processor to spawn
 + * @q6v5:      reference to qcom_q6v5 context
 + *
@@ -102,11 +99,10 @@ index 4ee5e67a9f03..0e32f13c196d 100644
 +}
 +EXPORT_SYMBOL_GPL(qcom_q6v5_request_spawn);
 +
- /**
++/**
   * qcom_q6v5_panic() - panic handler to invoke a stop on the remote
   * @q6v5:	reference to qcom_q6v5 context
-diff --git a/drivers/remoteproc/qcom_q6v5.h b/drivers/remoteproc/qcom_q6v5.h
+  *
-index 5a859c41896e..4e1bb1a68284 100644
 --- a/drivers/remoteproc/qcom_q6v5.h
 +++ b/drivers/remoteproc/qcom_q6v5.h
 @@ -18,21 +18,27 @@ struct qcom_q6v5 {
@@ -137,7 +133,7 @@ index 5a859c41896e..4e1bb1a68284 100644
  
  	int crash_reason;
  
-@@ -50,7 +56,12 @@ void qcom_q6v5_deinit(struct qcom_q6v5 *q6v5);
+@@ -50,7 +56,12 @@ void qcom_q6v5_deinit(struct qcom_q6v5 *
  int qcom_q6v5_prepare(struct qcom_q6v5 *q6v5);
  int qcom_q6v5_unprepare(struct qcom_q6v5 *q6v5);
  int qcom_q6v5_request_stop(struct qcom_q6v5 *q6v5, struct qcom_sysmon *sysmon);
@@ -150,6 +146,3 @@ index 5a859c41896e..4e1bb1a68284 100644
 +irqreturn_t q6v5_stop_interrupt(int irq, void *data);
  
  #endif
--- 
-2.40.1
-

target/linux/qualcommax/patches-6.6/0806-rproc-qcom_q6v5_mpd-split-q6_wcss-to-rootpd-and-user.patch

@@ -9,8 +9,6 @@ Signed-off-by: hzy <hzyitc@outlook.com>
  drivers/remoteproc/qcom_q6v5_mpd.c | 126 +++++++++++++----------------
  1 file changed, 56 insertions(+), 70 deletions(-)
 
-diff --git a/drivers/remoteproc/qcom_q6v5_mpd.c b/drivers/remoteproc/qcom_q6v5_mpd.c
-index b133285888c7..a1c189ab1f42 100644
 --- a/drivers/remoteproc/qcom_q6v5_mpd.c
 +++ b/drivers/remoteproc/qcom_q6v5_mpd.c
 @@ -44,10 +44,6 @@
@@ -53,7 +51,7 @@ index b133285888c7..a1c189ab1f42 100644
  
  	return bit / 8;
  }
-@@ -131,37 +132,37 @@ static int q6_wcss_start(struct rproc *rproc)
+@@ -131,37 +132,37 @@ static int q6_wcss_start(struct rproc *r
  static int q6_wcss_spawn_pd(struct rproc *rproc)
  {
  	int ret;
@@ -102,7 +100,7 @@ index b133285888c7..a1c189ab1f42 100644
  		ret = q6_wcss_spawn_pd(rproc);
  		if (ret)
  			return ret;
-@@ -213,22 +214,22 @@ static int q6_wcss_stop(struct rproc *rproc)
+@@ -213,22 +214,22 @@ static int q6_wcss_stop(struct rproc *rp
   */
  static int wcss_pd_stop(struct rproc *rproc)
  {
@@ -132,7 +130,7 @@ index b133285888c7..a1c189ab1f42 100644
  		return ret;
  	}
  
-@@ -273,7 +274,8 @@ static int share_upd_bootinfo_to_q6(struct rproc *rproc)
+@@ -273,7 +274,8 @@ static int share_upd_bootinfo_to_q6(stru
  	size_t size;
  	u16 cnt = 0, version;
  	void *ptr;
@@ -142,7 +140,7 @@ index b133285888c7..a1c189ab1f42 100644
  	struct rproc *upd_rproc;
  	struct userpd_boot_info upd_bootinfo = {0};
  	const struct firmware *fw;
-@@ -308,7 +310,7 @@ static int share_upd_bootinfo_to_q6(struct rproc *rproc)
+@@ -308,7 +310,7 @@ static int share_upd_bootinfo_to_q6(stru
  	ptr += sizeof(u16);
  
  	list_for_each_entry(upd_rproc, &upd_rproc_list, node) {
@@ -151,7 +149,7 @@ index b133285888c7..a1c189ab1f42 100644
  
  		/* TYPE */
  		upd_bootinfo.header.type = UPD_BOOT_INFO_HEADER_TYPE;
-@@ -318,11 +320,11 @@ static int share_upd_bootinfo_to_q6(struct rproc *rproc)
+@@ -318,11 +320,11 @@ static int share_upd_bootinfo_to_q6(stru
  			sizeof(upd_bootinfo) - sizeof(upd_bootinfo.header);
  
  		/* Process ID */
@@ -166,7 +164,7 @@ index b133285888c7..a1c189ab1f42 100644
  			return ret;
  		}
  
-@@ -421,19 +423,20 @@ static int q6_wcss_load(struct rproc *rproc, const struct firmware *fw)
+@@ -421,19 +423,20 @@ static int q6_wcss_load(struct rproc *rp
   */
  static int wcss_pd_load(struct rproc *rproc, const struct firmware *fw)
  {
@@ -192,7 +190,7 @@ index b133285888c7..a1c189ab1f42 100644
  }
  
  static unsigned long q6_wcss_panic(struct rproc *rproc)
-@@ -465,26 +468,15 @@ static int q6_alloc_memory_region(struct q6_wcss *wcss)
+@@ -465,26 +468,15 @@ static int q6_alloc_memory_region(struct
  	struct device_node *node;
  	struct device *dev = wcss->dev;
  
@@ -200,13 +198,9 @@ index b133285888c7..a1c189ab1f42 100644
 -		node = of_parse_phandle(dev->of_node, "memory-region", 0);
 -		if (node)
 -			rmem = of_reserved_mem_lookup(node);
-+	node = of_parse_phandle(dev->of_node, "memory-region", 0);
+-
-+	if (node)
-+		rmem = of_reserved_mem_lookup(node);
- 
 -		of_node_put(node);
-+	of_node_put(node);
+-
- 
 -		if (!rmem) {
 -			dev_err(dev, "unable to acquire memory-region\n");
 -			return -EINVAL;
@@ -220,13 +214,19 @@ index b133285888c7..a1c189ab1f42 100644
 -		wcss->mem_size = rpd_wcss->mem_size;
 -		wcss->mem_region = rpd_wcss->mem_region;
 -		return 0;
++	node = of_parse_phandle(dev->of_node, "memory-region", 0);
++	if (node)
++		rmem = of_reserved_mem_lookup(node);
++
++	of_node_put(node);
++
 +	if (!rmem) {
 +		dev_err(dev, "unable to acquire memory-region\n");
 +		return -EINVAL;
  	}
  
  	wcss->mem_phys = rmem->base;
-@@ -508,7 +500,7 @@ static int q6_get_inbound_irq(struct qcom_q6v5 *q6,
+@@ -508,7 +500,7 @@ static int q6_get_inbound_irq(struct qco
  {
  	int ret, irq;
  	char *interrupt, *tmp = (char *)int_name;
@@ -235,7 +235,7 @@ index b133285888c7..a1c189ab1f42 100644
  
  	irq = platform_get_irq(pdev, index);
  	if (irq < 0)
-@@ -520,7 +512,7 @@ static int q6_get_inbound_irq(struct qcom_q6v5 *q6,
+@@ -520,7 +512,7 @@ static int q6_get_inbound_irq(struct qco
  	if (!interrupt)
  		return -ENOMEM;
  
@@ -244,7 +244,7 @@ index b133285888c7..a1c189ab1f42 100644
  
  	ret = devm_request_threaded_irq(&pdev->dev, *pirq,
  					NULL, handler,
-@@ -561,7 +553,7 @@ static int init_irq(struct qcom_q6v5 *q6,
+@@ -561,7 +553,7 @@ static int init_irq(struct qcom_q6v5 *q6
  		    void (*handover)(struct qcom_q6v5 *q6))
  {
  	int ret;
@@ -253,7 +253,7 @@ index b133285888c7..a1c189ab1f42 100644
  
  	q6->rproc = rproc;
  	q6->dev = &pdev->dev;
-@@ -581,7 +573,7 @@ static int init_irq(struct qcom_q6v5 *q6,
+@@ -581,7 +573,7 @@ static int init_irq(struct qcom_q6v5 *q6
  		return ret;
  
  	/* Get pd_asid to prepare interrupt names */
@@ -271,7 +271,7 @@ index b133285888c7..a1c189ab1f42 100644
  	struct rproc *rproc = NULL;
  	int ret;
  	struct platform_device *userpd_pdev;
-@@ -652,21 +644,16 @@ static int q6_register_userpd(struct platform_device *pdev,
+@@ -652,21 +644,16 @@ static int q6_register_userpd(struct pla
  
  	userpd_pdev->dev.driver = pdev->dev.driver;
  	rproc = rproc_alloc(&userpd_pdev->dev, userpd_pdev->name, &wcss_ops,
@@ -297,7 +297,7 @@ index b133285888c7..a1c189ab1f42 100644
  		       WCSS_CRASH_REASON, NULL, NULL);
  	if (ret)
  		goto free_rproc;
-@@ -678,7 +665,7 @@ static int q6_register_userpd(struct platform_device *pdev,
+@@ -678,7 +665,7 @@ static int q6_register_userpd(struct pla
  
  	list_add(&rproc->node, &upd_rproc_list);
  	platform_set_drvdata(userpd_pdev, rproc);
@@ -306,7 +306,7 @@ index b133285888c7..a1c189ab1f42 100644
  	return 0;
  
  free_rproc:
-@@ -719,7 +706,6 @@ static int q6_wcss_probe(struct platform_device *pdev)
+@@ -719,7 +706,6 @@ static int q6_wcss_probe(struct platform
  	wcss->dev = &pdev->dev;
  	wcss->desc = desc;
  	wcss->firmware = firmware;
@@ -314,6 +314,3 @@ index b133285888c7..a1c189ab1f42 100644
  
  	ret = q6_alloc_memory_region(wcss);
  	if (ret)
--- 
-2.40.1
-

target/linux/qualcommax/patches-6.6/0807-remoteproc-qcom_q6v5_mpd-fix-incorrent-use-of-rproc-.patch

@@ -48,8 +48,6 @@ Signed-off-by: hzy <hzyitc@outlook.com>
  drivers/remoteproc/qcom_q6v5_mpd.c | 53 +++++++++++++++++-------------
  1 file changed, 30 insertions(+), 23 deletions(-)
 
-diff --git a/drivers/remoteproc/qcom_q6v5_mpd.c b/drivers/remoteproc/qcom_q6v5_mpd.c
-index a1c189ab1f42..a13ced46a158 100644
 --- a/drivers/remoteproc/qcom_q6v5_mpd.c
 +++ b/drivers/remoteproc/qcom_q6v5_mpd.c
 @@ -33,6 +33,7 @@
@@ -77,7 +75,7 @@ index a1c189ab1f42..a13ced46a158 100644
  };
  
  struct userpd {
-@@ -270,13 +270,12 @@ static void *q6_wcss_da_to_va(struct rproc *rproc, u64 da, size_t len,
+@@ -270,13 +270,12 @@ static void *q6_wcss_da_to_va(struct rpr
   */
  static int share_upd_bootinfo_to_q6(struct rproc *rproc)
  {
@@ -92,7 +90,7 @@ index a1c189ab1f42..a13ced46a158 100644
  	struct userpd_boot_info upd_bootinfo = {0};
  	const struct firmware *fw;
  
-@@ -301,16 +300,19 @@ static int share_upd_bootinfo_to_q6(struct rproc *rproc)
+@@ -301,16 +300,19 @@ static int share_upd_bootinfo_to_q6(stru
  	memcpy_toio(ptr, &version, sizeof(version));
  	ptr += sizeof(version);
  
@@ -116,7 +114,7 @@ index a1c189ab1f42..a13ced46a158 100644
  
  		/* TYPE */
  		upd_bootinfo.header.type = UPD_BOOT_INFO_HEADER_TYPE;
-@@ -322,14 +324,14 @@ static int share_upd_bootinfo_to_q6(struct rproc *rproc)
+@@ -322,14 +324,14 @@ static int share_upd_bootinfo_to_q6(stru
  		/* Process ID */
  		upd_bootinfo.pid = upd->pd_asid + 1;
  
@@ -133,7 +131,7 @@ index a1c189ab1f42..a13ced46a158 100644
  
  		/* Firmware mem size */
  		upd_bootinfo.data_size = qcom_mdt_get_size(fw);
-@@ -597,18 +599,23 @@ static int init_irq(struct qcom_q6v5 *q6,
+@@ -597,18 +599,23 @@ static int init_irq(struct qcom_q6v5 *q6
  	return 0;
  }
  
@@ -163,7 +161,7 @@ index a1c189ab1f42..a13ced46a158 100644
  			      struct device_node *userpd_np)
  {
  	struct userpd *upd;
-@@ -633,16 +640,16 @@ static int q6_register_userpd(struct platform_device *pdev,
+@@ -633,16 +640,16 @@ static int q6_register_userpd(struct pla
  		return ret;
  	}
  
@@ -184,7 +182,7 @@ index a1c189ab1f42..a13ced46a158 100644
  	rproc = rproc_alloc(&userpd_pdev->dev, userpd_pdev->name, &wcss_ops,
  			    firmware_name, sizeof(*upd));
  	if (!rproc) {
-@@ -663,7 +670,7 @@ static int q6_register_userpd(struct platform_device *pdev,
+@@ -663,7 +670,7 @@ static int q6_register_userpd(struct pla
  	if (ret)
  		goto free_rproc;
  
@@ -193,7 +191,7 @@ index a1c189ab1f42..a13ced46a158 100644
  	platform_set_drvdata(userpd_pdev, rproc);
  	qcom_add_ssr_subdev(rproc, &upd->ssr_subdev, userpd_pdev->name);
  	return 0;
-@@ -728,10 +735,10 @@ static int q6_wcss_probe(struct platform_device *pdev)
+@@ -728,10 +735,10 @@ static int q6_wcss_probe(struct platform
  
  	/* Iterate over userpd child's and register with rproc */
  	for_each_available_child_of_node(pdev->dev.of_node, userpd_np) {
@@ -206,6 +204,3 @@ index a1c189ab1f42..a13ced46a158 100644
  			return dev_err_probe(&pdev->dev, ret,
  					     "Failed to register userpd(%s)\n",
  					     userpd_np->name);
--- 
-2.40.1
-

target/linux/qualcommax/patches-6.6/0812-mdt_loader-support-MPD.patch

@@ -9,8 +9,6 @@ Signed-off-by: hzy <hzyitc@outlook.com>
  include/linux/soc/qcom/mdt_loader.h |   5 ++
  2 files changed, 110 insertions(+), 5 deletions(-)
 
-diff --git a/drivers/soc/qcom/mdt_loader.c b/drivers/soc/qcom/mdt_loader.c
-index 6f177e46fa0f..00c848abd996 100644
 --- a/drivers/soc/qcom/mdt_loader.c
 +++ b/drivers/soc/qcom/mdt_loader.c
 @@ -16,6 +16,16 @@
@@ -30,7 +28,7 @@ index 6f177e46fa0f..00c848abd996 100644
  
  static bool mdt_phdr_valid(const struct elf32_phdr *phdr)
  {
-@@ -69,6 +79,56 @@ static ssize_t mdt_load_split_segment(void *ptr, const struct elf32_phdr *phdrs,
+@@ -69,6 +79,56 @@ static ssize_t mdt_load_split_segment(vo
  	return ret;
  }
  
@@ -87,7 +85,7 @@ index 6f177e46fa0f..00c848abd996 100644
  /**
   * qcom_mdt_get_size() - acquire size of the memory region needed to load mdt
   * @fw:		firmware object for the mdt file
-@@ -295,7 +355,8 @@ static bool qcom_mdt_bins_are_split(const struct firmware *fw, const char *fw_na
+@@ -295,7 +355,8 @@ static bool qcom_mdt_bins_are_split(cons
  static int __qcom_mdt_load(struct device *dev, const struct firmware *fw,
  			   const char *fw_name, int pas_id, void *mem_region,
  			   phys_addr_t mem_phys, size_t mem_size,
@@ -97,7 +95,7 @@ index 6f177e46fa0f..00c848abd996 100644
  {
  	const struct elf32_phdr *phdrs;
  	const struct elf32_phdr *phdr;
-@@ -349,6 +410,14 @@ static int __qcom_mdt_load(struct device *dev, const struct firmware *fw,
+@@ -349,6 +410,14 @@ static int __qcom_mdt_load(struct device
  		if (!mdt_phdr_valid(phdr))
  			continue;
  
@@ -112,7 +110,7 @@ index 6f177e46fa0f..00c848abd996 100644
  		offset = phdr->p_paddr - mem_reloc;
  		if (offset < 0 || offset + phdr->p_memsz > mem_size) {
  			dev_err(dev, "segment outside memory range\n");
-@@ -366,7 +435,11 @@ static int __qcom_mdt_load(struct device *dev, const struct firmware *fw,
+@@ -366,7 +435,11 @@ static int __qcom_mdt_load(struct device
  
  		ptr = mem_region + offset;
  
@@ -125,7 +123,7 @@ index 6f177e46fa0f..00c848abd996 100644
  			/* Firmware is large enough to be non-split */
  			if (phdr->p_offset + phdr->p_filesz > fw->size) {
  				dev_err(dev, "file %s segment %d would be truncated\n",
-@@ -383,7 +456,7 @@ static int __qcom_mdt_load(struct device *dev, const struct firmware *fw,
+@@ -383,7 +456,7 @@ static int __qcom_mdt_load(struct device
  				break;
  		}
  
@@ -134,7 +132,7 @@ index 6f177e46fa0f..00c848abd996 100644
  			memset(ptr + phdr->p_filesz, 0, phdr->p_memsz - phdr->p_filesz);
  	}
  
-@@ -418,7 +491,7 @@ int qcom_mdt_load(struct device *dev, const struct firmware *fw,
+@@ -418,7 +491,7 @@ int qcom_mdt_load(struct device *dev, co
  		return ret;
  
  	return __qcom_mdt_load(dev, fw, firmware, pas_id, mem_region, mem_phys,
@@ -143,7 +141,7 @@ index 6f177e46fa0f..00c848abd996 100644
  }
  EXPORT_SYMBOL_GPL(qcom_mdt_load);
  
-@@ -441,9 +514,36 @@ int qcom_mdt_load_no_init(struct device *dev, const struct firmware *fw,
+@@ -441,9 +514,36 @@ int qcom_mdt_load_no_init(struct device
  			  size_t mem_size, phys_addr_t *reloc_base)
  {
  	return __qcom_mdt_load(dev, fw, firmware, pas_id, mem_region, mem_phys,
@@ -181,11 +179,9 @@ index 6f177e46fa0f..00c848abd996 100644
 +
  MODULE_DESCRIPTION("Firmware parser for Qualcomm MDT format");
  MODULE_LICENSE("GPL v2");
-diff --git a/include/linux/soc/qcom/mdt_loader.h b/include/linux/soc/qcom/mdt_loader.h
-index 9e8e60421192..cefccb709f2e 100644
 --- a/include/linux/soc/qcom/mdt_loader.h
 +++ b/include/linux/soc/qcom/mdt_loader.h
-@@ -30,6 +30,11 @@ int qcom_mdt_load_no_init(struct device *dev, const struct firmware *fw,
+@@ -30,6 +30,11 @@ int qcom_mdt_load_no_init(struct device
  void *qcom_mdt_read_metadata(const struct firmware *fw, size_t *data_len,
  			     const char *fw_name, struct device *dev);
  
@@ -197,6 +193,3 @@ index 9e8e60421192..cefccb709f2e 100644
  #else /* !IS_ENABLED(CONFIG_QCOM_MDT_LOADER) */
  
  static inline ssize_t qcom_mdt_get_size(const struct firmware *fw)
--- 
-2.40.1
-

target/linux/qualcommax/patches-6.6/0813-remoteproc-qcom_q6v5_mpd-enable-clocks.patch

@@ -8,8 +8,6 @@ Signed-off-by: hzy <hzyitc@outlook.com>
  drivers/remoteproc/qcom_q6v5_mpd.c | 12 ++++++++++++
  1 file changed, 12 insertions(+)
 
-diff --git a/drivers/remoteproc/qcom_q6v5_mpd.c b/drivers/remoteproc/qcom_q6v5_mpd.c
-index a13ced46a158..edcd5ed8515f 100644
 --- a/drivers/remoteproc/qcom_q6v5_mpd.c
 +++ b/drivers/remoteproc/qcom_q6v5_mpd.c
 @@ -77,6 +77,8 @@ struct q6_wcss {
@@ -21,7 +19,7 @@ index a13ced46a158..edcd5ed8515f 100644
  	const struct wcss_data *desc;
  	const char **firmware;
  	struct userpd *upd[MAX_UPD];
-@@ -718,6 +720,16 @@ static int q6_wcss_probe(struct platform_device *pdev)
+@@ -718,6 +720,16 @@ static int q6_wcss_probe(struct platform
  	if (ret)
  		goto free_rproc;
  
@@ -38,6 +36,3 @@ index a13ced46a158..edcd5ed8515f 100644
  	ret = qcom_q6v5_init(&wcss->q6, pdev, rproc,
  			     WCSS_CRASH_REASON, NULL, NULL);
  	if (ret)
--- 
-2.40.1
-

target/linux/qualcommax/patches-6.6/0814-remoteproc-qcom_q6v5_mpd-support-ipq5018.patch

@@ -8,11 +8,9 @@ Signed-off-by: hzy <hzyitc@outlook.com>
  drivers/remoteproc/qcom_q6v5_mpd.c | 37 +++++++++++++++++++++++++++---
  1 file changed, 34 insertions(+), 3 deletions(-)
 
-diff --git a/drivers/remoteproc/qcom_q6v5_mpd.c b/drivers/remoteproc/qcom_q6v5_mpd.c
-index edcd5ed8515f..7416ba231445 100644
 --- a/drivers/remoteproc/qcom_q6v5_mpd.c
 +++ b/drivers/remoteproc/qcom_q6v5_mpd.c
-@@ -155,6 +155,8 @@ static int q6_wcss_spawn_pd(struct rproc *rproc)
+@@ -155,6 +155,8 @@ static int q6_wcss_spawn_pd(struct rproc
  static int wcss_pd_start(struct rproc *rproc)
  {
  	struct userpd *upd = rproc->priv;
@@ -21,7 +19,7 @@ index edcd5ed8515f..7416ba231445 100644
  	u32 pasid = (upd->pd_asid << 8) | UPD_SWID;
  	int ret;
  
-@@ -170,6 +172,14 @@ static int wcss_pd_start(struct rproc *rproc)
+@@ -170,6 +172,14 @@ static int wcss_pd_start(struct rproc *r
  			return ret;
  	}
  
@@ -36,7 +34,7 @@ index edcd5ed8515f..7416ba231445 100644
  	return ret;
  }
  
-@@ -179,6 +189,12 @@ static int q6_wcss_stop(struct rproc *rproc)
+@@ -179,6 +189,12 @@ static int q6_wcss_stop(struct rproc *rp
  	const struct wcss_data *desc = wcss->desc;
  	int ret;
  
@@ -49,7 +47,7 @@ index edcd5ed8515f..7416ba231445 100644
  	ret = qcom_scm_pas_shutdown(desc->pasid);
  	if (ret) {
  		dev_err(wcss->dev, "not able to shutdown\n");
-@@ -218,6 +234,7 @@ static int wcss_pd_stop(struct rproc *rproc)
+@@ -218,6 +234,7 @@ static int wcss_pd_stop(struct rproc *rp
  {
  	struct userpd *upd = rproc->priv;
  	struct rproc *rpd_rproc = dev_get_drvdata(upd->dev->parent);
@@ -57,7 +55,7 @@ index edcd5ed8515f..7416ba231445 100644
  	u32 pasid = (upd->pd_asid << 8) | UPD_SWID;
  	int ret;
  
-@@ -229,6 +246,14 @@ static int wcss_pd_stop(struct rproc *rproc)
+@@ -229,6 +246,14 @@ static int wcss_pd_stop(struct rproc *rp
  		}
  	}
  
@@ -72,7 +70,7 @@ index edcd5ed8515f..7416ba231445 100644
  	ret = qcom_scm_msa_unlock(pasid);
  	if (ret) {
  		dev_err(upd->dev, "failed to power down pd\n");
-@@ -430,15 +455,14 @@ static int wcss_pd_load(struct rproc *rproc, const struct firmware *fw)
+@@ -430,15 +455,14 @@ static int wcss_pd_load(struct rproc *rp
  	struct userpd *upd = rproc->priv;
  	struct rproc *rpd_rproc = dev_get_drvdata(upd->dev->parent);
  	struct q6_wcss *wcss = rpd_rproc->priv;
@@ -90,7 +88,7 @@ index edcd5ed8515f..7416ba231445 100644
  			     wcss->mem_phys, wcss->mem_size,
  			     NULL);
  }
-@@ -777,6 +801,12 @@ static int q6_wcss_remove(struct platform_device *pdev)
+@@ -777,6 +801,12 @@ static int q6_wcss_remove(struct platfor
  	return 0;
  }
  
@@ -103,7 +101,7 @@ index edcd5ed8515f..7416ba231445 100644
  static const struct wcss_data q6_ipq5332_res_init = {
  	.pasid = MPD_WCNSS_PAS_ID,
  	.share_upd_info_to_q6 = true,
-@@ -787,6 +817,7 @@ static const struct wcss_data q6_ipq9574_res_init = {
+@@ -787,6 +817,7 @@ static const struct wcss_data q6_ipq9574
  };
  
  static const struct of_device_id q6_wcss_of_match[] = {
@@ -111,6 +109,3 @@ index edcd5ed8515f..7416ba231445 100644
  	{ .compatible = "qcom,ipq5332-q6-mpd", .data = &q6_ipq5332_res_init },
  	{ .compatible = "qcom,ipq9574-q6-mpd", .data = &q6_ipq9574_res_init },
  	{ },
--- 
-2.40.1
-

target/linux/qualcommax/patches-6.6/0815-arm64-dts-qcom-ipq5018-add-wifi-support.patch

@@ -10,7 +10,7 @@ Signed-off-by: hzy <hzyitc@outlook.com>
 
 --- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
 +++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
-@@ -688,6 +688,197 @@
+@@ -1005,6 +1005,197 @@
  			};
  		};
  

target/linux/qualcommax/patches-6.6/0906-arm64-dts-qcom-ipq6018-add-wifi-node.patch

@@ -15,7 +15,7 @@ Signed-off-by: Mantas Pucka <mantas@8devices.com>
 
 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
 +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
-@@ -809,6 +809,102 @@
+@@ -805,6 +805,102 @@
  			};
  		};
  

target/linux/qualcommax/patches-6.6/0907-soc-qcom-fix-smp2p-ack-on-ipq6018.patch

@@ -15,7 +15,7 @@ Signed-off-by: Mantas Pucka <mantas@8devices.com>
 
 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
 +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
-@@ -1157,6 +1157,7 @@
+@@ -1153,6 +1153,7 @@
  
  		wcss_smp2p_out: master-kernel {
  			qcom,entry-name = "master-kernel";

target/linux/qualcommax/patches-6.6/0909-arm64-dts-qcom-ipq6018-assign-QDSS_AT-clock-to-wifi-.patch

@@ -13,7 +13,7 @@ Signed-off-by: Mantas Pucka <mantas@8devices.com>
 
 --- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
 +++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
-@@ -930,8 +930,8 @@
+@@ -926,8 +926,8 @@
  				      "wcss_reset",
  				      "wcss_q6_reset";
  

target/linux/rockchip/patches-6.6/101-net-realtek-r8169-add-LED-configuration-from-OF.patch

@@ -17,7 +17,7 @@ Subject: [PATCH] r8169: add LED configuration from OF
  #include <linux/if_vlan.h>
  #include <linux/in.h>
  #include <linux/io.h>
-@@ -173,6 +174,7 @@ enum rtl_registers {
+@@ -175,6 +176,7 @@ enum rtl_registers {
  	MAR0		= 8,	/* Multicast filter. */
  	CounterAddrLow		= 0x10,
  	CounterAddrHigh		= 0x14,
@@ -25,7 +25,7 @@ Subject: [PATCH] r8169: add LED configuration from OF
  	TxDescStartAddrLow	= 0x20,
  	TxDescStartAddrHigh	= 0x24,
  	TxHDescStartAddrLow	= 0x28,
-@@ -5354,6 +5356,22 @@ static bool rtl_aspm_is_safe(struct rtl8
+@@ -5367,6 +5369,22 @@ static bool rtl_aspm_is_safe(struct rtl8
  	return false;
  }
  
@@ -48,7 +48,7 @@ Subject: [PATCH] r8169: add LED configuration from OF
  static int rtl_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
  {
  	struct rtl8169_private *tp;
-@@ -5522,6 +5540,7 @@ static int rtl_init_one(struct pci_dev *
+@@ -5535,6 +5553,7 @@ static int rtl_init_one(struct pci_dev *
  	if (!tp->counters)
  		return -ENOMEM;