ipq807x: fixes build error and refresh 5.10 patches (#9991)

adjusted:
target/linux/ipq807x/patches-5.10/125-ipq8074-gcc-Added-support-for-NSS-clocks.patch
https://kernel.source.codeaurora.cn/pub/scm/linux/kernel/git/stable/linux.git/commit/drivers/clk/qcom/gcc-ipq8074.c?h=v5.10.137&id=b28ebe7d2f10e5ca574be3d4188a744674e8e0d5
https://kernel.source.codeaurora.cn/pub/scm/linux/kernel/git/stable/linux.git/commit/drivers/clk/qcom/gcc-ipq8074.c?h=v5.10.137&id=e2330494f0f8f168ae5bd17df01cb61363593c46

removed:
target/linux/ipq807x/patches-5.10/128-qcom-clk-ipq8074-fix-port-6-clock-issue-for-1G.patch
target/linux/ipq807x/patches-5.10/129-clk-qcom-ipq8074-Add-NSS-PORT-clocks-frequencies.patch
target/linux/ipq807x/patches-5.10/130-clk-qcom-ipq8074-change-freq-table-for-port5_tx_clk_.patch
https://kernel.source.codeaurora.cn/pub/scm/linux/kernel/git/stable/linux.git/commit/drivers/clk/qcom/gcc-ipq8074.c?h=v5.10.137&id=b83af7b4ec1d1c54de7d7115c9e0b4c3d60fdc47

Signed-off-by: José Hwong <josehwong@hotmail.com>

Signed-off-by: José Hwong <josehwong@hotmail.com>

target/linux/ipq807x/patches-5.10/001-v5.11-remoteproc-sysmon-Expose-the-shutdown-result.patch

@@ -54,7 +54,7 @@ Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
  #endif
 --- a/drivers/remoteproc/qcom_sysmon.c
 +++ b/drivers/remoteproc/qcom_sysmon.c
-@@ -44,6 +44,7 @@ struct qcom_sysmon {
+@@ -45,6 +45,7 @@ struct qcom_sysmon {
  	struct mutex lock;
  
  	bool ssr_ack;
@@ -62,7 +62,7 @@ Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
  
  	struct qmi_handle qmi;
  	struct sockaddr_qrtr ssctl;
-@@ -115,10 +116,13 @@ out_unlock:
+@@ -116,10 +117,13 @@ out_unlock:
  /**
   * sysmon_request_shutdown() - request graceful shutdown of remote
   * @sysmon:	sysmon context
@@ -77,7 +77,7 @@ Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
  	int ret;
  
  	mutex_lock(&sysmon->lock);
-@@ -141,9 +145,13 @@ static void sysmon_request_shutdown(stru
+@@ -142,9 +146,13 @@ static void sysmon_request_shutdown(stru
  	if (!sysmon->ssr_ack)
  		dev_err(sysmon->dev,
  			"unexpected response to sysmon shutdown request\n");
@@ -91,7 +91,7 @@ Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
  }
  
  static int sysmon_callback(struct rpmsg_device *rpdev, void *data, int count,
-@@ -297,14 +305,33 @@ static struct qmi_msg_handler qmi_indica
+@@ -298,14 +306,33 @@ static struct qmi_msg_handler qmi_indica
  	{}
  };
  
@@ -126,7 +126,7 @@ Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
  	int ret;
  
  	reinit_completion(&sysmon->ind_comp);
-@@ -312,7 +339,7 @@ static void ssctl_request_shutdown(struc
+@@ -313,7 +340,7 @@ static void ssctl_request_shutdown(struc
  	ret = qmi_txn_init(&sysmon->qmi, &txn, ssctl_shutdown_resp_ei, &resp);
  	if (ret < 0) {
  		dev_err(sysmon->dev, "failed to allocate QMI txn\n");
@@ -135,7 +135,7 @@ Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
  	}
  
  	ret = qmi_send_request(&sysmon->qmi, &sysmon->ssctl, &txn,
-@@ -320,27 +347,23 @@ static void ssctl_request_shutdown(struc
+@@ -321,27 +348,23 @@ static void ssctl_request_shutdown(struc
  	if (ret < 0) {
  		dev_err(sysmon->dev, "failed to send shutdown request\n");
  		qmi_txn_cancel(&txn);
@@ -173,7 +173,7 @@ Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
  }
  
  /**
-@@ -510,6 +533,9 @@ static void sysmon_stop(struct rproc_sub
+@@ -514,6 +537,9 @@ static void sysmon_stop(struct rproc_sub
  		.subsys_name = sysmon->name,
  		.ssr_event = SSCTL_SSR_EVENT_BEFORE_SHUTDOWN
  	};
@@ -183,8 +183,8 @@ Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
  
  	mutex_lock(&sysmon->state_lock);
  	sysmon->state = SSCTL_SSR_EVENT_BEFORE_SHUTDOWN;
-@@ -521,9 +547,11 @@ static void sysmon_stop(struct rproc_sub
+@@ -530,9 +556,11 @@ static void sysmon_stop(struct rproc_sub
- 		return;
+ 	}
  
  	if (sysmon->ssctl_version)
 -		ssctl_request_shutdown(sysmon);
@@ -197,7 +197,7 @@ Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
  }
  
  static void sysmon_unprepare(struct rproc_subdev *subdev)
-@@ -682,6 +710,22 @@ void qcom_remove_sysmon_subdev(struct qc
+@@ -692,6 +720,22 @@ void qcom_remove_sysmon_subdev(struct qc
  EXPORT_SYMBOL_GPL(qcom_remove_sysmon_subdev);
  
  /**

target/linux/ipq807x/patches-5.10/010-v5.11-PCI-dwc-Drop-the-.set_num_vectors-host-op.patch

@@ -90,7 +90,7 @@ Cc: linux-tegra@vger.kernel.org
  
 --- a/drivers/pci/controller/dwc/pcie-tegra194.c
 +++ b/drivers/pci/controller/dwc/pcie-tegra194.c
-@@ -990,11 +990,6 @@ static int tegra_pcie_dw_link_up(struct
+@@ -988,11 +988,6 @@ static int tegra_pcie_dw_link_up(struct
  	return !!(val & PCI_EXP_LNKSTA_DLLLA);
  }
  
@@ -102,7 +102,7 @@ Cc: linux-tegra@vger.kernel.org
  static int tegra_pcie_dw_start_link(struct dw_pcie *pci)
  {
  	struct tegra_pcie_dw *pcie = to_tegra_pcie(pci);
-@@ -1019,7 +1014,6 @@ static const struct dw_pcie_ops tegra_dw
+@@ -1017,7 +1012,6 @@ static const struct dw_pcie_ops tegra_dw
  
  static struct dw_pcie_host_ops tegra_pcie_dw_host_ops = {
  	.host_init = tegra_pcie_dw_host_init,
@@ -110,7 +110,7 @@ Cc: linux-tegra@vger.kernel.org
  };
  
  static void tegra_pcie_disable_phy(struct tegra_pcie_dw *pcie)
-@@ -2003,6 +1997,7 @@ static int tegra_pcie_dw_probe(struct pl
+@@ -2002,6 +1996,7 @@ static int tegra_pcie_dw_probe(struct pl
  	pci->n_fts[1] = FTS_VAL;
  
  	pp = &pci->pp;

target/linux/ipq807x/patches-5.10/011-v5.11-PCI-dwc-Move-MSI-interrupt-setup-into-DWC-common-cod.patch

@@ -229,7 +229,7 @@ Cc: linux-tegra@vger.kernel.org
  	return dw_pcie_host_init(&pci->pp);
 --- a/drivers/pci/controller/dwc/pcie-qcom.c
 +++ b/drivers/pci/controller/dwc/pcie-qcom.c
-@@ -1428,14 +1428,6 @@ static int qcom_pcie_probe(struct platfo
+@@ -1426,14 +1426,6 @@ static int qcom_pcie_probe(struct platfo
  
  	pp->ops = &qcom_pcie_dw_ops;
  
@@ -256,7 +256,7 @@ Cc: linux-tegra@vger.kernel.org
  	if (ret) {
 --- a/drivers/pci/controller/dwc/pcie-tegra194.c
 +++ b/drivers/pci/controller/dwc/pcie-tegra194.c
-@@ -1554,14 +1554,6 @@ static int tegra_pcie_config_rp(struct t
+@@ -1552,14 +1552,6 @@ static int tegra_pcie_config_rp(struct t
  	char *name;
  	int ret;
  

target/linux/ipq807x/patches-5.10/013-v5.11-PCI-dwc-Move-link-handling-into-common-code.patch

@@ -525,7 +525,7 @@ Cc: linux-tegra@vger.kernel.org
  }
  
  static void qcom_pcie_2_1_0_ltssm_enable(struct qcom_pcie *pcie)
-@@ -1284,15 +1281,8 @@ static int qcom_pcie_host_init(struct pc
+@@ -1282,15 +1279,8 @@ static int qcom_pcie_host_init(struct pc
  
  	qcom_ep_reset_deassert(pcie);
  
@@ -542,7 +542,7 @@ Cc: linux-tegra@vger.kernel.org
  err_disable_phy:
  	phy_power_off(pcie->phy);
  err_deinit:
-@@ -1359,6 +1349,7 @@ static const struct qcom_pcie_ops ops_2_
+@@ -1357,6 +1347,7 @@ static const struct qcom_pcie_ops ops_2_
  
  static const struct dw_pcie_ops dw_pcie_ops = {
  	.link_up = qcom_pcie_link_up,
@@ -552,7 +552,7 @@ Cc: linux-tegra@vger.kernel.org
  static int qcom_pcie_probe(struct platform_device *pdev)
 --- a/drivers/pci/controller/dwc/pcie-tegra194.c
 +++ b/drivers/pci/controller/dwc/pcie-tegra194.c
-@@ -1549,7 +1549,6 @@ static int tegra_pcie_deinit_controller(
+@@ -1547,7 +1547,6 @@ static int tegra_pcie_deinit_controller(
  
  static int tegra_pcie_config_rp(struct tegra_pcie_dw *pcie)
  {

target/linux/ipq807x/patches-5.10/014-v5.11-PCI-dwc-Move-dw_pcie_msi_init-into-core.patch

@@ -220,7 +220,7 @@ Cc: linux-tegra@vger.kernel.org
  }
 --- a/drivers/pci/controller/dwc/pcie-qcom.c
 +++ b/drivers/pci/controller/dwc/pcie-qcom.c
-@@ -1277,8 +1277,6 @@ static int qcom_pcie_host_init(struct pc
+@@ -1275,8 +1275,6 @@ static int qcom_pcie_host_init(struct pc
  	}
  
  	dw_pcie_setup_rc(pp);
@@ -251,7 +251,7 @@ Cc: linux-tegra@vger.kernel.org
  static int spear13xx_pcie_link_up(struct dw_pcie *pci)
 --- a/drivers/pci/controller/dwc/pcie-tegra194.c
 +++ b/drivers/pci/controller/dwc/pcie-tegra194.c
-@@ -765,8 +765,6 @@ static void tegra_pcie_enable_msi_interr
+@@ -763,8 +763,6 @@ static void tegra_pcie_enable_msi_interr
  	struct tegra_pcie_dw *pcie = to_tegra_pcie(pci);
  	u32 val;
  

target/linux/ipq807x/patches-5.10/109-clk-qcom-Add-WCSSAON-reset.patch

@@ -15,7 +15,7 @@ Acked-by: Stephen Boyd <sboyd@kernel.org>
 
 --- a/drivers/clk/qcom/gcc-ipq8074.c
 +++ b/drivers/clk/qcom/gcc-ipq8074.c
-@@ -4744,6 +4744,7 @@ static const struct qcom_reset_map gcc_i
+@@ -4789,6 +4789,7 @@ static const struct qcom_reset_map gcc_i
  	[GCC_PCIE1_AXI_SLAVE_ARES] = { 0x76040, 4 },
  	[GCC_PCIE1_AHB_ARES] = { 0x76040, 5 },
  	[GCC_PCIE1_AXI_MASTER_STICKY_ARES] = { 0x76040, 6 },

target/linux/ipq807x/patches-5.10/117-PCI-qcom-add-support-for-IPQ60xx-PCIe-controller.patch

@@ -73,7 +73,7 @@ Signed-off-by: Baruch Siach <baruch@tkos.co.il>
  };
  
  struct qcom_pcie;
-@@ -1246,6 +1262,130 @@ static void qcom_pcie_post_deinit_2_7_0(
+@@ -1244,6 +1260,130 @@ static void qcom_pcie_post_deinit_2_7_0(
  	clk_disable_unprepare(res->pipe_clk);
  }
  
@@ -204,7 +204,7 @@ Signed-off-by: Baruch Siach <baruch@tkos.co.il>
  static int qcom_pcie_link_up(struct dw_pcie *pci)
  {
  	u16 offset = dw_pcie_find_capability(pci, PCI_CAP_ID_EXP);
-@@ -1345,6 +1485,15 @@ static const struct qcom_pcie_ops ops_2_
+@@ -1343,6 +1483,15 @@ static const struct qcom_pcie_ops ops_2_
  	.post_deinit = qcom_pcie_post_deinit_2_7_0,
  };
  
@@ -220,7 +220,7 @@ Signed-off-by: Baruch Siach <baruch@tkos.co.il>
  static const struct dw_pcie_ops dw_pcie_ops = {
  	.link_up = qcom_pcie_link_up,
  	.start_link = qcom_pcie_start_link,
-@@ -1450,6 +1599,7 @@ static const struct of_device_id qcom_pc
+@@ -1448,6 +1597,7 @@ static const struct of_device_id qcom_pc
  	{ .compatible = "qcom,pcie-ipq4019", .data = &ops_2_4_0 },
  	{ .compatible = "qcom,pcie-qcs404", .data = &ops_2_4_0 },
  	{ .compatible = "qcom,pcie-sdm845", .data = &ops_2_7_0 },

target/linux/ipq807x/patches-5.10/120-PCI-qcom-Add-IPQ8074-PCIe-Gen3-support.patch

@@ -25,7 +25,7 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
  	struct reset_control *rst;
  };
  
-@@ -1273,8 +1273,10 @@ static int qcom_pcie_get_resources_2_9_0
+@@ -1271,8 +1271,10 @@ static int qcom_pcie_get_resources_2_9_0
  	res->clks[0].id = "iface";
  	res->clks[1].id = "axi_m";
  	res->clks[2].id = "axi_s";
@@ -38,7 +38,7 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
  
  	ret = devm_clk_bulk_get(dev, ARRAY_SIZE(res->clks), res->clks);
  	if (ret < 0)
-@@ -1601,6 +1603,7 @@ static const struct of_device_id qcom_pc
+@@ -1599,6 +1601,7 @@ static const struct of_device_id qcom_pc
  	{ .compatible = "qcom,pcie-qcs404", .data = &ops_2_4_0 },
  	{ .compatible = "qcom,pcie-sdm845", .data = &ops_2_7_0 },
  	{ .compatible = "qcom,pcie-ipq6018", .data = &ops_2_9_0 },

target/linux/ipq807x/patches-5.10/125-ipq8074-gcc-Added-support-for-NSS-clocks.patch

@@ -34,7 +34,7 @@ Signed-off-by: Rajkumar Ayyasamy <arajkuma@codeaurora.org>
  };
 --- a/drivers/clk/qcom/gcc-ipq8074.c
 +++ b/drivers/clk/qcom/gcc-ipq8074.c
-@@ -3174,6 +3174,24 @@ static struct clk_branch gcc_nss_ptp_ref
+@@ -3182,6 +3182,24 @@ static struct clk_branch gcc_nss_ptp_ref
  	},
  };
  
@@ -59,121 +59,7 @@ Signed-off-by: Rajkumar Ayyasamy <arajkuma@codeaurora.org>
  static struct clk_branch gcc_nssnoc_ce_apb_clk = {
  	.halt_reg = 0x6830c,
  	.clkr = {
-@@ -3346,6 +3364,7 @@ static struct clk_branch gcc_nssnoc_ubi1
+@@ -4607,6 +4625,7 @@ static struct clk_regmap *gcc_ipq8074_cl
- 
- static struct clk_branch gcc_ubi0_ahb_clk = {
- 	.halt_reg = 0x6820c,
-+	.halt_check = BRANCH_HALT_DELAY,
- 	.clkr = {
- 		.enable_reg = 0x6820c,
- 		.enable_mask = BIT(0),
-@@ -3363,6 +3382,7 @@ static struct clk_branch gcc_ubi0_ahb_cl
- 
- static struct clk_branch gcc_ubi0_axi_clk = {
- 	.halt_reg = 0x68200,
-+	.halt_check = BRANCH_HALT_DELAY,
- 	.clkr = {
- 		.enable_reg = 0x68200,
- 		.enable_mask = BIT(0),
-@@ -3380,6 +3400,7 @@ static struct clk_branch gcc_ubi0_axi_cl
- 
- static struct clk_branch gcc_ubi0_nc_axi_clk = {
- 	.halt_reg = 0x68204,
-+	.halt_check = BRANCH_HALT_DELAY,
- 	.clkr = {
- 		.enable_reg = 0x68204,
- 		.enable_mask = BIT(0),
-@@ -3397,6 +3418,7 @@ static struct clk_branch gcc_ubi0_nc_axi
- 
- static struct clk_branch gcc_ubi0_core_clk = {
- 	.halt_reg = 0x68210,
-+	.halt_check = BRANCH_HALT_DELAY,
- 	.clkr = {
- 		.enable_reg = 0x68210,
- 		.enable_mask = BIT(0),
-@@ -3414,6 +3436,7 @@ static struct clk_branch gcc_ubi0_core_c
- 
- static struct clk_branch gcc_ubi0_mpt_clk = {
- 	.halt_reg = 0x68208,
-+	.halt_check = BRANCH_HALT_DELAY,
- 	.clkr = {
- 		.enable_reg = 0x68208,
- 		.enable_mask = BIT(0),
-@@ -3431,6 +3454,7 @@ static struct clk_branch gcc_ubi0_mpt_cl
- 
- static struct clk_branch gcc_ubi1_ahb_clk = {
- 	.halt_reg = 0x6822c,
-+	.halt_check = BRANCH_HALT_DELAY,
- 	.clkr = {
- 		.enable_reg = 0x6822c,
- 		.enable_mask = BIT(0),
-@@ -3448,6 +3472,7 @@ static struct clk_branch gcc_ubi1_ahb_cl
- 
- static struct clk_branch gcc_ubi1_axi_clk = {
- 	.halt_reg = 0x68220,
-+	.halt_check = BRANCH_HALT_DELAY,
- 	.clkr = {
- 		.enable_reg = 0x68220,
- 		.enable_mask = BIT(0),
-@@ -3465,6 +3490,7 @@ static struct clk_branch gcc_ubi1_axi_cl
- 
- static struct clk_branch gcc_ubi1_nc_axi_clk = {
- 	.halt_reg = 0x68224,
-+	.halt_check = BRANCH_HALT_DELAY,
- 	.clkr = {
- 		.enable_reg = 0x68224,
- 		.enable_mask = BIT(0),
-@@ -3482,6 +3508,7 @@ static struct clk_branch gcc_ubi1_nc_axi
- 
- static struct clk_branch gcc_ubi1_core_clk = {
- 	.halt_reg = 0x68230,
-+	.halt_check = BRANCH_HALT_DELAY,
- 	.clkr = {
- 		.enable_reg = 0x68230,
- 		.enable_mask = BIT(0),
-@@ -3499,6 +3526,7 @@ static struct clk_branch gcc_ubi1_core_c
- 
- static struct clk_branch gcc_ubi1_mpt_clk = {
- 	.halt_reg = 0x68228,
-+	.halt_check = BRANCH_HALT_DELAY,
- 	.clkr = {
- 		.enable_reg = 0x68228,
- 		.enable_mask = BIT(0),
-@@ -4381,6 +4409,33 @@ static struct clk_hw *gcc_ipq8074_hws[]
- 	&nss_ppe_cdiv_clk_src.hw,
- };
- 
-+static const struct alpha_pll_config ubi32_pll_config = {
-+	.l = 0x4e,
-+	.config_ctl_val = 0x200d4aa8,
-+	.config_ctl_hi_val = 0x3c2,
-+	.main_output_mask = BIT(0),
-+	.aux_output_mask = BIT(1),
-+	.pre_div_val = 0x0,
-+	.pre_div_mask = BIT(12),
-+	.post_div_val = 0x0,
-+	.post_div_mask = GENMASK(9, 8),
-+};
-+
-+static const struct alpha_pll_config nss_crypto_pll_config = {
-+	.l = 0x3e,
-+	.alpha = 0x0,
-+	.alpha_hi = 0x80,
-+	.config_ctl_val = 0x4001055b,
-+	.main_output_mask = BIT(0),
-+	.pre_div_val = 0x0,
-+	.pre_div_mask = GENMASK(14, 12),
-+	.post_div_val = 0x1 << 8,
-+	.post_div_mask = GENMASK(11, 8),
-+	.vco_mask = GENMASK(21, 20),
-+	.vco_val = 0x0,
-+	.alpha_en_mask = BIT(24),
-+};
-+
- static struct clk_regmap *gcc_ipq8074_clks[] = {
- 	[GPLL0_MAIN] = &gpll0_main.clkr,
- 	[GPLL0] = &gpll0.clkr,
-@@ -4562,6 +4617,7 @@ static struct clk_regmap *gcc_ipq8074_cl
  	[GCC_CMN_12GPLL_AHB_CLK] = &gcc_cmn_12gpll_ahb_clk.clkr,
  	[GCC_CMN_12GPLL_SYS_CLK] = &gcc_cmn_12gpll_sys_clk.clkr,
  	[GCC_MDIO_AHB_CLK] = &gcc_mdio_ahb_clk.clkr,
@@ -181,25 +67,6 @@ Signed-off-by: Rajkumar Ayyasamy <arajkuma@codeaurora.org>
  	[GCC_UNIPHY0_AHB_CLK] = &gcc_uniphy0_ahb_clk.clkr,
  	[GCC_UNIPHY0_SYS_CLK] = &gcc_uniphy0_sys_clk.clkr,
  	[GCC_UNIPHY1_AHB_CLK] = &gcc_uniphy1_ahb_clk.clkr,
-@@ -4773,7 +4829,17 @@ static const struct qcom_cc_desc gcc_ipq
- 
- static int gcc_ipq8074_probe(struct platform_device *pdev)
- {
--	return qcom_cc_probe(pdev, &gcc_ipq8074_desc);
-+	struct regmap *regmap;
-+
-+	regmap = qcom_cc_map(pdev, &gcc_ipq8074_desc);
-+	if (IS_ERR(regmap))
-+		return PTR_ERR(regmap);
-+
-+	clk_alpha_pll_configure(&ubi32_pll_main, regmap, &ubi32_pll_config);
-+	clk_alpha_pll_configure(&nss_crypto_pll_main, regmap,
-+				&nss_crypto_pll_config);
-+
-+	return qcom_cc_really_probe(pdev, &gcc_ipq8074_desc, regmap);
- }
- 
- static struct platform_driver gcc_ipq8074_driver = {
 --- a/include/dt-bindings/clock/qcom,gcc-ipq8074.h
 +++ b/include/dt-bindings/clock/qcom,gcc-ipq8074.h
 @@ -233,6 +233,7 @@

target/linux/ipq807x/patches-5.10/126-clk-ipq8074-Support-added-for-necessary-clocks-and-r.patch

@@ -50,7 +50,7 @@ Signed-off-by: Rajkumar Ayyasamy <arajkuma@codeaurora.org>
  static struct clk_rcg2 pcie0_axi_clk_src = {
  	.cmd_rcgr = 0x75054,
  	.freq_tbl = ftbl_pcie_axi_clk_src,
-@@ -2013,6 +2035,78 @@ static struct clk_rcg2 gp3_clk_src = {
+@@ -2021,6 +2043,78 @@ static struct clk_rcg2 gp3_clk_src = {
  	},
  };
  
@@ -129,7 +129,7 @@ Signed-off-by: Rajkumar Ayyasamy <arajkuma@codeaurora.org>
  static struct clk_branch gcc_blsp1_ahb_clk = {
  	.halt_reg = 0x01008,
  	.clkr = {
-@@ -4344,13 +4438,7 @@ static struct clk_branch gcc_gp3_clk = {
+@@ -4352,13 +4446,7 @@ static struct clk_branch gcc_gp3_clk = {
  	},
  };
  
@@ -144,8 +144,8 @@ Signed-off-by: Rajkumar Ayyasamy <arajkuma@codeaurora.org>
  	.cmd_rcgr = 0x75070,
  	.freq_tbl = ftbl_pcie_rchng_clk_src,
  	.hid_width = 5,
-@@ -4399,6 +4487,114 @@ static struct clk_branch gcc_pcie0_axi_s
+@@ -4434,6 +4522,114 @@ static struct clk_branch gcc_pcie0_axi_s
- 	},
+ 	.alpha_en_mask = BIT(24),
  };
  
 +static struct clk_branch gcc_snoc_bus_timeout2_ahb_clk = {
@@ -259,15 +259,15 @@ Signed-off-by: Rajkumar Ayyasamy <arajkuma@codeaurora.org>
  static struct clk_hw *gcc_ipq8074_hws[] = {
  	&gpll0_out_main_div2.hw,
  	&gpll6_out_main_div2.hw,
-@@ -4407,6 +4603,7 @@ static struct clk_hw *gcc_ipq8074_hws[]
+@@ -4442,6 +4638,7 @@ static struct clk_hw *gcc_ipq8074_hws[]
  	&gcc_xo_div4_clk_src.hw,
  	&nss_noc_clk_src.hw,
  	&nss_ppe_cdiv_clk_src.hw,
 +	&qdss_dap_sync_clk_src.hw,
  };
  
- static const struct alpha_pll_config ubi32_pll_config = {
+ static struct clk_regmap *gcc_ipq8074_clks[] = {
-@@ -4665,6 +4862,15 @@ static struct clk_regmap *gcc_ipq8074_cl
+@@ -4673,6 +4870,15 @@ static struct clk_regmap *gcc_ipq8074_cl
  	[GCC_PCIE0_RCHNG_CLK_SRC] = &pcie0_rchng_clk_src.clkr,
  	[GCC_PCIE0_RCHNG_CLK] = &gcc_pcie0_rchng_clk.clkr,
  	[GCC_PCIE0_AXI_S_BRIDGE_CLK] = &gcc_pcie0_axi_s_bridge_clk.clkr,
@@ -283,7 +283,7 @@ Signed-off-by: Rajkumar Ayyasamy <arajkuma@codeaurora.org>
  };
  
  static const struct qcom_reset_map gcc_ipq8074_resets[] = {
-@@ -4801,6 +5007,20 @@ static const struct qcom_reset_map gcc_i
+@@ -4809,6 +5015,20 @@ static const struct qcom_reset_map gcc_i
  	[GCC_PCIE1_AHB_ARES] = { 0x76040, 5 },
  	[GCC_PCIE1_AXI_MASTER_STICKY_ARES] = { 0x76040, 6 },
  	[GCC_WCSSAON_RESET] = { 0x59010, 0 },

target/linux/ipq807x/patches-5.10/127-clk-qcom-ipq8074-Fix-gcc_snoc_bus_timeout_ahb_clk-of.patch

@@ -16,7 +16,7 @@ Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
 
 --- a/drivers/clk/qcom/gcc-ipq8074.c
 +++ b/drivers/clk/qcom/gcc-ipq8074.c
-@@ -4488,10 +4488,10 @@ static struct clk_branch gcc_pcie0_axi_s
+@@ -4523,10 +4523,10 @@ static struct clk_branch gcc_pcie0_axi_s
  };
  
  static struct clk_branch gcc_snoc_bus_timeout2_ahb_clk = {
@@ -29,7 +29,7 @@ Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
  		.enable_mask = BIT(0),
  		.hw.init = &(struct clk_init_data){
  			.name = "gcc_snoc_bus_timeout2_ahb_clk",
-@@ -4506,10 +4506,10 @@ static struct clk_branch gcc_snoc_bus_ti
+@@ -4541,10 +4541,10 @@ static struct clk_branch gcc_snoc_bus_ti
  };
  
  static struct clk_branch gcc_snoc_bus_timeout3_ahb_clk = {

target/linux/ipq807x/patches-5.10/128-qcom-clk-ipq8074-fix-port-6-clock-issue-for-1G.patch

@@ -1,35 +0,0 @@
-From d4f5b0945dd4ec3638009fca0b4d13098155dca9 Mon Sep 17 00:00:00 2001
-From: zhongjia <zhongjia@codeaurora.org>
-Date: Thu, 13 Aug 2020 00:38:46 +0800
-Subject: [PATCH 6/8] qcom: clk: ipq8074: fix port 6 clock issue for 1G
-
-Change-Id: I279321a33f77404f75d4c60c607892df36fb25be
-Signed-off-by: zhongjia <zhongjia@codeaurora.org>
----
- drivers/clk/qcom/gcc-ipq8074.c | 4 ++++
- 1 file changed, 4 insertions(+)
-
---- a/drivers/clk/qcom/gcc-ipq8074.c
-+++ b/drivers/clk/qcom/gcc-ipq8074.c
-@@ -1889,8 +1889,10 @@ static struct clk_regmap_div nss_port5_t
- 
- static const struct freq_tbl ftbl_nss_port6_rx_clk_src[] = {
- 	F(19200000, P_XO, 1, 0, 0),
-+	F(25000000, P_UNIPHY2_RX, 5, 0, 0),
- 	F(25000000, P_UNIPHY2_RX, 12.5, 0, 0),
- 	F(78125000, P_UNIPHY2_RX, 4, 0, 0),
-+	F(125000000, P_UNIPHY2_RX, 1, 0, 0),
- 	F(125000000, P_UNIPHY2_RX, 2.5, 0, 0),
- 	F(156250000, P_UNIPHY2_RX, 2, 0, 0),
- 	F(312500000, P_UNIPHY2_RX, 1, 0, 0),
-@@ -1929,8 +1931,10 @@ static struct clk_regmap_div nss_port6_r
- 
- static const struct freq_tbl ftbl_nss_port6_tx_clk_src[] = {
- 	F(19200000, P_XO, 1, 0, 0),
-+	F(25000000, P_UNIPHY2_TX, 5, 0, 0),
- 	F(25000000, P_UNIPHY2_TX, 12.5, 0, 0),
- 	F(78125000, P_UNIPHY2_TX, 4, 0, 0),
-+	F(125000000, P_UNIPHY2_TX, 1, 0, 0),
- 	F(125000000, P_UNIPHY2_TX, 2.5, 0, 0),
- 	F(156250000, P_UNIPHY2_TX, 2, 0, 0),
- 	F(312500000, P_UNIPHY2_TX, 1, 0, 0),

target/linux/ipq807x/patches-5.10/129-clk-qcom-ipq8074-Add-NSS-PORT-clocks-frequencies.patch

@@ -1,41 +0,0 @@
-From 6cc04849eea4d87b3b274cc900c6a14a1ac866f5 Mon Sep 17 00:00:00 2001
-From: Praveenkumar I <ipkumar@codeaurora.org>
-Date: Wed, 12 Jul 2017 21:42:11 +0530
-Subject: [PATCH 7/8] clk: qcom: ipq8074: Add NSS PORT clocks frequencies
-
-The port clock uses different frequency which depends upon
-ethernet PHY mode.
-
-Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
-(cherry picked from commit ae5f033e8929d0ffc34320c89b5683f801c3121c)
-Signed-off-by: Praveenkumar I <ipkumar@codeaurora.org>
-
-Change-Id: I7f5d24bc400b3c35d68ef08ae73ab8395b7dd87b
----
- drivers/clk/qcom/gcc-ipq8074.c | 4 ++++
- 1 file changed, 4 insertions(+)
-
---- a/drivers/clk/qcom/gcc-ipq8074.c
-+++ b/drivers/clk/qcom/gcc-ipq8074.c
-@@ -1810,8 +1810,10 @@ static struct clk_regmap_div nss_port4_t
- static const struct freq_tbl ftbl_nss_port5_rx_clk_src[] = {
- 	F(19200000, P_XO, 1, 0, 0),
- 	F(25000000, P_UNIPHY1_RX, 12.5, 0, 0),
-+	F(25000000, P_UNIPHY0_RX, 5, 0, 0),
- 	F(78125000, P_UNIPHY1_RX, 4, 0, 0),
- 	F(125000000, P_UNIPHY1_RX, 2.5, 0, 0),
-+	F(125000000, P_UNIPHY0_RX, 1, 0, 0),
- 	F(156250000, P_UNIPHY1_RX, 2, 0, 0),
- 	F(312500000, P_UNIPHY1_RX, 1, 0, 0),
- 	{ }
-@@ -1849,8 +1851,10 @@ static struct clk_regmap_div nss_port5_r
- 
- static const struct freq_tbl ftbl_nss_port5_tx_clk_src[] = {
- 	F(19200000, P_XO, 1, 0, 0),
-+	F(25000000, P_UNIPHY0_TX, 5, 0, 0),
- 	F(25000000, P_UNIPHY1_TX, 12.5, 0, 0),
- 	F(78125000, P_UNIPHY1_TX, 4, 0, 0),
-+	F(125000000, P_UNIPHY0_TX, 1, 0, 0),
- 	F(125000000, P_UNIPHY1_TX, 2.5, 0, 0),
- 	F(156250000, P_UNIPHY1_TX, 2, 0, 0),
- 	F(312500000, P_UNIPHY1_TX, 1, 0, 0),

target/linux/ipq807x/patches-5.10/130-clk-qcom-ipq8074-change-freq-table-for-port5_tx_clk_.patch

@@ -1,38 +0,0 @@
-From be45ad064b7afdbc1e4f36c5a04c27cc364900c2 Mon Sep 17 00:00:00 2001
-From: Praveenkumar I <ipkumar@codeaurora.org>
-Date: Tue, 7 Nov 2017 15:03:52 +0530
-Subject: [PATCH 8/8] clk: qcom: ipq8074: change freq table for
- port5_tx_clk_src
-
-Originally QCOM clock framework assumes that there will be
-only one entry for each freq but in port5, the same freq can be
-supplied by 2 sources, uniphy0 and uniphy1. We need to move
-uniphy1 above uniphy0 in frequency table so that uniphy1 will be
-selected instead of uniphy0 if uniphy0 is running in
-125 Mhz and uniphy1 is running in 312 Mhz.
-
-Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
-(cherry picked from commit 559fcf09e9681f7d1fcbd981a5de7957ffb3e496)
-Signed-off-by: Praveenkumar I <ipkumar@codeaurora.org>
-
-Change-Id: I91c17714922afc1ef4cdb5e6e47e2e813e2e9777
----
- drivers/clk/qcom/gcc-ipq8074.c | 4 ++--
- 1 file changed, 2 insertions(+), 2 deletions(-)
-
---- a/drivers/clk/qcom/gcc-ipq8074.c
-+++ b/drivers/clk/qcom/gcc-ipq8074.c
-@@ -1851,11 +1851,11 @@ static struct clk_regmap_div nss_port5_r
- 
- static const struct freq_tbl ftbl_nss_port5_tx_clk_src[] = {
- 	F(19200000, P_XO, 1, 0, 0),
--	F(25000000, P_UNIPHY0_TX, 5, 0, 0),
- 	F(25000000, P_UNIPHY1_TX, 12.5, 0, 0),
-+	F(25000000, P_UNIPHY0_TX, 5, 0, 0),
- 	F(78125000, P_UNIPHY1_TX, 4, 0, 0),
--	F(125000000, P_UNIPHY0_TX, 1, 0, 0),
- 	F(125000000, P_UNIPHY1_TX, 2.5, 0, 0),
-+	F(125000000, P_UNIPHY0_TX, 1, 0, 0),
- 	F(156250000, P_UNIPHY1_TX, 2, 0, 0),
- 	F(312500000, P_UNIPHY1_TX, 1, 0, 0),
- 	{ }

target/linux/ipq807x/patches-5.10/145-clk-qcom-ipq8074-disable-SW_COLLAPSE-for-USB-GDSCR-s.patch

@@ -15,9 +15,9 @@ Change-Id: I17beca334be79d738a35587860847aa0b1f96fa9
 
 --- a/drivers/clk/qcom/gcc-ipq8074.c
 +++ b/drivers/clk/qcom/gcc-ipq8074.c
-@@ -5063,6 +5063,11 @@ static int gcc_ipq8074_probe(struct plat
+@@ -5066,6 +5066,11 @@ static int gcc_ipq8074_probe(struct plat
- 	if (IS_ERR(regmap))
+ 	/* SW Workaround for UBI32 Huayra PLL */
- 		return PTR_ERR(regmap);
+ 	regmap_update_bits(regmap, 0x2501c, BIT(26), BIT(26));
  
 +	/* Disable SW_COLLAPSE for USB0 GDSCR */
 +	regmap_update_bits(regmap, 0x3e078, BIT(0), 0x0);

target/linux/ipq807x/patches-5.10/146-clk-qcom-ipq8074-SW-workaround-for-UBI-PLL-lock.patch

@@ -34,7 +34,7 @@ Signed-off-by: Abhishek Sahu <absahu@codeaurora.org>
 
 --- a/drivers/clk/qcom/gcc-ipq8074.c
 +++ b/drivers/clk/qcom/gcc-ipq8074.c
-@@ -5068,6 +5068,9 @@ static int gcc_ipq8074_probe(struct plat
+@@ -5071,6 +5071,9 @@ static int gcc_ipq8074_probe(struct plat
  	/* Disable SW_COLLAPSE for USB1 GDSCR */
  	regmap_update_bits(regmap, 0x3f078, BIT(0), 0x0);
  

target/linux/ipq807x/patches-5.10/600-qca-nss-ecm-support-CORE.patch

@@ -608,7 +608,7 @@
  	struct fib_table *tb;
 --- a/include/net/addrconf.h
 +++ b/include/net/addrconf.h
-@@ -503,4 +503,9 @@ int if6_proc_init(void);
+@@ -506,4 +506,9 @@ int if6_proc_init(void);
  void if6_proc_exit(void);
  #endif
  
@@ -620,7 +620,7 @@
  #endif
 --- a/net/ipv6/addrconf.c
 +++ b/net/ipv6/addrconf.c
-@@ -7274,3 +7274,35 @@ void addrconf_cleanup(void)
+@@ -7270,3 +7270,35 @@ void addrconf_cleanup(void)
  
  	destroy_workqueue(addrconf_wq);
  }
@@ -699,7 +699,7 @@
  out:
  	fib6_info_release(rt);
  	return err;
-@@ -6180,6 +6190,20 @@ static int ip6_route_dev_notify(struct n
+@@ -6187,6 +6197,20 @@ static int ip6_route_dev_notify(struct n
  	return NOTIFY_OK;
  }