lede/target/linux/ipq807x/patches-5.10/120-PCI-qcom-Add-IPQ8074-PCIe-Gen3-support.patch
benihi cd264e8258
ipq807x: fixes build error and refresh 5.10 patches (#9991)
adjusted:
target/linux/ipq807x/patches-5.10/125-ipq8074-gcc-Added-support-for-NSS-clocks.patch
https://kernel.source.codeaurora.cn/pub/scm/linux/kernel/git/stable/linux.git/commit/drivers/clk/qcom/gcc-ipq8074.c?h=v5.10.137&id=b28ebe7d2f10e5ca574be3d4188a744674e8e0d5
https://kernel.source.codeaurora.cn/pub/scm/linux/kernel/git/stable/linux.git/commit/drivers/clk/qcom/gcc-ipq8074.c?h=v5.10.137&id=e2330494f0f8f168ae5bd17df01cb61363593c46

removed:
target/linux/ipq807x/patches-5.10/128-qcom-clk-ipq8074-fix-port-6-clock-issue-for-1G.patch
target/linux/ipq807x/patches-5.10/129-clk-qcom-ipq8074-Add-NSS-PORT-clocks-frequencies.patch
target/linux/ipq807x/patches-5.10/130-clk-qcom-ipq8074-change-freq-table-for-port5_tx_clk_.patch
https://kernel.source.codeaurora.cn/pub/scm/linux/kernel/git/stable/linux.git/commit/drivers/clk/qcom/gcc-ipq8074.c?h=v5.10.137&id=b83af7b4ec1d1c54de7d7115c9e0b4c3d60fdc47

Signed-off-by: José Hwong <josehwong@hotmail.com>

Signed-off-by: José Hwong <josehwong@hotmail.com>
2022-08-24 19:45:26 +08:00

49 lines
1.5 KiB
Diff

From 9467e9860e72d7351b24dc6d77f0e9fe141ce166 Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Wed, 26 May 2021 16:06:32 +0200
Subject: [PATCH] PCI: qcom: Add IPQ8074 PCIe Gen3 support
IPQ6018 uses the same v2.9.0 IP for the Gen3 PCIe
controller.
So, lets reuse that and add clocks that the IPQ6018
patch missed.
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
drivers/pci/controller/dwc/pcie-qcom.c | 9 ++++++---
1 file changed, 6 insertions(+), 3 deletions(-)
--- a/drivers/pci/controller/dwc/pcie-qcom.c
+++ b/drivers/pci/controller/dwc/pcie-qcom.c
@@ -173,7 +173,7 @@ struct qcom_pcie_resources_2_7_0 {
};
struct qcom_pcie_resources_2_9_0 {
- struct clk_bulk_data clks[5];
+ struct clk_bulk_data clks[7];
struct reset_control *rst;
};
@@ -1271,8 +1271,10 @@ static int qcom_pcie_get_resources_2_9_0
res->clks[0].id = "iface";
res->clks[1].id = "axi_m";
res->clks[2].id = "axi_s";
- res->clks[3].id = "axi_bridge";
- res->clks[4].id = "rchng";
+ res->clks[3].id = "ahb";
+ res->clks[4].id = "aux";
+ res->clks[5].id = "axi_bridge";
+ res->clks[6].id = "rchng";
ret = devm_clk_bulk_get(dev, ARRAY_SIZE(res->clks), res->clks);
if (ret < 0)
@@ -1599,6 +1601,7 @@ static const struct of_device_id qcom_pc
{ .compatible = "qcom,pcie-qcs404", .data = &ops_2_4_0 },
{ .compatible = "qcom,pcie-sdm845", .data = &ops_2_7_0 },
{ .compatible = "qcom,pcie-ipq6018", .data = &ops_2_9_0 },
+ { .compatible = "qcom,pcie-ipq8074-gen3", .data = &ops_2_9_0 },
{ }
};