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42 lines
1.3 KiB
Diff
42 lines
1.3 KiB
Diff
From ba430b1a512dc1972807a1dd5a8d31a78ac572ff Mon Sep 17 00:00:00 2001
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From: hzy <hzyitc@outlook.com>
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Date: Mon, 22 Apr 2024 21:49:18 +0800
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Subject: [PATCH 2/2] ipq50xx: use corrent scm function to write tcsr
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Signed-off-by: hzy <hzyitc@outlook.com>
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---
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hal/soc_ops/ipq50xx/nss_ipq50xx.c | 9 ++-------
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1 file changed, 2 insertions(+), 7 deletions(-)
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diff --git a/hal/soc_ops/ipq50xx/nss_ipq50xx.c b/hal/soc_ops/ipq50xx/nss_ipq50xx.c
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index 3e4491c0..e56de1cc 100644
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--- a/hal/soc_ops/ipq50xx/nss_ipq50xx.c
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+++ b/hal/soc_ops/ipq50xx/nss_ipq50xx.c
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@@ -18,7 +18,7 @@
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#include <linux/of.h>
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#include <linux/ioport.h>
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-#include <linux/qcom_scm.h>
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+#include <linux/firmware/qcom/qcom_scm.h>
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#include "nss_dp_hal.h"
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/*
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@@ -78,13 +78,8 @@ static void nss_dp_hal_tcsr_set(void)
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* If TZ is not enabled, we can write to the register directly.
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*/
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if (qcom_scm_is_available()) {
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-#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 4, 0))
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- err = qcom_scm_tcsr_reg_write((tcsr_base + TCSR_GMAC_AXI_CACHE_OVERRIDE_OFFSET),
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+ err = qcom_scm_io_writel((tcsr_base + TCSR_GMAC_AXI_CACHE_OVERRIDE_OFFSET),
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TCSR_GMAC_AXI_CACHE_OVERRIDE_VALUE);
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-#else
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- err = qti_scm_tcsr_reg_write((tcsr_base + TCSR_GMAC_AXI_CACHE_OVERRIDE_OFFSET),
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- TCSR_GMAC_AXI_CACHE_OVERRIDE_VALUE);
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-#endif
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if (err) {
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pr_err("%s: SCM TCSR write error: %d\n", __func__, err);
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}
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--
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2.40.1
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