mirror of
https://github.com/coolsnowwolf/lede.git
synced 2025-04-16 04:13:31 +00:00
67 lines
2.0 KiB
Diff
67 lines
2.0 KiB
Diff
--- a/arch/arm64/boot/dts/rockchip/rk356x.dtsi
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+++ b/arch/arm64/boot/dts/rockchip/rk356x.dtsi
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@@ -53,7 +53,7 @@
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device_type = "cpu";
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compatible = "arm,cortex-a55";
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reg = <0x0 0x0>;
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- clocks = <&scmi_clk 0>;
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+ clocks = <&cru ARMCLK>;
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#cooling-cells = <2>;
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enable-method = "psci";
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operating-points-v2 = <&cpu0_opp_table>;
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@@ -63,6 +63,7 @@
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device_type = "cpu";
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compatible = "arm,cortex-a55";
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reg = <0x0 0x100>;
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+ clocks = <&cru ARMCLK>;
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#cooling-cells = <2>;
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enable-method = "psci";
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operating-points-v2 = <&cpu0_opp_table>;
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@@ -72,6 +73,7 @@
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device_type = "cpu";
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compatible = "arm,cortex-a55";
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reg = <0x0 0x200>;
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+ clocks = <&cru ARMCLK>;
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#cooling-cells = <2>;
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enable-method = "psci";
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operating-points-v2 = <&cpu0_opp_table>;
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@@ -81,6 +83,7 @@
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device_type = "cpu";
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compatible = "arm,cortex-a55";
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reg = <0x0 0x300>;
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+ clocks = <&cru ARMCLK>;
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#cooling-cells = <2>;
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enable-method = "psci";
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operating-points-v2 = <&cpu0_opp_table>;
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@@ -136,6 +139,7 @@
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shmem = <&scmi_shmem>;
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#address-cells = <1>;
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#size-cells = <0>;
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+ status = "disabled";
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scmi_clk: protocol@14 {
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reg = <0x14>;
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@@ -193,6 +197,7 @@
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scmi_shmem: sram@0 {
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compatible = "arm,scmi-shmem";
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reg = <0x0 0x100>;
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+ status = "disabled";
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};
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};
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--- a/drivers/clk/rockchip/clk-rk3568.c
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+++ b/drivers/clk/rockchip/clk-rk3568.c
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@@ -150,6 +150,12 @@ static struct rockchip_pll_rate_table rk3568_pll_rates[] = {
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}
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static struct rockchip_cpuclk_rate_table rk3568_cpuclk_rates[] __initdata = {
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+ RK3568_CPUCLK_RATE(2208000000, 0, 1, 11, 11, 11, 11),
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+ RK3568_CPUCLK_RATE(2184000000, 0, 1, 11, 11, 11, 11),
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+ RK3568_CPUCLK_RATE(2088000000, 0, 1, 9, 9, 9, 9),
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+ RK3568_CPUCLK_RATE(2016000000, 0, 1, 9, 9, 9, 9),
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+ RK3568_CPUCLK_RATE(1992000000, 0, 1, 9, 9, 9, 9),
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+ RK3568_CPUCLK_RATE(1896000000, 0, 1, 7, 7, 7, 7),
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RK3568_CPUCLK_RATE(1800000000, 0, 1, 7, 7, 7, 7),
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RK3568_CPUCLK_RATE(1704000000, 0, 1, 7, 7, 7, 7),
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RK3568_CPUCLK_RATE(1608000000, 0, 1, 5, 5, 5, 5),
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