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ipq807x: add Redmi AX6, Xiaomi AX9000 support

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This commit is contained in:
coolsnowwolf 2021-06-24 12:16:06 +08:00
parent fb9568cbe3
commit eac26cc353
181 changed files with 15242 additions and 4636 deletions
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23
package/boot/uboot-envtools/files/ipq807x Normal file
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@ -0,0 +1,23 @@
[ -e /etc/config/ubootenv ] && exit 0
touch /etc/config/ubootenv
. /lib/uboot-envtools.sh
. /lib/functions.sh
board=$(board_name)
case "$board" in
redmi,ax6|\
xiaomi,ax3600|\
xiaomi,ax9000)
idx="$(find_mtd_index 0:appsblenv)"
[ -n "$idx" ] && \
ubootenv_add_uci_config "/dev/mtd$idx" "0x0" "0x10000" "0x20000"
;;
esac
config_load ubootenv
config_foreach ubootenv_add_app_config ubootenv
exit 0

12
package/firmware/ipq-wifi/Makefile
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@ -50,11 +50,13 @@ ALLWIFIBOARDS:= \
mikrotik_sxtsq-5-ac \
mobipromo_cm520-79f \
nec_wg2600hp3 \
netgear_sxr80 \
netgear_wac510 \
plasmacloud_pa1200 \
plasmacloud_pa2200 \
p2w_r619ac \
qxwlan_e2600ac
redmi_ax6 \
xiaomi_ax3600 \
xiaomi_ax9000
ALLWIFIPACKAGES:=$(foreach BOARD,$(ALLWIFIBOARDS),ipq-wifi-$(BOARD))
@ -62,7 +64,7 @@ define Package/ipq-wifi-default
SUBMENU:=ath10k Board-Specific Overrides
SECTION:=firmware
CATEGORY:=Firmware
DEPENDS:=@(TARGET_ipq40xx||TARGET_ipq806x)
DEPENDS:=@(TARGET_ipq40xx||TARGET_ipq806x||TARGET_ipq807x)
TITLE:=Custom Board
endef
@ -140,10 +142,14 @@ $(eval $(call generate-ipq-wifi-package,mikrotik_hap-ac2,Mikrotik hAP ac2))
$(eval $(call generate-ipq-wifi-package,mikrotik_sxtsq-5-ac,MikroTik SXTsq 5 ac))
$(eval $(call generate-ipq-wifi-package,mobipromo_cm520-79f,MobiPromo CM520-79F))
$(eval $(call generate-ipq-wifi-package,nec_wg2600hp3,NEC Platforms WG2600HP3))
$(eval $(call generate-ipq-wifi-package,netgear_sxr80,Netgear SXR80))
$(eval $(call generate-ipq-wifi-package,netgear_wac510,Netgear WAC510))
$(eval $(call generate-ipq-wifi-package,plasmacloud_pa1200,Plasma Cloud PA1200))
$(eval $(call generate-ipq-wifi-package,plasmacloud_pa2200,Plasma Cloud PA2200))
$(eval $(call generate-ipq-wifi-package,p2w_r619ac,P&W R619AC))
$(eval $(call generate-ipq-wifi-package,qxwlan_e2600ac,Qxwlan E2600AC))
$(eval $(call generate-ipq-wifi-package,redmi_ax6,Redmi AX6))
$(eval $(call generate-ipq-wifi-package,xiaomi_ax3600,Xiaomi AX3600))
$(eval $(call generate-ipq-wifi-package,xiaomi_ax9000,Xiaomi AX9000))
$(foreach PACKAGE,$(ALLWIFIPACKAGES),$(eval $(call BuildPackage,$(PACKAGE))))

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package/firmware/ipq-wifi/board-netgear_sxr80.ipq8074 Normal file
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package/firmware/ipq-wifi/board-redmi_ax6.ipq8074 Normal file
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package/firmware/ipq-wifi/board-xiaomi_ax3600.ipq8074 Normal file
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package/firmware/ipq-wifi/board-xiaomi_ax3600.qca9889 Normal file
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package/firmware/ipq-wifi/board-xiaomi_ax9000.ipq8074 Normal file
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16
package/kernel/linux/modules/hwmon.mk
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@ -122,6 +122,22 @@ endef
$(eval $(call KernelPackage,hwmon-drivetemp))
define KernelPackage/hwmon-emc2305
TITLE:=SMSC EMC2305 fan support
KCONFIG:=CONFIG_SENSORS_EMC2305
FILES:= \
$(LINUX_DIR)/drivers/hwmon/emc2305.ko
AUTOLOAD:=$(call AutoProbe,emc2305)
$(call AddDepends/hwmon,+kmod-i2c-core +kmod-regmap-i2c)
endef
define KernelPackage/hwmon-emc2305/description
SMSC SMSC EMC2301/2/3/5 fan controllers support
endef
$(eval $(call KernelPackage,hwmon-emc2305))
define KernelPackage/hwmon-gpiofan
TITLE:=Generic GPIO FAN support
KCONFIG:=CONFIG_SENSORS_GPIO_FAN

70
package/nss/firmware/nss-firmware/Makefile Normal file
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@ -0,0 +1,70 @@
#
# Copyright (C) 2021 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
include $(TOPDIR)/rules.mk
PKG_NAME:=nss-firmware
PKG_SOURCE_DATE:=2021-03-12
PKG_SOURCE_VERSION:=73f378d6be21a9c20a69b77000dbb54a537006a9
PKG_MIRROR_HASH:=0c21afe29002754edf2983bc9e8543dddd722e75bd12e961e300e99a310d1f62
PKG_RELEASE:=$(AUTORELEASE)
PKG_SOURCE_PROTO:=git
PKG_SOURCE_URL:=https://github.com/quic/qca-sdk-nss-fw.git
PKG_LICENSE_FILES:=LICENSE.md
PKG_MAINTAINER:=Robert Marko <robimarko@gmail.com>
include $(INCLUDE_DIR)/package.mk
VERSION_PATH=$(PKG_BUILD_DIR)/QCA_Networking_2020.SPF_11.3/CS
define Package/nss-firmware-default
SECTION:=firmware
CATEGORY:=Firmware
URL:=$(PKG_SOURCE_URL)
DEPENDS:=@(TARGET_ipq807x||TARGET_ipq60xx)
endef
define Package/nss-firmware-ipq6018
$(Package/nss-firmware-default)
TITLE:=NSS firmware for IPQ6018 devices
NSS_ARCHIVE:=$(VERSION_PATH)/IPQ6018.ATH.11.3/BIN-NSS.CP.11.3-9-R.tar.bz2
endef
define Package/nss-firmware-ipq8074
$(Package/nss-firmware-default)
TITLE:=NSS firmware for IPQ8074 devices
NSS_ARCHIVE:=$(VERSION_PATH)/IPQ8074.ATH.11.3/BIN-NSS.HK.11.3-9-R.tar.bz2
endef
define Build/Compile
endef
define Package/nss-firmware-ipq6018/install
$(TAR) -C $(PKG_BUILD_DIR) -xf $(NSS_ARCHIVE)
$(INSTALL_DIR) $(1)/lib/firmware/
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/BIN-NSS.CP.11.3-9-R/retail_router0.bin \
$(1)/lib/firmware/qca-nss0-retail.bin
endef
define Package/nss-firmware-ipq8074/install
$(TAR) -C $(PKG_BUILD_DIR) -xf $(NSS_ARCHIVE)
$(INSTALL_DIR) $(1)/lib/firmware/
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/BIN-NSS.HK.11.3-9-R/retail_router0.bin \
$(1)/lib/firmware/qca-nss0-retail.bin
$(INSTALL_DATA) \
$(PKG_BUILD_DIR)/BIN-NSS.HK.11.3-9-R/retail_router1.bin \
$(1)/lib/firmware/qca-nss1-retail.bin
endef
$(eval $(call BuildPackage,nss-firmware-ipq6018))
$(eval $(call BuildPackage,nss-firmware-ipq8074))

59
package/nss/qca/qca-nss-clients/Makefile Normal file
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@ -0,0 +1,59 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=qca-nss-clients
PKG_RELEASE:=$(AUTORELEASE)
PKG_SOURCE_URL:=https://source.codeaurora.org/quic/cc-qrdk/oss/lklm/nss-clients
PKG_SOURCE_PROTO:=git
PKG_SOURCE_DATE:=2021-04-29
PKG_SOURCE_VERSION:=b93c72c1b72c591c2ddc2f0b24f0e2b457720118
PKG_MIRROR_HASH:=9fab23da994bfbac9a3cef32cdfec31a87a03ed415f36bc926da32b7b0934259
include $(INCLUDE_DIR)/kernel.mk
include $(INCLUDE_DIR)/package.mk
define KernelPackage/qca-nss-drv-pppoe
SECTION:=kernel
CATEGORY:=Kernel modules
SUBMENU:=Network Devices
TITLE:=Kernel driver for NSS (connection manager) - PPPoE
DEPENDS:=@TARGET_ipq807x +kmod-qca-nss-drv +kmod-ppp +kmod-pppoe
FILES:=$(PKG_BUILD_DIR)/pppoe/qca-nss-pppoe.ko
AUTOLOAD:=$(call AutoLoad,51,qca-nss-pppoe)
endef
define KernelPackage/qca-nss-drv-pppoe/Description
Kernel modules for NSS connection manager - Support for PPPoE
endef
EXTRA_CFLAGS+= \
-I$(STAGING_DIR)/usr/include/qca-nss-drv \
-I$(STAGING_DIR)/usr/include/qca-nss-crypto \
-I$(STAGING_DIR)/usr/include/qca-nss-cfi \
-I$(STAGING_DIR)/usr/include/qca-nss-gmac \
-I$(STAGING_DIR)/usr/include/qca-ssdk \
-I$(STAGING_DIR)/usr/include/qca-ssdk/fal \
-I$(STAGING_DIR)/usr/include/nat46
ifneq ($(CONFIG_PACKAGE_kmod-qca-nss-drv-pppoe),)
NSS_CLIENTS_MAKE_OPTS+=pppoe=y
endif
ifeq ($(CONFIG_TARGET_BOARD), "ipq807x")
SOC="ipq807x_64"
else ifeq ($(CONFIG_TARGET_BOARD), "ipq60xx")
SOC="ipq60xx_64"
endif
define Build/Compile
$(MAKE) -C "$(LINUX_DIR)" $(strip $(NSS_CLIENTS_MAKE_OPTS)) \
CROSS_COMPILE="$(TARGET_CROSS)" \
ARCH="$(LINUX_KARCH)" \
M="$(PKG_BUILD_DIR)" \
EXTRA_CFLAGS="$(EXTRA_CFLAGS)" \
SoC=$(SOC) \
$(KERNEL_MAKE_FLAGS) \
modules
endef
$(eval $(call KernelPackage,qca-nss-drv-pppoe))

214
package/nss/qca/qca-nss-clients/files/qca-nss-ipsec Executable file
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@ -0,0 +1,214 @@
#!/bin/sh /etc/rc.common
#
# Copyright (c) 2018-2019, 2021 The Linux Foundation. All rights reserved.
#
# Permission to use, copy, modify, and/or distribute this software for any
# purpose with or without fee is hereby granted, provided that the above
# copyright notice and this permission notice appear in all copies.
#
# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
NSS_IPSEC_LOG_FILE=/tmp/.nss_ipsec_log
NSS_IPSEC_LOG_STR_ECM="ECM_Loaded"
NSS_IPSEC_OL_FILE=/tmp/qca_nss_ipsec_ol
ecm_load () {
if [ ! -d /sys/module/ecm ]; then
/etc/init.d/qca-nss-ecm start
if [ -d /sys/module/ecm ]; then
echo ${NSS_IPSEC_LOG_STR_ECM} >> ${NSS_IPSEC_LOG_FILE}
fi
fi
}
ecm_unload () {
if [ -f /tmp/.nss_ipsec_log ]; then
str=`grep ${NSS_IPSEC_LOG_STR_ECM} ${NSS_IPSEC_LOG_FILE}`
if [[ $str == ${NSS_IPSEC_LOG_STR_ECM} ]]; then
/etc/init.d/qca-nss-ecm stop
`sed 's/${NSS_IPSEC_LOG_STR_ECM}/ /g' $NSS_IPSEC_LOG_FILE > $NSS_IPSEC_LOG_FILE`
fi
fi
}
ecm_disable() {
if [ ! -d /sys/module/ecm ]; then
return;
fi
echo 1 > /sys/kernel/debug/ecm/front_end_ipv4_stop
echo 1 > /sys/kernel/debug/ecm/front_end_ipv6_stop
echo 1 > /sys/kernel/debug/ecm/ecm_db/defunct_all
sleep 2
}
ecm_enable() {
if [ ! -d /sys/module/ecm ]; then
return;
fi
echo 0 > /sys/kernel/debug/ecm/ecm_db/defunct_all
echo 0 > /sys/kernel/debug/ecm/front_end_ipv4_stop
echo 0 > /sys/kernel/debug/ecm/front_end_ipv6_stop
}
kernel_version_check_5_4() {
major_ver=$(uname -r | awk -F '.' '{print $1}')
minor_ver=$(uname -r | awk -F '.' '{print $2}')
if [ $major_ver -lt 5 ] || ([ $major_ver -eq 5 ] && [ $minor_ver -lt 4 ] ) ; then
return 1
else
return 0
fi
}
start_klips() {
if kernel_version_check_5_4
then
echo "Kernel 5.4 doesn't support klips stack."
return $?
fi
touch $NSS_IPSEC_OL_FILE
ecm_load
local kernel_version=$(uname -r)
insmod /lib/modules/${kernel_version}/qca-nss-ipsec-klips.ko
if [ "$?" -gt 0 ]; then
echo "Failed to load plugin. Please start ecm if not done already"
ecm_enable
rm $NSS_IPSEC_OL_FILE
return
fi
/etc/init.d/ipsec start
sleep 2
ipsec eroute
ecm_enable
}
stop_klips() {
if kernel_version_check_5_4
then
echo "Kernel 5.4 doesn't support klips stack."
return $?
fi
ecm_disable
/etc/init.d/ipsec stop
rmmod qca-nss-ipsec-klips
rm $NSS_IPSEC_OL_FILE
ecm_unload
}
start_xfrm() {
touch $NSS_IPSEC_OL_FILE
ecm_load
local kernel_version=$(uname -r)
# load all NETKEY modules first.
for mod in xfrm_ipcomp ipcomp xfrm6_tunnel ipcomp6 xfrm6_mode_tunnel xfrm6_mode_beet xfrm6_mode_ro \
xfrm6_mode_transport xfrm4_mode_transport xfrm4_mode_tunnel \
xfrm4_tunnel xfrm4_mode_beet esp4 esp6 ah4 ah6 af_key
do
insmod $mod 2> /dev/null
done
# Now load the xfrm plugin
insmod /lib/modules/${kernel_version}/qca-nss-ipsec-xfrm.ko
if [ "$?" -gt 0 ]; then
echo "Failed to load plugin. Please start ecm if not done already"
ecm_enable
rm $NSS_IPSEC_OL_FILE
return
fi
/etc/init.d/ipsec start
sleep 2
ecm_enable
}
stop_xfrm() {
ecm_disable
#Shutdown Pluto first. Then only plugin can be removed.
plutopid=/var/run/pluto/pluto.pid
if [ -f $plutopid ]; then
pid=`cat $plutopid`
if [ ! -z "$pid" ]; then
ipsec whack --shutdown | grep -v "002";
if [ -s $plutopid ]; then
echo "Attempt to shut Pluto down failed! Trying kill:"
kill $pid;
sleep 5;
fi
fi
rm -rf $plutopid
fi
ip xfrm state flush;
ip xfrm policy flush;
sleep 2
#Now we can remove the plugin
retries=5
while [ -d /sys/module/qca_nss_ipsec_xfrm ]
do
rmmod qca-nss-ipsec-xfrm
if [ "$?" -eq 0 ]; then
rm $NSS_IPSEC_OL_FILE
break
fi
if [ ${retries} -eq 0 ]; then
echo "Failed to unload qca-nss-ipsec-xfrm plugin!"
exit
fi
echo "XFRM plugin unload failed; retrying ${retries} times"
sleep 1
retries=`expr ${retries} - 1`
done
/etc/init.d/ipsec stop
ecm_unload
}
start() {
local protostack=`uci -q get ipsec.setup.protostack`
if [ "$protostack" = "klips" ]; then
start_klips
return $?
fi
start_xfrm
return $?
}
stop() {
local protostack=`uci -q get ipsec.setup.protostack`
if [ "$protostack" = "klips" ]; then
stop_klips
return $?
fi
stop_xfrm
return $?
}
restart() {
stop
start
}

28
package/nss/qca/qca-nss-clients/files/qca-nss-mirred.init Normal file
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@ -0,0 +1,28 @@
#!/bin/sh /etc/rc.common
###########################################################################
# Copyright (c) 2019, The Linux Foundation. All rights reserved.
# Permission to use, copy, modify, and/or distribute this software for
# any purpose with or without fee is hereby granted, provided that the
# above copyright notice and this permission notice appear in all copies.
# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
# OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
###########################################################################
restart() {
rmmod act_nssmirred.ko
insmod act_nssmirred.ko
}
start() {
insmod act_nssmirred.ko
}
stop() {
rmmod act_nssmirred.ko
}

69
package/nss/qca/qca-nss-clients/files/qca-nss-ovpn.init Normal file
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@ -0,0 +1,69 @@
#!/bin/sh /etc/rc.common
###########################################################################
# Copyright (c) 2019, The Linux Foundation. All rights reserved.
# Permission to use, copy, modify, and/or distribute this software for
# any purpose with or without fee is hereby granted, provided that the
# above copyright notice and this permission notice appear in all copies.
# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT
# OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
###########################################################################
ecm_disable() {
if [ ! -d /sys/module/ecm ]; then
return
fi
echo 1 > /sys/kernel/debug/ecm/front_end_ipv4_stop
echo 1 > /sys/kernel/debug/ecm/front_end_ipv6_stop
echo 1 > /sys/kernel/debug/ecm/ecm_db/defunct_all
sleep 2
}
ecm_enable() {
if [ ! -d /sys/module/ecm ]; then
return
fi
echo 0 > /sys/kernel/debug/ecm/ecm_db/defunct_all
echo 0 > /sys/kernel/debug/ecm/front_end_ipv4_stop
echo 0 > /sys/kernel/debug/ecm/front_end_ipv6_stop
}
restart() {
ecm_disable
/etc/init.d/openvpn stop
rmmod qca-nss-ovpn-link
rmmod qca-nss-ovpn-mgr
insmod qca-nss-ovpn-mgr
insmod qca-nss-ovpn-link
if [ "$?" -gt 0 ]; then
echo "Failed to load plugin. Please start ecm if not done already"
ecm_enable
return
fi
ecm_enable
}
start() {
restart
}
stop() {
ecm_disable
/etc/init.d/openvpn stop
rmmod qca-nss-ovpn-link
rmmod qca-nss-ovpn-mgr
ecm_enable
}

62
package/nss/qca/qca-nss-dp/Makefile Normal file
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@ -0,0 +1,62 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=qca-nss-dp
PKG_RELEASE:=$(AUTORELEASE)
PKG_SOURCE_URL:=https://source.codeaurora.org/quic/cc-qrdk/oss/lklm/nss-dp
PKG_SOURCE_PROTO:=git
PKG_SOURCE_DATE:=2021-03-26
PKG_SOURCE_VERSION:=e0c89348d5ad99559ce2fbe15d37b3b5bc66aa03
PKG_MIRROR_HASH:=f369f0c3b33b5f4ad6d0a6ad6ac5495f63c9ecaf94e4e7fa345169f3e44fcf45
PKG_BUILD_PARALLEL:=1
include $(INCLUDE_DIR)/kernel.mk
include $(INCLUDE_DIR)/package.mk
define KernelPackage/qca-nss-dp
SECTION:=kernel
CATEGORY:=Kernel modules
SUBMENU:=Network Devices
DEPENDS:=@(TARGET_ipq807x||TARGET_ipq60xx) +kmod-qca-ssdk-nohnat
TITLE:=Kernel driver for NSS data plane
FILES:=$(PKG_BUILD_DIR)/qca-nss-dp.ko
AUTOLOAD:=$(call AutoLoad,31,qca-nss-dp)
endef
define KernelPackage/qca-nss-dp/Description
This package contains a NSS data plane driver for QCA chipset
endef
define Build/InstallDev
mkdir -p $(1)/usr/include/qca-nss-dp
$(CP) $(PKG_BUILD_DIR)/exports/* $(1)/usr/include/qca-nss-dp/
endef
EXTRA_CFLAGS+= \
-I$(STAGING_DIR)/usr/include/qca-ssdk
NSS_DP_HAL_DIR:=$(PKG_BUILD_DIR)/hal
define Build/Configure
$(LN) $(NSS_DP_HAL_DIR)/arch/$(CONFIG_TARGET_BOARD)/nss_$(CONFIG_TARGET_BOARD).h \
$(PKG_BUILD_DIR)/exports/nss_dp_arch.h
endef
ifeq ($(CONFIG_TARGET_BOARD), "ipq807x")
SOC="ipq807x_64"
else ifeq ($(CONFIG_TARGET_BOARD), "ipq60xx")
SOC="ipq60xx_64"
endif
define Build/Compile
+$(MAKE) -C "$(LINUX_DIR)" \
CROSS_COMPILE="$(TARGET_CROSS)" \
ARCH="$(LINUX_KARCH)" \
M="$(PKG_BUILD_DIR)" \
EXTRA_CFLAGS="$(EXTRA_CFLAGS)" SoC="$(SOC)" \
$(KERNEL_MAKE_FLAGS) \
$(PKG_JOBS) \
modules
endef
$(eval $(call KernelPackage,qca-nss-dp))

44
package/nss/qca/qca-nss-dp/patches/0001-edma_tx_rx-support-newer-kernels-time-stamping-API.patch Normal file
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@ -0,0 +1,44 @@
From 40979666b4371012405715ffa61ab5760fcdc6b3 Mon Sep 17 00:00:00 2001
Message-Id: <40979666b4371012405715ffa61ab5760fcdc6b3.1620066716.git.baruch@tkos.co.il>
From: Baruch Siach <baruch@tkos.co.il>
Date: Mon, 3 May 2021 20:07:36 +0300
Subject: [PATCH 1/3] edma_tx_rx: support newer kernels time stamping API
---
hal/edma/edma_tx_rx.c | 11 +++++++++++
1 file changed, 11 insertions(+)
--- a/hal/edma/edma_tx_rx.c
+++ b/hal/edma/edma_tx_rx.c
@@ -226,10 +226,16 @@ void nss_phy_tstamp_rx_buf(__attribute__
* set to the correct PTP class value by calling ptp_classify_raw
* in drv->rxtstamp function.
*/
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 6, 0))
if (ndev && ndev->phydev && ndev->phydev->drv &&
ndev->phydev->drv->rxtstamp)
if(ndev->phydev->drv->rxtstamp(ndev->phydev, skb, 0))
return;
+#else
+ if (ndev && phy_has_rxtstamp(ndev->phydev))
+ if (phy_rxtstamp(ndev->phydev, skb, 0))
+ return;
+#endif
netif_receive_skb(skb);
}
@@ -247,9 +253,14 @@ void nss_phy_tstamp_tx_buf(struct net_de
* set to the correct PTP class value by calling ptp_classify_raw
* in the drv->txtstamp function.
*/
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 6, 0))
if (ndev && ndev->phydev && ndev->phydev->drv &&
ndev->phydev->drv->txtstamp)
ndev->phydev->drv->txtstamp(ndev->phydev, skb, 0);
+#else
+ if (ndev && phy_has_txtstamp(ndev->phydev))
+ phy_rxtstamp(ndev->phydev, skb, 0);
+#endif
}
EXPORT_SYMBOL(nss_phy_tstamp_tx_buf);

48
package/nss/qca/qca-nss-dp/patches/0002-nss_dp_main-make-phy-mode-code-compatible-with-newer.patch Normal file
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@ -0,0 +1,48 @@
From cef7873a2d77df13ee702d902ed4e06b2248904b Mon Sep 17 00:00:00 2001
Message-Id: <cef7873a2d77df13ee702d902ed4e06b2248904b.1620066716.git.baruch@tkos.co.il>
In-Reply-To: <40979666b4371012405715ffa61ab5760fcdc6b3.1620066716.git.baruch@tkos.co.il>
References: <40979666b4371012405715ffa61ab5760fcdc6b3.1620066716.git.baruch@tkos.co.il>
From: Baruch Siach <baruch@tkos.co.il>
Date: Mon, 3 May 2021 20:17:22 +0300
Subject: [PATCH 2/3] nss_dp_main: make phy mode code compatible with newer
kernels
---
include/nss_dp_dev.h | 4 ++--
nss_dp_main.c | 4 ++++
2 files changed, 6 insertions(+), 2 deletions(-)
--- a/include/nss_dp_dev.h
+++ b/include/nss_dp_dev.h
@@ -25,7 +25,7 @@
#include <linux/netdevice.h>
#include <linux/platform_device.h>
#include <linux/if_vlan.h>
-#include <linux/switch.h>
+#include <linux/phy.h>
#include "nss_dp_api_if.h"
#include "nss_dp_hal_if.h"
@@ -46,7 +46,7 @@ struct nss_dp_dev {
/* Phy related stuff */
struct phy_device *phydev; /* Phy device */
struct mii_bus *miibus; /* MII bus */
- uint32_t phy_mii_type; /* RGMII/SGMII/QSGMII */
+ phy_interface_t phy_mii_type; /* RGMII/SGMII/QSGMII */
uint32_t phy_mdio_addr; /* Mdio address */
bool link_poll; /* Link polling enable? */
uint32_t forced_speed; /* Forced speed? */
--- a/nss_dp_main.c
+++ b/nss_dp_main.c
@@ -463,7 +463,11 @@ static int32_t nss_dp_of_get_pdata(struc
hal_pdata->netdev = netdev;
hal_pdata->macid = dp_priv->macid;
+#if (LINUX_VERSION_CODE < KERNEL_VERSION(5, 5, 0))
dp_priv->phy_mii_type = of_get_phy_mode(np);
+#else
+ of_get_phy_mode(np, &dp_priv->phy_mii_type);
+#endif
dp_priv->link_poll = of_property_read_bool(np, "qcom,link-poll");
if (of_property_read_u32(np, "qcom,phy-mdio-addr",
&dp_priv->phy_mdio_addr) && dp_priv->link_poll) {

48
package/nss/qca/qca-nss-dp/patches/0003-Drop-_nocache-variants-of-ioremap.patch Normal file
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@ -0,0 +1,48 @@
From c8c52512ff48bee578901c381a42f027e79eadf9 Mon Sep 17 00:00:00 2001
Message-Id: <c8c52512ff48bee578901c381a42f027e79eadf9.1620066716.git.baruch@tkos.co.il>
In-Reply-To: <40979666b4371012405715ffa61ab5760fcdc6b3.1620066716.git.baruch@tkos.co.il>
References: <40979666b4371012405715ffa61ab5760fcdc6b3.1620066716.git.baruch@tkos.co.il>
From: Baruch Siach <baruch@tkos.co.il>
Date: Mon, 3 May 2021 20:20:29 +0300
Subject: [PATCH 3/3] Drop _nocache variants of ioremap()
Recent kernels removed them.
---
hal/edma/edma_data_plane.c | 2 +-
hal/gmac_hal_ops/qcom/qcom_if.c | 2 +-
hal/gmac_hal_ops/syn/xgmac/syn_if.c | 2 +-
3 files changed, 3 insertions(+), 3 deletions(-)
--- a/hal/edma/edma_data_plane.c
+++ b/hal/edma/edma_data_plane.c
@@ -797,7 +797,7 @@ int edma_init(void)
/*
* Remap register resource
*/
- edma_hw.reg_base = ioremap_nocache((edma_hw.reg_resource)->start,
+ edma_hw.reg_base = ioremap((edma_hw.reg_resource)->start,
resource_size(edma_hw.reg_resource));
if (!edma_hw.reg_base) {
pr_warn("Unable to remap EDMA register memory.\n");
--- a/hal/gmac_hal_ops/qcom/qcom_if.c
+++ b/hal/gmac_hal_ops/qcom/qcom_if.c
@@ -400,7 +400,7 @@ static void *qcom_init(struct gmac_hal_p
qhd->nghd.mac_id = gmacpdata->macid;
/* Populate the mac base addresses */
- qhd->nghd.mac_base = devm_ioremap_nocache(&dp_priv->pdev->dev,
+ qhd->nghd.mac_base = devm_ioremap(&dp_priv->pdev->dev,
res->start, resource_size(res));
if (!qhd->nghd.mac_base) {
netdev_dbg(ndev, "ioremap fail.\n");
--- a/hal/gmac_hal_ops/syn/xgmac/syn_if.c
+++ b/hal/gmac_hal_ops/syn/xgmac/syn_if.c
@@ -422,7 +422,7 @@ static void *syn_init(struct gmac_hal_pl
/* Populate the mac base addresses */
shd->nghd.mac_base =
- devm_ioremap_nocache(&dp_priv->pdev->dev, res->start,
+ devm_ioremap(&dp_priv->pdev->dev, res->start,
resource_size(res));
if (!shd->nghd.mac_base) {
netdev_dbg(ndev, "ioremap fail.\n");

31
package/nss/qca/qca-nss-dp/patches/0004-EDMA-Fix-NAPI-packet-counting.patch Normal file
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@ -0,0 +1,31 @@
From d74920e2a7c413ef40eed72f9cf287cf6fbd5fb8 Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Thu, 20 May 2021 14:56:46 +0200
Subject: [PATCH 1/2] EDMA: Fix NAPI packet counting
There is a bug in the NAPI packet counting that will
cause NAPI over budget warnings.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
hal/edma/edma_tx_rx.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--- a/hal/edma/edma_tx_rx.c
+++ b/hal/edma/edma_tx_rx.c
@@ -458,12 +458,12 @@ int edma_napi(struct napi_struct *napi,
for (i = 0; i < ehw->txcmpl_rings; i++) {
txcmpl_ring = &ehw->txcmpl_ring[i];
- work_done += edma_clean_tx(ehw, txcmpl_ring);
+ edma_clean_tx(ehw, txcmpl_ring);
}
for (i = 0; i < ehw->rxfill_rings; i++) {
rxfill_ring = &ehw->rxfill_ring[i];
- work_done += edma_alloc_rx_buffer(ehw, rxfill_ring);
+ edma_alloc_rx_buffer(ehw, rxfill_ring);
}
/*

41
package/nss/qca/qca-nss-dp/patches/0005-EDMA-Use-NAPI_POLL_WEIGHT-as-NAPI-weight.patch Normal file
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@ -0,0 +1,41 @@
From 44a30d94abcbb10aacc21db29be212518a6b1bf7 Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Thu, 20 May 2021 14:57:46 +0200
Subject: [PATCH] EDMA: Use NAPI_POLL_WEIGHT as NAPI weight
Currently a weight of 100 is used by the EDMA, according
to upstream max of 64 should be used and that is used for
almost any driver.
They also introduced NAPI_POLL_WEIGHT define which equals
to 64.
So use NAPI_POLL_WEIGHT as the weight.
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
hal/edma/edma_data_plane.c | 2 +-
hal/edma/edma_data_plane.h | 1 -
2 files changed, 1 insertion(+), 2 deletions(-)
--- a/hal/edma/edma_data_plane.c
+++ b/hal/edma/edma_data_plane.c
@@ -582,7 +582,7 @@ static int edma_register_netdevice(struc
*/
if (!edma_hw.napi_added) {
netif_napi_add(netdev, &edma_hw.napi, edma_napi,
- EDMA_NAPI_WORK);
+ NAPI_POLL_WEIGHT);
/*
* Register the interrupt handlers and enable interrupts
*/
--- a/hal/edma/edma_data_plane.h
+++ b/hal/edma/edma_data_plane.h
@@ -27,7 +27,6 @@
#define EDMA_RX_PREHDR_SIZE (sizeof(struct edma_rx_preheader))
#define EDMA_TX_PREHDR_SIZE (sizeof(struct edma_tx_preheader))
#define EDMA_RING_SIZE 128
-#define EDMA_NAPI_WORK 100
#define EDMA_START_GMACS NSS_DP_START_IFNUM
#define EDMA_MAX_GMACS NSS_DP_HAL_MAX_PORTS
#define EDMA_TX_PKT_MIN_SIZE 33 /* IPQ807x EDMA needs a minimum packet size of 33 bytes */

121
package/nss/qca/qca-nss-drv/Makefile Normal file
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@ -0,0 +1,121 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=qca-nss-drv
PKG_RELEASE:=$(AUTORELEASE)
PKG_SOURCE_URL:=https://source.codeaurora.org/quic/qsdk/oss/lklm/nss-drv
PKG_SOURCE_PROTO:=git
PKG_SOURCE_DATE:=2021-04-26
PKG_SOURCE_VERSION:=1cf4bf81fd395f61648efeae78cdf1df60e954ff
PKG_MIRROR_HASH:=86b7455565d28a72da981099c67a89ea9e0ae3874a34be30959dcf48f5e2196c
PKG_BUILD_PARALLEL:=1
include $(INCLUDE_DIR)/kernel.mk
include $(INCLUDE_DIR)/package.mk
NSS_CLIENTS_DIR:=$(TOPDIR)/qca/src/qca-nss-clients
define KernelPackage/qca-nss-drv
SECTION:=kernel
CATEGORY:=Kernel modules
SUBMENU:=Network Devices
DEPENDS:=@(TARGET_ipq807x||TARGET_ipq60xx) +kmod-qca-nss-dp
TITLE:=Kernel driver for NSS (core driver)
FILES:=$(PKG_BUILD_DIR)/qca-nss-drv.ko
AUTOLOAD:=$(call AutoLoad,32,qca-nss-drv)
endef
define KernelPackage/qca-nss-drv/install
$(INSTALL_DIR) $(1)/lib/debug
$(INSTALL_DIR) $(1)/etc/init.d
$(INSTALL_DIR) $(1)/etc/sysctl.d
$(INSTALL_DIR) $(1)/etc/hotplug.d/firmware
$(INSTALL_DIR) $(1)/etc/config
$(INSTALL_BIN) ./files/qca-nss-drv.debug $(1)/lib/debug/qca-nss-drv
$(INSTALL_BIN) ./files/qca-nss-drv.init $(1)/etc/init.d/qca-nss-drv
$(INSTALL_BIN) ./files/qca-nss-drv.sysctl $(1)/etc/sysctl.d/qca-nss-drv.conf
$(INSTALL_BIN) ./files/qca-nss-drv.hotplug $(1)/etc/hotplug.d/firmware/10-qca-nss-fw
$(INSTALL_BIN) ./files/qca-nss-drv.conf $(1)/etc/config/nss
endef
define KernelPackage/qca-nss-drv/Description
This package contains a NSS driver for QCA chipset
endef
define Build/InstallDev
mkdir -p $(1)/usr/include/qca-nss-drv
$(CP) $(PKG_BUILD_DIR)/exports/* $(1)/usr/include/qca-nss-drv/
endef
EXTRA_CFLAGS+= -I$(STAGING_DIR)/usr/include/qca-nss-gmac -I$(STAGING_DIR)/usr/include/qca-nss-dp -I$(STAGING_DIR)/usr/include/qca-ssdk
ifneq (, $(findstring $(CONFIG_TARGET_BOARD), "ipq807x" "ipq60xx"))
EXTRA_CFLAGS+= -DNSS_MEM_PROFILE_MEDIUM
LOW_MEM_PROFILE_MAKE_OPTS=y
endif
ifeq ($(CONFIG_KERNEL_SKB_FIXED_SIZE_2K),y)
EXTRA_CFLAGS+= -DNSS_SKB_FIXED_SIZE_2K
endif
DRV_MAKE_OPTS:=
ifeq ($(LOW_MEM_PROFILE_MAKE_OPTS),y)
DRV_MAKE_OPTS+=NSS_DRV_C2C_ENABLE=n \
NSS_DRV_CAPWAP_ENABLE=n \
NSS_DRV_CLMAP_ENABLE=n \
NSS_DRV_CRYPTO_ENABLE=n \
NSS_DRV_DTLS_ENABLE=n \
NSS_DRV_GRE_ENABLE=n \
NSS_DRV_GRE_REDIR_ENABLE=n \
NSS_DRV_GRE_TUNNEL_ENABLE=n \
NSS_DRV_IGS_ENABLE=n \
NSS_DRV_IPSEC_ENABLE=n \
NSS_DRV_LAG_ENABLE=n \
NSS_DRV_L2TP_ENABLE=n \
NSS_DRV_MAPT_ENABLE=n \
NSS_DRV_OAM_ENABLE=n \
NSS_DRV_PPTP_ENABLE=n \
NSS_DRV_PORTID_ENABLE=n \
NSS_DRV_PVXLAN_ENABLE=n \
NSS_DRV_QRFS_ENABLE=n \
NSS_DRV_QVPN_ENABLE=n \
NSS_DRV_RMNET_ENABLE=n \
NSS_DRV_SHAPER_ENABLE=n \
NSS_DRV_SJACK_ENABLE=n \
NSS_DRV_TLS_ENABLE=n \
NSS_DRV_TRUSTSEC_ENABLE=n \
NSS_DRV_TSTAMP_ENABLE=n \
NSS_DRV_TUN6RD_ENABLE=n \
NSS_DRV_TUNIPIP6_ENABLE=n \
NSS_DRV_VXLAN_ENABLE=n \
NSS_DRV_MATCH_ENABLE=n \
NSS_DRV_MIRROR_ENABLE=n
endif
ifeq ($(CONFIG_TARGET_BOARD), "ipq807x")
SOC="ipq807x_64"
else ifeq ($(CONFIG_TARGET_BOARD), "ipq60xx")
SOC="ipq60xx_64"
endif
define Build/Configure
$(LN) arch/nss_$(SOC).h $(PKG_BUILD_DIR)/exports/nss_arch.h
sed -i "s/define NSS_FW_VERSION_MAJOR.*/define NSS_FW_VERSION_MAJOR 11/" $(PKG_BUILD_DIR)/exports/nss_fw_version.h
sed -i "s/define NSS_FW_VERSION_MINOR.*/define NSS_FW_VERSION_MINOR 3/" $(PKG_BUILD_DIR)/exports/nss_fw_version.h
endef
define Build/Compile
+$(MAKE) -C "$(LINUX_DIR)" $(strip $(DRV_MAKE_OPTS)) \
CROSS_COMPILE="$(TARGET_CROSS)" \
ARCH="$(LINUX_KARCH)" \
M="$(PKG_BUILD_DIR)" \
EXTRA_CFLAGS="$(EXTRA_CFLAGS)" SoC=$(SOC) \
$(KERNEL_MAKE_FLAGS) \
$(PKG_JOBS) \
modules
endef
$(eval $(call KernelPackage,qca-nss-drv))

6
package/nss/qca/qca-nss-drv/files/qca-nss-drv.conf Normal file
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@ -0,0 +1,6 @@
config nss_firmware 'qca_nss_0'
config nss_firmware 'qca_nss_1'
config general
option enable_rps '1'

26
package/nss/qca/qca-nss-drv/files/qca-nss-drv.debug Normal file
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@ -0,0 +1,26 @@
#!/bin/sh /sbin/sysdebug
#
# Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
#
# Permission to use, copy, modify, and/or distribute this software for any
# purpose with or without fee is hereby granted, provided that the above
# copyright notice and this permission notice appear in all copies.
#
# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
#
log cat /sys/kernel/debug/qca-nss-drv/stats/pppoe
log cat /sys/kernel/debug/qca-nss-drv/stats/n2h
log cat /sys/kernel/debug/qca-nss-drv/stats/ipv6
log cat /sys/kernel/debug/qca-nss-drv/stats/ipv4
log cat /sys/kernel/debug/qca-nss-drv/stats/gmac
log cat /sys/kernel/debug/qca-nss-drv/stats/drv
log cat /sys/kernel/debug/qca-nss-drv/stats/wifi
log cat /sys/kernel/debug/qca-nss-drv/stats/wifi_if
log cat /sys/kernel/debug/qca-nss-drv/stats/eth_rx

70
package/nss/qca/qca-nss-drv/files/qca-nss-drv.hotplug Normal file
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@ -0,0 +1,70 @@
#!/bin/sh
#
# Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
#
# Permission to use, copy, modify, and/or distribute this software for any
# purpose with or without fee is hereby granted, provided that the above
# copyright notice and this permission notice appear in all copies.
#
# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
#
KERNEL=`uname -r`
case "${KERNEL}" in
3.4*)
select_or_load=load_nss_fw
;;
*)
select_or_load=select_nss_fw
;;
esac
load_nss_fw () {
ls -l $1 | awk ' { print $9,$5 } '> /dev/console
echo 1 > /sys/class/firmware/$DEVICENAME/loading
cat $1 > /sys/class/firmware/$DEVICENAME/data
echo 0 > /sys/class/firmware/$DEVICENAME/loading
}
select_nss_fw () {
rm -f /lib/firmware/$DEVICENAME
ln -s $1 /lib/firmware/$DEVICENAME
ls -l /lib/firmware/$DEVICENAME | awk ' { print $9,$5 } '> /dev/console
}
[ "$ACTION" != "add" ] && exit
# dev name for UCI, since it doesn't let you use . or -
SDEVNAME=$(echo ${DEVICENAME} | sed s/[.-]/_/g)
SELECTED_FW=$(uci get nss.${SDEVNAME}.firmware 2>/dev/null)
[ -e "${SELECTED_FW}" ] && {
$select_or_load ${SELECTED_FW}
exit
}
case $DEVICENAME in
qca-nss0* | qca-nss.0*)
if [ -e /lib/firmware/qca-nss0-enterprise.bin ] ; then
$select_or_load /lib/firmware/qca-nss0-enterprise.bin
else
$select_or_load /lib/firmware/qca-nss0-retail.bin
fi
exit
;;
qca-nss1* | qca-nss.1*)
if [ -e /lib/firmware/qca-nss1-enterprise.bin ] ; then
$select_or_load /lib/firmware/qca-nss1-enterprise.bin
else
$select_or_load /lib/firmware/qca-nss1-retail.bin
fi
exit
;;
esac

50
package/nss/qca/qca-nss-drv/files/qca-nss-drv.init Normal file
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@ -0,0 +1,50 @@
#!/bin/sh /etc/rc.common
#
# Copyright (c) 2015-2017, The Linux Foundation. All rights reserved.
#
# Permission to use, copy, modify, and/or distribute this software for any
# purpose with or without fee is hereby granted, provided that the above
# copyright notice and this permission notice appear in all copies.
#
# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
#
START=70
enable_rps() {
irq_nss_rps=`grep nss_queue1 /proc/interrupts | cut -d ':' -f 1 | tr -d ' '`
for entry in $irq_nss_rps
do
echo 2 > /proc/irq/$entry/smp_affinity
done
irq_nss_rps=`grep nss_queue2 /proc/interrupts | cut -d ':' -f 1 | tr -d ' '`
for entry in $irq_nss_rps
do
echo 4 > /proc/irq/$entry/smp_affinity
done
irq_nss_rps=`grep nss_queue3 /proc/interrupts | cut -d ':' -f 1 | tr -d ' '`
for entry in $irq_nss_rps
do
echo 8 > /proc/irq/$entry/smp_affinity
done
# Enable NSS RPS
sysctl -w dev.nss.rps.enable=1 >/dev/null 2>/dev/null
}
start() {
local rps_enabled="$(uci_get nss @general[0] enable_rps)"
if [ "$rps_enabled" -eq 1 ]; then
enable_rps
fi
}

4
package/nss/qca/qca-nss-drv/files/qca-nss-drv.sysctl Normal file
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@ -0,0 +1,4 @@
# Default Number of connection configuration
dev.nss.ipv4cfg.ipv4_conn=4096
dev.nss.ipv6cfg.ipv6_conn=4096

25
package/nss/qca/qca-nss-drv/patches/0001-core-add-5.10-kernel-to-version-check.patch Normal file
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@ -0,0 +1,25 @@
From 3885c752e12f74cad6c97888b797e5903ad1930d Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Thu, 13 May 2021 23:22:38 +0200
Subject: [PATCH] core: add 5.10 kernel to version check
NSS DRV has a kernel version check, so simply add
5.10 as supported.
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
nss_core.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
--- a/nss_core.c
+++ b/nss_core.c
@@ -52,7 +52,8 @@
(((LINUX_VERSION_CODE >= KERNEL_VERSION(3, 10, 0)) && (LINUX_VERSION_CODE < KERNEL_VERSION(3, 11, 0)))) || \
(((LINUX_VERSION_CODE >= KERNEL_VERSION(3, 18, 0)) && (LINUX_VERSION_CODE < KERNEL_VERSION(3, 19, 0)))) || \
(((LINUX_VERSION_CODE >= KERNEL_VERSION(4, 4, 0)) && (LINUX_VERSION_CODE < KERNEL_VERSION(4, 5, 0)))) || \
-(((LINUX_VERSION_CODE >= KERNEL_VERSION(5, 4, 0)) && (LINUX_VERSION_CODE < KERNEL_VERSION(5, 5, 0))))))
+(((LINUX_VERSION_CODE >= KERNEL_VERSION(5, 4, 0)) && (LINUX_VERSION_CODE < KERNEL_VERSION(5, 5, 0)))) || \
+(((LINUX_VERSION_CODE >= KERNEL_VERSION(5, 10, 0)) && (LINUX_VERSION_CODE < KERNEL_VERSION(5, 11, 0))))))
#error "Check skb recycle code in this file to match Linux version"
#endif

164
package/nss/qca/qca-nss-drv/patches/0002-nss-drv-replace-ioremap_nocache-with-ioremap.patch Normal file
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@ -0,0 +1,164 @@
From b5e2a7167ca3df9fce34f0d7c05468d4f5597275 Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Thu, 13 May 2021 23:33:18 +0200
Subject: [PATCH] nss-drv: replace ioremap_nocache() with ioremap()
ioremap_nocache() does not exist anymore.
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
nss_hal/ipq50xx/nss_hal_pvt.c | 6 +++---
nss_hal/ipq60xx/nss_hal_pvt.c | 8 ++++----
nss_hal/ipq806x/nss_hal_pvt.c | 4 ++--
nss_hal/ipq807x/nss_hal_pvt.c | 6 +++---
nss_hal/nss_hal.c | 4 ++--
nss_meminfo.c | 2 +-
nss_ppe.c | 2 +-
7 files changed, 16 insertions(+), 16 deletions(-)
--- a/nss_hal/ipq50xx/nss_hal_pvt.c
+++ b/nss_hal/ipq50xx/nss_hal_pvt.c
@@ -184,13 +184,13 @@ static struct nss_platform_data *__nss_h
npd->nphys = res_nphys.start;
npd->qgic_phys = res_qgic_phys.start;
- npd->nmap = ioremap_nocache(npd->nphys, resource_size(&res_nphys));
+ npd->nmap = ioremap(npd->nphys, resource_size(&res_nphys));
if (!npd->nmap) {
nss_info_always("%px: nss%d: ioremap() fail for nphys\n", nss_ctx, nss_ctx->id);
goto out;
}
- npd->qgic_map = ioremap_nocache(npd->qgic_phys, resource_size(&res_qgic_phys));
+ npd->qgic_map = ioremap(npd->qgic_phys, resource_size(&res_qgic_phys));
if (!npd->qgic_map) {
nss_info_always("%px: nss%d: ioremap() fail for qgic map\n", nss_ctx, nss_ctx->id);
goto out;
@@ -348,7 +348,7 @@ static int __nss_hal_common_reset(struct
of_node_put(cmn);
- nss_misc_reset = ioremap_nocache(res_nss_misc_reset.start, resource_size(&res_nss_misc_reset));
+ nss_misc_reset = ioremap(res_nss_misc_reset.start, resource_size(&res_nss_misc_reset));
if (!nss_misc_reset) {
pr_err("%px: ioremap fail for nss_misc_reset\n", nss_dev);
return -EFAULT;
--- a/nss_hal/ipq60xx/nss_hal_pvt.c
+++ b/nss_hal/ipq60xx/nss_hal_pvt.c
@@ -207,13 +207,13 @@ static struct nss_platform_data *__nss_h
npd->nphys = res_nphys.start;
npd->qgic_phys = res_qgic_phys.start;
- npd->nmap = ioremap_nocache(npd->nphys, resource_size(&res_nphys));
+ npd->nmap = ioremap(npd->nphys, resource_size(&res_nphys));
if (!npd->nmap) {
nss_info_always("%px: nss%d: ioremap() fail for nphys\n", nss_ctx, nss_ctx->id);
goto out;
}
- npd->qgic_map = ioremap_nocache(npd->qgic_phys, resource_size(&res_qgic_phys));
+ npd->qgic_map = ioremap(npd->qgic_phys, resource_size(&res_qgic_phys));
if (!npd->qgic_map) {
nss_info_always("%px: nss%d: ioremap() fail for qgic map\n", nss_ctx, nss_ctx->id);
goto out;
@@ -433,13 +433,13 @@ static int __nss_hal_common_reset(struct
of_node_put(cmn);
- nss_misc_reset = ioremap_nocache(res_nss_misc_reset.start, resource_size(&res_nss_misc_reset));
+ nss_misc_reset = ioremap(res_nss_misc_reset.start, resource_size(&res_nss_misc_reset));
if (!nss_misc_reset) {
pr_err("%px: ioremap fail for nss_misc_reset\n", nss_dev);
return -EFAULT;
}
- nss_misc_reset_flag = ioremap_nocache(res_nss_misc_reset_flag.start, resource_size(&res_nss_misc_reset_flag));
+ nss_misc_reset_flag = ioremap(res_nss_misc_reset_flag.start, resource_size(&res_nss_misc_reset_flag));
if (!nss_misc_reset_flag) {
pr_err("%px: ioremap fail for nss_misc_reset_flag\n", nss_dev);
return -EFAULT;
--- a/nss_hal/ipq806x/nss_hal_pvt.c
+++ b/nss_hal/ipq806x/nss_hal_pvt.c
@@ -458,7 +458,7 @@ static struct nss_platform_data *__nss_h
npd->nphys = res_nphys.start;
npd->vphys = res_vphys.start;
- npd->nmap = ioremap_nocache(npd->nphys, resource_size(&res_nphys));
+ npd->nmap = ioremap(npd->nphys, resource_size(&res_nphys));
if (!npd->nmap) {
nss_info_always("%px: nss%d: ioremap() fail for nphys\n", nss_ctx, nss_ctx->id);
goto out;
@@ -711,7 +711,7 @@ static int __nss_hal_common_reset(struct
}
of_node_put(cmn);
- fpb_base = ioremap_nocache(res_nss_fpb_base.start, resource_size(&res_nss_fpb_base));
+ fpb_base = ioremap(res_nss_fpb_base.start, resource_size(&res_nss_fpb_base));
if (!fpb_base) {
pr_err("%px: ioremap fail for nss_fpb_base\n", nss_dev);
return -EFAULT;
--- a/nss_hal/ipq807x/nss_hal_pvt.c
+++ b/nss_hal/ipq807x/nss_hal_pvt.c
@@ -234,7 +234,7 @@ static struct nss_platform_data *__nss_h
npd->vphys = res_vphys.start;
npd->qgic_phys = res_qgic_phys.start;
- npd->nmap = ioremap_nocache(npd->nphys, resource_size(&res_nphys));
+ npd->nmap = ioremap(npd->nphys, resource_size(&res_nphys));
if (!npd->nmap) {
nss_info_always("%px: nss%d: ioremap() fail for nphys\n", nss_ctx, nss_ctx->id);
goto out;
@@ -247,7 +247,7 @@ static struct nss_platform_data *__nss_h
goto out;
}
- npd->qgic_map = ioremap_nocache(npd->qgic_phys, resource_size(&res_qgic_phys));
+ npd->qgic_map = ioremap(npd->qgic_phys, resource_size(&res_qgic_phys));
if (!npd->qgic_map) {
nss_info_always("%px: nss%d: ioremap() fail for qgic map\n", nss_ctx, nss_ctx->id);
goto out;
@@ -467,7 +467,7 @@ static int __nss_hal_common_reset(struct
}
of_node_put(cmn);
- nss_misc_reset = ioremap_nocache(res_nss_misc_reset.start, resource_size(&res_nss_misc_reset));
+ nss_misc_reset = ioremap(res_nss_misc_reset.start, resource_size(&res_nss_misc_reset));
if (!nss_misc_reset) {
pr_err("%px: ioremap fail for nss_misc_reset\n", nss_dev);
return -EFAULT;
--- a/nss_hal/nss_hal.c
+++ b/nss_hal/nss_hal.c
@@ -78,9 +78,9 @@ int nss_hal_firmware_load(struct nss_ctx
return rc;
}
- load_mem = ioremap_nocache(npd->load_addr, nss_fw->size);
+ load_mem = ioremap(npd->load_addr, nss_fw->size);
if (!load_mem) {
- nss_info_always("%px: ioremap_nocache failed: %x", nss_ctx, npd->load_addr);
+ nss_info_always("%px: ioremap failed: %x", nss_ctx, npd->load_addr);
release_firmware(nss_fw);
return rc;
}
--- a/nss_meminfo.c
+++ b/nss_meminfo.c
@@ -728,7 +728,7 @@ bool nss_meminfo_init(struct nss_ctx_ins
/*
* meminfo_start is the label where the start address of meminfo map is stored.
*/
- meminfo_start = (uint32_t *)ioremap_nocache(nss_ctx->load + NSS_MEMINFO_MAP_START_OFFSET,
+ meminfo_start = (uint32_t *)ioremap(nss_ctx->load + NSS_MEMINFO_MAP_START_OFFSET,
NSS_MEMINFO_RESERVE_AREA_SIZE);
if (!meminfo_start) {
nss_info_always("%px: cannot remap meminfo start\n", nss_ctx);
--- a/nss_ppe.c
+++ b/nss_ppe.c
@@ -357,7 +357,7 @@ void nss_ppe_init(void)
/*
* Get the PPE base address
*/
- ppe_pvt.ppe_base = ioremap_nocache(PPE_BASE_ADDR, PPE_REG_SIZE);
+ ppe_pvt.ppe_base = ioremap(PPE_BASE_ADDR, PPE_REG_SIZE);
if (!ppe_pvt.ppe_base) {
nss_warning("DRV can't get PPE base address\n");
return;

49
package/nss/qca/qca-nss-drv/patches/0003-DMA-Fix-NULL-pointer-exceptions.patch Normal file
View File

@ -0,0 +1,49 @@
From 62e457f262aaa0db7113ad3ccbcb7ae49d4d7ea8 Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Tue, 8 Jun 2021 23:24:43 +0200
Subject: [PATCH] DMA: Fix NULL pointer exceptions
There are multiple instances that pass NULL instead
of device to DMA functions.
That is incorrect and will cause kernel NULL pointer
exceptions.
So, simply pass the device structure pointers.
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
nss_core.c | 2 +-
nss_coredump.c | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
--- a/nss_core.c
+++ b/nss_core.c
@@ -1617,7 +1617,7 @@ static int32_t nss_core_handle_cause_que
*
*/
if (unlikely((buffer_type == N2H_BUFFER_CRYPTO_RESP))) {
- dma_unmap_single(NULL, (desc->buffer + desc->payload_offs), desc->payload_len, DMA_FROM_DEVICE);
+ dma_unmap_single(nss_ctx->dev, (desc->buffer + desc->payload_offs), desc->payload_len, DMA_FROM_DEVICE);
goto consume;
}
--- a/nss_coredump.c
+++ b/nss_coredump.c
@@ -154,7 +154,7 @@ void nss_fw_coredump_notify(struct nss_c
dma_addr = nss_own->meminfo_ctx.logbuffer_dma;
}
- dma_sync_single_for_cpu(NULL, dma_addr, sizeof(struct nss_log_descriptor), DMA_FROM_DEVICE);
+ dma_sync_single_for_cpu(nss_own->dev, dma_addr, sizeof(struct nss_log_descriptor), DMA_FROM_DEVICE);
/*
* If the current entry is smaller than or equal to the number of NSS_LOG_COREDUMP_LINE_NUM,
@@ -181,7 +181,7 @@ void nss_fw_coredump_notify(struct nss_c
offset = (index * sizeof(struct nss_log_entry))
+ offsetof(struct nss_log_descriptor, log_ring_buffer);
- dma_sync_single_for_cpu(NULL, dma_addr + offset,
+ dma_sync_single_for_cpu(nss_own->dev, dma_addr + offset,
sizeof(struct nss_log_entry), DMA_FROM_DEVICE);
nss_info_always("%px: %s\n", nss_own, nle_print->message);
nle_print++;

344
package/nss/qca/qca-nss-drv/patches/999-treewide-hack-support-for-mismatched-firmware.patch Normal file
View File

@ -0,0 +1,344 @@
From d0bffc800a50305315a0d7cf37140291ef5b1b61 Mon Sep 17 00:00:00 2001
From: Ansuel Smith <ansuelsmth@gmail.com>
Date: Thu, 27 May 2021 03:52:47 +0200
Subject: [PATCH] treewide: hack support for mismatched firmware
Make new qsdk feature configurable to support old half compatible
firmware.
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
---
exports/nss_fw_version.h | 11 +++++++++++
exports/nss_ipv4.h | 8 ++++++++
exports/nss_ipv6.h | 7 +++++++
exports/nss_wifi_vdev.h | 14 ++++++++++++++
exports/nss_wifili_if.h | 8 ++++++++
nss_ipv4_stats.c | 2 ++
nss_ipv4_strings.c | 2 ++
nss_ipv6_stats.c | 2 ++
nss_ipv6_strings.c | 2 ++
9 files changed, 56 insertions(+)
create mode 100644 exports/nss_fw_version.h
diff --git a/exports/nss_fw_version.h b/exports/nss_fw_version.h
new file mode 100644
index 0000000..895d523
--- /dev/null
+++ b/exports/nss_fw_version.h
@@ -0,0 +1,11 @@
+#ifndef __NSS_FW_VERSION_H
+#define __NSS_FW_VERSION_H
+
+#define NSS_FW_VERSION_MAJOR 11
+#define NSS_FW_VERSION_MINOR 4
+
+#define NSS_FW_VERSION(a,b) (((a) << 8) + (b))
+
+#define NSS_FW_VERSION_CODE NSS_FW_VERSION(NSS_FW_VERSION_MAJOR, NSS_FW_VERSION_MINOR)
+
+#endif /* __NSS_FW_VERSION_H */
\ No newline at end of file
diff --git a/exports/nss_ipv4.h b/exports/nss_ipv4.h
index ee3a552..25c4d82 100644
--- a/exports/nss_ipv4.h
+++ b/exports/nss_ipv4.h
@@ -26,6 +26,8 @@
#include "nss_stats_public.h"
#endif
+#include "nss_fw_version.h"
+
/**
* @addtogroup nss_ipv4_subsystem
* @{
@@ -216,12 +218,14 @@ enum nss_ipv4_stats_types {
/**< Number of IPv4 multicast connection destroy requests that missed the cache. */
NSS_IPV4_STATS_MC_CONNECTION_FLUSHES,
/**< Number of IPv4 multicast connection flushes. */
+#if (NSS_FW_VERSION_CODE > NSS_FW_VERSION(11,3))
NSS_IPV4_STATS_CONNECTION_CREATE_INVALID_MIRROR_IFNUM,
/**< Number of IPv4 mirror connection requests with an invalid interface number. */
NSS_IPV4_STATS_CONNECTION_CREATE_INVALID_MIRROR_IFTYPE,
/**< Number of IPv4 mirror connection requests with an invalid interface type. */
NSS_IPV4_STATS_MIRROR_FAILURES,
/**< Number of IPv4 mirror failures. */
+#endif
NSS_IPV4_STATS_MAX,
/**< Maximum message type. */
};
@@ -609,8 +613,10 @@ struct nss_ipv4_rule_create_msg {
/**< Ingress shaping related accleration parameters. */
struct nss_ipv4_identifier_rule identifier;
/**< Rule for adding identifier. */
+#if (NSS_FW_VERSION_CODE > NSS_FW_VERSION(11,3))
struct nss_ipv4_mirror_rule mirror_rule;
/**< Mirror rule parameter. */
+#endif
};
/**
@@ -955,6 +961,7 @@ struct nss_ipv4_node_sync {
uint32_t ipv4_mc_connection_flushes;
/**< Number of multicast connection flushes. */
+#if (NSS_FW_VERSION_CODE > NSS_FW_VERSION(11,3))
uint32_t ipv4_connection_create_invalid_mirror_ifnum;
/**< Number of create request failed with an invalid mirror interface number. */
@@ -963,6 +970,7 @@ struct nss_ipv4_node_sync {
uint32_t ipv4_mirror_failures;
/**< Mirror packet failed. */
+#endif
uint32_t exception_events[NSS_IPV4_EXCEPTION_EVENT_MAX];
/**< Number of exception events. */
diff --git a/exports/nss_ipv6.h b/exports/nss_ipv6.h
index 930e74c..a21f939 100644
--- a/exports/nss_ipv6.h
+++ b/exports/nss_ipv6.h
@@ -195,6 +195,8 @@ enum nss_ipv6_stats_types {
/**< Number of IPv6 multicast connection destroy requests that missed the cache. */
NSS_IPV6_STATS_MC_CONNECTION_FLUSHES,
/**< Number of IPv6 multicast connection flushes. */
+
+#if (NSS_FW_VERSION_CODE > NSS_FW_VERSION(11,3))
NSS_IPV6_STATS_CONNECTION_CREATE_INVALID_MIRROR_IFNUM,
/**< Number of IPv6 mirror connection requests with an invalid interface number. */
NSS_IPV6_STATS_CONNECTION_CREATE_INVALID_MIRROR_IFTYPE,
@@ -202,6 +204,7 @@ enum nss_ipv6_stats_types {
NSS_IPV6_STATS_MIRROR_FAILURES,
/**< Number of IPv6 mirror failures. */
+#endif
NSS_IPV6_STATS_MAX,
/**< Maximum message type. */
@@ -702,8 +705,10 @@ struct nss_ipv6_rule_create_msg {
/**< Ingress shaping related accleration parameters. */
struct nss_ipv6_identifier_rule identifier;
/**< Rule for adding identifier. */
+#if (NSS_FW_VERSION_CODE > NSS_FW_VERSION(11,3))
struct nss_ipv6_mirror_rule mirror_rule;
/**< Mirror rule parameter. */
+#endif
};
/**
@@ -950,6 +955,7 @@ struct nss_ipv6_node_sync {
uint32_t ipv6_mc_connection_flushes;
/**< Number of multicast connection flushes. */
+#if (NSS_FW_VERSION_CODE > NSS_FW_VERSION(11,3))
uint32_t ipv6_connection_create_invalid_mirror_ifnum;
/**< Number of create request failed with an invalid mirror interface number. */
@@ -958,6 +964,7 @@ struct nss_ipv6_node_sync {
uint32_t ipv6_mirror_failures;
/**< Mirror packet failed. */
+#endif
uint32_t exception_events[NSS_IPV6_EXCEPTION_EVENT_MAX];
/**< Number of exception events. */
diff --git a/exports/nss_wifi_vdev.h b/exports/nss_wifi_vdev.h
index 1b52f66..da91b56 100644
--- a/exports/nss_wifi_vdev.h
+++ b/exports/nss_wifi_vdev.h
@@ -74,8 +74,10 @@ enum nss_wifi_vdev_msg_types {
NSS_WIFI_VDEV_INTERFACE_RECOVERY_RESET_MSG,
NSS_WIFI_VDEV_INTERFACE_RECOVERY_RECONF_MSG,
NSS_WIFI_VDEV_SET_GROUP_KEY,
+#if (NSS_FW_VERSION_CODE > NSS_FW_VERSION(11,3))
NSS_WIFI_VDEV_HMMC_MEMBER_ADD_MSG,
NSS_WIFI_VDEV_HMMC_MEMBER_DEL_MSG,
+#endif
NSS_WIFI_VDEV_MAX_MSG
};
@@ -130,6 +132,7 @@ enum nss_wifi_vdev_err_types {
NSS_WIFI_VDEV_VLAN_MODE_CONFIG_FAIL,
NSS_WIFI_VDEV_RECOVERY_RESET_FAIL,
NSS_WIFI_VDEV_RECOVERY_RECONF_FAIL,
+#if (NSS_FW_VERSION_CODE > NSS_FW_VERSION(11,3))
NSS_WIFI_VDEV_CONFIG_GROUP_KEY_FAIL,
NSS_WIFI_VDEV_MULTIPASS_NOT_ENABLED,
NSS_WIFI_VDEV_ALLOC_VLAN_MAP_FAILED,
@@ -139,6 +142,7 @@ enum nss_wifi_vdev_err_types {
NSS_WIFI_VDEV_PPE_PORT_DESTROY_FAIL,
NSS_WIFI_VDEV_PPE_VSI_ASSIGN_FAIL,
NSS_WIFI_VDEV_PPE_VSI_UNASSIGN_FAIL,
+#endif
NSS_WIFI_VDEV_EINV_MAX_CFG
};
@@ -161,11 +165,13 @@ enum nss_wifi_vdev_ext_data_pkt_type {
NSS_WIFI_VDEV_EXT_TX_COMPL_PKT_TYPE = 11, /**< Tx completion. */
NSS_WIFI_VDEV_EXT_DATA_PKT_TYPE_WDS_LEARN = 12, /**< WDS source port learning command. */
NSS_WIFI_VDEV_EXT_DATA_PPDU_INFO = 13, /**< PPDU metadata information. */
+#if (NSS_FW_VERSION_CODE > NSS_FW_VERSION(11,3))
NSS_WIFI_VDEV_EXT_DATA_PKT_TYPE_MCBC_RX = 14, /**< Multicast/broadcast packet received. */
NSS_WIFI_VDEV_MESH_EXT_DATA_PKT_TYPE_RX_SPL_PACKET = 15,
/**< Mesh link VAP special packet. */
NSS_WIFI_VDEV_MESH_EXT_DATA_PKT_TYPE_RX_MCAST_EXC = 16,
/**< Mesh link VAP multicast packet. */
+#endif
NSS_WIFI_VDEV_EXT_DATA_PKT_TYPE_MAX
};
@@ -201,9 +207,11 @@ enum nss_wifi_vdev_cmd {
NSS_WIFI_VDEV_ENABLE_IGMP_ME_CMD, /**< Configuration to set IGMP multicast enhancement on VAP. */
NSS_WIFI_VDEV_CFG_WDS_BACKHAUL_CMD,
/**< Configuration to set WDS backhaul extension on VAP. */
+#if (NSS_FW_VERSION_CODE > NSS_FW_VERSION(11,3))
NSS_WIFI_VDEV_CFG_MCBC_EXC_TO_HOST_CMD, /**< Configuration to set multicast/broadcast exception to host on VAP. */
NSS_WIFI_VDEV_CFG_PEER_AUTHORIZE_CMD,
/**< Configuration to enable peer authorization on VAP. */
+#endif
NSS_WIFI_VDEV_MAX_CMD
};
@@ -271,7 +279,9 @@ struct nss_wifi_vdev_config_msg {
uint8_t is_nss_qwrap_en; /**< VAP is configured for NSS firmware QWRAP logic. */
uint8_t tx_per_pkt_vdev_id_check; /**< Transmit per-packet virtual device ID check. */
uint8_t align_pad; /**< Reserved field. */
+#if (NSS_FW_VERSION_CODE > NSS_FW_VERSION(11,3))
uint32_t vap_ext_mode; /**< Different VAP extended modes. */
+#endif
};
/**
@@ -1037,8 +1047,10 @@ struct nss_wifi_vdev_stats_sync_msg {
uint32_t rx_mcast_bytes; /**< Receive multicast bytes count. */
uint32_t rx_decrypt_err; /**< Receive decryption error */
uint32_t rx_mic_err; /**< Receive MIC error */
+#if (NSS_FW_VERSION_CODE > NSS_FW_VERSION(11,3))
uint32_t mcbc_exc_host_fail_cnt;
/**< Number of multicast/broadcast packets failed to send to host through exception path. */
+#endif
};
/**
@@ -1070,6 +1082,7 @@ struct nss_wifi_vdev_msg {
/**< Updates a snooplist group member. */
struct nss_wifi_vdev_me_snptbl_deny_grp_add_msg vdev_deny_member_add;
/**< Add a snooplist member to the deny list. */
+#if (NSS_FW_VERSION_CODE > NSS_FW_VERSION(11,3))
struct nss_wifi_vdev_me_hmmc_add_msg vdev_hmmc_member_add;
/**< Adds a new member into the HMMC list. */
struct nss_wifi_vdev_me_hmmc_del_msg vdev_hmmc_member_del;
@@ -1078,6 +1091,7 @@ struct nss_wifi_vdev_msg {
/**< Adds a new member into the deny list. */
struct nss_wifi_vdev_me_deny_ip_del_msg vdev_deny_list_member_del;
/**< Delete a member from the deny list. */
+#endif
struct nss_wifi_vdev_txmsg vdev_txmsgext;
/**< Transmits special data. */
struct nss_wifi_vdev_vow_dbg_cfg_msg vdev_vow_dbg_cfg;
diff --git a/exports/nss_wifili_if.h b/exports/nss_wifili_if.h
index fce20fd..1f26d67 100644
--- a/exports/nss_wifili_if.h
+++ b/exports/nss_wifili_if.h
@@ -62,8 +62,12 @@
/**< Maximum number of bandwidth supported. */
#define NSS_WIFILI_REPT_MU_MIMO 1
#define NSS_WIFILI_REPT_MU_OFDMA_MIMO 3
+#if (NSS_FW_VERSION_CODE > NSS_FW_VERSION(11,3))
+#define NSS_WIFILI_MAX_RESERVED_TYPE 3
+#else
#define NSS_WIFILI_MAX_RESERVED_TYPE 2
/**< Maximum reserved type. */
+#endif
#define NSS_WIFILI_SOC_PER_PACKET_METADATA_SIZE 60
/**< Metadata area total size. */
#define NSS_WIFILI_MEC_PEER_ID 0xDEAD
@@ -1333,7 +1337,9 @@ struct nss_wifili_rx_err {
struct nss_wifili_rx_ctrl_stats {
struct nss_wifili_rx_err err; /**< Rx peer errors. */
uint32_t multipass_rx_pkt_drop; /**< Total number of multipass packets without a VLAN header. */
+#if (NSS_FW_VERSION_CODE > NSS_FW_VERSION(11,3))
uint32_t peer_unauth_rx_pkt_drop; /**< Number of receive packets dropped due to an authorized peer. */
+#endif
uint32_t reserved_type[NSS_WIFILI_MAX_RESERVED_TYPE]; /**< Reserved type for future use. */
uint32_t non_amsdu_cnt; /**< Number of MSDUs with no MSDU level aggregation. */
uint32_t amsdu_cnt; /**< Number of MSDUs part of AMSDU. */
@@ -1810,10 +1816,12 @@ struct nss_wifili_msg {
/**< Peer four-address event message. */
struct nss_wifili_dbdc_repeater_loop_detection_msg wdrldm;
/**< Wifili DBDC repeater loop detection message. */
+#if (NSS_FW_VERSION_CODE > NSS_FW_VERSION(11,3))
struct nss_wifili_peer_update_auth_flag peer_auth;
/**< Peer authentication flag message. */
struct nss_wifili_mesh_capability_info cap_info;
/**< Mesh capability flag. */
+#endif
} msg; /**< Message payload. */
};
diff --git a/nss_ipv4_stats.c b/nss_ipv4_stats.c
index 39b162c..c875a63 100644
--- a/nss_ipv4_stats.c
+++ b/nss_ipv4_stats.c
@@ -177,9 +177,11 @@ void nss_ipv4_stats_node_sync(struct nss_ctx_instance *nss_ctx, struct nss_ipv4_
nss_ipv4_stats[NSS_IPV4_STATS_MC_CONNECTION_DESTROY_REQUESTS] += nins->ipv4_mc_connection_destroy_requests;
nss_ipv4_stats[NSS_IPV4_STATS_MC_CONNECTION_DESTROY_MISSES] += nins->ipv4_mc_connection_destroy_misses;
nss_ipv4_stats[NSS_IPV4_STATS_MC_CONNECTION_FLUSHES] += nins->ipv4_mc_connection_flushes;
+#if (NSS_FW_VERSION_CODE > NSS_FW_VERSION(11,3))
nss_ipv4_stats[NSS_IPV4_STATS_CONNECTION_CREATE_INVALID_MIRROR_IFNUM] += nins->ipv4_connection_create_invalid_mirror_ifnum;
nss_ipv4_stats[NSS_IPV4_STATS_CONNECTION_CREATE_INVALID_MIRROR_IFTYPE] += nins->ipv4_connection_create_invalid_mirror_iftype;
nss_ipv4_stats[NSS_IPV4_STATS_MIRROR_FAILURES] += nins->ipv4_mirror_failures;
+#endif
for (i = 0; i < NSS_IPV4_EXCEPTION_EVENT_MAX; i++) {
nss_ipv4_exception_stats[i] += nins->exception_events[i];
diff --git a/nss_ipv4_strings.c b/nss_ipv4_strings.c
index 77ff352..ce4c249 100644
--- a/nss_ipv4_strings.c
+++ b/nss_ipv4_strings.c
@@ -137,9 +137,11 @@ struct nss_stats_info nss_ipv4_strings_stats[NSS_IPV4_STATS_MAX] = {
{"mc_destroy_requests" , NSS_STATS_TYPE_SPECIAL},
{"mc_destroy_misses" , NSS_STATS_TYPE_SPECIAL},
{"mc_flushes" , NSS_STATS_TYPE_SPECIAL},
+#if (NSS_FW_VERSION_CODE > NSS_FW_VERSION(11,3))
{"mirror_invalid_ifnum_conn_create_req" , NSS_STATS_TYPE_SPECIAL},
{"mirror_invalid_iftype_conn_create_req" , NSS_STATS_TYPE_SPECIAL},
{"mirror_failures" , NSS_STATS_TYPE_SPECIAL},
+#endif
};
/*
diff --git a/nss_ipv6_stats.c b/nss_ipv6_stats.c
index 617f55b..a492a6c 100644
--- a/nss_ipv6_stats.c
+++ b/nss_ipv6_stats.c
@@ -180,9 +180,11 @@ void nss_ipv6_stats_node_sync(struct nss_ctx_instance *nss_ctx, struct nss_ipv6_
nss_ipv6_stats[NSS_IPV6_STATS_MC_CONNECTION_DESTROY_REQUESTS] += nins->ipv6_mc_connection_destroy_requests;
nss_ipv6_stats[NSS_IPV6_STATS_MC_CONNECTION_DESTROY_MISSES] += nins->ipv6_mc_connection_destroy_misses;
nss_ipv6_stats[NSS_IPV6_STATS_MC_CONNECTION_FLUSHES] += nins->ipv6_mc_connection_flushes;
+#if (NSS_FW_VERSION_CODE > NSS_FW_VERSION(11,3))
nss_ipv6_stats[NSS_IPV6_STATS_CONNECTION_CREATE_INVALID_MIRROR_IFNUM] += nins->ipv6_connection_create_invalid_mirror_ifnum;
nss_ipv6_stats[NSS_IPV6_STATS_CONNECTION_CREATE_INVALID_MIRROR_IFTYPE] += nins->ipv6_connection_create_invalid_mirror_iftype;
nss_ipv6_stats[NSS_IPV6_STATS_MIRROR_FAILURES] += nins->ipv6_mirror_failures;
+#endif
for (i = 0; i < NSS_IPV6_EXCEPTION_EVENT_MAX; i++) {
nss_ipv6_exception_stats[i] += nins->exception_events[i];
diff --git a/nss_ipv6_strings.c b/nss_ipv6_strings.c
index 57b100f..29df9c9 100644
--- a/nss_ipv6_strings.c
+++ b/nss_ipv6_strings.c
@@ -115,9 +115,11 @@ struct nss_stats_info nss_ipv6_strings_stats[NSS_IPV6_STATS_MAX] = {
{"mc_destroy_requests" ,NSS_STATS_TYPE_SPECIAL},
{"mc_destroy_misses" ,NSS_STATS_TYPE_SPECIAL},
{"mc_flushes" ,NSS_STATS_TYPE_SPECIAL},
+#if (NSS_FW_VERSION_CODE > NSS_FW_VERSION(11,3))
{"mirror_invalid_ifnum_conn_create_req" ,NSS_STATS_TYPE_SPECIAL},
{"mirror_invalid_iftype_conn_create_req" ,NSS_STATS_TYPE_SPECIAL},
{"mirror_failures" ,NSS_STATS_TYPE_SPECIAL},
+#endif
};
/*
--
2.31.1

97
package/nss/qca/qca-nss-ecm/Makefile Normal file
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@ -0,0 +1,97 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=qca-nss-ecm
PKG_RELEASE:=$(AUTORELEASE)
PKG_SOURCE_URL:=https://source.codeaurora.org/quic/cc-qrdk/oss/lklm/qca-nss-ecm
PKG_SOURCE_PROTO:=git
PKG_SOURCE_DATE:=2021-04-29
PKG_SOURCE_VERSION:=c115aec34867b582e2e5ea79fc5315971e0e953c
PKG_MIRROR_HASH:=a772996af7bbae7031eebc2f789431d29be67f11eb0a1e874c08b74eec6f4585
PKG_BUILD_PARALLEL:=1
include $(INCLUDE_DIR)/kernel.mk
include $(INCLUDE_DIR)/package.mk
define KernelPackage/qca-nss-ecm
SECTION:=kernel
CATEGORY:=Kernel modules
SUBMENU:=Network Support
DEPENDS:=@(TARGET_ipq807x||TARGET_ipq60xx) \
+kmod-qca-nss-drv \
+iptables-mod-extra \
+kmod-ipt-conntrack \
+kmod-ipt-physdev \
+iptables-mod-physdev \
+kmod-ppp \
+kmod-pppoe
TITLE:=QCA NSS Enhanced Connection Manager (ECM)
FILES:=$(PKG_BUILD_DIR)/*.ko
KCONFIG:=CONFIG_BRIDGE_NETFILTER=y \
CONFIG_NF_CONNTRACK_EVENTS=y \
CONFIG_NF_CONNTRACK_CHAIN_EVENTS=n \
CONFIG_NF_CONNTRACK_DSCPREMARK_EXT=n
endef
define KernelPackage/qca-nss-ecm/Description
This package contains the QCA NSS Enhanced Connection Manager
endef
define KernelPackage/qca-nss-ecm/install
$(INSTALL_DIR) $(1)/etc/firewall.d $(1)/etc/init.d $(1)/usr/bin $(1)/lib/netifd/offload $(1)/etc/config $(1)/etc/uci-defaults $(1)/etc/sysctl.d
$(INSTALL_DATA) ./files/qca-nss-ecm.firewall $(1)/etc/firewall.d/qca-nss-ecm
$(INSTALL_BIN) ./files/qca-nss-ecm.init $(1)/etc/init.d/qca-nss-ecm
$(INSTALL_BIN) ./files/ecm_dump.sh $(1)/usr/bin/
$(INSTALL_BIN) ./files/on-demand-down $(1)/lib/netifd/offload/on-demand-down
$(INSTALL_DATA) ./files/qca-nss-ecm.uci $(1)/etc/config/ecm
$(INSTALL_DATA) ./files/qca-nss-ecm.defaults $(1)/etc/uci-defaults/99-qca-nss-ecm
$(INSTALL_BIN) ./files/qca-nss-ecm.sysctl $(1)/etc/sysctl.d/qca-nss-ecm.conf
echo 'net.netfilter.nf_conntrack_max=8192' >> $(1)/etc/sysctl.d/qca-nss-ecm.conf
endef
EXTRA_CFLAGS+=-I$(STAGING_DIR)/usr/include/qca-nss-drv
ifneq (, $(findstring $(CONFIG_TARGET_BOARD), "ipq807x" "ipq60xx"))
ECM_MAKE_OPTS+= ECM_FRONT_END_NSS_ENABLE=y \
ECM_CLASSIFIER_HYFI_ENABLE=n \
ECM_MULTICAST_ENABLE=n \
ECM_INTERFACE_IPSEC_ENABLE=n \
ECM_INTERFACE_PPTP_ENABLE=n \
ECM_INTERFACE_L2TPV2_ENABLE=n \
ECM_INTERFACE_GRE_TAP_ENABLE=n \
ECM_INTERFACE_GRE_TUN_ENABLE=n \
ECM_INTERFACE_SIT_ENABLE=n \
ECM_INTERFACE_TUNIPIP6_ENABLE=n \
ECM_INTERFACE_RAWIP_ENABLE=n \
ECM_INTERFACE_VLAN_ENABLE=n \
ECM_CLASSIFIER_MARK_ENABLE=n \
ECM_CLASSIFIER_DSCP_ENABLE=n \
ECM_CLASSIFIER_PCC_ENABLE=n \
ECM_BAND_STEERING_ENABLE=n \
ECM_INTERFACE_PPPOE_ENABLE=y
endif
ifeq ($(CONFIG_TARGET_BOARD), "ipq807x")
SOC="ipq807x_64"
else ifeq ($(CONFIG_TARGET_BOARD), "ipq60xx")
SOC="ipq60xx_64"
endif
define Build/InstallDev
mkdir -p $(1)/usr/include/qca-nss-ecm
$(CP) $(PKG_BUILD_DIR)/exports/* $(1)/usr/include/qca-nss-ecm
endef
define Build/Compile
+$(MAKE) -C "$(LINUX_DIR)" $(strip $(ECM_MAKE_OPTS)) \
CROSS_COMPILE="$(TARGET_CROSS)" \
ARCH="$(LINUX_KARCH)" \
M="$(PKG_BUILD_DIR)" \
EXTRA_CFLAGS="$(EXTRA_CFLAGS)" SoC=$(SOC) \
$(KERNEL_MAKE_FLAGS) \
$(PKG_JOBS) \
modules
endef
$(eval $(call KernelPackage,qca-nss-ecm))

95
package/nss/qca/qca-nss-ecm/files/ecm_dump.sh Executable file
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@ -0,0 +1,95 @@
#!/bin/sh
#
# Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
#
# Permission to use, copy, modify, and/or distribute this software for any
# purpose with or without fee is hereby granted, provided that the above
# copyright notice and this permission notice appear in all copies.
#
# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
#
ECM_MODULE=${1:-ecm_state}
MOUNT_ROOT=/dev/ecm
#
# usage: ecm_dump.sh [module=ecm_db]
#
# with no parameters, ecm_dump.sh will attempt to mount the
# ecm_db state file and cat its contents.
#
# example with a parameter: ecm_dump.sh ecm_classifier_default
#
# this will cause ecm_dump to attempt to find and mount the state
# file for the ecm_classifier_default module, and if successful
# cat the contents.
#
# this is one of the state files, which happens to be the
# last module started in ecm
ECM_STATE=/sys/kernel/debug/ecm/ecm_state/state_dev_major
# tests to see if ECM is up and ready to receive commands.
# returns 0 if ECM is fully up and ready, else 1
ecm_is_ready() {
if [ ! -e "${ECM_STATE}" ]
then
return 1
fi
return 0
}
#
# module_state_mount(module_name)
# Mounts the state file of the module, if supported
#
module_state_mount() {
local module_name=$1
local mount_dir=$2
local state_file="/sys/kernel/debug/ecm/${module_name}/state_dev_major"
if [ -e "${mount_dir}/${module_name}" ]
then
# already mounted
return 0
fi
#echo "Mount state file for $module_name ..."
if [ ! -e "$state_file" ]
then
#echo "... $module_name does not support state"
return 1
fi
local major="`cat $state_file`"
#echo "... Mounting state $state_file with major: $major"
mknod "${mount_dir}/${module_name}" c $major 0
}
#
# main
#
ecm_is_ready || {
#echo "ECM is not running"
exit 1
}
# all state files are mounted under MOUNT_ROOT, so make sure it exists
mkdir -p ${MOUNT_ROOT}
#
# attempt to mount state files for the requested module and cat it
# if the mount succeeded
#
module_state_mount ${ECM_MODULE} ${MOUNT_ROOT} && {
cat ${MOUNT_ROOT}/${ECM_MODULE}
exit 0
}
exit 2

6
package/nss/qca/qca-nss-ecm/files/on-demand-down Normal file
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@ -0,0 +1,6 @@
#!/bin/sh
# Copyright (c) 2016 The Linux Foundation. All rights reserved.
[ -e "/sys/kernel/debug/ecm/ecm_db/defunct_all" ] && {
echo 1 > /sys/kernel/debug/ecm/ecm_db/defunct_all
}

28
package/nss/qca/qca-nss-ecm/files/qca-nss-ecm.defaults Normal file
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@ -0,0 +1,28 @@
#!/bin/sh
#
# Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
#
# Permission to use, copy, modify, and/or distribute this software for any
# purpose with or without fee is hereby granted, provided that the above
# copyright notice and this permission notice appear in all copies.
#
# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
#
uci -q batch << EOF
delete firewall.qcanssecm
set firewall.qcanssecm=include
set firewall.qcanssecm.type=script
set firewall.qcanssecm.path=/etc/firewall.d/qca-nss-ecm
set firewall.qcanssecm.family=any
set firewall.qcanssecm.reload=1
commit firewall
EOF
exit 0

18
package/nss/qca/qca-nss-ecm/files/qca-nss-ecm.firewall Normal file
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@ -0,0 +1,18 @@
#!/bin/sh
#
# Copyright (c) 2015-2016, The Linux Foundation. All rights reserved.
#
# Permission to use, copy, modify, and/or distribute this software for any
# purpose with or without fee is hereby granted, provided that the above
# copyright notice and this permission notice appear in all copies.
#
# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
#
iptables -A FORWARD -m physdev --physdev-is-bridged -j ACCEPT

140
package/nss/qca/qca-nss-ecm/files/qca-nss-ecm.init Normal file
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@ -0,0 +1,140 @@
#!/bin/sh /etc/rc.common
#
# Copyright (c) 2014, 2019-2020 The Linux Foundation. All rights reserved.
#
# Permission to use, copy, modify, and/or distribute this software for any
# purpose with or without fee is hereby granted, provided that the above
# copyright notice and this permission notice appear in all copies.
#
# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
# The shebang above has an extra space intentially to avoid having
# openwrt build scripts automatically enable this package starting
# at boot.
START=19
get_front_end_mode() {
config_load "ecm"
config_get front_end global acceleration_engine "auto"
case $front_end in
auto)
echo '0'
;;
nss)
echo '1'
;;
sfe)
echo '2'
;;
*)
echo 'uci_option_acceleration_engine is invalid'
esac
}
support_bridge() {
#NSS support bridge acceleration
[ -d /sys/kernel/debug/ecm/ecm_nss_ipv4 ] && return 0
#SFE doesn't support bridge acceleration
[ -d /sys/kernel/debug/ecm/ecm_sfe_ipv4 ] && return 1
}
load_sfe() {
local kernel_version=$(uname -r)
[ -e "/lib/modules/$kernel_version/shortcut-fe.ko" ] && {
[ -d /sys/module/shortcut_fe ] || insmod shortcut-fe
}
[ -e "/lib/modules/$kernel_version/shortcut-fe-ipv6.ko" ] && {
[ -d /sys/module/shortcut_fe_ipv6 ] || insmod shortcut-fe-ipv6
}
[ -e "/lib/modules/$kernel_version/shortcut-fe-drv.ko" ] && {
[ -d /sys/module/shortcut_fe_drv ] || insmod shortcut-fe-drv
}
}
load_ecm() {
[ -d /sys/module/ecm ] || {
[ ! -e /proc/device-tree/MP_256 ] && load_sfe
insmod ecm front_end_selection=$(get_front_end_mode)
}
support_bridge && {
sysctl -w net.bridge.bridge-nf-call-ip6tables=1
sysctl -w net.bridge.bridge-nf-call-iptables=1
}
}
unload_ecm() {
sysctl -w net.bridge.bridge-nf-call-ip6tables=0
sysctl -w net.bridge.bridge-nf-call-iptables=0
if [ -d /sys/module/ecm ]; then
#
# Stop ECM frontends
#
echo 1 > /sys/kernel/debug/ecm/front_end_ipv4_stop
echo 1 > /sys/kernel/debug/ecm/front_end_ipv6_stop
#
# Defunct the connections
#
echo 1 > /sys/kernel/debug/ecm/ecm_db/defunct_all
sleep 5;
rmmod ecm
sleep 1
fi
}
start() {
# If SFE CM is loaded, return.
if [ -d /sys/module/shortcut_fe_cm ]; then
echo "shortcut_fe CM is loaded, unload it first"
echo "cmd: /etc/init.d/shortcut_fe stop"
return
fi
load_ecm
# If the acceleration engine is NSS, enable wifi redirect.
[ -d /sys/kernel/debug/ecm/ecm_nss_ipv4 ] && sysctl -w dev.nss.general.redirect=1
support_bridge && {
echo 'net.bridge.bridge-nf-call-ip6tables=1' >> /etc/sysctl.d/qca-nss-ecm.conf
echo 'net.bridge.bridge-nf-call-iptables=1' >> /etc/sysctl.d/qca-nss-ecm.conf
}
if [ -d /sys/module/qca_ovsmgr ]; then
insmod ecm_ovs
fi
}
stop() {
# If ECM is already not loaded, just return.
if [ ! -d /sys/module/ecm ]; then
return
fi
# If the acceleration engine is NSS, disable wifi redirect.
[ -d /sys/kernel/debug/ecm/ecm_nss_ipv4 ] && sysctl -w dev.nss.general.redirect=0
sed '/net.bridge.bridge-nf-call-ip6tables=1/d' -i /etc/sysctl.d/qca-nss-ecm.conf
sed '/net.bridge.bridge-nf-call-iptables=1/d' -i /etc/sysctl.d/qca-nss-ecm.conf
if [ -d /sys/module/ecm_ovs ]; then
rmmod ecm_ovs
fi
unload_ecm
}

2
package/nss/qca/qca-nss-ecm/files/qca-nss-ecm.sysctl Normal file
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@ -0,0 +1,2 @@
# nf_conntrack_tcp_no_window_check is 0 by default, set it to 1
net.netfilter.nf_conntrack_tcp_no_window_check=1

2
package/nss/qca/qca-nss-ecm/files/qca-nss-ecm.uci Normal file
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@ -0,0 +1,2 @@
config ecm 'global'
option acceleration_engine 'auto'

335
package/nss/qca/qca-nss-ecm/patches/001-treewide-componentize-the-module-even-more.patch Normal file
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@ -0,0 +1,335 @@
From 73345c87b28a473b35b57e673f8de963c3d73da1 Mon Sep 17 00:00:00 2001
From: Ansuel Smith <ansuelsmth@gmail.com>
Date: Wed, 19 May 2021 02:38:53 +0200
Subject: [PATCH] treewide: componentize the module even more
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
---
Makefile | 56 +++++++++++++++++++++++++-------
ecm_db/ecm_db_connection.c | 8 +++++
ecm_db/ecm_db_node.c | 4 +++
ecm_interface.c | 8 +++++
frontends/ecm_front_end_common.c | 7 ++++
5 files changed, 72 insertions(+), 11 deletions(-)
--- a/Makefile
+++ b/Makefile
@@ -82,10 +82,18 @@ ccflags-$(ECM_INTERFACE_BOND_ENABLE) +=
# Define ECM_INTERFACE_PPPOE_ENABLE=y in order
# to enable support for PPPoE acceleration.
# #############################################################################
-ECM_INTERFACE_PPPOE_ENABLE=y
+ifndef $(ECM_INTERFACE_PPPOE_ENABLE)
+ ECM_INTERFACE_PPPOE_ENABLE=y
+endif
ccflags-$(ECM_INTERFACE_PPPOE_ENABLE) += -DECM_INTERFACE_PPPOE_ENABLE
# #############################################################################
+# Define ECM_INTERFACE_L2TPV2_PPTP_ENABLE=y in order
+# to enable support for l2tpv2 or PPTP detection.
+# #############################################################################
+ccflags-$(ECM_INTERFACE_L2TPV2_PPTP_ENABLE) += -DECM_INTERFACE_L2TPV2_PPTP_ENABLE
+
+# #############################################################################
# Define ECM_INTERFACE_L2TPV2_ENABLE=y in order
# to enable support for l2tpv2 acceleration.
# #############################################################################
@@ -118,6 +126,12 @@ ccflags-$(ECM_INTERFACE_PPP_ENABLE) += -
ccflags-$(ECM_INTERFACE_MAP_T_ENABLE) += -DECM_INTERFACE_MAP_T_ENABLE
# #############################################################################
+# Define ECM_INTERFACE_GRE_ENABLE=y in order
+# to enable support for GRE detection.
+# #############################################################################
+ccflags-$(ECM_INTERFACE_GRE_ENABLE) += -DECM_INTERFACE_GRE_ENABLE
+
+# #############################################################################
# Define ECM_INTERFACE_GRE_TAP_ENABLE=y in order
# to enable support for GRE TAP interface.
# #############################################################################
@@ -186,7 +200,9 @@ ccflags-$(ECM_INTERFACE_OVS_BRIDGE_ENABL
# #############################################################################
# Define ECM_INTERFACE_VLAN_ENABLE=y in order to enable support for VLAN
# #############################################################################
-ECM_INTERFACE_VLAN_ENABLE=y
+ifndef $(ECM_INTERFACE_VLAN_ENABLE)
+ ECM_INTERFACE_VLAN_ENABLE=y
+endif
ccflags-$(ECM_INTERFACE_VLAN_ENABLE) += -DECM_INTERFACE_VLAN_ENABLE
# #############################################################################
@@ -228,7 +244,9 @@ ccflags-$(ECM_CLASSIFIER_OVS_ENABLE) +=
# #############################################################################
# Define ECM_CLASSIFIER_MARK_ENABLE=y in order to enable mark classifier.
# #############################################################################
-ECM_CLASSIFIER_MARK_ENABLE=y
+ifndef $(ECM_CLASSIFIER_MARK_ENABLE)
+ ECM_CLASSIFIER_MARK_ENABLE=y
+endif
ecm-$(ECM_CLASSIFIER_MARK_ENABLE) += ecm_classifier_mark.o
ccflags-$(ECM_CLASSIFIER_MARK_ENABLE) += -DECM_CLASSIFIER_MARK_ENABLE
@@ -247,7 +265,9 @@ ccflags-$(ECM_CLASSIFIER_NL_ENABLE) += -
# #############################################################################
# Define ECM_CLASSIFIER_DSCP_ENABLE=y in order to enable DSCP classifier.
# #############################################################################
-ECM_CLASSIFIER_DSCP_ENABLE=y
+ifndef $(ECM_CLASSIFIER_DSCP_ENABLE)
+ ECM_CLASSIFIER_DSCP_ENABLE=y
+endif
ecm-$(ECM_CLASSIFIER_DSCP_ENABLE) += ecm_classifier_dscp.o
ccflags-$(ECM_CLASSIFIER_DSCP_ENABLE) += -DECM_CLASSIFIER_DSCP_ENABLE
ccflags-$(ECM_CLASSIFIER_DSCP_IGS) += -DECM_CLASSIFIER_DSCP_IGS
@@ -274,7 +294,9 @@ endif
# the Parental Controls subsystem classifier in ECM. Currently disabled until
# customers require it / if they need to integrate their Parental Controls with it.
# #############################################################################
-ECM_CLASSIFIER_PCC_ENABLE=y
+ifndef $(ECM_CLASSIFIER_PCC_ENABLE)
+ ECM_CLASSIFIER_PCC_ENABLE=y
+endif
ecm-$(ECM_CLASSIFIER_PCC_ENABLE) += ecm_classifier_pcc.o
ccflags-$(ECM_CLASSIFIER_PCC_ENABLE) += -DECM_CLASSIFIER_PCC_ENABLE
@@ -301,28 +323,36 @@ ccflags-$(ECM_NON_PORTED_SUPPORT_ENABLE)
# #############################################################################
# Define ECM_STATE_OUTPUT_ENABLE=y to support XML state output
# #############################################################################
-ECM_STATE_OUTPUT_ENABLE=y
+ifndef $(ECM_STATE_OUTPUT_ENABLE)
+ ECM_STATE_OUTPUT_ENABLE=y
+endif
ecm-$(ECM_STATE_OUTPUT_ENABLE) += ecm_state.o
ccflags-$(ECM_STATE_OUTPUT_ENABLE) += -DECM_STATE_OUTPUT_ENABLE
# #############################################################################
# Define ECM_DB_ADVANCED_STATS_ENABLE to support XML state output
# #############################################################################
-ECM_DB_ADVANCED_STATS_ENABLE=y
+ifndef $(ECM_DB_ADVANCED_STATS_ENABLE)
+ ECM_DB_ADVANCED_STATS_ENABLE=y
+endif
ccflags-$(ECM_DB_ADVANCED_STATS_ENABLE) += -DECM_DB_ADVANCED_STATS_ENABLE
# #############################################################################
# Define ECM_DB_CONNECTION_CROSS_REFERENCING_ENABLE=y in order to enable
# the database to track relationships between objects.
# #############################################################################
-ECM_DB_CONNECTION_CROSS_REFERENCING_ENABLE=y
+ifndef $(ECM_DB_CONNECTION_CROSS_REFERENCING_ENABLE)
+ ECM_DB_CONNECTION_CROSS_REFERENCING_ENABLE=y
+endif
ccflags-$(ECM_DB_CONNECTION_CROSS_REFERENCING_ENABLE) += -DECM_DB_XREF_ENABLE
# #############################################################################
# Define ECM_TRACKER_DPI_SUPPORT_ENABLE=y in order to enable support for
# deep packet inspection and tracking of data with the trackers.
# #############################################################################
-ECM_TRACKER_DPI_SUPPORT_ENABLE=y
+ifndef $(ECM_TRACKER_DPI_SUPPORT_ENABLE)
+ ECM_TRACKER_DPI_SUPPORT_ENABLE=y
+endif
ccflags-$(ECM_TRACKER_DPI_SUPPORT_ENABLE) += -DECM_TRACKER_DPI_SUPPORT_ENABLE
# #############################################################################
@@ -330,14 +360,18 @@ ccflags-$(ECM_TRACKER_DPI_SUPPORT_ENABLE
# support for the database keeping lists of connections that are assigned
# on a per TYPE of classifier basis.
# #############################################################################
-ECM_DB_CLASSIFIER_TYPE_ASSIGNMENTS_TRACK_ENABLE=y
+ifndef $(ECM_DB_CLASSIFIER_TYPE_ASSIGNMENTS_TRACK_ENABLE)
+ ECM_DB_CLASSIFIER_TYPE_ASSIGNMENTS_TRACK_ENABLE=y
+endif
ccflags-$(ECM_DB_CLASSIFIER_TYPE_ASSIGNMENTS_TRACK_ENABLE) += -DECM_DB_CTA_TRACK_ENABLE
# #############################################################################
# Define ECM_BAND_STEERING_ENABLE=y in order to enable
# band steering feature.
# #############################################################################
-ECM_BAND_STEERING_ENABLE=y
+ifndef $(ECM_BAND_STEERING_ENABLE)
+ ECM_BAND_STEERING_ENABLE=y
+endif
ccflags-$(ECM_BAND_STEERING_ENABLE) += -DECM_BAND_STEERING_ENABLE
# #############################################################################
--- a/ecm_db/ecm_db_connection.c
+++ b/ecm_db/ecm_db_connection.c
@@ -430,7 +430,9 @@ EXPORT_SYMBOL(ecm_db_connection_make_def
*/
void ecm_db_connection_data_totals_update(struct ecm_db_connection_instance *ci, bool is_from, uint64_t size, uint64_t packets)
{
+#ifdef ECM_DB_ADVANCED_STATS_ENABLE
int32_t i;
+#endif
DEBUG_CHECK_MAGIC(ci, ECM_DB_CONNECTION_INSTANCE_MAGIC, "%px: magic failed\n", ci);
@@ -529,7 +531,9 @@ EXPORT_SYMBOL(ecm_db_connection_data_tot
*/
void ecm_db_connection_data_totals_update_dropped(struct ecm_db_connection_instance *ci, bool is_from, uint64_t size, uint64_t packets)
{
+#ifdef ECM_DB_ADVANCED_STATS_ENABLE
int32_t i;
+#endif
DEBUG_CHECK_MAGIC(ci, ECM_DB_CONNECTION_INSTANCE_MAGIC, "%px: magic failed\n", ci);
@@ -1508,6 +1512,7 @@ void ecm_db_connection_defunct_all(void)
}
EXPORT_SYMBOL(ecm_db_connection_defunct_all);
+#ifdef ECM_INTERFACE_OVS_BRIDGE_ENABLE
/*
* ecm_db_connection_defunct_by_classifier()
* Make defunct based on masked fields
@@ -1667,6 +1672,7 @@ next_ci:
ECM_IP_ADDR_TO_OCTAL(dest_addr_mask), dest_port_mask, proto_mask, cnt);
}
}
+#endif
/*
* ecm_db_connection_defunct_by_port()
@@ -1956,6 +1962,7 @@ struct ecm_db_node_instance *ecm_db_conn
}
EXPORT_SYMBOL(ecm_db_connection_node_get_and_ref);
+#ifdef ECM_DB_XREF_ENABLE
/*
* ecm_db_connection_mapping_get_and_ref_next()
* Return reference to next connection in the mapping chain in the specified direction.
@@ -1997,6 +2004,7 @@ struct ecm_db_connection_instance *ecm_d
return nci;
}
EXPORT_SYMBOL(ecm_db_connection_iface_get_and_ref_next);
+#endif
/*
* ecm_db_connection_mapping_get_and_ref()
--- a/ecm_db/ecm_db_node.c
+++ b/ecm_db/ecm_db_node.c
@@ -224,9 +224,11 @@ EXPORT_SYMBOL(ecm_db_node_get_and_ref_ne
*/
int ecm_db_node_deref(struct ecm_db_node_instance *ni)
{
+#ifdef ECM_DB_XREF_ENABLE
#if (DEBUG_LEVEL >= 1)
int dir;
#endif
+#endif
DEBUG_CHECK_MAGIC(ni, ECM_DB_NODE_INSTANCE_MAGIC, "%px: magic failed\n", ni);
spin_lock_bh(&ecm_db_lock);
@@ -486,9 +488,11 @@ EXPORT_SYMBOL(ecm_db_node_iface_get_and_
void ecm_db_node_add(struct ecm_db_node_instance *ni, struct ecm_db_iface_instance *ii, uint8_t *address,
ecm_db_node_final_callback_t final, void *arg)
{
+#ifdef ECM_DB_XREF_ENABLE
#if (DEBUG_LEVEL >= 1)
int dir;
#endif
+#endif
ecm_db_node_hash_t hash_index;
struct ecm_db_listener_instance *li;
--- a/ecm_interface.c
+++ b/ecm_interface.c
@@ -1343,6 +1343,7 @@ struct neighbour *ecm_interface_ipv6_nei
*/
bool ecm_interface_is_pptp(struct sk_buff *skb, const struct net_device *out)
{
+#ifdef ECM_INTERFACE_PPTP_ENABLE
struct net_device *in;
/*
@@ -1367,6 +1368,7 @@ bool ecm_interface_is_pptp(struct sk_buf
}
dev_put(in);
+#endif
return false;
}
@@ -1379,6 +1381,7 @@ bool ecm_interface_is_pptp(struct sk_buf
*/
bool ecm_interface_is_l2tp_packet_by_version(struct sk_buff *skb, const struct net_device *out, int ver)
{
+#ifdef ECM_INTERFACE_L2TPV2_PPTP_ENABLE
uint32_t flag = 0;
struct net_device *in;
@@ -1411,6 +1414,7 @@ bool ecm_interface_is_l2tp_packet_by_ver
}
dev_put(in);
+#endif
return false;
}
@@ -1423,6 +1427,7 @@ bool ecm_interface_is_l2tp_packet_by_ver
*/
bool ecm_interface_is_l2tp_pptp(struct sk_buff *skb, const struct net_device *out)
{
+#ifdef ECM_INTERFACE_L2TPV2_PPTP_ENABLE
struct net_device *in;
/*
@@ -1445,6 +1450,7 @@ bool ecm_interface_is_l2tp_pptp(struct s
}
dev_put(in);
+#endif
return false;
}
@@ -6630,6 +6636,7 @@ static void ecm_interface_regenerate_con
return;
}
+#ifdef ECM_DB_XREF_ENABLE
for (dir = 0; dir < ECM_DB_OBJ_DIR_MAX; dir++) {
/*
* Re-generate all connections associated with this interface
@@ -6645,6 +6652,7 @@ static void ecm_interface_regenerate_con
ci[dir] = cin;
}
}
+#endif
#ifdef ECM_MULTICAST_ENABLE
/*
--- a/frontends/ecm_front_end_common.c
+++ b/frontends/ecm_front_end_common.c
@@ -106,6 +106,7 @@ bool ecm_front_end_gre_proto_is_accel_al
struct nf_conntrack_tuple *tuple,
int ip_version)
{
+#ifdef ECM_INTERFACE_GRE_ENABLE
struct net_device *dev;
struct gre_base_hdr *greh;
@@ -117,10 +118,12 @@ bool ecm_front_end_gre_proto_is_accel_al
/*
* Case 1: PPTP locally terminated
*/
+#ifdef ECM_INTERFACE_PPTP_ENABLE
if (ecm_interface_is_pptp(skb, outdev)) {
DEBUG_TRACE("%px: PPTP GRE locally terminated - allow acceleration\n", skb);
return true;
}
+#endif
/*
* Case 2: PPTP pass through
@@ -223,6 +226,10 @@ bool ecm_front_end_gre_proto_is_accel_al
*/
DEBUG_TRACE("%px: GRE IPv%d pass through - allow acceleration\n", skb, ip_version);
return true;
+#else
+ DEBUG_TRACE("%px: GRE%d feature is disabled - do not allow acceleration\n", skb, ip_version);
+ return false;
+#endif
}
#ifdef ECM_CLASSIFIER_DSCP_ENABLE

831
package/nss/qca/qca-nss-ecm/patches/100-kernel-5.10-support.patch Normal file
View File

@ -0,0 +1,831 @@
From e8b642c23af9146c973e828a7f4e0fb56cfc8d0b Mon Sep 17 00:00:00 2001
From: Ansuel Smith <ansuelsmth@gmail.com>
Date: Sat, 15 May 2021 03:51:14 +0200
Subject: [PATCH] add support for kernel 5.10
Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
---
ecm_classifier_default.c | 24 +++---------
ecm_classifier_dscp.c | 8 +---
ecm_classifier_emesh.c | 16 ++------
ecm_classifier_hyfi.c | 7 +---
ecm_classifier_mark.c | 8 +---
ecm_classifier_ovs.c | 8 +---
ecm_classifier_pcc.c | 8 +---
ecm_conntrack_notifier.c | 8 +---
ecm_db/ecm_db_connection.c | 7 +---
ecm_db/ecm_db_host.c | 7 +---
ecm_db/ecm_db_iface.c | 7 +---
ecm_db/ecm_db_mapping.c | 7 +---
ecm_db/ecm_db_node.c | 7 +---
ecm_interface.c | 4 +-
ecm_state.c | 14 ++-----
frontends/ecm_front_end_common.c | 4 +-
frontends/ecm_front_end_ipv4.c | 7 +---
frontends/ecm_front_end_ipv6.c | 7 +---
frontends/nss/ecm_nss_bond_notifier.c | 8 +---
frontends/nss/ecm_nss_ipv4.c | 49 +++++++------------------
frontends/nss/ecm_nss_ipv6.c | 49 +++++++------------------
frontends/nss/ecm_nss_multicast_ipv4.c | 7 +---
frontends/nss/ecm_nss_multicast_ipv6.c | 7 +---
frontends/nss/ecm_nss_non_ported_ipv4.c | 7 +---
frontends/nss/ecm_nss_non_ported_ipv6.c | 7 +---
frontends/nss/ecm_nss_ported_ipv4.c | 8 +---
frontends/nss/ecm_nss_ported_ipv6.c | 8 +---
frontends/sfe/ecm_sfe_ipv4.c | 49 +++++++------------------
frontends/sfe/ecm_sfe_ipv6.c | 49 +++++++------------------
frontends/sfe/ecm_sfe_non_ported_ipv4.c | 7 +---
frontends/sfe/ecm_sfe_non_ported_ipv6.c | 7 +---
frontends/sfe/ecm_sfe_ported_ipv4.c | 8 +---
frontends/sfe/ecm_sfe_ported_ipv6.c | 8 +---
33 files changed, 122 insertions(+), 314 deletions(-)
--- a/ecm_classifier_default.c
+++ b/ecm_classifier_default.c
@@ -776,26 +776,14 @@ int ecm_classifier_default_init(struct d
return -1;
}
- if (!debugfs_create_u32("enabled", S_IRUGO | S_IWUSR, ecm_classifier_default_dentry,
- (u32 *)&ecm_classifier_default_enabled)) {
- DEBUG_ERROR("Failed to create ecm deafult classifier enabled file in debugfs\n");
- debugfs_remove_recursive(ecm_classifier_default_dentry);
- return -1;
- }
+ debugfs_create_u32("enabled", S_IRUGO | S_IWUSR, ecm_classifier_default_dentry,
+ (u32 *)&ecm_classifier_default_enabled);
- if (!debugfs_create_u32("accel_mode", S_IRUGO | S_IWUSR, ecm_classifier_default_dentry,
- (u32 *)&ecm_classifier_default_accel_mode)) {
- DEBUG_ERROR("Failed to create ecm deafult classifier accel_mode file in debugfs\n");
- debugfs_remove_recursive(ecm_classifier_default_dentry);
- return -1;
- }
+ debugfs_create_u32("accel_mode", S_IRUGO | S_IWUSR, ecm_classifier_default_dentry,
+ (u32 *)&ecm_classifier_default_accel_mode);
- if (!debugfs_create_u32("accel_delay_pkts", S_IRUGO | S_IWUSR, ecm_classifier_default_dentry,
- (u32 *)&ecm_classifier_accel_delay_pkts)) {
- DEBUG_ERROR("Failed to create accel delay packet counts in debugfs\n");
- debugfs_remove_recursive(ecm_classifier_default_dentry);
- return -1;
- }
+ debugfs_create_u32("accel_delay_pkts", S_IRUGO | S_IWUSR, ecm_classifier_default_dentry,
+ (u32 *)&ecm_classifier_accel_delay_pkts);
return 0;
}
--- a/ecm_classifier_dscp.c
+++ b/ecm_classifier_dscp.c
@@ -747,12 +747,8 @@ int ecm_classifier_dscp_init(struct dent
return -1;
}
- if (!debugfs_create_u32("enabled", S_IRUGO | S_IWUSR, ecm_classifier_dscp_dentry,
- (u32 *)&ecm_classifier_dscp_enabled)) {
- DEBUG_ERROR("Failed to create dscp enabled file in debugfs\n");
- debugfs_remove_recursive(ecm_classifier_dscp_dentry);
- return -1;
- }
+ debugfs_create_u32("enabled", S_IRUGO | S_IWUSR, ecm_classifier_dscp_dentry,
+ (u32 *)&ecm_classifier_dscp_enabled);
return 0;
}
--- a/ecm_classifier_emesh.c
+++ b/ecm_classifier_emesh.c
@@ -977,19 +977,11 @@ int ecm_classifier_emesh_init(struct den
return -1;
}
- if (!debugfs_create_u32("enabled", S_IRUGO | S_IWUSR, ecm_classifier_emesh_dentry,
- (u32 *)&ecm_classifier_emesh_enabled)) {
- DEBUG_ERROR("Failed to create ecm emesh classifier enabled file in debugfs\n");
- debugfs_remove_recursive(ecm_classifier_emesh_dentry);
- return -1;
- }
+ debugfs_create_u32("enabled", S_IRUGO | S_IWUSR, ecm_classifier_emesh_dentry,
+ (u32 *)&ecm_classifier_emesh_enabled);
- if (!debugfs_create_u32("latency_config_enabled", S_IRUGO | S_IWUSR, ecm_classifier_emesh_dentry,
- (u32 *)&ecm_classifier_emesh_latency_config_enabled)) {
- DEBUG_ERROR("Failed to create ecm emesh classifier latency config enabled file in debugfs\n");
- debugfs_remove_recursive(ecm_classifier_emesh_dentry);
- return -1;
- }
+ debugfs_create_u32("latency_config_enabled", S_IRUGO | S_IWUSR, ecm_classifier_emesh_dentry,
+ (u32 *)&ecm_classifier_emesh_latency_config_enabled);
/*
* Register for service prioritization notification update.
--- a/ecm_classifier_hyfi.c
+++ b/ecm_classifier_hyfi.c
@@ -1099,11 +1099,8 @@ int ecm_classifier_hyfi_rules_init(struc
goto classifier_task_cleanup;
}
- if (!debugfs_create_u32("enabled", S_IRUGO | S_IWUSR, ecm_classifier_hyfi_dentry,
- (u32 *)&ecm_classifier_hyfi_enabled)) {
- DEBUG_ERROR("Failed to create ecm hyfi classifier enabled file in debugfs\n");
- goto classifier_task_cleanup;
- }
+ debugfs_create_u32("enabled", S_IRUGO | S_IWUSR, ecm_classifier_hyfi_dentry,
+ (u32 *)&ecm_classifier_hyfi_enabled);
if (!debugfs_create_file("cmd", S_IWUSR, ecm_classifier_hyfi_dentry,
NULL, &ecm_classifier_hyfi_cmd_fops)) {
--- a/ecm_classifier_mark.c
+++ b/ecm_classifier_mark.c
@@ -753,12 +753,8 @@ int ecm_classifier_mark_init(struct dent
return -1;
}
- if (!debugfs_create_u32("enabled", S_IRUGO | S_IWUSR, ecm_classifier_mark_dentry,
- (u32 *)&ecm_classifier_mark_enabled)) {
- DEBUG_ERROR("Failed to create mark enabled file in debugfs\n");
- debugfs_remove_recursive(ecm_classifier_mark_dentry);
- return -1;
- }
+ debugfs_create_u32("enabled", S_IRUGO | S_IWUSR, ecm_classifier_mark_dentry,
+ (u32 *)&ecm_classifier_mark_enabled);
return 0;
}
--- a/ecm_classifier_ovs.c
+++ b/ecm_classifier_ovs.c
@@ -2200,12 +2200,8 @@ int ecm_classifier_ovs_init(struct dentr
return -1;
}
- if (!debugfs_create_u32("enabled", S_IRUGO | S_IWUSR, ecm_classifier_ovs_dentry,
- (u32 *)&ecm_classifier_ovs_enabled)) {
- DEBUG_ERROR("Failed to create ovs enabled file in debugfs\n");
- debugfs_remove_recursive(ecm_classifier_ovs_dentry);
- return -1;
- }
+ debugfs_create_u32("enabled", S_IRUGO | S_IWUSR, ecm_classifier_ovs_dentry,
+ (u32 *)&ecm_classifier_ovs_enabled);
return 0;
}
--- a/ecm_classifier_pcc.c
+++ b/ecm_classifier_pcc.c
@@ -1308,12 +1308,8 @@ int ecm_classifier_pcc_init(struct dentr
return -1;
}
- if (!debugfs_create_u32("enabled", S_IRUGO, ecm_classifier_pcc_dentry,
- (u32 *)&ecm_classifier_pcc_enabled)) {
- DEBUG_ERROR("Failed to create pcc enabled file in debugfs\n");
- debugfs_remove_recursive(ecm_classifier_pcc_dentry);
- return -1;
- }
+ debugfs_create_u32("enabled", S_IRUGO, ecm_classifier_pcc_dentry,
+ (u32 *)&ecm_classifier_pcc_enabled);
return 0;
}
--- a/ecm_conntrack_notifier.c
+++ b/ecm_conntrack_notifier.c
@@ -414,12 +414,8 @@ int ecm_conntrack_notifier_init(struct d
return -1;
}
- if (!debugfs_create_u32("stop", S_IRUGO | S_IWUSR, ecm_conntrack_notifier_dentry,
- (u32 *)&ecm_conntrack_notifier_stopped)) {
- DEBUG_ERROR("Failed to create ecm conntrack notifier stopped file in debugfs\n");
- debugfs_remove_recursive(ecm_conntrack_notifier_dentry);
- return -1;
- }
+ debugfs_create_u32("stop", S_IRUGO | S_IWUSR, ecm_conntrack_notifier_dentry,
+ (u32 *)&ecm_conntrack_notifier_stopped);
#ifdef CONFIG_NF_CONNTRACK_EVENTS
/*
--- a/ecm_db/ecm_db_connection.c
+++ b/ecm_db/ecm_db_connection.c
@@ -3642,11 +3642,8 @@ static struct file_operations ecm_db_con
*/
bool ecm_db_connection_init(struct dentry *dentry)
{
- if (!debugfs_create_u32("connection_count", S_IRUGO, dentry,
- (u32 *)&ecm_db_connection_count)) {
- DEBUG_ERROR("Failed to create ecm db connection count file in debugfs\n");
- return false;
- }
+ debugfs_create_u32("connection_count", S_IRUGO, dentry,
+ (u32 *)&ecm_db_connection_count);
if (!debugfs_create_file("connection_count_simple", S_IRUGO, dentry,
NULL, &ecm_db_connection_count_simple_fops)) {
--- a/ecm_db/ecm_db_host.c
+++ b/ecm_db/ecm_db_host.c
@@ -770,11 +770,8 @@ EXPORT_SYMBOL(ecm_db_host_alloc);
bool ecm_db_host_init(struct dentry *dentry)
{
- if (!debugfs_create_u32("host_count", S_IRUGO, dentry,
- (u32 *)&ecm_db_host_count)) {
- DEBUG_ERROR("Failed to create ecm db host count file in debugfs\n");
- return false;;
- }
+ debugfs_create_u32("host_count", S_IRUGO, dentry,
+ (u32 *)&ecm_db_host_count);
ecm_db_host_table = vzalloc(sizeof(struct ecm_db_host_instance *) * ECM_DB_HOST_HASH_SLOTS);
if (!ecm_db_host_table) {
--- a/ecm_db/ecm_db_iface.c
+++ b/ecm_db/ecm_db_iface.c
@@ -3670,11 +3670,8 @@ EXPORT_SYMBOL(ecm_db_iface_alloc);
*/
bool ecm_db_iface_init(struct dentry *dentry)
{
- if (!debugfs_create_u32("iface_count", S_IRUGO, dentry,
- (u32 *)&ecm_db_iface_count)) {
- DEBUG_ERROR("Failed to create ecm db iface count file in debugfs\n");
- return false;
- }
+ debugfs_create_u32("iface_count", S_IRUGO, dentry,
+ (u32 *)&ecm_db_iface_count);
return true;
}
--- a/ecm_db/ecm_db_mapping.c
+++ b/ecm_db/ecm_db_mapping.c
@@ -806,11 +806,8 @@ EXPORT_SYMBOL(ecm_db_mapping_alloc);
*/
bool ecm_db_mapping_init(struct dentry *dentry)
{
- if (!debugfs_create_u32("mapping_count", S_IRUGO, dentry,
- (u32 *)&ecm_db_mapping_count)) {
- DEBUG_ERROR("Failed to create ecm db mapping count file in debugfs\n");
- return false;
- }
+ debugfs_create_u32("mapping_count", S_IRUGO, dentry,
+ (u32 *)&ecm_db_mapping_count);
ecm_db_mapping_table = vzalloc(sizeof(struct ecm_db_mapping_instance *) * ECM_DB_MAPPING_HASH_SLOTS);
if (!ecm_db_mapping_table) {
--- a/ecm_db/ecm_db_node.c
+++ b/ecm_db/ecm_db_node.c
@@ -1187,11 +1187,8 @@ keep_sni_conn:
*/
bool ecm_db_node_init(struct dentry *dentry)
{
- if (!debugfs_create_u32("node_count", S_IRUGO, dentry,
- (u32 *)&ecm_db_node_count)) {
- DEBUG_ERROR("Failed to create ecm db node count file in debugfs\n");
- return false;
- }
+ debugfs_create_u32("node_count", S_IRUGO, dentry,
+ (u32 *)&ecm_db_node_count);
ecm_db_node_table = vzalloc(sizeof(struct ecm_db_node_instance *) * ECM_DB_NODE_HASH_SLOTS);
if (!ecm_db_node_table) {
--- a/ecm_interface.c
+++ b/ecm_interface.c
@@ -332,7 +332,7 @@ static struct net_device *ecm_interface_
struct net_device *dev;
ECM_IP_ADDR_TO_NIN6_ADDR(addr6, addr);
- dev = (struct net_device *)ipv6_dev_find(&init_net, &addr6, 1);
+ dev = (struct net_device *)ipv6_dev_find_and_hold(&init_net, &addr6, 1);
return dev;
}
#endif
@@ -734,7 +734,7 @@ static bool ecm_interface_mac_addr_get_i
* Get the MAC address that corresponds to IP address given.
*/
ECM_IP_ADDR_TO_NIN6_ADDR(daddr, addr);
- local_dev = ipv6_dev_find(&init_net, &daddr, 1);
+ local_dev = ipv6_dev_find_and_hold(&init_net, &daddr, 1);
if (local_dev) {
DEBUG_TRACE("%pi6 is a local address\n", &daddr);
memcpy(mac_addr, dev->dev_addr, ETH_ALEN);
--- a/ecm_state.c
+++ b/ecm_state.c
@@ -899,17 +899,11 @@ int ecm_state_init(struct dentry *dentry
return -1;
}
- if (!debugfs_create_u32("state_dev_major", S_IRUGO, ecm_state_dentry,
- (u32 *)&ecm_state_dev_major_id)) {
- DEBUG_ERROR("Failed to create ecm state dev major file in debugfs\n");
- goto init_cleanup;
- }
+ debugfs_create_u32("state_dev_major", S_IRUGO, ecm_state_dentry,
+ (u32 *)&ecm_state_dev_major_id);
- if (!debugfs_create_u32("state_file_output_mask", S_IRUGO | S_IWUSR, ecm_state_dentry,
- (u32 *)&ecm_state_file_output_mask)) {
- DEBUG_ERROR("Failed to create ecm state output mask file in debugfs\n");
- goto init_cleanup;
- }
+ debugfs_create_u32("state_file_output_mask", S_IRUGO | S_IWUSR, ecm_state_dentry,
+ (u32 *)&ecm_state_file_output_mask);
/*
* Register a char device that we will use to provide a dump of our state
--- a/frontends/ecm_front_end_common.c
+++ b/frontends/ecm_front_end_common.c
@@ -192,7 +192,7 @@ bool ecm_front_end_gre_proto_is_accel_al
return false;
}
} else {
- dev = ipv6_dev_find(&init_net, &(tuple->src.u3.in6), 1);
+ dev = ipv6_dev_find_and_hold(&init_net, &(tuple->src.u3.in6), 1);
if (dev) {
/*
* Source IP address is local
@@ -202,7 +202,7 @@ bool ecm_front_end_gre_proto_is_accel_al
return false;
}
- dev = ipv6_dev_find(&init_net, &(tuple->dst.u3.in6), 1);
+ dev = ipv6_dev_find_and_hold(&init_net, &(tuple->dst.u3.in6), 1);
if (dev) {
/*
* Destination IP address is local
--- a/frontends/ecm_front_end_ipv4.c
+++ b/frontends/ecm_front_end_ipv4.c
@@ -376,11 +376,8 @@ void ecm_front_end_ipv4_stop(int num)
*/
int ecm_front_end_ipv4_init(struct dentry *dentry)
{
- if (!debugfs_create_u32("front_end_ipv4_stop", S_IRUGO | S_IWUSR, dentry,
- (u32 *)&ecm_front_end_ipv4_stopped)) {
- DEBUG_ERROR("Failed to create ecm front end ipv4 stop file in debugfs\n");
- return -1;
- }
+ debugfs_create_u32("front_end_ipv4_stop", S_IRUGO | S_IWUSR, dentry,
+ (u32 *)&ecm_front_end_ipv4_stopped);
switch (ecm_front_end_type_get()) {
case ECM_FRONT_END_TYPE_NSS:
--- a/frontends/ecm_front_end_ipv6.c
+++ b/frontends/ecm_front_end_ipv6.c
@@ -255,11 +255,8 @@ void ecm_front_end_ipv6_stop(int num)
*/
int ecm_front_end_ipv6_init(struct dentry *dentry)
{
- if (!debugfs_create_u32("front_end_ipv6_stop", S_IRUGO | S_IWUSR, dentry,
- (u32 *)&ecm_front_end_ipv6_stopped)) {
- DEBUG_ERROR("Failed to create ecm front end ipv6 stop file in debugfs\n");
- return -1;
- }
+ debugfs_create_u32("front_end_ipv6_stop", S_IRUGO | S_IWUSR, dentry,
+ (u32 *)&ecm_front_end_ipv6_stopped);
switch (ecm_front_end_type_get()) {
case ECM_FRONT_END_TYPE_NSS:
--- a/frontends/nss/ecm_nss_bond_notifier.c
+++ b/frontends/nss/ecm_nss_bond_notifier.c
@@ -240,12 +240,8 @@ int ecm_nss_bond_notifier_init(struct de
return -1;
}
- if (!debugfs_create_u32("stop", S_IRUGO | S_IWUSR, ecm_nss_bond_notifier_dentry,
- (u32 *)&ecm_nss_bond_notifier_stopped)) {
- DEBUG_ERROR("Failed to create ecm bond notifier stopped file in debugfs\n");
- debugfs_remove_recursive(ecm_nss_bond_notifier_dentry);
- return -1;
- }
+ debugfs_create_u32("stop", S_IRUGO | S_IWUSR, ecm_nss_bond_notifier_dentry,
+ (u32 *)&ecm_nss_bond_notifier_stopped);
/*
* Register Link Aggregation callbacks with the bonding driver
--- a/frontends/nss/ecm_nss_ipv4.c
+++ b/frontends/nss/ecm_nss_ipv4.c
@@ -2802,41 +2802,23 @@ int ecm_nss_ipv4_init(struct dentry *den
return result;
}
- if (!debugfs_create_u32("no_action_limit_default", S_IRUGO | S_IWUSR, ecm_nss_ipv4_dentry,
- (u32 *)&ecm_nss_ipv4_no_action_limit_default)) {
- DEBUG_ERROR("Failed to create ecm nss ipv4 no_action_limit_default file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("no_action_limit_default", S_IRUGO | S_IWUSR, ecm_nss_ipv4_dentry,
+ (u32 *)&ecm_nss_ipv4_no_action_limit_default);
- if (!debugfs_create_u32("driver_fail_limit_default", S_IRUGO | S_IWUSR, ecm_nss_ipv4_dentry,
- (u32 *)&ecm_nss_ipv4_driver_fail_limit_default)) {
- DEBUG_ERROR("Failed to create ecm nss ipv4 driver_fail_limit_default file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("driver_fail_limit_default", S_IRUGO | S_IWUSR, ecm_nss_ipv4_dentry,
+ (u32 *)&ecm_nss_ipv4_driver_fail_limit_default);
- if (!debugfs_create_u32("nack_limit_default", S_IRUGO | S_IWUSR, ecm_nss_ipv4_dentry,
- (u32 *)&ecm_nss_ipv4_nack_limit_default)) {
- DEBUG_ERROR("Failed to create ecm nss ipv4 nack_limit_default file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("nack_limit_default", S_IRUGO | S_IWUSR, ecm_nss_ipv4_dentry,
+ (u32 *)&ecm_nss_ipv4_nack_limit_default);
- if (!debugfs_create_u32("accelerated_count", S_IRUGO, ecm_nss_ipv4_dentry,
- (u32 *)&ecm_nss_ipv4_accelerated_count)) {
- DEBUG_ERROR("Failed to create ecm nss ipv4 accelerated_count file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("accelerated_count", S_IRUGO, ecm_nss_ipv4_dentry,
+ (u32 *)&ecm_nss_ipv4_accelerated_count);
- if (!debugfs_create_u32("pending_accel_count", S_IRUGO, ecm_nss_ipv4_dentry,
- (u32 *)&ecm_nss_ipv4_pending_accel_count)) {
- DEBUG_ERROR("Failed to create ecm nss ipv4 pending_accel_count file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("pending_accel_count", S_IRUGO, ecm_nss_ipv4_dentry,
+ (u32 *)&ecm_nss_ipv4_pending_accel_count);
- if (!debugfs_create_u32("pending_decel_count", S_IRUGO, ecm_nss_ipv4_dentry,
- (u32 *)&ecm_nss_ipv4_pending_decel_count)) {
- DEBUG_ERROR("Failed to create ecm nss ipv4 pending_decel_count file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("pending_decel_count", S_IRUGO, ecm_nss_ipv4_dentry,
+ (u32 *)&ecm_nss_ipv4_pending_decel_count);
if (!debugfs_create_file("accel_limit_mode", S_IRUGO | S_IWUSR, ecm_nss_ipv4_dentry,
NULL, &ecm_nss_ipv4_accel_limit_mode_fops)) {
@@ -2867,11 +2849,8 @@ int ecm_nss_ipv4_init(struct dentry *den
goto task_cleanup;
}
- if (!debugfs_create_u32("vlan_passthrough_set", S_IRUGO | S_IWUSR, ecm_nss_ipv4_dentry,
- (u32 *)&ecm_nss_ipv4_vlan_passthrough_enable)) {
- DEBUG_ERROR("Failed to create ecm nss ipv4 vlan passthrough file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("vlan_passthrough_set", S_IRUGO | S_IWUSR, ecm_nss_ipv4_dentry,
+ (u32 *)&ecm_nss_ipv4_vlan_passthrough_enable);
#ifdef ECM_NON_PORTED_SUPPORT_ENABLE
if (!ecm_nss_non_ported_ipv4_debugfs_init(ecm_nss_ipv4_dentry)) {
--- a/frontends/nss/ecm_nss_ipv6.c
+++ b/frontends/nss/ecm_nss_ipv6.c
@@ -2542,41 +2542,23 @@ int ecm_nss_ipv6_init(struct dentry *den
return result;
}
- if (!debugfs_create_u32("no_action_limit_default", S_IRUGO | S_IWUSR, ecm_nss_ipv6_dentry,
- (u32 *)&ecm_nss_ipv6_no_action_limit_default)) {
- DEBUG_ERROR("Failed to create ecm nss ipv6 no_action_limit_default file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("no_action_limit_default", S_IRUGO | S_IWUSR, ecm_nss_ipv6_dentry,
+ (u32 *)&ecm_nss_ipv6_no_action_limit_default);
- if (!debugfs_create_u32("driver_fail_limit_default", S_IRUGO | S_IWUSR, ecm_nss_ipv6_dentry,
- (u32 *)&ecm_nss_ipv6_driver_fail_limit_default)) {
- DEBUG_ERROR("Failed to create ecm nss ipv6 driver_fail_limit_default file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("driver_fail_limit_default", S_IRUGO | S_IWUSR, ecm_nss_ipv6_dentry,
+ (u32 *)&ecm_nss_ipv6_driver_fail_limit_default);
- if (!debugfs_create_u32("nack_limit_default", S_IRUGO | S_IWUSR, ecm_nss_ipv6_dentry,
- (u32 *)&ecm_nss_ipv6_nack_limit_default)) {
- DEBUG_ERROR("Failed to create ecm nss ipv6 nack_limit_default file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("nack_limit_default", S_IRUGO | S_IWUSR, ecm_nss_ipv6_dentry,
+ (u32 *)&ecm_nss_ipv6_nack_limit_default);
- if (!debugfs_create_u32("accelerated_count", S_IRUGO, ecm_nss_ipv6_dentry,
- (u32 *)&ecm_nss_ipv6_accelerated_count)) {
- DEBUG_ERROR("Failed to create ecm nss ipv6 accelerated_count file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("accelerated_count", S_IRUGO, ecm_nss_ipv6_dentry,
+ (u32 *)&ecm_nss_ipv6_accelerated_count);
- if (!debugfs_create_u32("pending_accel_count", S_IRUGO, ecm_nss_ipv6_dentry,
- (u32 *)&ecm_nss_ipv6_pending_accel_count)) {
- DEBUG_ERROR("Failed to create ecm nss ipv6 pending_accel_count file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("pending_accel_count", S_IRUGO, ecm_nss_ipv6_dentry,
+ (u32 *)&ecm_nss_ipv6_pending_accel_count);
- if (!debugfs_create_u32("pending_decel_count", S_IRUGO, ecm_nss_ipv6_dentry,
- (u32 *)&ecm_nss_ipv6_pending_decel_count)) {
- DEBUG_ERROR("Failed to create ecm nss ipv6 pending_decel_count file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("pending_decel_count", S_IRUGO, ecm_nss_ipv6_dentry,
+ (u32 *)&ecm_nss_ipv6_pending_decel_count);
if (!debugfs_create_file("accel_limit_mode", S_IRUGO | S_IWUSR, ecm_nss_ipv6_dentry,
NULL, &ecm_nss_ipv6_accel_limit_mode_fops)) {
@@ -2607,11 +2589,8 @@ int ecm_nss_ipv6_init(struct dentry *den
goto task_cleanup;
}
- if (!debugfs_create_u32("vlan_passthrough_set", S_IRUGO | S_IWUSR, ecm_nss_ipv6_dentry,
- (u32 *)&ecm_nss_ipv6_vlan_passthrough_enable)) {
- DEBUG_ERROR("Failed to create ecm nss ipv6 vlan passthrough file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("vlan_passthrough_set", S_IRUGO | S_IWUSR, ecm_nss_ipv6_dentry,
+ (u32 *)&ecm_nss_ipv6_vlan_passthrough_enable);
#ifdef ECM_NON_PORTED_SUPPORT_ENABLE
if (!ecm_nss_non_ported_ipv6_debugfs_init(ecm_nss_ipv6_dentry)) {
--- a/frontends/nss/ecm_nss_multicast_ipv4.c
+++ b/frontends/nss/ecm_nss_multicast_ipv4.c
@@ -4139,11 +4139,8 @@ void ecm_nss_multicast_ipv4_stop(int num
*/
int ecm_nss_multicast_ipv4_init(struct dentry *dentry)
{
- if (!debugfs_create_u32("ecm_nss_multicast_ipv4_stop", S_IRUGO | S_IWUSR, dentry,
- (u32 *)&ecm_front_end_ipv4_mc_stopped)) {
- DEBUG_ERROR("Failed to create ecm front end ipv4 mc stop file in debugfs\n");
- return -1;
- }
+ debugfs_create_u32("ecm_nss_multicast_ipv4_stop", S_IRUGO | S_IWUSR, dentry,
+ (u32 *)&ecm_front_end_ipv4_mc_stopped);
/*
* Register multicast update callback to MCS snooper
--- a/frontends/nss/ecm_nss_multicast_ipv6.c
+++ b/frontends/nss/ecm_nss_multicast_ipv6.c
@@ -3939,11 +3939,8 @@ void ecm_nss_multicast_ipv6_stop(int num
*/
int ecm_nss_multicast_ipv6_init(struct dentry *dentry)
{
- if (!debugfs_create_u32("ecm_nss_multicast_ipv6_stop", S_IRUGO | S_IWUSR, dentry,
- (u32 *)&ecm_front_end_ipv6_mc_stopped)) {
- DEBUG_ERROR("Failed to create ecm front end ipv6 mc stop file in debugfs\n");
- return -1;
- }
+ debugfs_create_u32("ecm_nss_multicast_ipv6_stop", S_IRUGO | S_IWUSR, dentry,
+ (u32 *)&ecm_front_end_ipv6_mc_stopped);
/*
* Register multicast update callback to MCS snooper
--- a/frontends/nss/ecm_nss_non_ported_ipv4.c
+++ b/frontends/nss/ecm_nss_non_ported_ipv4.c
@@ -2615,11 +2615,8 @@ done:
*/
bool ecm_nss_non_ported_ipv4_debugfs_init(struct dentry *dentry)
{
- if (!debugfs_create_u32("non_ported_accelerated_count", S_IRUGO, dentry,
- (u32 *)&ecm_nss_non_ported_ipv4_accelerated_count)) {
- DEBUG_ERROR("Failed to create ecm nss ipv4 non_ported_accelerated_count file in debugfs\n");
- return false;
- }
+ debugfs_create_u32("non_ported_accelerated_count", S_IRUGO, dentry,
+ (u32 *)&ecm_nss_non_ported_ipv4_accelerated_count);
return true;
}
--- a/frontends/nss/ecm_nss_non_ported_ipv6.c
+++ b/frontends/nss/ecm_nss_non_ported_ipv6.c
@@ -2329,11 +2329,8 @@ done:
*/
bool ecm_nss_non_ported_ipv6_debugfs_init(struct dentry *dentry)
{
- if (!debugfs_create_u32("non_ported_accelerated_count", S_IRUGO, dentry,
- (u32 *)&ecm_nss_non_ported_ipv6_accelerated_count)) {
- DEBUG_ERROR("Failed to create ecm nss ipv6 non_ported_accelerated_count file in debugfs\n");
- return false;
- }
+ debugfs_create_u32("non_ported_accelerated_count", S_IRUGO, dentry,
+ (u32 *)&ecm_nss_non_ported_ipv6_accelerated_count);
return true;
}
--- a/frontends/nss/ecm_nss_ported_ipv4.c
+++ b/frontends/nss/ecm_nss_ported_ipv4.c
@@ -2944,12 +2944,8 @@ bool ecm_nss_ported_ipv4_debugfs_init(st
return false;
}
- if (!debugfs_create_u32("tcp_accelerated_count", S_IRUGO, dentry,
- &ecm_nss_ported_ipv4_accelerated_count[ECM_NSS_PORTED_IPV4_PROTO_TCP])) {
- DEBUG_ERROR("Failed to create ecm nss ipv4 tcp_accelerated_count file in debugfs\n");
- debugfs_remove(udp_dentry);
- return false;
- }
+ debugfs_create_u32("tcp_accelerated_count", S_IRUGO, dentry,
+ &ecm_nss_ported_ipv4_accelerated_count[ECM_NSS_PORTED_IPV4_PROTO_TCP]);
return true;
}
--- a/frontends/nss/ecm_nss_ported_ipv6.c
+++ b/frontends/nss/ecm_nss_ported_ipv6.c
@@ -2732,12 +2732,8 @@ bool ecm_nss_ported_ipv6_debugfs_init(st
return false;
}
- if (!debugfs_create_u32("tcp_accelerated_count", S_IRUGO, dentry,
- &ecm_nss_ported_ipv6_accelerated_count[ECM_NSS_PORTED_IPV6_PROTO_TCP])) {
- DEBUG_ERROR("Failed to create ecm nss ipv6 tcp_accelerated_count file in debugfs\n");
- debugfs_remove(udp_dentry);
- return false;
- }
+ debugfs_create_u32("tcp_accelerated_count", S_IRUGO, dentry,
+ &ecm_nss_ported_ipv6_accelerated_count[ECM_NSS_PORTED_IPV6_PROTO_TCP]);
return true;
}
--- a/frontends/sfe/ecm_sfe_ipv4.c
+++ b/frontends/sfe/ecm_sfe_ipv4.c
@@ -1808,48 +1808,27 @@ int ecm_sfe_ipv4_init(struct dentry *den
}
#ifdef CONFIG_XFRM
- if (!debugfs_create_u32("reject_acceleration_for_ipsec", S_IRUGO | S_IWUSR, ecm_sfe_ipv4_dentry,
- (u32 *)&ecm_sfe_ipv4_reject_acceleration_for_ipsec)) {
- DEBUG_ERROR("Failed to create ecm sfe ipv4 reject_acceleration_for_ipsec file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("reject_acceleration_for_ipsec", S_IRUGO | S_IWUSR, ecm_sfe_ipv4_dentry,
+ (u32 *)&ecm_sfe_ipv4_reject_acceleration_for_ipsec);
#endif
- if (!debugfs_create_u32("no_action_limit_default", S_IRUGO | S_IWUSR, ecm_sfe_ipv4_dentry,
- (u32 *)&ecm_sfe_ipv4_no_action_limit_default)) {
- DEBUG_ERROR("Failed to create ecm sfe ipv4 no_action_limit_default file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("no_action_limit_default", S_IRUGO | S_IWUSR, ecm_sfe_ipv4_dentry,
+ (u32 *)&ecm_sfe_ipv4_no_action_limit_default);
- if (!debugfs_create_u32("driver_fail_limit_default", S_IRUGO | S_IWUSR, ecm_sfe_ipv4_dentry,
- (u32 *)&ecm_sfe_ipv4_driver_fail_limit_default)) {
- DEBUG_ERROR("Failed to create ecm sfe ipv4 driver_fail_limit_default file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("driver_fail_limit_default", S_IRUGO | S_IWUSR, ecm_sfe_ipv4_dentry,
+ (u32 *)&ecm_sfe_ipv4_driver_fail_limit_default);
- if (!debugfs_create_u32("nack_limit_default", S_IRUGO | S_IWUSR, ecm_sfe_ipv4_dentry,
- (u32 *)&ecm_sfe_ipv4_nack_limit_default)) {
- DEBUG_ERROR("Failed to create ecm sfe ipv4 nack_limit_default file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("nack_limit_default", S_IRUGO | S_IWUSR, ecm_sfe_ipv4_dentry,
+ (u32 *)&ecm_sfe_ipv4_nack_limit_default);
- if (!debugfs_create_u32("accelerated_count", S_IRUGO, ecm_sfe_ipv4_dentry,
- (u32 *)&ecm_sfe_ipv4_accelerated_count)) {
- DEBUG_ERROR("Failed to create ecm sfe ipv4 accelerated_count file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("accelerated_count", S_IRUGO, ecm_sfe_ipv4_dentry,
+ (u32 *)&ecm_sfe_ipv4_accelerated_count);
- if (!debugfs_create_u32("pending_accel_count", S_IRUGO, ecm_sfe_ipv4_dentry,
- (u32 *)&ecm_sfe_ipv4_pending_accel_count)) {
- DEBUG_ERROR("Failed to create ecm sfe ipv4 pending_accel_count file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("pending_accel_count", S_IRUGO, ecm_sfe_ipv4_dentry,
+ (u32 *)&ecm_sfe_ipv4_pending_accel_count);
- if (!debugfs_create_u32("pending_decel_count", S_IRUGO, ecm_sfe_ipv4_dentry,
- (u32 *)&ecm_sfe_ipv4_pending_decel_count)) {
- DEBUG_ERROR("Failed to create ecm sfe ipv4 pending_decel_count file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("pending_decel_count", S_IRUGO, ecm_sfe_ipv4_dentry,
+ (u32 *)&ecm_sfe_ipv4_pending_decel_count);
if (!debugfs_create_file("accel_limit_mode", S_IRUGO | S_IWUSR, ecm_sfe_ipv4_dentry,
NULL, &ecm_sfe_ipv4_accel_limit_mode_fops)) {
--- a/frontends/sfe/ecm_sfe_ipv6.c
+++ b/frontends/sfe/ecm_sfe_ipv6.c
@@ -1532,48 +1532,27 @@ int ecm_sfe_ipv6_init(struct dentry *den
}
#ifdef CONFIG_XFRM
- if (!debugfs_create_u32("reject_acceleration_for_ipsec", S_IRUGO | S_IWUSR, ecm_sfe_ipv6_dentry,
- (u32 *)&ecm_sfe_ipv6_reject_acceleration_for_ipsec)) {
- DEBUG_ERROR("Failed to create ecm sfe ipv6 reject_acceleration_for_ipsec file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("reject_acceleration_for_ipsec", S_IRUGO | S_IWUSR, ecm_sfe_ipv6_dentry,
+ (u32 *)&ecm_sfe_ipv6_reject_acceleration_for_ipsec);
#endif
- if (!debugfs_create_u32("no_action_limit_default", S_IRUGO | S_IWUSR, ecm_sfe_ipv6_dentry,
- (u32 *)&ecm_sfe_ipv6_no_action_limit_default)) {
- DEBUG_ERROR("Failed to create ecm sfe ipv6 no_action_limit_default file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("no_action_limit_default", S_IRUGO | S_IWUSR, ecm_sfe_ipv6_dentry,
+ (u32 *)&ecm_sfe_ipv6_no_action_limit_default);
- if (!debugfs_create_u32("driver_fail_limit_default", S_IRUGO | S_IWUSR, ecm_sfe_ipv6_dentry,
- (u32 *)&ecm_sfe_ipv6_driver_fail_limit_default)) {
- DEBUG_ERROR("Failed to create ecm sfe ipv6 driver_fail_limit_default file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("driver_fail_limit_default", S_IRUGO | S_IWUSR, ecm_sfe_ipv6_dentry,
+ (u32 *)&ecm_sfe_ipv6_driver_fail_limit_default);
- if (!debugfs_create_u32("nack_limit_default", S_IRUGO | S_IWUSR, ecm_sfe_ipv6_dentry,
- (u32 *)&ecm_sfe_ipv6_nack_limit_default)) {
- DEBUG_ERROR("Failed to create ecm sfe ipv6 nack_limit_default file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("nack_limit_default", S_IRUGO | S_IWUSR, ecm_sfe_ipv6_dentry,
+ (u32 *)&ecm_sfe_ipv6_nack_limit_default);
- if (!debugfs_create_u32("accelerated_count", S_IRUGO, ecm_sfe_ipv6_dentry,
- (u32 *)&ecm_sfe_ipv6_accelerated_count)) {
- DEBUG_ERROR("Failed to create ecm sfe ipv6 accelerated_count file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("accelerated_count", S_IRUGO, ecm_sfe_ipv6_dentry,
+ (u32 *)&ecm_sfe_ipv6_accelerated_count);
- if (!debugfs_create_u32("pending_accel_count", S_IRUGO, ecm_sfe_ipv6_dentry,
- (u32 *)&ecm_sfe_ipv6_pending_accel_count)) {
- DEBUG_ERROR("Failed to create ecm sfe ipv6 pending_accel_count file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("pending_accel_count", S_IRUGO, ecm_sfe_ipv6_dentry,
+ (u32 *)&ecm_sfe_ipv6_pending_accel_count);
- if (!debugfs_create_u32("pending_decel_count", S_IRUGO, ecm_sfe_ipv6_dentry,
- (u32 *)&ecm_sfe_ipv6_pending_decel_count)) {
- DEBUG_ERROR("Failed to create ecm sfe ipv6 pending_decel_count file in debugfs\n");
- goto task_cleanup;
- }
+ debugfs_create_u32("pending_decel_count", S_IRUGO, ecm_sfe_ipv6_dentry,
+ (u32 *)&ecm_sfe_ipv6_pending_decel_count);
if (!debugfs_create_file("accel_limit_mode", S_IRUGO | S_IWUSR, ecm_sfe_ipv6_dentry,
NULL, &ecm_sfe_ipv6_accel_limit_mode_fops)) {
--- a/frontends/sfe/ecm_sfe_non_ported_ipv4.c
+++ b/frontends/sfe/ecm_sfe_non_ported_ipv4.c
@@ -2284,11 +2284,8 @@ done:
*/
bool ecm_sfe_non_ported_ipv4_debugfs_init(struct dentry *dentry)
{
- if (!debugfs_create_u32("non_ported_accelerated_count", S_IRUGO, dentry,
- (u32 *)&ecm_sfe_non_ported_ipv4_accelerated_count)) {
- DEBUG_ERROR("Failed to create ecm sfe ipv4 non_ported_accelerated_count file in debugfs\n");
- return false;
- }
+ debugfs_create_u32("non_ported_accelerated_count", S_IRUGO, dentry,
+ (u32 *)&ecm_sfe_non_ported_ipv4_accelerated_count);
return true;
}
--- a/frontends/sfe/ecm_sfe_non_ported_ipv6.c
+++ b/frontends/sfe/ecm_sfe_non_ported_ipv6.c
@@ -2083,11 +2083,8 @@ done:
*/
bool ecm_sfe_non_ported_ipv6_debugfs_init(struct dentry *dentry)
{
- if (!debugfs_create_u32("non_ported_accelerated_count", S_IRUGO, dentry,
- (u32 *)&ecm_sfe_non_ported_ipv6_accelerated_count)) {
- DEBUG_ERROR("Failed to create ecm sfe ipv6 non_ported_accelerated_count file in debugfs\n");
- return false;
- }
+ debugfs_create_u32("non_ported_accelerated_count", S_IRUGO, dentry,
+ (u32 *)&ecm_sfe_non_ported_ipv6_accelerated_count);
return true;
}
--- a/frontends/sfe/ecm_sfe_ported_ipv4.c
+++ b/frontends/sfe/ecm_sfe_ported_ipv4.c
@@ -2528,12 +2528,8 @@ bool ecm_sfe_ported_ipv4_debugfs_init(st
return false;
}
- if (!debugfs_create_u32("tcp_accelerated_count", S_IRUGO, dentry,
- &ecm_sfe_ported_ipv4_accelerated_count[ECM_SFE_PORTED_IPV4_PROTO_TCP])) {
- DEBUG_ERROR("Failed to create ecm sfe ipv4 tcp_accelerated_count file in debugfs\n");
- debugfs_remove(udp_dentry);
- return false;
- }
+ debugfs_create_u32("tcp_accelerated_count", S_IRUGO, dentry,
+ &ecm_sfe_ported_ipv4_accelerated_count[ECM_SFE_PORTED_IPV4_PROTO_TCP]);
return true;
}
--- a/frontends/sfe/ecm_sfe_ported_ipv6.c
+++ b/frontends/sfe/ecm_sfe_ported_ipv6.c
@@ -2374,12 +2374,8 @@ bool ecm_sfe_ported_ipv6_debugfs_init(st
return false;
}
- if (!debugfs_create_u32("tcp_accelerated_count", S_IRUGO, dentry,
- &ecm_sfe_ported_ipv6_accelerated_count[ECM_SFE_PORTED_IPV6_PROTO_TCP])) {
- DEBUG_ERROR("Failed to create ecm sfe ipv6 tcp_accelerated_count file in debugfs\n");
- debugfs_remove(udp_dentry);
- return false;
- }
+ debugfs_create_u32("tcp_accelerated_count", S_IRUGO, dentry,
+ &ecm_sfe_ported_ipv6_accelerated_count[ECM_SFE_PORTED_IPV6_PROTO_TCP]);
return true;
}

25
package/nss/qca/qca-nss-ecm/patches/203-rework-nfct-notification.patch Normal file
View File

@ -0,0 +1,25 @@
--- a/ecm_conntrack_notifier.c
+++ b/ecm_conntrack_notifier.c
@@ -421,7 +421,11 @@ int ecm_conntrack_notifier_init(struct d
/*
* Eventing subsystem is available so we register a notifier hook to get fast notifications of expired connections
*/
+#ifdef CONFIG_NF_CONNTRACK_CHAIN_EVENTS
+ result = nf_conntrack_register_chain_notifier(&init_net, &ecm_conntrack_notifier);
+#else
result = nf_conntrack_register_notifier(&init_net, &ecm_conntrack_notifier);
+#endif
if (result < 0) {
DEBUG_ERROR("Can't register nf notifier hook.\n");
debugfs_remove_recursive(ecm_conntrack_notifier_dentry);
@@ -439,7 +443,9 @@ EXPORT_SYMBOL(ecm_conntrack_notifier_ini
void ecm_conntrack_notifier_exit(void)
{
DEBUG_INFO("ECM Conntrack Notifier exit\n");
-#ifdef CONFIG_NF_CONNTRACK_EVENTS
+#ifdef CONFIG_NF_CONNTRACK_CHAIN_EVENTS
+ nf_conntrack_unregister_chain_notifier(&init_net, &ecm_conntrack_notifier);
+#else
nf_conntrack_unregister_notifier(&init_net, &ecm_conntrack_notifier);
#endif
/*

58
package/nss/qca/qca-nss-ecm/patches/204-More-compile-fixes.patch Normal file
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@ -0,0 +1,58 @@
From e6d701c0d454d841366c556b2ef07a5203ffb35d Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Fri, 21 May 2021 21:41:31 +0200
Subject: [PATCH] More compile fixes
More runtime compile fixes.
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
frontends/nss/ecm_nss_ported_ipv4.c | 12 +++---------
frontends/nss/ecm_nss_ported_ipv6.c | 12 +++---------
2 files changed, 6 insertions(+), 18 deletions(-)
diff --git a/frontends/nss/ecm_nss_ported_ipv4.c b/frontends/nss/ecm_nss_ported_ipv4.c
index 3522f0f..7f5fcd1 100644
--- a/frontends/nss/ecm_nss_ported_ipv4.c
+++ b/frontends/nss/ecm_nss_ported_ipv4.c
@@ -2935,14 +2935,8 @@ done:
*/
bool ecm_nss_ported_ipv4_debugfs_init(struct dentry *dentry)
{
- struct dentry *udp_dentry;
-
- udp_dentry = debugfs_create_u32("udp_accelerated_count", S_IRUGO, dentry,
+ debugfs_create_u32("udp_accelerated_count", S_IRUGO, dentry,
&ecm_nss_ported_ipv4_accelerated_count[ECM_NSS_PORTED_IPV4_PROTO_UDP]);
- if (!udp_dentry) {
- DEBUG_ERROR("Failed to create ecm nss ipv4 udp_accelerated_count file in debugfs\n");
- return false;
- }
debugfs_create_u32("tcp_accelerated_count", S_IRUGO, dentry,
&ecm_nss_ported_ipv4_accelerated_count[ECM_NSS_PORTED_IPV4_PROTO_TCP]);
diff --git a/frontends/nss/ecm_nss_ported_ipv6.c b/frontends/nss/ecm_nss_ported_ipv6.c
index f43ac95..e0f779c 100644
--- a/frontends/nss/ecm_nss_ported_ipv6.c
+++ b/frontends/nss/ecm_nss_ported_ipv6.c
/*
* ecm_nss_ported_ipv6_connection_callback()
@@ -2723,14 +2723,8 @@ done:
*/
bool ecm_nss_ported_ipv6_debugfs_init(struct dentry *dentry)
{
- struct dentry *udp_dentry;
-
- udp_dentry = debugfs_create_u32("udp_accelerated_count", S_IRUGO, dentry,
+ debugfs_create_u32("udp_accelerated_count", S_IRUGO, dentry,
&ecm_nss_ported_ipv6_accelerated_count[ECM_NSS_PORTED_IPV6_PROTO_UDP]);
- if (!udp_dentry) {
- DEBUG_ERROR("Failed to create ecm nss ipv6 udp_accelerated_count file in debugfs\n");
- return false;
- }
debugfs_create_u32("tcp_accelerated_count", S_IRUGO, dentry,
&ecm_nss_ported_ipv6_accelerated_count[ECM_NSS_PORTED_IPV6_PROTO_TCP]);
--
2.31.1

48
package/nss/qca/qca-ssdk-shell/Makefile Normal file
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@ -0,0 +1,48 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=qca-ssdk-shell
PKG_RELEASE:=$(AUTORELEASE)
PKG_SOURCE_URL:=https://source.codeaurora.org/quic/cc-qrdk/oss/ssdk-shell
PKG_SOURCE_PROTO:=git
PKG_SOURCE_DATE:=2021-01-27
PKG_SOURCE_VERSION:=5661366d471a78314bc7010f985ad8cc15be832a
PKG_MIRROR_HASH:=73111e09e896f0abbe3ee1c358aea7ec14fe5e668ce8753b8968e03c78f9599b
include $(INCLUDE_DIR)/kernel.mk
include $(INCLUDE_DIR)/package.mk
define Package/qca-ssdk-shell
SECTION:=QCA
CATEGORY:=Utilities
TITLE:=Shell application for QCA SSDK
endef
define Package/qca-ssdk-shell/Description
This package contains a qca-ssdk shell application for QCA chipset
endef
ifndef CONFIG_TOOLCHAIN_BIN_PATH
CONFIG_TOOLCHAIN_BIN_PATH=$(TOOLCHAIN_DIR)/bin
endif
QCASSDK_CONFIG_OPTS+= TOOL_PATH=$(CONFIG_TOOLCHAIN_BIN_PATH) \
SYS_PATH=$(LINUX_DIR) \
TOOLPREFIX=$(TARGET_CROSS) \
KVER=$(LINUX_VERSION) \
CFLAGS="$(TARGET_CFLAGS)" \
LDFLAGS="$(TARGET_LDFLAGS)" \
ARCH=$(LINUX_KARCH)
define Build/Compile
$(MAKE) -C $(PKG_BUILD_DIR) $(strip $(QCASSDK_CONFIG_OPTS))
endef
define Package/qca-ssdk-shell/install
$(INSTALL_DIR) $(1)/usr/sbin
$(INSTALL_BIN) $(PKG_BUILD_DIR)/build/bin/ssdk_sh $(1)/usr/sbin/
endef
$(eval $(call BuildPackage,qca-ssdk-shell))

93
package/nss/qca/qca-ssdk/Makefile Normal file
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@ -0,0 +1,93 @@
include $(TOPDIR)/rules.mk
PKG_NAME:=qca-ssdk
PKG_RELEASE:=$(AUTORELEASE)
PKG_SOURCE_URL:=https://source.codeaurora.org/quic/cc-qrdk/oss/lklm/qca-ssdk
PKG_SOURCE_PROTO:=git
PKG_SOURCE_DATE:=2021-04-28
PKG_SOURCE_VERSION:=c9bc3bc34eaaac78083573524097356e2dcc1b66
PKG_MIRROR_HASH:=29db78529be32427b8b96fcbfec22a016a243676781ec96d9d65b810944fa405
PKG_BUILD_PARALLEL:=1
include $(INCLUDE_DIR)/kernel.mk
include $(INCLUDE_DIR)/package.mk
define KernelPackage/qca-ssdk-nohnat
SECTION:=kernel
CATEGORY:=Kernel modules
SUBMENU:=Network Devices
TITLE:=Kernel driver for QCA SSDK
DEPENDS:=@(TARGET_ipq807x)
FILES:=$(PKG_BUILD_DIR)/build/bin/qca-ssdk.ko
AUTOLOAD:=$(call AutoLoad,30,qca-ssdk)
endef
define KernelPackage/qca-ssdk-nohnat/Description
This package contains a qca-ssdk driver for QCA chipset
endef
GCC_VERSION=$(shell echo "$(CONFIG_GCC_VERSION)" | sed 's/[^0-9.]*\([0-9.]*\).*/\1/')
ifdef CONFIG_TOOLCHAIN_BIN_PATH
TOOLCHAIN_BIN_PATH=$(CONFIG_TOOLCHAIN_BIN_PATH)
else
TOOLCHAIN_BIN_PATH=$(TOOLCHAIN_DIR)/bin
endif
MAKE_FLAGS+= \
TARGET_NAME=$(CONFIG_TARGET_NAME) \
TOOL_PATH=$(TOOLCHAIN_BIN_PATH) \
SYS_PATH=$(LINUX_DIR) \
TOOLPREFIX=$(TARGET_CROSS) \
KVER=$(LINUX_VERSION) \
ARCH=$(LINUX_KARCH) \
TARGET_SUFFIX=$(CONFIG_TARGET_SUFFIX) \
GCC_VERSION=$(GCC_VERSION) \
EXTRA_CFLAGS=-I$(STAGING_DIR)/usr/include \
$(KERNEL_MAKE_FLAGS)
ifneq (, $(findstring $(CONFIG_TARGET_BOARD), "ipq60xx" "ipq807x"))
MAKE_FLAGS+= PTP_FEATURE=disable SWCONFIG_FEATURE=disable
endif
ifeq ($(CONFIG_TARGET_BOARD), "ipq807x")
MAKE_FLAGS+= CHIP_TYPE=HPPE
else ifeq ($(CONFIG_TARGET_BOARD), "ipq60xx")
MAKE_FLAGS+= CHIP_TYPE=CPPE
endif
define Build/InstallDev
$(INSTALL_DIR) $(1)/usr/include/qca-ssdk
$(INSTALL_DIR) $(1)/usr/include/qca-ssdk/api
$(INSTALL_DIR) $(1)/usr/include/qca-ssdk/ref
$(INSTALL_DIR) $(1)/usr/include/qca-ssdk/fal
$(INSTALL_DIR) $(1)/usr/include/qca-ssdk/sal
$(INSTALL_DIR) $(1)/usr/include/qca-ssdk/init
$(CP) -rf $(PKG_BUILD_DIR)/include/api/sw_ioctl.h $(1)/usr/include/qca-ssdk/api
if [ -f $(PKG_BUILD_DIR)/include/ref/ref_vsi.h ]; then \
$(CP) -rf $(PKG_BUILD_DIR)/include/ref/ref_vsi.h $(1)/usr/include/qca-ssdk/ref/; \
fi
if [ -f $(PKG_BUILD_DIR)/include/ref/ref_fdb.h ]; then \
$(CP) -rf $(PKG_BUILD_DIR)/include/ref/ref_fdb.h $(1)/usr/include/qca-ssdk/ref/; \
fi
if [ -f $(PKG_BUILD_DIR)/include/ref/ref_port_ctrl.h ]; then \
$(CP) -rf $(PKG_BUILD_DIR)/include/ref/ref_port_ctrl.h $(1)/usr/include/qca-ssdk/ref/; \
fi
if [ -f $(PKG_BUILD_DIR)/include/init/ssdk_init.h ]; then \
$(CP) -rf $(PKG_BUILD_DIR)/include/init/ssdk_init.h $(1)/usr/include/qca-ssdk/init/; \
fi
$(CP) -rf $(PKG_BUILD_DIR)/include/fal $(1)/usr/include/qca-ssdk
$(CP) -rf $(PKG_BUILD_DIR)/include/common/*.h $(1)/usr/include/qca-ssdk
$(CP) -rf $(PKG_BUILD_DIR)/include/sal/os/linux/*.h $(1)/usr/include/qca-ssdk
$(CP) -rf $(PKG_BUILD_DIR)/include/sal/os/*.h $(1)/usr/include/qca-ssdk
endef
define KernelPackage/qca-ssdk-nohnat/install
$(INSTALL_DIR) $(1)/etc/init.d
$(INSTALL_BIN) ./files/qca-ssdk $(1)/etc/init.d/qca-ssdk
endef
$(eval $(call KernelPackage,qca-ssdk-nohnat))

206
package/nss/qca/qca-ssdk/files/qca-ssdk Executable file
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@ -0,0 +1,206 @@
#!/bin/sh /etc/rc.common
# Copyright (c) 2018, The Linux Foundation. All rights reserved.
#
# Permission to use, copy, modify, and/or distribute this software for any
# purpose with or without fee is hereby granted, provided that the above
# copyright notice and this permission notice appear in all copies.
#
# THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
# WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
# MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
# ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
# WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
# ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
# OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
#
START=16
#!/bin/sh
ruletype="ip4 ip6"
side="wan lan"
qwan="1 3 2 0 5 7 6 4"
qlan="0 1 2 3 4 5 6 7"
function create_war_acl_rules(){
for lw in $side
do
#echo $lw
if [ "$lw" == "wan" ];then
listid=254
queue=$qwan
portmap=0x20
else
listid=255
queue=$qlan
portmap=0x1e
fi
#echo $queue
#echo "creating list $listid"
ssdk_sh acl list create $listid 255
ruleid=0
for rt in $ruletype
do
for qid in $queue
do
cmd="ssdk_sh acl rule add $listid $ruleid 1 n 0 0"
#echo $cmd
if [ "$rt" == "ip4" ];then
cmd="$cmd ip4 n n n n n n n n n n n n n n n n n n n n n n n n n n n n n"
#echo $cmd
else
cmd="$cmd ip6 n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n n"
#echo $cmd
fi
if [ $ruleid -le 3 ];then
#non-zero dscp
cmd="$cmd y 0x0 0xff"
elif [ $ruleid -le 7 ];then
#zero dscp
cmd="$cmd n"
elif [ $ruleid -le 11 ];then
#non-zero dscp
cmd="$cmd y 0x0 0xff"
else
#zero dscp
cmd="$cmd n"
fi
p=$((ruleid/2))
cmd="$cmd y mask $((ruleid%2)) 0x1 y mask $((p%2)) 0x1 n n n n n n n n n n n n n n n y n n n n n n n y $qid n n 0 0 n n n n n n n n n n n n n n n n n n n n 0"
#echo $cmd
$cmd
ruleid=`expr $ruleid + 1`
done
done
ssdk_sh acl list bind $listid 0 1 $portmap
done
}
function create_war_cosmap(){
ssdk_sh cosmap pri2q set 0 0
ssdk_sh cosmap pri2q set 1 0
ssdk_sh cosmap pri2q set 2 0
ssdk_sh cosmap pri2q set 3 0
ssdk_sh cosmap pri2q set 4 1
ssdk_sh cosmap pri2q set 5 1
ssdk_sh cosmap pri2q set 6 1
ssdk_sh cosmap pri2q set 7 1
ssdk_sh cosmap pri2ehq set 0 0
ssdk_sh cosmap pri2ehq set 1 0
ssdk_sh cosmap pri2ehq set 2 0
ssdk_sh cosmap pri2ehq set 3 0
ssdk_sh cosmap pri2ehq set 4 1
ssdk_sh cosmap pri2ehq set 5 1
ssdk_sh cosmap pri2ehq set 6 1
ssdk_sh cosmap pri2ehq set 7 1
}
function create_acl_byp_egstp_rules(){
ssdk_sh debug module_func set servcode 0xf 0x0 0x0
ssdk_sh servcode config set 1 n 0 0xfffefc7f 0xffbdff 0 0 0 0 0 0
ssdk_sh debug module_func set servcode 0x0 0x0 0x0
ssdk_sh acl list create 56 48
ssdk_sh acl rule add 56 0 1 n 0 0 mac n n n n n y 01-80-c2-00-00-00 ff-ff-ff-ff-ff-ff n n n n n n n n n n n n n n n n n n n n n n n y n n n n n n n n n n 0 0 n n n n n n n n n n n n n y n n n n n n n n n n n n y n n n n n n n n n n n n 0
ssdk_sh acl rule add 56 1 1 n 0 0 mac n n n n n n n yes 0x8809 0xffff n n n n n n n n n n n n n n n n n n n n n y n n n n n n n n n n 0 0 n n n n n n n n n n n n n y n n n n n n n n n n n n y n n n n n n n n n n n n 0
ssdk_sh acl rule add 56 2 1 n 0 0 mac n n n n n n n yes 0x888e 0xffff n n n n n n n n n n n n n n n n n n n n n y n n n n n n n n n n 0 0 n n n n n n n n n n n n n y n n n n n n n n n n n n y n n n n n n n n n n n n 0
ssdk_sh acl list bind 56 0 2 1
}
function delete_war_acl_rules(){
for lw in $side
do
#echo $lw
if [ "$lw" == "wan" ];then
listid=254
queue=$qwan
portmap=0x20
else
listid=255
queue=$qlan
portmap=0x1e
fi
ssdk_sh acl list unbind $listid 0 1 $portmap
for rt in $ruletype
do
for qid in $queue
do
cmd="ssdk_sh acl rule del $listid 0 1"
echo $cmd
$cmd
done
done
#echo "deleting list $listid"
ssdk_sh acl list destroy $listid
done
}
function delete_war_cosmap(){
ssdk_sh cosmap pri2q set 0 0
ssdk_sh cosmap pri2q set 1 0
ssdk_sh cosmap pri2q set 2 1
ssdk_sh cosmap pri2q set 3 1
ssdk_sh cosmap pri2q set 4 2
ssdk_sh cosmap pri2q set 5 2
ssdk_sh cosmap pri2q set 6 3
ssdk_sh cosmap pri2q set 7 3
ssdk_sh cosmap pri2ehq set 0 1
ssdk_sh cosmap pri2ehq set 1 0
ssdk_sh cosmap pri2ehq set 2 2
ssdk_sh cosmap pri2ehq set 3 2
ssdk_sh cosmap pri2ehq set 4 3
ssdk_sh cosmap pri2ehq set 5 3
ssdk_sh cosmap pri2ehq set 6 4
ssdk_sh cosmap pri2ehq set 7 5
}
function delete_acl_byp_egstp_rules(){
ssdk_sh debug module_func set servcode 0xf 0x0 0x0
ssdk_sh servcode config set 1 n 0 0xfffefcff 0xffbfff 0 0 0 0 0 0
ssdk_sh debug module_func set servcode 0x0 0x0 0x0
ssdk_sh acl list unbind 56 0 2 1
ssdk_sh acl rule del 56 0 1
ssdk_sh acl rule del 56 1 1
ssdk_sh acl rule del 56 2 1
ssdk_sh acl list destroy 56
}
function edma_war_config_add(){
create_war_cosmap
ssdk_sh acl status set enable
create_war_acl_rules
}
function edma_war_config_del(){
delete_war_acl_rules
delete_war_cosmap
}
start() {
chip_ver=`ssdk_sh debug reg get 0 4 | grep Data | tr -d 'SSDK Init OK![Data]:'`
#The following commands should be uncommented to enable EDMA WAR
if [ "$chip_ver" = "0x1401" ]; then
#edma_war_config_add
echo ''
fi
#The following commands should be uncommented to add acl egress stp bypass rules
if [ "$chip_ver" = "0x1500" ] || [ "$chip_ver" = "0x1501" ]; then
#create_acl_byp_egstp_rules
echo ''
fi
echo starting
}
stop() {
chip_ver=`ssdk_sh debug reg get 0 4 | grep Data | tr -d 'SSDK Init OK![Data]:'`
#The following commands should be uncommented to disable EDMA WAR
if [ "$chip_ver" = "0x1401" ]; then
#edma_war_config_del
echo ''
fi
#The following commands should be uncommented to delete acl egress stp bypass rules
if [ "$chip_ver" = "0x1500" ] || [ "$chip_ver" = "0x1501" ]; then
#delete_acl_byp_egstp_rules
echo ''
fi
echo stoping
}

56
package/nss/qca/qca-ssdk/patches/0001-SSDK-config-add-kernel-5.10.patch Normal file
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@ -0,0 +1,56 @@
From 472c0c8132784608312c80c4b02c03ea7c132235 Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Wed, 12 May 2021 13:41:12 +0200
Subject: [PATCH] SSDK: config: add kernel 5.10
This is purely to identify it and be able to set
flags correctly.
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
config | 6 +++++-
make/linux_opt.mk | 4 ++--
2 files changed, 7 insertions(+), 3 deletions(-)
--- a/config
+++ b/config
@@ -22,6 +22,10 @@ ifeq ($(KVER),$(filter 5.4%,$(KVER)))
OS_VER=5_4
endif
+ifeq ($(KVER),$(filter 5.10%,$(KVER)))
+OS_VER=5_10
+endif
+
ifeq ($(KVER), 3.4.0)
OS_VER=3_4
endif
@@ -123,7 +127,7 @@ endif
endif
ifeq ($(ARCH), arm64)
-ifeq ($(KVER),$(filter 4.1% 4.4% 4.9% 5.4%,$(KVER)))
+ifeq ($(KVER),$(filter 4.1% 4.4% 4.9% 5.4% 5.10%,$(KVER)))
CPU_CFLAG= -DMODULE -Os -pipe -march=armv8-a -mcpu=cortex-a53+crypto -fno-caller-saves -fno-strict-aliasing -Werror -fno-common -Wno-format-security -Wno-pointer-sign -Wno-unused-but-set-variable -Wno-error=unused-result -mcmodel=large
endif
endif
--- a/make/linux_opt.mk
+++ b/make/linux_opt.mk
@@ -388,7 +388,7 @@ ifeq (KSLIB, $(MODULE_TYPE))
KASAN_SHADOW_SCALE_SHIFT := 3
endif
- ifeq (5_4, $(OS_VER))
+ ifeq ($(OS_VER),$(filter 5_4 5_10, $(OS_VER)))
ifeq ($(ARCH), arm64)
KASAN_OPTION += -DKASAN_SHADOW_SCALE_SHIFT=$(KASAN_SHADOW_SCALE_SHIFT)
endif
@@ -419,7 +419,7 @@ ifeq (KSLIB, $(MODULE_TYPE))
endif
- ifeq ($(OS_VER),$(filter 4_4 5_4, $(OS_VER)))
+ ifeq ($(OS_VER),$(filter 4_4 5_4 5_10, $(OS_VER)))
MODULE_CFLAG += -DKVER34
MODULE_CFLAG += -DKVER32
MODULE_CFLAG += -DLNX26_22

102
package/nss/qca/qca-ssdk/patches/0002-SSDK-replace-ioremap_nocache-with-ioremap.patch Normal file
View File

@ -0,0 +1,102 @@
From 784f2cfdfaf3bdf44917924e157049230a0ef5f8 Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Wed, 12 May 2021 13:45:45 +0200
Subject: [PATCH] SSDK: replace ioremap_nocache with ioremap
ioremap_nocache was dropped upstream, simply use the
generic variety.
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
src/init/ssdk_clk.c | 10 +++++-----
src/init/ssdk_init.c | 2 +-
src/init/ssdk_plat.c | 6 +++---
3 files changed, 9 insertions(+), 9 deletions(-)
--- a/src/init/ssdk_clk.c
+++ b/src/init/ssdk_clk.c
@@ -623,7 +623,7 @@ ssdk_mp_tcsr_get(a_uint32_t tcsr_offset,
{
void __iomem *tcsr_base = NULL;
- tcsr_base = ioremap_nocache(TCSR_ETH_ADDR, TCSR_ETH_SIZE);
+ tcsr_base = ioremap(TCSR_ETH_ADDR, TCSR_ETH_SIZE);
if (!tcsr_base)
{
SSDK_ERROR("Failed to map tcsr eth address!\n");
@@ -640,7 +640,7 @@ ssdk_mp_tcsr_set(a_uint32_t tcsr_offset,
{
void __iomem *tcsr_base = NULL;
- tcsr_base = ioremap_nocache(TCSR_ETH_ADDR, TCSR_ETH_SIZE);
+ tcsr_base = ioremap(TCSR_ETH_ADDR, TCSR_ETH_SIZE);
if (!tcsr_base)
{
SSDK_ERROR("Failed to map tcsr eth address!\n");
@@ -688,7 +688,7 @@ ssdk_mp_cmnblk_stable_check(void)
a_uint32_t reg_val;
int i, loops = 20;
- pll_lock = ioremap_nocache(CMN_PLL_LOCKED_ADDR, CMN_PLL_LOCKED_SIZE);
+ pll_lock = ioremap(CMN_PLL_LOCKED_ADDR, CMN_PLL_LOCKED_SIZE);
if (!pll_lock) {
SSDK_ERROR("Failed to map CMN PLL LOCK register!\n");
return A_FALSE;
@@ -745,7 +745,7 @@ static void ssdk_cmnblk_pll_src_set(enum
void __iomem *cmn_pll_src_base = NULL;
a_uint32_t reg_val;
- cmn_pll_src_base = ioremap_nocache(CMN_BLK_PLL_SRC_ADDR, CMN_BLK_SIZE);
+ cmn_pll_src_base = ioremap(CMN_BLK_PLL_SRC_ADDR, CMN_BLK_SIZE);
if (!cmn_pll_src_base) {
SSDK_ERROR("Failed to map cmn pll source address!\n");
return;
@@ -766,7 +766,7 @@ static void ssdk_cmnblk_init(enum cmnblk
void __iomem *gcc_pll_base = NULL;
a_uint32_t reg_val;
- gcc_pll_base = ioremap_nocache(CMN_BLK_ADDR, CMN_BLK_SIZE);
+ gcc_pll_base = ioremap(CMN_BLK_ADDR, CMN_BLK_SIZE);
if (!gcc_pll_base) {
SSDK_ERROR("Failed to map gcc pll address!\n");
return;
--- a/src/init/ssdk_init.c
+++ b/src/init/ssdk_init.c
@@ -2770,7 +2770,7 @@ static int ssdk_dess_mac_mode_init(a_uin
(a_uint8_t *)&reg_value, 4);
mdelay(10);
/*softreset psgmii, fixme*/
- gcc_addr = ioremap_nocache(0x1812000, 0x200);
+ gcc_addr = ioremap(0x1812000, 0x200);
if (!gcc_addr) {
SSDK_ERROR("gcc map fail!\n");
return 0;
--- a/src/init/ssdk_plat.c
+++ b/src/init/ssdk_plat.c
@@ -1312,7 +1312,7 @@ ssdk_plat_init(ssdk_init_cfg *cfg, a_uin
reg_mode = ssdk_uniphy_reg_access_mode_get(dev_id);
if(reg_mode == HSL_REG_LOCAL_BUS) {
ssdk_uniphy_reg_map_info_get(dev_id, &map);
- qca_phy_priv_global[dev_id]->uniphy_hw_addr = ioremap_nocache(map.base_addr,
+ qca_phy_priv_global[dev_id]->uniphy_hw_addr = ioremap(map.base_addr,
map.size);
if (!qca_phy_priv_global[dev_id]->uniphy_hw_addr) {
SSDK_ERROR("%s ioremap fail.", __func__);
@@ -1327,7 +1327,7 @@ ssdk_plat_init(ssdk_init_cfg *cfg, a_uin
reg_mode = ssdk_switch_reg_access_mode_get(dev_id);
if(reg_mode == HSL_REG_LOCAL_BUS) {
ssdk_switch_reg_map_info_get(dev_id, &map);
- qca_phy_priv_global[dev_id]->hw_addr = ioremap_nocache(map.base_addr,
+ qca_phy_priv_global[dev_id]->hw_addr = ioremap(map.base_addr,
map.size);
if (!qca_phy_priv_global[dev_id]->hw_addr) {
SSDK_ERROR("%s ioremap fail.", __func__);
@@ -1358,7 +1358,7 @@ ssdk_plat_init(ssdk_init_cfg *cfg, a_uin
return -1;
}
- qca_phy_priv_global[dev_id]->psgmii_hw_addr = ioremap_nocache(map.base_addr,
+ qca_phy_priv_global[dev_id]->psgmii_hw_addr = ioremap(map.base_addr,
map.size);
if (!qca_phy_priv_global[dev_id]->psgmii_hw_addr) {
SSDK_ERROR("%s ioremap fail.", __func__);

40
package/nss/qca/qca-ssdk/patches/0004-platform-use-of_mdio_find_bus-to-get-MDIO-bus.patch Normal file
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@ -0,0 +1,40 @@
From b6190ca46287d01a895c7cc14de30410c09ff1b8 Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Wed, 12 May 2021 17:15:46 +0200
Subject: [PATCH] SSDK: platform: use of_mdio_find_bus() to get MDIO bus
Kernel has a generic of_mdio_find_bus() which can get the appropriate
MDIO bus based on the DT node.
So, drop the getting MDIO from platform data, which no longer works
in 5.4 and later and use of_mdio_find_bus().
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
src/init/ssdk_plat.c | 8 +-------
1 file changed, 1 insertion(+), 7 deletions(-)
--- a/src/init/ssdk_plat.c
+++ b/src/init/ssdk_plat.c
@@ -551,7 +551,6 @@ static int miibus_get(a_uint32_t dev_id)
struct device_node *mdio_node = NULL;
struct device_node *switch_node = NULL;
struct platform_device *mdio_plat = NULL;
- struct ipq40xx_mdio_data *mdio_data = NULL;
struct qca_phy_priv *priv;
hsl_reg_mode reg_mode = HSL_REG_LOCAL_BUS;
priv = qca_phy_priv_global[dev_id];
@@ -584,12 +583,7 @@ static int miibus_get(a_uint32_t dev_id)
if(reg_mode == HSL_REG_LOCAL_BUS)
{
- mdio_data = dev_get_drvdata(&mdio_plat->dev);
- if (!mdio_data) {
- SSDK_ERROR("cannot get mdio_data reference from device data\n");
- return 1;
- }
- priv->miibus = mdio_data->mii_bus;
+ priv->miibus = of_mdio_find_bus(mdio_node);
}
else
priv->miibus = dev_get_drvdata(&mdio_plat->dev);

12
target/linux/ipq807x/Makefile
View File

@ -2,13 +2,19 @@ include $(TOPDIR)/rules.mk
ARCH:=aarch64
BOARD:=ipq807x
BOARDNAME:=Qualcomm Atheros IPQ807x
FEATURES:=squashfs ramdisk source-only
BOARDNAME:=Qualcomm IPQ807x
FEATURES:=squashfs ramdisk fpu nand source-only
KERNELNAME:=Image dtbs
CPU_TYPE:=cortex-a53
SUBTARGETS:=generic
KERNEL_PATCHVER:=5.4
KERNEL_PATCHVER:=5.10
include $(INCLUDE_DIR)/target.mk
DEFAULT_PACKAGES += \
kmod-usb3 kmod-usb-dwc3 kmod-usb-dwc3-qcom \
kmod-leds-gpio kmod-gpio-button-hotplug \
ath11k-firmware-ipq8074 kmod-ath11k-ahb \
wpad-basic-wolfssl kmod-qca-nss-dp
$(eval $(call BuildTarget))

33
target/linux/ipq807x/base-files/etc/board.d/02_network Normal file
View File

@ -0,0 +1,33 @@
#
# Copyright (c) 2015 The Linux Foundation. All rights reserved.
# Copyright (c) 2011-2015 OpenWrt.org
#
. /lib/functions/uci-defaults.sh
. /lib/functions/system.sh
ipq807x_setup_interfaces()
{
local board="$1"
case "$board" in
netgear,sxr80|\
xiaomi,ax9000)
ucidef_set_interfaces_lan_wan "eth0 eth1 eth2 eth3" "eth4"
;;
redmi,ax6|\
xiaomi,ax3600)
ucidef_set_interfaces_lan_wan "eth1 eth2 eth3" "eth0"
;;
*)
echo "Unsupported hardware. Network interfaces not initialized"
;;
esac
}
board_config_update
board=$(board_name)
ipq807x_setup_interfaces $board
board_config_flush
exit 0

27
target/linux/ipq807x/base-files/etc/hotplug.d/firmware/11-ath10k-caldata Normal file
View File

@ -0,0 +1,27 @@
#!/bin/sh
[ -e /lib/firmware/$FIRMWARE ] && exit 0
. /lib/functions/caldata.sh
board=$(board_name)
case "$FIRMWARE" in
"ath10k/cal-pci-0000:01:00.0.bin")
case "$board" in
xiaomi,ax3600)
caldata_extract "0:art" 0x33000 0x844
;;
esac
;;
"ath10k/cal-pci-0001:01:00.0.bin")
case "$board" in
xiaomi,ax9000)
caldata_extract "0:art" 0x4d000 0x844
;;
esac
;;
*)
exit 1
;;
esac

18
target/linux/ipq807x/base-files/etc/hotplug.d/firmware/11-ath11k-caldata
View File

@ -1,4 +1,4 @@
#!/bin/sh -x
#!/bin/sh
[ -e /lib/firmware/$FIRMWARE ] && exit 0
@ -7,10 +7,20 @@
board=$(board_name)
case "$FIRMWARE" in
"IPQ8074/caldata.bin")
"ath11k/IPQ8074/hw2.0/caldata.bin")
case "$board" in
xiaomi,ax3600)
caldata_extract "0:ART" 0x1000 0x20000
netgear,sxr80|\
redmi,ax6|\
xiaomi,ax3600|\
xiaomi,ax9000)
caldata_extract "0:art" 0x1000 0x20000
;;
esac
;;
"ath11k/QCN9074/hw1.0/caldata.bin")
case "$board" in
xiaomi,ax9000)
caldata_extract "0:art" 0x26800 0x20000
;;
esac
;;

3
target/linux/ipq807x/base-files/etc/init.d/bootcount
View File

@ -4,6 +4,7 @@ START=99
boot() {
case $(board_name) in
redmi,ax6|\
xiaomi,ax3600)
# OTA handling should not be used. Reset it just in case.
fw_setenv flag_ota_reboot 0
@ -11,4 +12,4 @@ boot() {
fw_setenv flag_boot_success 1
;;
esac
}
}

5
target/linux/ipq807x/base-files/etc/inittab
View File

@ -1,5 +0,0 @@
# Copyright (c) 2013 The Linux Foundation. All rights reserved.
::sysinit:/etc/init.d/rcS S boot
::shutdown:/etc/init.d/rcS K shutdown
ttyMSM0::askfirst:/usr/libexec/login.sh
ttyMSM1::askfirst:/usr/libexec/login.sh

6
target/linux/ipq807x/base-files/lib/upgrade/platform.sh Executable file → Normal file
View File

@ -10,7 +10,9 @@ platform_check_image() {
platform_do_upgrade() {
case "$(board_name)" in
xiaomi,ax3600)
redmi,ax6|\
xiaomi,ax3600|\
xiaomi,ax9000)
part_num="$(fw_printenv -n flag_boot_rootfs)"
if [ "$part_num" -eq "0" ]; then
CI_UBIPART="rootfs_1"
@ -40,4 +42,4 @@ platform_do_upgrade() {
default_do_upgrade "$1"
;;
esac
}
}

434
target/linux/ipq807x/config-5.4 → target/linux/ipq807x/config-5.10
View File

@ -1,36 +1,7 @@
CONFIG_64BIT=y
# CONFIG_ALLOW_DEV_COREDUMP is not set
# CONFIG_APQ_GCC_8084 is not set
# CONFIG_APQ_MMCC_8084 is not set
CONFIG_AQUANTIA_PHY=y
CONFIG_ARCH_CLOCKSOURCE_DATA=y
CONFIG_ARCH_DMA_ADDR_T_64BIT=y
CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
CONFIG_ARCH_ENABLE_SPLIT_PMD_PTLOCK=y
CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y
CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y
CONFIG_ARCH_HAS_DMA_COHERENT_TO_PFN=y
CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y
CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
CONFIG_ARCH_HAS_FAST_MULTIPLIER=y
CONFIG_ARCH_HAS_FORTIFY_SOURCE=y
CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
CONFIG_ARCH_HAS_GIGANTIC_PAGE=y
CONFIG_ARCH_HAS_KCOV=y
CONFIG_ARCH_HAS_KEEPINITRD=y
CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y
CONFIG_ARCH_HAS_PTE_DEVMAP=y
CONFIG_ARCH_HAS_PTE_SPECIAL=y
CONFIG_ARCH_HAS_SETUP_DMA_OPS=y
CONFIG_ARCH_HAS_SET_DIRECT_MAP=y
CONFIG_ARCH_HAS_SET_MEMORY=y
CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y
CONFIG_ARCH_HAS_STRICT_MODULE_RWX=y
CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y
CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y
CONFIG_ARCH_HAS_SYSCALL_WRAPPER=y
CONFIG_ARCH_HAS_TICK_BROADCAST=y
CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_KEEP_MEMBLOCK=y
CONFIG_ARCH_MMAP_RND_BITS=18
@ -40,209 +11,140 @@ CONFIG_ARCH_MMAP_RND_COMPAT_BITS=11
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11
CONFIG_ARCH_PROC_KCORE_TEXT=y
CONFIG_ARCH_QCOM=y
CONFIG_ARCH_RANDOM=y
CONFIG_ARCH_SELECT_MEMORY_MODEL=y
CONFIG_ARCH_SPARSEMEM_DEFAULT=y
CONFIG_ARCH_SPARSEMEM_ENABLE=y
CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
CONFIG_ARCH_SUPPORTS_INT128=y
CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y
CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y
CONFIG_ARCH_SUPPORTS_UPROBES=y
CONFIG_ARCH_STACKWALK=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y
CONFIG_ARCH_USE_MEMREMAP_PROT=y
CONFIG_ARCH_USE_QUEUED_RWLOCKS=y
CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y
CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y
CONFIG_ARCH_WANT_DEFAULT_TOPDOWN_MMAP_LAYOUT=y
CONFIG_ARCH_WANT_FRAME_POINTERS=y
CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y
CONFIG_ARCH_USES_HIGH_VMA_FLAGS=y
CONFIG_ARM64=y
CONFIG_ARM64_4K_PAGES=y
CONFIG_ARM64_AMU_EXTN=y
CONFIG_ARM64_BTI=y
CONFIG_ARM64_CNP=y
CONFIG_ARM64_CONT_SHIFT=4
CONFIG_ARM64_CRYPTO=y
CONFIG_ARM64_E0PD=y
CONFIG_ARM64_ERRATUM_1165522=y
CONFIG_ARM64_ERRATUM_1286807=y
CONFIG_ARM64_ERRATUM_1418040=y
CONFIG_ARM64_ERRATUM_819472=y
CONFIG_ARM64_ERRATUM_824069=y
CONFIG_ARM64_ERRATUM_826319=y
CONFIG_ARM64_ERRATUM_827319=y
CONFIG_ARM64_ERRATUM_832075=y
CONFIG_ARM64_ERRATUM_843419=y
CONFIG_ARM64_ERRATUM_845719=y
CONFIG_ARM64_HW_AFDBM=y
CONFIG_ARM64_MODULE_PLTS=y
CONFIG_ARM64_MTE=y
CONFIG_ARM64_PAGE_SHIFT=12
CONFIG_ARM64_PAN=y
CONFIG_ARM64_PA_BITS=48
CONFIG_ARM64_PA_BITS_48=y
CONFIG_ARM64_PTR_AUTH=y
CONFIG_ARM64_SSBD=y
CONFIG_ARM64_RAS_EXTN=y
CONFIG_ARM64_SVE=y
CONFIG_ARM64_TAGGED_ADDR_ABI=y
CONFIG_ARM64_UAO=y
CONFIG_ARM64_TLB_RANGE=y
CONFIG_ARM64_VA_BITS=39
CONFIG_ARM64_VA_BITS_39=y
CONFIG_ARM64_VHE=y
CONFIG_ARM64_WORKAROUND_CLEAN_CACHE=y
CONFIG_ARM64_WORKAROUND_REPEAT_TLBI=y
CONFIG_ARM64_WORKAROUND_SPECULATIVE_AT=y
# CONFIG_ARMV8_DEPRECATED is not set
CONFIG_ARM_AMBA=y
CONFIG_ARM_ARCH_TIMER=y
CONFIG_ARM_ARCH_TIMER_EVTSTREAM=y
CONFIG_ARM_CCI=y
CONFIG_ARM_CCI400_COMMON=y
CONFIG_ARM_CCI400_PMU=y
CONFIG_ARM_CCI_PMU=y
CONFIG_ARM_CPUIDLE=y
CONFIG_ARM_GIC=y
CONFIG_ARM_GIC_V2M=y
CONFIG_ARM_GIC_V3=y
CONFIG_ARM_GIC_V3_ITS=y
CONFIG_ARM_GIC_V3_ITS_PCI=y
CONFIG_ARM_PMU=y
CONFIG_ARM_PSCI_CPUIDLE=y
CONFIG_ARM_PSCI_FW=y
# CONFIG_ARM_QCOM_CPUFREQ_HW is not set
# CONFIG_ARM_QCOM_CPUFREQ_NVMEM is not set
# CONFIG_ARM_SCMI_PROTOCOL is not set
CONFIG_ASN1=y
CONFIG_ASSOCIATIVE_ARRAY=y
CONFIG_ASYMMETRIC_KEY_TYPE=y
CONFIG_ASYMMETRIC_PUBLIC_KEY_SUBTYPE=y
CONFIG_AT803X_PHY=y
CONFIG_ARM_SMCCC_SOC_ID=y
CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y
CONFIG_BLK_DEV_RAM=y
CONFIG_BLK_DEV_RAM_COUNT=16
CONFIG_BLK_DEV_RAM_SIZE=4096
CONFIG_BLK_DEV_LOOP=y
CONFIG_BLK_MQ_PCI=y
CONFIG_BLK_MQ_VIRTIO=y
CONFIG_BLK_PM=y
CONFIG_BLOCK_COMPAT=y
CONFIG_CAVIUM_TX2_ERRATUM_219=y
CONFIG_CC_HAS_KASAN_GENERIC=y
# CONFIG_CC_OPTIMIZE_FOR_PERFORMANCE is not set
CONFIG_CC_OPTIMIZE_FOR_SIZE=y
CONFIG_CLEANCACHE=y
CONFIG_CLKDEV_LOOKUP=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_CLZ_TAB=y
CONFIG_COMMON_CLK=y
CONFIG_COMMON_CLK_QCOM=y
CONFIG_COMPAT=y
CONFIG_COMPAT_32BIT_TIME=y
# CONFIG_COMPAT_32BIT_TIME is not set
CONFIG_COMPAT_BINFMT_ELF=y
CONFIG_COMPAT_NETLINK_MESSAGES=y
CONFIG_COMPAT_OLD_SIGACTION=y
CONFIG_CONFIGFS_FS=y
CONFIG_COREDUMP=y
CONFIG_CORESIGHT=y
# CONFIG_CORESIGHT_CATU is not set
# CONFIG_CORESIGHT_CPU_DEBUG is not set
CONFIG_CORESIGHT_LINKS_AND_SINKS=y
CONFIG_CORESIGHT_LINK_AND_SINK_TMC=y
# CONFIG_CORESIGHT_SINK_ETBV10 is not set
CONFIG_CORESIGHT_SINK_TPIU=y
CONFIG_CORESIGHT_SOURCE_ETM4X=y
CONFIG_CORESIGHT_STM=y
CONFIG_CPUFREQ_DT=y
CONFIG_CPUFREQ_DT_PLATDEV=y
CONFIG_CPU_FREQ=y
CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y
CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND=y
# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
CONFIG_CPU_FREQ_GOV_ATTR_SET=y
CONFIG_CPU_FREQ_GOV_COMMON=y
CONFIG_CPU_FREQ_GOV_CONSERVATIVE=y
# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
CONFIG_CPU_FREQ_GOV_ONDEMAND=y
CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
CONFIG_CPU_FREQ_GOV_POWERSAVE=y
CONFIG_CPU_FREQ_GOV_USERSPACE=y
CONFIG_CPU_FREQ_STAT=y
# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set
# CONFIG_CPU_FREQ_GOV_USERSPACE is not set
# CONFIG_CPU_FREQ_STAT is not set
CONFIG_CPU_FREQ_THERMAL=y
CONFIG_CPU_IDLE=y
CONFIG_CPU_IDLE_GOV_LADDER=y
CONFIG_CPU_IDLE_GOV_MENU=y
CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=y
CONFIG_CPU_PM=y
CONFIG_CPU_RMAP=y
# CONFIG_CPU_THERMAL is not set
CONFIG_CPU_THERMAL=y
CONFIG_CRC16=y
# CONFIG_CRC32_SARWATE is not set
CONFIG_CRC32_SLICEBY8=y
CONFIG_CROSS_MEMORY_ATTACH=y
CONFIG_CRYPTO_ACOMP2=y
CONFIG_CRYPTO_AEAD=y
CONFIG_CRYPTO_AEAD2=y
CONFIG_CRYPTO_AKCIPHER=y
CONFIG_CRYPTO_AKCIPHER2=y
CONFIG_CRYPTO_ARC4=y
CONFIG_CRYPTO_CCM=y
CONFIG_CRYPTO_CMAC=y
CONFIG_CRYPTO_CRC32C=y
CONFIG_CRYPTO_CBC=y
CONFIG_CRYPTO_CTR=y
CONFIG_CRYPTO_DEFLATE=y
CONFIG_CRYPTO_DEV_QCE=y
CONFIG_CRYPTO_DEV_QCE_ENABLE_ALL=y
# CONFIG_CRYPTO_DEV_QCE_ENABLE_SHA is not set
# CONFIG_CRYPTO_DEV_QCE_ENABLE_SKCIPHER is not set
CONFIG_CRYPTO_DEV_QCE_SHA=y
CONFIG_CRYPTO_DEV_QCE_SKCIPHER=y
CONFIG_CRYPTO_DEV_QCE_SW_MAX_LEN=512
CONFIG_CRYPTO_DEV_QCOM_RNG=y
CONFIG_CRYPTO_DRBG=y
CONFIG_CRYPTO_DRBG_HMAC=y
CONFIG_CRYPTO_DRBG_MENU=y
CONFIG_CRYPTO_ECHAINIV=y
CONFIG_CRYPTO_GCM=y
CONFIG_CRYPTO_GF128MUL=y
CONFIG_CRYPTO_GHASH=y
CONFIG_CRYPTO_ECB=y
CONFIG_CRYPTO_HASH=y
CONFIG_CRYPTO_HASH2=y
CONFIG_CRYPTO_HASH_INFO=y
CONFIG_CRYPTO_HMAC=y
CONFIG_CRYPTO_HW=y
CONFIG_CRYPTO_JITTERENTROPY=y
CONFIG_CRYPTO_KPP2=y
CONFIG_CRYPTO_LIB_DES=y
CONFIG_CRYPTO_LIB_SHA256=y
CONFIG_CRYPTO_LZO=y
CONFIG_CRYPTO_MANAGER=y
CONFIG_CRYPTO_MANAGER2=y
# CONFIG_CRYPTO_MANAGER_DISABLE_TESTS is not set
# CONFIG_CRYPTO_MANAGER_EXTRA_TESTS is not set
CONFIG_CRYPTO_NULL=y
CONFIG_CRYPTO_NULL2=y
CONFIG_CRYPTO_RNG=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_RNG_DEFAULT=y
CONFIG_CRYPTO_SEQIV=y
CONFIG_CRYPTO_SHA1=y
CONFIG_CRYPTO_SHA256=y
CONFIG_CRYPTO_SHA512=y
CONFIG_CRYPTO_XTS=y
CONFIG_CRYPTO_ZSTD=y
CONFIG_DCACHE_WORD_ACCESS=y
CONFIG_DEBUG_BUGVERBOSE=y
CONFIG_DEBUG_GPIO=y
CONFIG_DECOMPRESS_GZIP=y
CONFIG_DEVMEM=y
CONFIG_DEV_COREDUMP=y
CONFIG_DMADEVICES=y
CONFIG_DMA_DIRECT_REMAP=y
CONFIG_DMA_ENGINE=y
CONFIG_DMA_OF=y
CONFIG_DMA_REMAP=y
CONFIG_DMA_VIRTUAL_CHANNELS=y
CONFIG_DRM_RCAR_WRITEBACK=y
CONFIG_DTC=y
CONFIG_DT_IDLE_STATES=y
CONFIG_DYNAMIC_DEBUG=y
CONFIG_EDAC_SUPPORT=y
CONFIG_EFI_EARLYCON=y
CONFIG_EXT4_FS=y
# CONFIG_EXT4_USE_FOR_EXT2 is not set
CONFIG_FB=y
CONFIG_FB_CMDLINE=y
CONFIG_ETHTOOL_NETLINK=y
CONFIG_FIXED_PHY=y
CONFIG_FIX_EARLYCON_MEM=y
# CONFIG_FLATMEM_MANUAL is not set
CONFIG_FONT_8x16=y
CONFIG_FONT_AUTOSELECT=y
CONFIG_FONT_SUPPORT=y
CONFIG_FRAME_POINTER=y
CONFIG_FRAME_WARN=2048
CONFIG_FREEZER=y
CONFIG_FS_IOMAP=y
CONFIG_FS_MBCACHE=y
CONFIG_FUJITSU_ERRATUM_010001=y
CONFIG_FW_LOADER_PAGED_BUF=y
CONFIG_GENERIC_ALLOCATOR=y
@ -258,7 +160,6 @@ CONFIG_GENERIC_EARLY_IOREMAP=y
CONFIG_GENERIC_GETTIMEOFDAY=y
CONFIG_GENERIC_IDLE_POLL_SETUP=y
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
CONFIG_GENERIC_IRQ_MIGRATION=y
CONFIG_GENERIC_IRQ_MULTI_HANDLER=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
@ -278,172 +179,108 @@ CONFIG_GLOB=y
CONFIG_GPIOLIB=y
CONFIG_GPIOLIB_IRQCHIP=y
CONFIG_HANDLE_DOMAIN_IRQ=y
CONFIG_HARDEN_BRANCH_PREDICTOR=y
CONFIG_HARDIRQS_SW_RESEND=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT_MAP=y
CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y
CONFIG_HAVE_ARCH_AUDITSYSCALL=y
CONFIG_HAVE_ARCH_BITREVERSE=y
CONFIG_HAVE_ARCH_HUGE_VMAP=y
CONFIG_HAVE_ARCH_JUMP_LABEL=y
CONFIG_HAVE_ARCH_JUMP_LABEL_RELATIVE=y
CONFIG_HAVE_ARCH_KASAN=y
CONFIG_HAVE_ARCH_KASAN_SW_TAGS=y
CONFIG_HAVE_ARCH_KGDB=y
CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y
CONFIG_HAVE_ARCH_PFN_VALID=y
CONFIG_HAVE_ARCH_PREL32_RELOCATIONS=y
CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
CONFIG_HAVE_ARCH_STACKLEAK=y
CONFIG_HAVE_ARCH_THREAD_STRUCT_WHITELIST=y
CONFIG_HAVE_ARCH_TRACEHOOK=y
CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y
CONFIG_HAVE_ARCH_VMAP_STACK=y
CONFIG_HAVE_ARM_SMCCC=y
CONFIG_HAVE_ASM_MODVERSIONS=y
CONFIG_HAVE_CLK=y
CONFIG_HAVE_CLK_PREPARE=y
CONFIG_HAVE_CMPXCHG_DOUBLE=y
CONFIG_HAVE_CMPXCHG_LOCAL=y
CONFIG_HAVE_CONTEXT_TRACKING=y
CONFIG_HAVE_COPY_THREAD_TLS=y
CONFIG_HAVE_C_RECORDMCOUNT=y
CONFIG_HAVE_DEBUG_BUGVERBOSE=y
CONFIG_HAVE_DEBUG_KMEMLEAK=y
CONFIG_HAVE_DMA_CONTIGUOUS=y
CONFIG_HAVE_DYNAMIC_FTRACE=y
CONFIG_HAVE_EBPF_JIT=y
CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
CONFIG_HAVE_FAST_GUP=y
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
CONFIG_HAVE_FUNCTION_ARG_ACCESS_API=y
CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
CONFIG_HAVE_FUNCTION_TRACER=y
CONFIG_HAVE_GENERIC_VDSO=y
CONFIG_HAVE_HW_BREAKPOINT=y
CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
CONFIG_HAVE_MEMORY_PRESENT=y
CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
CONFIG_HAVE_NET_DSA=y
CONFIG_HAVE_PATA_PLATFORM=y
CONFIG_HAVE_PCI=y
CONFIG_HAVE_PERF_EVENTS=y
CONFIG_HAVE_PERF_REGS=y
CONFIG_HAVE_PERF_USER_STACK_DUMP=y
CONFIG_HAVE_RCU_TABLE_FREE=y
CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
CONFIG_HAVE_RSEQ=y
CONFIG_HAVE_SCHED_AVG_IRQ=y
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
CONFIG_HAVE_UID16=y
CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
CONFIG_HOLES_IN_ZONE=y
CONFIG_HOTPLUG_CPU=y
CONFIG_HWSPINLOCK=y
CONFIG_HWSPINLOCK_QCOM=y
CONFIG_HW_RANDOM=y
CONFIG_HZ=250
# CONFIG_HZ_100 is not set
CONFIG_HZ_250=y
CONFIG_HZ_PERIODIC=y
CONFIG_I2C=y
CONFIG_I2C_BOARDINFO=y
CONFIG_I2C_CHARDEV=y
CONFIG_I2C_COMPAT=y
CONFIG_I2C_HELPER_AUTO=y
# CONFIG_I2C_QCOM_CCI is not set
CONFIG_I2C_QUP=y
CONFIG_IIO=y
CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000
CONFIG_INITRAMFS_SOURCE=""
# CONFIG_IPQ_APSS_6018 is not set
CONFIG_IPQ_APSS_8074=y
# CONFIG_IPQ_APSS_PLL is not set
# CONFIG_IPQ_GCC_4019 is not set
# CONFIG_IPQ_GCC_6018 is not set
# CONFIG_IPQ_GCC_806X is not set
CONFIG_IPQ_GCC_8074=y
# CONFIG_IPQ_LCC_806X is not set
CONFIG_IRQCHIP=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_DOMAIN_HIERARCHY=y
CONFIG_IRQ_FASTEOI_HIERARCHY_HANDLERS=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_TIME_ACCOUNTING=y
CONFIG_IRQ_WORK=y
CONFIG_JBD2=y
CONFIG_KEYS=y
CONFIG_KEYS_COMPAT=y
# CONFIG_KPSS_XCC is not set
# CONFIG_KVM is not set
CONFIG_LEDS_TLC591XX=y
CONFIG_LIBFDT=y
CONFIG_LLD_VERSION=0
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_LOCK_SPIN_ON_OWNER=y
CONFIG_LZO_COMPRESS=y
CONFIG_LZO_DECOMPRESS=y
CONFIG_MAILBOX=y
# CONFIG_MAILBOX_TEST is not set
CONFIG_MDIO_BITBANG=y
CONFIG_MDIO_BUS=y
CONFIG_MDIO_DEVICE=y
CONFIG_MDIO_GPIO=y
CONFIG_MDIO_DEVRES=y
CONFIG_MDIO_IPQ4019=y
# CONFIG_MDM_GCC_9615 is not set
# CONFIG_MDM_LCC_9615 is not set
CONFIG_MEMFD_CREATE=y
CONFIG_MFD_QCOM_RPM=y
# CONFIG_MFD_HI6421_SPMI is not set
# CONFIG_MFD_QCOM_RPM is not set
CONFIG_MFD_SPMI_PMIC=y
CONFIG_MFD_SYSCON=y
CONFIG_MHI_BUS=y
CONFIG_MHI_BUS_DEBUG=y
CONFIG_MIGRATION=y
CONFIG_MMC=y
CONFIG_MMC_ARMMMCI=y
CONFIG_MMC_BLOCK=y
CONFIG_MMC_BLOCK_MINORS=32
CONFIG_MMC_QCOM_DML=y
CONFIG_MMC_CQHCI=y
CONFIG_MMC_SDHCI=y
CONFIG_MMC_SDHCI_IO_ACCESSORS=y
CONFIG_MMC_SDHCI_MSM=y
# CONFIG_MMC_SDHCI_PCI is not set
CONFIG_MMC_SDHCI_PLTFM=y
# CONFIG_MMC_TIFM_SD is not set
CONFIG_MODULES_TREE_LOOKUP=y
CONFIG_MODULES_USE_ELF_RELA=y
CONFIG_MPILIB=y
# CONFIG_MSM_GCC_8660 is not set
# CONFIG_MSM_GCC_8916 is not set
# CONFIG_MSM_GCC_8939 is not set
# CONFIG_MSM_GCC_8960 is not set
# CONFIG_MSM_GCC_8974 is not set
# CONFIG_MSM_GCC_8994 is not set
# CONFIG_MSM_GCC_8996 is not set
# CONFIG_MSM_GCC_8998 is not set
# CONFIG_MSM_GPUCC_8998 is not set
# CONFIG_MSM_LCC_8960 is not set
# CONFIG_MSM_MMCC_8960 is not set
# CONFIG_MSM_MMCC_8974 is not set
# CONFIG_MSM_MMCC_8996 is not set
CONFIG_MTD_CMDLINE_PARTS=y
# CONFIG_MSM_MMCC_8998 is not set
CONFIG_MTD_NAND_CORE=y
CONFIG_MTD_NAND_ECC=y
CONFIG_MTD_NAND_ECC_SW_HAMMING=y
CONFIG_MTD_NAND_QCOM=y
CONFIG_MTD_QCOMSMEM_PARTS=y
CONFIG_MTD_RAW_NAND=y
CONFIG_MTD_SPI_NOR=y
CONFIG_MTD_SPLIT_FIRMWARE=y
CONFIG_MTD_SPLIT_FIT_FW=y
CONFIG_MTD_UBI=y
CONFIG_MTD_UBI_BEB_LIMIT=20
CONFIG_MTD_UBI_BLOCK=y
# CONFIG_MTD_UBI_FASTMAP is not set
CONFIG_MTD_UBI_GLUEBI=y
CONFIG_MTD_UBI_WL_THRESHOLD=4096
CONFIG_MUTEX_SPIN_ON_OWNER=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_SG_DMA_LENGTH=y
CONFIG_NET_FLOW_LIMIT=y
CONFIG_NET_PTP_CLASSIFY=y
CONFIG_NET_SWITCHDEV=y
# CONFIG_NET_VENDOR_CAVIUM is not set
CONFIG_NLS=y
CONFIG_NO_HZ=y
CONFIG_NO_HZ_COMMON=y
CONFIG_NO_HZ_IDLE=y
CONFIG_NR_CPUS=4
CONFIG_NR_CPUS=256
CONFIG_NVMEM=y
# CONFIG_OCTEONTX2_AF is not set
# CONFIG_NVMEM_SPMI_SDAM is not set
CONFIG_NVMEM_SYSFS=y
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_EARLY_FLATTREE=y
@ -453,94 +290,90 @@ CONFIG_OF_IRQ=y
CONFIG_OF_KOBJ=y
CONFIG_OF_MDIO=y
CONFIG_OF_NET=y
CONFIG_OID_REGISTRY=y
CONFIG_OLD_SIGSUSPEND3=y
CONFIG_PADATA=y
CONFIG_PANIC_TIMEOUT=5
CONFIG_PARTITION_PERCPU=y
CONFIG_PCI=y
# CONFIG_PCIE_AL is not set
CONFIG_PCIEASPM=y
CONFIG_PCIEASPM_DEFAULT=y
# CONFIG_PCIEASPM_PERFORMANCE is not set
# CONFIG_PCIEASPM_POWERSAVE is not set
# CONFIG_PCIEASPM_POWER_SUPERSAVE is not set
CONFIG_PCIEPORTBUS=y
CONFIG_PCIE_DW=y
CONFIG_PCIE_DW_HOST=y
CONFIG_PCIE_PME=y
CONFIG_PCIE_QCOM=y
CONFIG_PCI_DOMAINS=y
CONFIG_PCI_DOMAINS_GENERIC=y
CONFIG_PCI_MSI=y
CONFIG_PCI_MSI_IRQ_DOMAIN=y
CONFIG_PERF_EVENTS=y
CONFIG_PGTABLE_LEVELS=3
CONFIG_PHYLIB=y
CONFIG_PHYS_ADDR_T_64BIT=y
# CONFIG_PHY_QCOM_APQ8064_SATA is not set
# CONFIG_PHY_QCOM_IPQ4019_USB is not set
# CONFIG_PHY_QCOM_IPQ806X_SATA is not set
# CONFIG_PHY_QCOM_IPQ806X_USB is not set
# CONFIG_PHY_QCOM_PCIE2 is not set
CONFIG_PHY_QCOM_QMP=y
CONFIG_PHY_QCOM_QUSB2=y
# CONFIG_PHY_QCOM_UFS is not set
CONFIG_PID_IN_CONTEXTIDR=y
# CONFIG_PHY_QCOM_USB_HS_28NM is not set
# CONFIG_PHY_QCOM_USB_SNPS_FEMTO_V2 is not set
# CONFIG_PHY_QCOM_USB_SS is not set
CONFIG_PINCTRL=y
# CONFIG_PINCTRL_APQ8064 is not set
# CONFIG_PINCTRL_APQ8084 is not set
# CONFIG_PINCTRL_IPQ4019 is not set
# CONFIG_PINCTRL_IPQ6018 is not set
# CONFIG_PINCTRL_IPQ8064 is not set
CONFIG_PINCTRL_IPQ8074=y
# CONFIG_PINCTRL_MDM9615 is not set
CONFIG_PINCTRL_MSM=y
# CONFIG_PINCTRL_MSM8226 is not set
# CONFIG_PINCTRL_MSM8660 is not set
# CONFIG_PINCTRL_MSM8916 is not set
# CONFIG_PINCTRL_MSM8960 is not set
# CONFIG_PINCTRL_MSM8976 is not set
# CONFIG_PINCTRL_MSM8994 is not set
# CONFIG_PINCTRL_MSM8996 is not set
# CONFIG_PINCTRL_MSM8998 is not set
CONFIG_PINCTRL_QCOM_SPMI_PMIC=y
# CONFIG_PINCTRL_QCOM_SPMI_PMIC is not set
# CONFIG_PINCTRL_QCOM_SSBI_PMIC is not set
# CONFIG_PINCTRL_QCS404 is not set
# CONFIG_PINCTRL_SC7180 is not set
# CONFIG_PINCTRL_SDM660 is not set
# CONFIG_PINCTRL_SDM845 is not set
# CONFIG_PINCTRL_SM8150 is not set
# CONFIG_PKCS8_PRIVATE_KEY_PARSER is not set
# CONFIG_PINCTRL_SM8250 is not set
CONFIG_PM=y
# CONFIG_PM8916_WATCHDOG is not set
CONFIG_PM_CLK=y
CONFIG_PM_OPP=y
CONFIG_PM_SLEEP=y
CONFIG_PM_SLEEP_SMP=y
CONFIG_POWER_RESET=y
CONFIG_POWER_RESET_MSM=y
# CONFIG_POWER_RESET_QCOM_PON is not set
CONFIG_POWER_SUPPLY=y
CONFIG_PPS=y
CONFIG_PREEMPT=y
CONFIG_PREEMPTION=y
CONFIG_PREEMPT_COUNT=y
# CONFIG_PREEMPT_NONE is not set
CONFIG_PREEMPT_RCU=y
CONFIG_PRINTK_TIME=y
CONFIG_PROC_PAGE_MONITOR=y
# CONFIG_PROC_STRIPPED is not set
CONFIG_PTP_1588_CLOCK=y
CONFIG_PWM=y
CONFIG_PWM_SYSFS=y
CONFIG_QCOM_A53PLL=y
# CONFIG_QCOM_A53PLL is not set
# CONFIG_QCOM_AOSS_QMP is not set
CONFIG_QCOM_APCS_IPC=y
# CONFIG_QCOM_APR is not set
CONFIG_QCOM_BAM_DMA=y
# CONFIG_QCOM_CLK_APCC_MSM8996 is not set
# CONFIG_QCOM_CLK_APCS_MSM8916 is not set
# CONFIG_QCOM_CLK_RPM is not set
# CONFIG_QCOM_CLK_RPMH is not set
# CONFIG_QCOM_CLK_SMD_RPM is not set
# CONFIG_QCOM_COINCELL is not set
# CONFIG_QCOM_COMMAND_DB is not set
# CONFIG_QCOM_CPR is not set
CONFIG_QCOM_EBI2=y
# CONFIG_QCOM_FASTRPC is not set
# CONFIG_QCOM_GENI_SE is not set
CONFIG_QCOM_GLINK_SSR=y
# CONFIG_QCOM_GSBI is not set
# CONFIG_QCOM_HFPLL is not set
# CONFIG_QCOM_IPCC is not set
# CONFIG_QCOM_LLCC is not set
CONFIG_QCOM_MDT_LOADER=y
# CONFIG_QCOM_OCMEM is not set
# CONFIG_QCOM_PDC is not set
CONFIG_QCOM_PIL_INFO=y
# CONFIG_QCOM_Q6V5_ADSP is not set
@ -551,53 +384,48 @@ CONFIG_QCOM_Q6V5_WCSS=y
CONFIG_QCOM_QFPROM=y
CONFIG_QCOM_QMI_HELPERS=y
# CONFIG_QCOM_RMTFS_MEM is not set
CONFIG_QCOM_RPMH=y
CONFIG_QCOM_RPMPD=y
# CONFIG_QCOM_RPMH is not set
CONFIG_QCOM_RPROC_COMMON=y
CONFIG_QCOM_SCM=y
CONFIG_QCOM_SCM_64=y
# CONFIG_QCOM_SCM_DOWNLOAD_MODE_DEFAULT is not set
CONFIG_QCOM_SMD_RPM=y
# CONFIG_QCOM_SMD_RPM is not set
CONFIG_QCOM_SMEM=y
CONFIG_QCOM_SMEM_STATE=y
CONFIG_QCOM_SMP2P=y
# CONFIG_QCOM_SMSM is not set
CONFIG_QCOM_SOCINFO=y
CONFIG_QCOM_SPMI_VADC=y
CONFIG_QCOM_SYSMON=y
# CONFIG_QCOM_SYSMON is not set
CONFIG_QCOM_TSENS=y
CONFIG_QCOM_VADC_COMMON=y
CONFIG_QCOM_WCNSS_CTRL=y
CONFIG_QCOM_WCNSS_PIL=y
# CONFIG_QCOM_WCNSS_CTRL is not set
# CONFIG_QCOM_WCNSS_PIL is not set
CONFIG_QCOM_WDT=y
# CONFIG_QCS_GCC_404 is not set
# CONFIG_QCS_Q6SSTOP_404 is not set
# CONFIG_QCS_TURING_404 is not set
CONFIG_QRTR=y
CONFIG_QRTR_MHI=y
CONFIG_QRTR_SMD=y
# CONFIG_QRTR_TUN is not set
CONFIG_QRTR_TUN=y
CONFIG_QUEUED_RWLOCKS=y
CONFIG_QUEUED_SPINLOCKS=y
CONFIG_RANDOMIZE_BASE=y
CONFIG_RANDOMIZE_MODULE_REGION_FULL=y
CONFIG_RATIONAL=y
CONFIG_RCU_CPU_STALL_TIMEOUT=21
# CONFIG_RCU_EXPERT is not set
CONFIG_RCU_NEED_SEGCBLIST=y
CONFIG_RCU_STALL_COMMON=y
CONFIG_RD_GZIP=y
CONFIG_REFCOUNT_FULL=y
CONFIG_REGMAP=y
CONFIG_REGMAP_I2C=y
CONFIG_REGMAP_MMIO=y
CONFIG_REGMAP_SPI=y
CONFIG_REGMAP_SPMI=y
CONFIG_REGULATOR=y
CONFIG_REGULATOR_FIXED_VOLTAGE=y
CONFIG_REGULATOR_GPIO=y
CONFIG_REGULATOR_QCOM_RPM=y
CONFIG_REGULATOR_QCOM_RPMH=y
CONFIG_REGULATOR_QCOM_SMD_RPM=y
# CONFIG_REGULATOR_QCOM_LABIBB is not set
CONFIG_REGULATOR_QCOM_SPMI=y
CONFIG_RELAY=y
# CONFIG_REGULATOR_QCOM_USB_VBUS is not set
# CONFIG_REGULATOR_VQMMC_IPQ4019 is not set
CONFIG_RELOCATABLE=y
CONFIG_REMOTEPROC=y
CONFIG_REMOTEPROC_CDEV=y
CONFIG_RESET_CONTROLLER=y
# CONFIG_RESET_QCOM_AOSS is not set
# CONFIG_RESET_QCOM_PDC is not set
@ -605,15 +433,20 @@ CONFIG_RFS_ACCEL=y
CONFIG_RODATA_FULL_DEFAULT_ENABLED=y
CONFIG_RPMSG=y
CONFIG_RPMSG_CHAR=y
CONFIG_RPMSG_QCOM_GLINK_NATIVE=y
CONFIG_RPMSG_QCOM_GLINK=y
CONFIG_RPMSG_QCOM_GLINK_RPM=y
CONFIG_RPMSG_QCOM_GLINK_SMEM=y
CONFIG_RPMSG_QCOM_SMD=y
CONFIG_RPS=y
CONFIG_RTC_CLASS=y
# CONFIG_RTC_DRV_PM8XXX is not set
CONFIG_RTC_I2C_AND_SPI=y
CONFIG_RWSEM_SPIN_ON_OWNER=y
CONFIG_SCHED_MC=y
CONFIG_SCHED_THERMAL_PRESSURE=y
# CONFIG_SC_DISPCC_7180 is not set
# CONFIG_SC_GCC_7180 is not set
# CONFIG_SC_GPUCC_7180 is not set
# CONFIG_SC_LPASS_CORECC_7180 is not set
# CONFIG_SC_MSS_7180 is not set
# CONFIG_SC_VIDEOCC_7180 is not set
# CONFIG_SDM_CAMCC_845 is not set
# CONFIG_SDM_DISPCC_845 is not set
# CONFIG_SDM_GCC_660 is not set
@ -621,92 +454,61 @@ CONFIG_RWSEM_SPIN_ON_OWNER=y
# CONFIG_SDM_GPUCC_845 is not set
# CONFIG_SDM_LPASSCC_845 is not set
# CONFIG_SDM_VIDEOCC_845 is not set
# CONFIG_SERIAL_8250 is not set
CONFIG_SERIAL_8250_FSL=y
CONFIG_SERIAL_MCTRL_GPIO=y
CONFIG_SERIAL_MSM=y
CONFIG_SERIAL_MSM_CONSOLE=y
CONFIG_SGL_ALLOC=y
CONFIG_SMP=y
# CONFIG_SM_GCC_8150 is not set
CONFIG_SND=y
# CONFIG_SND_COMPRESS_OFFLOAD is not set
CONFIG_SND_JACK=y
CONFIG_SND_PCM=y
CONFIG_SND_SOC=y
# CONFIG_SND_SOC_APQ8016_SBC is not set
CONFIG_SND_SOC_I2C_AND_SPI=y
CONFIG_SND_SOC_QCOM=y
# CONFIG_SND_SOC_STORM is not set
# CONFIG_SM_GCC_8250 is not set
# CONFIG_SM_GPUCC_8150 is not set
# CONFIG_SM_GPUCC_8250 is not set
# CONFIG_SM_VIDEOCC_8150 is not set
# CONFIG_SM_VIDEOCC_8250 is not set
CONFIG_SOC_BUS=y
CONFIG_SOUND=y
CONFIG_SOUND_OSS_CORE=y
CONFIG_SOUND_OSS_CORE_PRECLAIM=y
CONFIG_SPARSEMEM=y
CONFIG_SPARSEMEM_EXTREME=y
CONFIG_SPARSEMEM_MANUAL=y
CONFIG_SPARSEMEM_VMEMMAP=y
CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y
CONFIG_SPARSE_IRQ=y
CONFIG_SPI=y
CONFIG_SPI_MASTER=y
CONFIG_SPI_MEM=y
CONFIG_SPI_QUP=y
CONFIG_SPI_SPIDEV=y
CONFIG_SPMI=y
# CONFIG_SPMI_HISI3670 is not set
CONFIG_SPMI_MSM_PMIC_ARB=y
# CONFIG_SPMI_PMIC_CLKDIV is not set
CONFIG_SRCU=y
# CONFIG_STAGING is not set
CONFIG_STM=y
# CONFIG_STM_PROTO_BASIC is not set
# CONFIG_STM_PROTO_SYS_T is not set
# CONFIG_STM_SOURCE_HEARTBEAT is not set
# CONFIG_STRIP_ASM_SYMS is not set
CONFIG_SUSPEND=y
CONFIG_SUSPEND_FREEZER=y
# CONFIG_SWAP is not set
CONFIG_SWCONFIG=y
CONFIG_SWIOTLB=y
CONFIG_SWPHY=y
CONFIG_SYSCTL_EXCEPTION_TRACE=y
CONFIG_SYSVIPC_COMPAT=y
CONFIG_SYS_SUPPORTS_HUGETLBFS=y
CONFIG_TASKS_RCU=y
CONFIG_THERMAL=y
CONFIG_THERMAL_DEFAULT_GOV_STEP_WISE=y
CONFIG_THERMAL_EMERGENCY_POWEROFF_DELAY_MS=0
CONFIG_THERMAL_GOV_STEP_WISE=y
CONFIG_THERMAL_GOV_USER_SPACE=y
CONFIG_THERMAL_NETLINK=y
CONFIG_THERMAL_OF=y
CONFIG_THERMAL_WRITABLE_TRIPS=y
CONFIG_THREAD_INFO_IN_TASK=y
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_TIMER_OF=y
CONFIG_TIMER_PROBE=y
CONFIG_TREE_RCU=y
CONFIG_TREE_SRCU=y
# CONFIG_UACCE is not set
CONFIG_UBIFS_FS=y
CONFIG_UBIFS_FS_ADVANCED_COMPR=y
CONFIG_UBIFS_FS_LZO=y
CONFIG_UBIFS_FS_ZLIB=y
CONFIG_UBIFS_FS_ZSTD=y
CONFIG_UEVENT_HELPER_PATH=""
CONFIG_UNINLINE_SPIN_UNLOCK=y
CONFIG_UNMAP_KERNEL_AT_EL0=y
CONFIG_USB=y
CONFIG_USB_COMMON=y
CONFIG_USB_SUPPORT=y
CONFIG_VIRTIO=y
# CONFIG_VIRTIO_BLK is not set
# CONFIG_VIRTIO_CONSOLE is not set
# CONFIG_VIRTIO_NET is not set
CONFIG_VIRTUALIZATION=y
CONFIG_VMAP_STACK=y
CONFIG_VM_EVENT_COUNTERS=y
CONFIG_WANT_DEV_COREDUMP=y
CONFIG_WATCHDOG_CORE=y
# CONFIG_WQ_POWER_EFFICIENT_DEFAULT is not set
CONFIG_X509_CERTIFICATE_PARSER=y
CONFIG_XPS=y
CONFIG_XXHASH=y
CONFIG_XZ_DEC_ARM=y
CONFIG_XZ_DEC_BCJ=y
CONFIG_ZLIB_DEFLATE=y
CONFIG_ZLIB_INFLATE=y
CONFIG_ZONE_DMA32=y

243
target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8071-ax3600.dts
View File

@ -1,262 +1,71 @@
// SPDX-License-Identifier: GPL-2.0-only
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/* Copyright (c) 2021, Robert Marko <robimarko@gmail.com> */
/dts-v1/;
#include "ipq8074.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "ipq8071-ax3600.dtsi"
/ {
#address-cells = <0x2>;
#size-cells = <0x2>;
model = "Xiaomi Mi AIoT Router AX3600";
model = "Xiaomi AX3600";
compatible = "xiaomi,ax3600", "qcom,ipq8074";
interrupt-parent = <&intc>;
aliases {
serial0 = &blsp1_uart5;
serial1 = &blsp1_uart3;
led-boot = &led_system_yellow;
led-failsafe = &led_system_yellow;
led-running = &led_system_blue;
led-upgrade = &led_system_yellow;
};
chosen {
stdout-path = "serial0:115200n8";
bootargs-append = " swiotlb=1";
};
reserved-memory {
ranges;
#address-cells = <0x2>;
#size-cells = <0x2>;
tz@4ac00000 {
reg = <0x0 0x4ac00000 0x0 0x400000>;
no-map;
};
wcnss@4b000000 {
reg = <0x0 0x4b000000 0x0 0x3700000>;
no-map;
};
rsvd2@50b00000 {
reg = <0x0 0x50b00000 0x0 0x400000>;
no-map;
};
wifi_dump@50500000 {
reg = <0x0 0x50500000 0x0 0x200000>;
no-map;
};
rsvd1@50700000 {
reg = <0x0 0x50700000 0x0 0x400000>;
no-map;
};
q6_etr_dump@4e700000 {
reg = <0x0 0x4e700000 0x0 0x100000>;
no-map;
};
sbl@4aa00000 {
reg = <0x0 0x4aa00000 0x0 0x100000>;
no-map;
};
uboot@4a600000 {
reg = <0x0 0x4a600000 0x0 0x400000>;
no-map;
};
nss@40000000 {
reg = <0x0 0x40000000 0x0 0x1000000>;
no-map;
};
};
keys {
compatible = "gpio-keys";
pinctrl-0 = <&button_pins>;
pinctrl-names = "default";
reset {
label = "reset";
gpios = <&tlmm 34 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-0 = <&led_pins>;
pinctrl-names = "default";
led_system_blue: system-blue {
label = "ax3600:blue:system";
label = "blue:system";
gpios = <&tlmm 42 GPIO_ACTIVE_HIGH>;
};
led_system_yellow: system-yellow {
label = "ax3600:yellow:system";
label = "yellow:system";
gpios = <&tlmm 43 GPIO_ACTIVE_HIGH>;
};
network-yellow {
label = "ax3600:yellow:network";
label = "yellow:network";
gpios = <&tlmm 22 GPIO_ACTIVE_HIGH>;
};
network-blue {
label = "ax3600:blue:network";
label = "blue:network";
gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>;
};
aiot {
label = "ax3600:blue:aiot";
label = "blue:aiot";
gpios = <&tlmm 51 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "phy0tpt";
};
};
};
&blsp1_uart3 {
&qmp_pcie_phy0 {
status = "okay";
};
&blsp1_uart5 {
status = "okay";
};
&qpic_bam {
status = "okay";
};
&qpic_nand {
&pcie0 {
status = "okay";
nand@0 {
reg = <0>;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
nand-bus-width = <8>;
perst-gpio = <&tlmm 52 GPIO_ACTIVE_HIGH>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
bridge@0,0 {
reg = <0x00000000 0 0 0 0>;
#address-cells = <3>;
#size-cells = <2>;
ranges;
partition@0 {
label = "0:SBL1";
reg = <0x00000000 0x100000>;
read-only;
};
wifi0: wifi@1,0 {
status = "okay";
partition@100000 {
label = "0:MIBIB";
reg = <0x00100000 0x100000>;
read-only;
};
compatible = "qcom,ath10k";
reg = <0x00010000 0 0 0 0>;
partition@200000 {
label = "0:QSEE";
reg = <0x00200000 0x300000>;
read-only;
};
partition@500000 {
label = "0:DEVCFG";
reg = <0x00500000 0x80000>;
read-only;
};
partition@580000 {
label = "0:RPM";
reg = <0x00580000 0x80000>;
read-only;
};
partition@600000 {
label = "0:CDT";
reg = <0x00600000 0x80000>;
read-only;
};
partition@680000 {
label = "0:APPSBLENV";
reg = <0x00680000 0x80000>;
};
partition@700000 {
label = "0:APPSBL";
reg = <0x00700000 0x100000>;
read-only;
};
partition@800000 {
label = "0:ART";
reg = <0x00800000 0x80000>;
read-only;
};
partition@880000 {
label = "bdata";
reg = <0x00880000 0x80000>;
read-only;
};
partition@900000 {
label = "crash";
reg = <0x00900000 0x80000>;
read-only;
};
partition@980000 {
label = "crash_syslog";
reg = <0x00980000 0x80000>;
read-only;
};
partition@a00000 {
label = "rootfs";
reg = <0x00a00000 0x23c0000>;
};
partition@2dc0000 {
label = "rootfs_1";
reg = <0x02dc0000 0x23c0000>;
};
partition@5180000 {
label = "overlay";
reg = <0x05180000 0x1ec0000>;
};
partition@7040000 {
label = "rsvd0";
reg = <0x07040000 0x80000>;
};
qcom,ath10k-calibration-variant = "Xiaomi-AX3600";
};
};
};
&wifi0 {
status = "okay";
};
&tlmm {
button_pins: button-pins {
pins = "gpio34";
function = "gpio";
bias-pull-up;
drive-strength = <8>;
};
led_pins: led-pins {
pins = "gpio21", "gpio22", "gpio42", "gpio43", "gpio51";
function = "gpio";
bias-pull-down;
drive-strength = <8>;
};
&wifi {
qcom,ath11k-calibration-variant = "Xiaomi-AX3600";
};

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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/* Copyright (c) 2021, Robert Marko <robimarko@gmail.com> */
#include "ipq8074.dtsi"
#include "ipq8074-ac-cpu.dtsi"
#include "ipq8074-ac-nss.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
#address-cells = <2>;
#size-cells = <2>;
interrupt-parent = <&intc>;
aliases {
serial0 = &blsp1_uart5;
led-boot = &led_system_yellow;
led-failsafe = &led_system_yellow;
led-running = &led_system_blue;
led-upgrade = &led_system_yellow;
/* Aliases as required by u-boot to patch MAC addresses */
ethernet1 = &dp2;
ethernet2 = &dp3;
ethernet3 = &dp4;
ethernet4 = &dp5;
label-mac-device = &dp2;
};
chosen {
stdout-path = "serial0:115200n8";
bootargs-append = " root=/dev/ubiblock0_1";
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&tlmm 34 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
};
};
&tlmm {
mdio_pins: mdio-pins {
mdc {
pins = "gpio68";
function = "mdc";
drive-strength = <8>;
bias-pull-up;
};
mdio {
pins = "gpio69";
function = "mdio";
drive-strength = <8>;
bias-pull-up;
};
};
};
&blsp1_uart5 {
status = "okay";
};
&prng {
status = "okay";
};
&cryptobam {
status = "okay";
};
&crypto {
status = "okay";
};
&qpic_bam {
status = "okay";
};
&qpic_nand {
status = "okay";
nand@0 {
reg = <0>;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
nand-bus-width = <8>;
partitions {
compatible = "qcom,smem-part";
};
};
};
&mdio {
status = "okay";
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
/*
* Disable the reset GPIO temporarely as it
* resets the 100Mbit LED configuration which
* the bootloader writes.
*/
//reset-gpios = <&tlmm 37 GPIO_ACTIVE_LOW>;
ethernet-phy@1 {
reg = <1>;
};
ethernet-phy@2 {
reg = <2>;
};
ethernet-phy@3 {
reg = <3>;
};
ethernet-phy@4 {
reg = <4>;
};
};
&ess_switch {
switch_cpu_bmp = <0x1>; /* cpu port bitmap */
switch_lan_bmp = <0x1e>; /* lan port bitmap */
switch_wan_bmp = <0x20>; /* wan port bitmap */
switch_mac_mode = <0x0>; /* mac mode for uniphy instance0*/
switch_mac_mode1 = <0xff>; /* mac mode for uniphy instance1*/
switch_mac_mode2 = <0xff>; /* mac mode for uniphy instance2*/
bm_tick_mode = <0>; /* bm tick mode */
tm_tick_mode = <0>; /* tm tick mode */
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <0>;
};
port@1 {
port_id = <2>;
phy_address = <1>;
};
port@2 {
port_id = <3>;
phy_address = <2>;
};
port@3 {
port_id = <4>;
phy_address = <3>;
};
port@4 {
port_id = <5>;
phy_address = <4>;
};
};
port_scheduler_resource {
port@0 {
port_id = <0>;
ucast_queue = <0 143>;
mcast_queue = <256 271>;
l0sp = <0 35>;
l0cdrr = <0 47>;
l0edrr = <0 47>;
l1cdrr = <0 7>;
l1edrr = <0 7>;
};
port@1 {
port_id = <1>;
ucast_queue = <144 159>;
mcast_queue = <272 275>;
l0sp = <36 39>;
l0cdrr = <48 63>;
l0edrr = <48 63>;
l1cdrr = <8 11>;
l1edrr = <8 11>;
};
port@2 {
port_id = <2>;
ucast_queue = <160 175>;
mcast_queue = <276 279>;
l0sp = <40 43>;
l0cdrr = <64 79>;
l0edrr = <64 79>;
l1cdrr = <12 15>;
l1edrr = <12 15>;
};
port@3 {
port_id = <3>;
ucast_queue = <176 191>;
mcast_queue = <280 283>;
l0sp = <44 47>;
l0cdrr = <80 95>;
l0edrr = <80 95>;
l1cdrr = <16 19>;
l1edrr = <16 19>;
};
port@4 {
port_id = <4>;
ucast_queue = <192 207>;
mcast_queue = <284 287>;
l0sp = <48 51>;
l0cdrr = <96 111>;
l0edrr = <96 111>;
l1cdrr = <20 23>;
l1edrr = <20 23>;
};
port@5 {
port_id = <5>;
ucast_queue = <208 223>;
mcast_queue = <288 291>;
l0sp = <52 55>;
l0cdrr = <112 127>;
l0edrr = <112 127>;
l1cdrr = <24 27>;
l1edrr = <24 27>;
};
port@6 {
port_id = <6>;
ucast_queue = <224 239>;
mcast_queue = <292 295>;
l0sp = <56 59>;
l0cdrr = <128 143>;
l0edrr = <128 143>;
l1cdrr = <28 31>;
l1edrr = <28 31>;
};
port@7 {
port_id = <7>;
ucast_queue = <240 255>;
mcast_queue = <296 299>;
l0sp = <60 63>;
l0cdrr = <144 159>;
l0edrr = <144 159>;
l1cdrr = <32 35>;
l1edrr = <32 35>;
};
};
port_scheduler_config {
port@0 {
port_id = <0>;
l1scheduler {
group@0 {
sp = <0 1>; /*L0 SPs*/
/*cpri cdrr epri edrr*/
cfg = <0 0 0 0>;
};
};
l0scheduler {
group@0 {
/*unicast queues*/
ucast_queue = <0 4 8>;
/*multicast queues*/
mcast_queue = <256 260>;
/*sp cpri cdrr epri edrr*/
cfg = <0 0 0 0 0>;
};
group@1 {
ucast_queue = <1 5 9>;
mcast_queue = <257 261>;
cfg = <0 1 1 1 1>;
};
group@2 {
ucast_queue = <2 6 10>;
mcast_queue = <258 262>;
cfg = <0 2 2 2 2>;
};
group@3 {
ucast_queue = <3 7 11>;
mcast_queue = <259 263>;
cfg = <0 3 3 3 3>;
};
};
};
port@1 {
port_id = <1>;
l1scheduler {
group@0 {
sp = <36>;
cfg = <0 8 0 8>;
};
group@1 {
sp = <37>;
cfg = <1 9 1 9>;
};
};
l0scheduler {
group@0 {
ucast_queue = <144>;
ucast_loop_pri = <16>;
mcast_queue = <272>;
mcast_loop_pri = <4>;
cfg = <36 0 48 0 48>;
};
};
};
port@2 {
port_id = <2>;
l1scheduler {
group@0 {
sp = <40>;
cfg = <0 12 0 12>;
};
group@1 {
sp = <41>;
cfg = <1 13 1 13>;
};
};
l0scheduler {
group@0 {
ucast_queue = <160>;
ucast_loop_pri = <16>;
mcast_queue = <276>;
mcast_loop_pri = <4>;
cfg = <40 0 64 0 64>;
};
};
};
port@3 {
port_id = <3>;
l1scheduler {
group@0 {
sp = <44>;
cfg = <0 16 0 16>;
};
group@1 {
sp = <45>;
cfg = <1 17 1 17>;
};
};
l0scheduler {
group@0 {
ucast_queue = <176>;
ucast_loop_pri = <16>;
mcast_queue = <280>;
mcast_loop_pri = <4>;
cfg = <44 0 80 0 80>;
};
};
};
port@4 {
port_id = <4>;
l1scheduler {
group@0 {
sp = <48>;
cfg = <0 20 0 20>;
};
group@1 {
sp = <49>;
cfg = <1 21 1 21>;
};
};
l0scheduler {
group@0 {
ucast_queue = <192>;
ucast_loop_pri = <16>;
mcast_queue = <284>;
mcast_loop_pri = <4>;
cfg = <48 0 96 0 96>;
};
};
};
port@5 {
port_id = <5>;
l1scheduler {
group@0 {
sp = <52>;
cfg = <0 24 0 24>;
};
group@1 {
sp = <53>;
cfg = <1 25 1 25>;
};
};
l0scheduler {
group@0 {
ucast_queue = <208>;
ucast_loop_pri = <16>;
mcast_queue = <288>;
mcast_loop_pri = <4>;
cfg = <52 0 112 0 112>;
};
};
};
port@6 {
port_id = <6>;
l1scheduler {
group@0 {
sp = <56>;
cfg = <0 28 0 28>;
};
group@1 {
sp = <57>;
cfg = <1 29 1 29>;
};
};
l0scheduler {
group@0 {
ucast_queue = <224>;
ucast_loop_pri = <16>;
mcast_queue = <292>;
mcast_loop_pri = <4>;
cfg = <56 0 128 0 128>;
};
};
};
port@7 {
port_id = <7>;
l1scheduler {
group@0 {
sp = <60>;
cfg = <0 32 0 32>;
};
group@1 {
sp = <61>;
cfg = <1 33 1 33>;
};
};
l0scheduler {
group@0 {
ucast_queue = <240>;
ucast_loop_pri = <16>;
mcast_queue = <296>;
cfg = <60 0 144 0 144>;
};
};
};
};
};
&soc {
dp2: dp2 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <2>;
reg = <0x3a001200 0x200>;
qcom,mactype = <0>;
local-mac-address = [000000000000];
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <1>;
phy-mode = "sgmii";
mdio-bus = <&mdio>;
};
dp3: dp3 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <3>;
reg = <0x3a001400 0x200>;
qcom,mactype = <0>;
local-mac-address = [000000000000];
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <2>;
phy-mode = "sgmii";
mdio-bus = <&mdio>;
};
dp4: dp4 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <4>;
reg = <0x3a001600 0x200>;
qcom,mactype = <0>;
local-mac-address = [000000000000];
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <3>;
phy-mode = "sgmii";
mdio-bus = <&mdio>;
};
dp5: dp5 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <5>;
reg = <0x3a001800 0x200>;
qcom,mactype = <0>;
local-mac-address = [000000000000];
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <4>;
phy-mode = "sgmii";
mdio-bus = <&mdio>;
};
};
&wifi {
status = "okay";
qcom,board_id = <658>;
};

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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/* Copyright (c) 2021, Zhijun You <hujy652@gmail.com> */
/dts-v1/;
#include "ipq8071-ax3600.dtsi"
/ {
model = "Redmi AX6";
compatible = "redmi,ax6", "qcom,ipq8074";
leds {
compatible = "gpio-leds";
led_system_blue: system-blue {
label = "blue:system";
gpios = <&tlmm 21 GPIO_ACTIVE_HIGH>;
};
led_system_yellow: system-yellow {
label = "yellow:system";
gpios = <&tlmm 22 GPIO_ACTIVE_HIGH>;
};
network-blue {
label = "blue:network";
gpios = <&tlmm 42 GPIO_ACTIVE_HIGH>;
};
network-yellow {
label = "yellow:network";
gpios = <&tlmm 43 GPIO_ACTIVE_HIGH>;
};
};
};
&wifi {
qcom,ath11k-calibration-variant = "Redmi-AX6";
};

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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/* Copyright (c) 2021, Robert Marko <robimarko@gmail.com> */
/dts-v1/;
#include "ipq8074.dtsi"
#include "ipq8074-hk-cpu.dtsi"
#include "ipq8074-ac-nss.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/leds/common.h>
/ {
#address-cells = <2>;
#size-cells = <2>;
model = "Xiaomi AX9000";
compatible = "xiaomi,ax9000", "qcom,ipq8074";
interrupt-parent = <&intc>;
aliases {
serial0 = &blsp1_uart5;
led-boot = &led_system_yellow;
led-failsafe = &led_system_yellow;
led-running = &led_system_blue;
led-upgrade = &led_system_yellow;
/* Aliases as required by u-boot to patch MAC addresses */
ethernet0 = &dp1;
ethernet1 = &dp2;
ethernet2 = &dp3;
ethernet3 = &dp4;
ethernet4 = &dp5;
label-mac-device = &dp5;
};
chosen {
stdout-path = "serial0:115200n8";
bootargs-append = " root=/dev/ubiblock0_1";
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&tlmm 47 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
wps {
label = "wps"; /* Labeled Mesh on the device */
gpios = <&tlmm 46 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
};
leds {
compatible = "gpio-leds";
led_system_blue: system-blue {
label = "blue:system";
gpios = <&tlmm 48 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_BLUE>;
};
led_system_yellow: system-yellow {
label = "yellow:system";
gpios = <&tlmm 52 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_YELLOW>;
};
network-yellow {
label = "yellow:network";
gpios = <&tlmm 50 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_YELLOW>;
};
network-blue {
label = "blue:network";
gpios = <&tlmm 51 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_BLUE>;
};
top-red {
label = "red:top";
gpios = <&tlmm 63 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_RED>;
default-state = "keep";
};
top-green {
label = "green:top";
gpios = <&tlmm 64 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_GREEN>;
default-state = "keep";
};
top-blue {
label = "blue:top";
gpios = <&tlmm 66 GPIO_ACTIVE_HIGH>;
color = <LED_COLOR_ID_BLUE>;
default-state = "keep";
};
};
};
&tlmm {
mdio_pins: mdio-pins {
mdc {
pins = "gpio68";
function = "mdc";
drive-strength = <8>;
bias-pull-up;
};
mdio {
pins = "gpio69";
function = "mdio";
drive-strength = <8>;
bias-pull-up;
};
};
i2c_pins: i2c-pins {
pins = "gpio0", "gpio2";
function = "blsp5_i2c";
drive-strength = <8>;
bias-disable;
};
};
&blsp1_uart5 {
status = "okay";
};
&blsp1_i2c6 {
status = "okay";
pinctrl-0 = <&i2c_pins>;
pinctrl-names = "default";
/* Driver missing, justa placeholder */
emc2301@2f {
compatible = "smsc,emc2301";
reg = <0x2f>;
};
};
&prng {
status = "okay";
};
&cryptobam {
status = "okay";
};
&crypto {
status = "okay";
};
&qpic_bam {
status = "okay";
};
&qpic_nand {
status = "okay";
nand@0 {
reg = <0>;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
nand-bus-width = <8>;
partitions {
compatible = "qcom,smem-part";
};
};
};
&qusb_phy_0 {
status = "okay";
};
&ssphy_0 {
status = "okay";
};
&usb_0 {
status = "okay";
};
&mdio {
status = "okay";
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
reset-gpios = <&tlmm 37 GPIO_ACTIVE_LOW>;
ethernet-phy@0 {
reg = <0>;
};
ethernet-phy@1 {
reg = <1>;
};
ethernet-phy@2 {
reg = <2>;
};
ethernet-phy@3 {
reg = <3>;
};
ethernet-phy@24 {
/*
* It looks like the PHY is too slow for
* auto probing after reset is deasserted
* so set the ID manually.
*/
compatible = "ethernet-phy-id004d.d101";
reg = <24>;
reset-gpios = <&tlmm 44 GPIO_ACTIVE_LOW>;
};
};
&qmp_pcie_phy0 {
status = "okay";
};
&pcie0 {
status = "okay";
perst-gpio = <&tlmm 58 GPIO_ACTIVE_LOW>;
};
&qmp_pcie_phy1 {
status = "disabled";
};
&pcie1 {
status = "disabled";
perst-gpio = <&tlmm 62 GPIO_ACTIVE_HIGH>;
};
&ess_switch {
switch_cpu_bmp = <0x1>; /* cpu port bitmap */
switch_lan_bmp = <0x1e>; /* lan port bitmap */
switch_wan_bmp = <0x20>; /* wan port bitmap */
switch_mac_mode = <0x0>; /* mac mode for uniphy instance0*/
switch_mac_mode1 = <0x0f>; /* mac mode for uniphy instance1*/
switch_mac_mode2 = <0xff>; /* mac mode for uniphy instance2*/
bm_tick_mode = <0>; /* bm tick mode */
tm_tick_mode = <0>; /* tm tick mode */
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <0>;
};
port@1 {
port_id = <2>;
phy_address = <1>;
};
port@2 {
port_id = <3>;
phy_address = <2>;
};
port@3 {
port_id = <4>;
phy_address = <3>;
};
port@4 {
port_id = <5>;
phy_address = <24>;
port_mac_sel = "QGMAC_PORT";
};
};
port_scheduler_resource {
port@0 {
port_id = <0>;
ucast_queue = <0 143>;
mcast_queue = <256 271>;
l0sp = <0 35>;
l0cdrr = <0 47>;
l0edrr = <0 47>;
l1cdrr = <0 7>;
l1edrr = <0 7>;
};
port@1 {
port_id = <1>;
ucast_queue = <144 159>;
mcast_queue = <272 275>;
l0sp = <36 39>;
l0cdrr = <48 63>;
l0edrr = <48 63>;
l1cdrr = <8 11>;
l1edrr = <8 11>;
};
port@2 {
port_id = <2>;
ucast_queue = <160 175>;
mcast_queue = <276 279>;
l0sp = <40 43>;
l0cdrr = <64 79>;
l0edrr = <64 79>;
l1cdrr = <12 15>;
l1edrr = <12 15>;
};
port@3 {
port_id = <3>;
ucast_queue = <176 191>;
mcast_queue = <280 283>;
l0sp = <44 47>;
l0cdrr = <80 95>;
l0edrr = <80 95>;
l1cdrr = <16 19>;
l1edrr = <16 19>;
};
port@4 {
port_id = <4>;
ucast_queue = <192 207>;
mcast_queue = <284 287>;
l0sp = <48 51>;
l0cdrr = <96 111>;
l0edrr = <96 111>;
l1cdrr = <20 23>;
l1edrr = <20 23>;
};
port@5 {
port_id = <5>;
ucast_queue = <208 223>;
mcast_queue = <288 291>;
l0sp = <52 55>;
l0cdrr = <112 127>;
l0edrr = <112 127>;
l1cdrr = <24 27>;
l1edrr = <24 27>;
};
port@6 {
port_id = <6>;
ucast_queue = <224 239>;
mcast_queue = <292 295>;
l0sp = <56 59>;
l0cdrr = <128 143>;
l0edrr = <128 143>;
l1cdrr = <28 31>;
l1edrr = <28 31>;
};
port@7 {
port_id = <7>;
ucast_queue = <240 255>;
mcast_queue = <296 299>;
l0sp = <60 63>;
l0cdrr = <144 159>;
l0edrr = <144 159>;
l1cdrr = <32 35>;
l1edrr = <32 35>;
};
};
port_scheduler_config {
port@0 {
port_id = <0>;
l1scheduler {
group@0 {
sp = <0 1>; /*L0 SPs*/
/*cpri cdrr epri edrr*/
cfg = <0 0 0 0>;
};
};
l0scheduler {
group@0 {
/*unicast queues*/
ucast_queue = <0 4 8>;
/*multicast queues*/
mcast_queue = <256 260>;
/*sp cpri cdrr epri edrr*/
cfg = <0 0 0 0 0>;
};
group@1 {
ucast_queue = <1 5 9>;
mcast_queue = <257 261>;
cfg = <0 1 1 1 1>;
};
group@2 {
ucast_queue = <2 6 10>;
mcast_queue = <258 262>;
cfg = <0 2 2 2 2>;
};
group@3 {
ucast_queue = <3 7 11>;
mcast_queue = <259 263>;
cfg = <0 3 3 3 3>;
};
};
};
port@1 {
port_id = <1>;
l1scheduler {
group@0 {
sp = <36>;
cfg = <0 8 0 8>;
};
group@1 {
sp = <37>;
cfg = <1 9 1 9>;
};
};
l0scheduler {
group@0 {
ucast_queue = <144>;
ucast_loop_pri = <16>;
mcast_queue = <272>;
mcast_loop_pri = <4>;
cfg = <36 0 48 0 48>;
};
};
};
port@2 {
port_id = <2>;
l1scheduler {
group@0 {
sp = <40>;
cfg = <0 12 0 12>;
};
group@1 {
sp = <41>;
cfg = <1 13 1 13>;
};
};
l0scheduler {
group@0 {
ucast_queue = <160>;
ucast_loop_pri = <16>;
mcast_queue = <276>;
mcast_loop_pri = <4>;
cfg = <40 0 64 0 64>;
};
};
};
port@3 {
port_id = <3>;
l1scheduler {
group@0 {
sp = <44>;
cfg = <0 16 0 16>;
};
group@1 {
sp = <45>;
cfg = <1 17 1 17>;
};
};
l0scheduler {
group@0 {
ucast_queue = <176>;
ucast_loop_pri = <16>;
mcast_queue = <280>;
mcast_loop_pri = <4>;
cfg = <44 0 80 0 80>;
};
};
};
port@4 {
port_id = <4>;
l1scheduler {
group@0 {
sp = <48>;
cfg = <0 20 0 20>;
};
group@1 {
sp = <49>;
cfg = <1 21 1 21>;
};
};
l0scheduler {
group@0 {
ucast_queue = <192>;
ucast_loop_pri = <16>;
mcast_queue = <284>;
mcast_loop_pri = <4>;
cfg = <48 0 96 0 96>;
};
};
};
port@5 {
port_id = <5>;
l1scheduler {
group@0 {
sp = <52>;
cfg = <0 24 0 24>;
};
group@1 {
sp = <53>;
cfg = <1 25 1 25>;
};
};
l0scheduler {
group@0 {
ucast_queue = <208>;
ucast_loop_pri = <16>;
mcast_queue = <288>;
mcast_loop_pri = <4>;
cfg = <52 0 112 0 112>;
};
};
};
port@6 {
port_id = <6>;
l1scheduler {
group@0 {
sp = <56>;
cfg = <0 28 0 28>;
};
group@1 {
sp = <57>;
cfg = <1 29 1 29>;
};
};
l0scheduler {
group@0 {
ucast_queue = <224>;
ucast_loop_pri = <16>;
mcast_queue = <292>;
mcast_loop_pri = <4>;
cfg = <56 0 128 0 128>;
};
};
};
port@7 {
port_id = <7>;
l1scheduler {
group@0 {
sp = <60>;
cfg = <0 32 0 32>;
};
group@1 {
sp = <61>;
cfg = <1 33 1 33>;
};
};
l0scheduler {
group@0 {
ucast_queue = <240>;
ucast_loop_pri = <16>;
mcast_queue = <296>;
cfg = <60 0 144 0 144>;
};
};
};
};
};
&soc {
dp1: dp1 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <1>;
reg = <0x3a001000 0x200>;
qcom,mactype = <0>;
local-mac-address = [000000000000];
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <0>;
phy-mode = "sgmii";
mdio-bus = <&mdio>;
};
dp2: dp2 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <2>;
reg = <0x3a001200 0x200>;
qcom,mactype = <0>;
local-mac-address = [000000000000];
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <1>;
phy-mode = "sgmii";
mdio-bus = <&mdio>;
};
dp3: dp3 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <3>;
reg = <0x3a001400 0x200>;
qcom,mactype = <0>;
local-mac-address = [000000000000];
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <2>;
phy-mode = "sgmii";
mdio-bus = <&mdio>;
};
dp4: dp4 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <4>;
reg = <0x3a001600 0x200>;
qcom,mactype = <0>;
local-mac-address = [000000000000];
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <3>;
phy-mode = "sgmii";
mdio-bus = <&mdio>;
};
dp5: dp5 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <5>;
reg = <0x3a001800 0x200>;
qcom,mactype = <0>;
local-mac-address = [000000000000];
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <24>;
phy-mode = "sgmii";
mdio-bus = <&mdio>;
};
};
&wifi {
status = "okay";
qcom,board_id = <660>;
qcom,ath11k-calibration-variant = "Xiaomi-AX9000";
};

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// SPDX-License-Identifier: GPL-2.0-only
&CPU0 {
operating-points-v2 = <&cpu_opp_table>;
voltage-tolerance = <1>;
cpu0-supply = <&s3>;
};
&CPU1 {
operating-points-v2 = <&cpu_opp_table>;
voltage-tolerance = <1>;
cpu-supply = <&s3>;
};
&CPU2 {
operating-points-v2 = <&cpu_opp_table>;
voltage-tolerance = <1>;
cpu-supply = <&s3>;
};
&CPU3 {
operating-points-v2 = <&cpu_opp_table>;
voltage-tolerance = <1>;
cpu-supply = <&s3>;
};
&cpus {
cpu_opp_table: cpu_opp_table {
compatible = "operating-points-v2";
opp-shared;
opp-1017600000 {
opp-hz = /bits/ 64 <1017600000>;
opp-microvolt = <704000>;
clock-latency-ns = <200000>;
};
opp-1382400000 {
opp-hz = /bits/ 64 <1382400000>;
opp-microvolt = <824000>;
clock-latency-ns = <200000>;
};
};
};
&cpu0_thermal {
trips {
cpu0_passive: cpu-passive {
temperature = <95000>;
hysteresis = <2000>;
type = "passive";
};
cpu0_crit: cpu_crit {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};
cooling-maps {
map0 {
trip = <&cpu0_passive>;
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
&cpu1_thermal {
trips {
cpu1_passive: cpu-passive {
temperature = <95000>;
hysteresis = <2000>;
type = "passive";
};
cpu1_crit: cpu_crit {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};
cooling-maps {
map0 {
trip = <&cpu1_passive>;
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
&cpu2_thermal {
trips {
cpu2_passive: cpu-passive {
temperature = <95000>;
hysteresis = <2000>;
type = "passive";
};
cpu2_crit: cpu_crit {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};
cooling-maps {
map0 {
trip = <&cpu2_passive>;
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
&cpu3_thermal {
trips {
cpu3_passive: cpu-passive {
temperature = <95000>;
hysteresis = <2000>;
type = "passive";
};
cpu3_crit: cpu_crit {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};
cooling-maps {
map0 {
trip = <&cpu3_passive>;
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
&cluster_thermal {
trips {
cluster_passive: cluster-passive {
temperature = <95000>;
hysteresis = <2000>;
type = "passive";
};
cluster_crit: cluster_crit {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};
cooling-maps {
map0 {
trip = <&cluster_passive>;
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};

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// SPDX-License-Identifier: GPL-2.0-only
&soc {
dummy_reg: dummy-regulator@0 {
compatible = "regulator-fixed";
regulator-name = "dummy-reg";
regulator-min-microvolt = <848000>;
regulator-max-microvolt = <848000>;
regulator-always-on;
regulator-boot-on;
};
nss-common {
compatible = "qcom,nss-common";
reg = <0x01868010 0x1000>;
reg-names = "nss-misc-reset";
};
nss0: nss@40000000 {
compatible = "qcom,nss";
interrupts = <GIC_SPI 377 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 378 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 379 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 380 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 381 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 382 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 383 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 384 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 385 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 386 IRQ_TYPE_EDGE_RISING>;
reg = <0x39000000 0x1000>,
<0x38000000 0x30000>,
<0x0b111000 0x1000>;
reg-names = "nphys", "vphys", "qgic-phys";
clocks = <&gcc GCC_NSS_NOC_CLK>,
<&gcc GCC_NSS_PTP_REF_CLK>,
<&gcc GCC_NSS_CSR_CLK>, <&gcc GCC_NSS_CFG_CLK>,
<&gcc GCC_NSS_IMEM_CLK>,
<&gcc GCC_NSSNOC_QOSGEN_REF_CLK>,
<&gcc GCC_MEM_NOC_NSS_AXI_CLK>,
<&gcc GCC_NSSNOC_SNOC_CLK>,
<&gcc GCC_NSSNOC_TIMEOUT_REF_CLK>,
<&gcc GCC_NSS_CE_AXI_CLK>,
<&gcc GCC_NSS_CE_APB_CLK>,
<&gcc GCC_NSSNOC_CE_AXI_CLK>,
<&gcc GCC_NSSNOC_CE_APB_CLK>,
<&gcc GCC_NSSNOC_UBI0_AHB_CLK>,
<&gcc GCC_UBI0_CORE_CLK>,
<&gcc GCC_UBI0_AHB_CLK>,
<&gcc GCC_UBI0_AXI_CLK>,
<&gcc GCC_UBI0_MPT_CLK>,
<&gcc GCC_UBI0_NC_AXI_CLK>;
clock-names = "nss-noc-clk", "nss-ptp-ref-clk",
"nss-csr-clk", "nss-cfg-clk",
"nss-imem-clk",
"nss-nssnoc-qosgen-ref-clk",
"nss-mem-noc-nss-axi-clk",
"nss-nssnoc-snoc-clk",
"nss-nssnoc-timeout-ref-clk",
"nss-ce-axi-clk", "nss-ce-apb-clk",
"nss-nssnoc-ce-axi-clk",
"nss-nssnoc-ce-apb-clk",
"nss-nssnoc-ahb-clk",
"nss-core-clk", "nss-ahb-clk",
"nss-axi-clk", "nss-mpt-clk",
"nss-nc-axi-clk";
qcom,id = <0>;
qcom,num-queue = <4>;
qcom,num-irq = <10>;
qcom,num-pri = <4>;
qcom,load-addr = <0x40000000>;
qcom,low-frequency = <187200000>;
qcom,mid-frequency = <748800000>;
qcom,max-frequency = <1497600000>;
npu-supply = <&dummy_reg>;
mx-supply = <&dummy_reg>;
qcom,bridge-enabled;
qcom,ipv4-enabled;
qcom,ipv4-reasm-enabled;
qcom,ipv6-enabled;
qcom,ipv6-reasm-enabled;
qcom,wlanredirect-enabled;
qcom,tun6rd-enabled;
qcom,l2tpv2-enabled;
qcom,gre-enabled;
qcom,gre-redir-enabled;
qcom,gre-redir-mark-enabled;
qcom,map-t-enabled;
qcom,portid-enabled;
qcom,ppe-enabled;
qcom,pppoe-enabled;
qcom,pptp-enabled;
qcom,tunipip6-enabled;
qcom,shaping-enabled;
qcom,wlan-dataplane-offload-enabled;
qcom,vlan-enabled;
qcom,igs-enabled;
qcom,vxlan-enabled;
qcom,match-enabled;
qcom,mirror-enabled;
qcom,udp-st-enabled;
};
nss1: nss@40800000 {
compatible = "qcom,nss";
interrupts = <GIC_SPI 390 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 391 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 392 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 393 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 394 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 395 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 396 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 397 IRQ_TYPE_EDGE_RISING>,
<GIC_SPI 398 IRQ_TYPE_EDGE_RISING>;
reg = <0x39400000 0x1000>,
<0x38030000 0x30000>,
<0x0b111000 0x1000>;
reg-names = "nphys", "vphys", "qgic-phys";
clocks = <&gcc GCC_NSS_NOC_CLK>,
<&gcc GCC_NSS_PTP_REF_CLK>,
<&gcc GCC_NSS_CSR_CLK>, <&gcc GCC_NSS_CFG_CLK>,
<&gcc GCC_NSS_IMEM_CLK>,
<&gcc GCC_NSSNOC_QOSGEN_REF_CLK>,
<&gcc GCC_MEM_NOC_NSS_AXI_CLK>,
<&gcc GCC_NSSNOC_SNOC_CLK>,
<&gcc GCC_NSSNOC_TIMEOUT_REF_CLK>,
<&gcc GCC_NSS_CE_AXI_CLK>,
<&gcc GCC_NSS_CE_APB_CLK>,
<&gcc GCC_NSSNOC_CE_AXI_CLK>,
<&gcc GCC_NSSNOC_CE_APB_CLK>,
<&gcc GCC_NSSNOC_UBI1_AHB_CLK>,
<&gcc GCC_UBI1_CORE_CLK>,
<&gcc GCC_UBI1_AHB_CLK>,
<&gcc GCC_UBI1_AXI_CLK>,
<&gcc GCC_UBI1_MPT_CLK>,
<&gcc GCC_UBI1_NC_AXI_CLK>;
clock-names = "nss-noc-clk", "nss-ptp-ref-clk",
"nss-csr-clk", "nss-cfg-clk",
"nss-imem-clk",
"nss-nssnoc-qosgen-ref-clk",
"nss-mem-noc-nss-axi-clk",
"nss-nssnoc-snoc-clk",
"nss-nssnoc-timeout-ref-clk",
"nss-ce-axi-clk", "nss-ce-apb-clk",
"nss-nssnoc-ce-axi-clk",
"nss-nssnoc-ce-apb-clk",
"nss-nssnoc-ahb-clk",
"nss-core-clk", "nss-ahb-clk",
"nss-axi-clk", "nss-mpt-clk",
"nss-nc-axi-clk";
qcom,id = <1>;
qcom,num-queue = <4>;
qcom,num-irq = <9>;
qcom,num-pri = <4>;
qcom,load-addr = <0x40800000>;
qcom,capwap-enabled;
qcom,dtls-enabled;
qcom,tls-enabled;
qcom,crypto-enabled;
qcom,ipsec-enabled;
qcom,qvpn-enabled;
qcom,pvxlan-enabled;
qcom,clmap-enabled;
qcom,rmnet_rx-enabled;
};
nss_crypto: qcom,nss_crypto {
compatible = "qcom,nss-crypto";
#address-cells = <1>;
#size-cells = <1>;
qcom,max-contexts = <64>;
qcom,max-context-size = <32>;
ranges;
eip197_node {
compatible = "qcom,eip197";
reg-names = "crypto_pbase";
reg = <0x39800000 0x7ffff>;
clocks = <&gcc GCC_NSS_CRYPTO_CLK>,
<&gcc GCC_NSSNOC_CRYPTO_CLK>,
<&gcc GCC_CRYPTO_PPE_CLK>;
clock-names = "crypto_clk",
"crypto_nocclk",
"crypto_ppeclk";
clock-frequency = /bits/ 64 <600000000 600000000 300000000>;
qcom,dma-mask = <0xff>;
qcom,transform-enabled;
qcom,aes128-cbc;
qcom,aes192-cbc;
qcom,aes256-cbc;
qcom,aes128-ctr;
qcom,aes192-ctr;
qcom,aes256-ctr;
qcom,aes128-ecb;
qcom,aes192-ecb;
qcom,aes256-ecb;
qcom,3des-cbc;
qcom,md5-hash;
qcom,sha160-hash;
qcom,sha224-hash;
qcom,sha384-hash;
qcom,sha512-hash;
qcom,sha256-hash;
qcom,md5-hmac;
qcom,sha160-hmac;
qcom,sha224-hmac;
qcom,sha256-hmac;
qcom,sha384-hmac;
qcom,sha512-hmac;
qcom,aes128-gcm-gmac;
qcom,aes192-gcm-gmac;
qcom,aes256-gcm-gmac;
qcom,aes128-cbc-md5-hmac;
qcom,aes128-cbc-sha160-hmac;
qcom,aes192-cbc-md5-hmac;
qcom,aes192-cbc-sha160-hmac;
qcom,aes256-cbc-md5-hmac;
qcom,aes256-cbc-sha160-hmac;
qcom,aes128-ctr-sha160-hmac;
qcom,aes192-ctr-sha160-hmac;
qcom,aes256-ctr-sha160-hmac;
qcom,aes128-ctr-md5-hmac;
qcom,aes192-ctr-md5-hmac;
qcom,aes256-ctr-md5-hmac;
qcom,3des-cbc-md5-hmac;
qcom,3des-cbc-sha160-hmac;
qcom,aes128-cbc-sha256-hmac;
qcom,aes192-cbc-sha256-hmac;
qcom,aes256-cbc-sha256-hmac;
qcom,aes128-ctr-sha256-hmac;
qcom,aes192-ctr-sha256-hmac;
qcom,aes256-ctr-sha256-hmac;
qcom,3des-cbc-sha256-hmac;
qcom,aes128-cbc-sha384-hmac;
qcom,aes192-cbc-sha384-hmac;
qcom,aes256-cbc-sha384-hmac;
qcom,aes128-ctr-sha384-hmac;
qcom,aes192-ctr-sha384-hmac;
qcom,aes256-ctr-sha384-hmac;
qcom,aes128-cbc-sha512-hmac;
qcom,aes192-cbc-sha512-hmac;
qcom,aes256-cbc-sha512-hmac;
qcom,aes128-ctr-sha512-hmac;
qcom,aes192-ctr-sha512-hmac;
qcom,aes256-ctr-sha512-hmac;
engine0 {
reg_offset = <0x80000>;
qcom,ifpp-enabled;
qcom,ipue-enabled;
qcom,ofpp-enabled;
qcom,opue-enabled;
};
};
};
};

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// SPDX-License-Identifier: GPL-2.0-only
&CPU0 {
operating-points-v2 = <&cpu_opp_table>;
voltage-tolerance = <1>;
cpu0-supply = <&s3>;
};
&CPU1 {
operating-points-v2 = <&cpu_opp_table>;
voltage-tolerance = <1>;
cpu-supply = <&s3>;
};
&CPU2 {
operating-points-v2 = <&cpu_opp_table>;
voltage-tolerance = <1>;
cpu-supply = <&s3>;
};
&CPU3 {
operating-points-v2 = <&cpu_opp_table>;
voltage-tolerance = <1>;
cpu-supply = <&s3>;
};
&cpus {
cpu_opp_table: cpu_opp_table {
compatible = "operating-points-v2";
opp-shared;
opp-1017600000 {
opp-hz = /bits/ 64 <1017600000>;
opp-microvolt = <704000>;
clock-latency-ns = <200000>;
};
opp-1382400000 {
opp-hz = /bits/ 64 <1382400000>;
opp-microvolt = <784000>;
clock-latency-ns = <200000>;
};
opp-1651200000 {
opp-hz = /bits/ 64 <1651200000>;
opp-microvolt = <832000>;
clock-latency-ns = <200000>;
};
opp-1843200000 {
opp-hz = /bits/ 64 <1843200000>;
opp-microvolt = <880000>;
clock-latency-ns = <200000>;
};
opp-1920000000 {
opp-hz = /bits/ 64 <1920000000>;
opp-microvolt = <904000>;
clock-latency-ns = <200000>;
};
opp-2208000000 {
opp-hz = /bits/ 64 <2208000000>;
opp-microvolt = <984000>;
clock-latency-ns = <200000>;
};
};
};
&cpu0_thermal {
trips {
cpu0_passive_low: cpu-passive-low {
temperature = <95000>;
hysteresis = <2000>;
type = "passive";
};
cpu0_passive_high: cpu-passive-high {
temperature = <100000>;
hysteresis = <2000>;
type = "passive";
};
cpu0_crit: cpu_crit {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};
cooling-maps {
map0 {
trip = <&cpu0_passive_low>;
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
map1 {
trip = <&cpu0_passive_high>;
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
&cpu1_thermal {
trips {
cpu1_passive_low: cpu-passive-low {
temperature = <95000>;
hysteresis = <2000>;
type = "passive";
};
cpu1_passive_high: cpu-passive-high {
temperature = <100000>;
hysteresis = <2000>;
type = "passive";
};
cpu1_crit: cpu_crit {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};
cooling-maps {
map0 {
trip = <&cpu1_passive_low>;
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
map1 {
trip = <&cpu1_passive_high>;
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
&cpu2_thermal {
trips {
cpu2_passive_low: cpu-passive-low {
temperature = <95000>;
hysteresis = <2000>;
type = "passive";
};
cpu2_passive_high: cpu-passive-high {
temperature = <100000>;
hysteresis = <2000>;
type = "passive";
};
cpu2_crit: cpu_crit {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};
cooling-maps {
map0 {
trip = <&cpu2_passive_low>;
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
map1 {
trip = <&cpu2_passive_high>;
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
&cpu3_thermal {
trips {
cpu3_passive_low: cpu-passive-low {
temperature = <95000>;
hysteresis = <2000>;
type = "passive";
};
cpu3_passive_high: cpu-passive-high {
temperature = <100000>;
hysteresis = <2000>;
type = "passive";
};
cpu3_crit: cpu_crit {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};
cooling-maps {
map0 {
trip = <&cpu3_passive_low>;
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
map1 {
trip = <&cpu3_passive_high>;
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};
&cluster_thermal {
trips {
cluster_passive_low: cluster-passive {
temperature = <95000>;
hysteresis = <2000>;
type = "passive";
};
cluster_passive_high: cluster-passive-high {
temperature = <100000>;
hysteresis = <2000>;
type = "passive";
};
cluster_crit: cluster_crit {
temperature = <110000>;
hysteresis = <1000>;
type = "critical";
};
};
cooling-maps {
map0 {
trip = <&cluster_passive_low>;
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
map1 {
trip = <&cluster_passive_high>;
cooling-device = <&CPU0 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU1 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU2 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>,
<&CPU3 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;
};
};
};

643
target/linux/ipq807x/files/arch/arm64/boot/dts/qcom/ipq8074-sxr80.dts Normal file
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include "ipq8074.dtsi"
#include "ipq8074-ac-cpu.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
/ {
#address-cells = <2>;
#size-cells = <2>;
model = "Netgear SXR80";
compatible = "netgear,sxr80", "qcom,ipq8074";
interrupt-parent = <&intc>;
aliases {
serial0 = &blsp1_uart5;
led-boot = &led_front_blue;
led-failsafe = &led_front_red;
led-running = &led_front_green;
led-upgrade = &led_front_white;
/* Aliases as required by u-boot to patch MAC addresses */
ethernet0 = "/soc/dp1";
ethernet1 = "/soc/dp2";
ethernet2 = "/soc/dp3";
ethernet3 = "/soc/dp4";
ethernet6 = "/soc/dp5";
};
chosen {
stdout-path = "serial0:115200n8";
bootargs-append = " root=/dev/ubiblock0_1";
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&tlmm 54 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
wps {
label = "wps";
gpios = <&tlmm 57 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
};
leds {
compatible = "gpio-leds";
led_front_blue: front-blue {
label = "blue:front";
gpios = <&tlmm 33 GPIO_ACTIVE_LOW>;
};
led_front_green: front-green {
label = "green:front";
gpios = <&tlmm 29 GPIO_ACTIVE_LOW>;
};
led_front_red: front-red {
label = "red:front";
gpios = <&tlmm 31 GPIO_ACTIVE_LOW>;
};
led_front_white: front-white {
label = "white:front";
gpios = <&tlmm 26 GPIO_ACTIVE_LOW>;
};
led_power_green: power-green {
label = "green:power";
gpios = <&tlmm 21 GPIO_ACTIVE_LOW>;
default-state = "on";
};
led_power_red: power-red {
label = "red:power";
gpios = <&tlmm 22 GPIO_ACTIVE_LOW>;
panic-indicator;
};
};
};
&tlmm {
mdio_pins: mdio-pins {
mdc {
pins = "gpio68";
function = "mdc";
drive-strength = <8>;
bias-pull-up;
};
mdio {
pins = "gpio69";
function = "mdio";
drive-strength = <8>;
bias-pull-up;
};
};
i2c_0_pins: i2c-0-pinmux {
mux {
pins = "gpio42", "gpio43";
function = "blsp1_i2c";
drive-strength = <8>;
bias-disable;
};
};
leds_pins: leds_pinmux {
led_power_green {
pins = "gpio21";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_power_red {
pins = "gpio22";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_white {
pins = "gpio26";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_green {
pins = "gpio29";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_red {
pins = "gpio31";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
led_blue {
pins = "gpio33";
function = "gpio";
drive-strength = <8>;
bias-pull-down;
};
};
};
&blsp1_uart5 {
status = "okay";
};
&blsp1_i2c2 {
pinctrl-0 = <&i2c_0_pins>;
pinctrl-names = "default";
status = "okay";
tlc59208f@27 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "ti,tlc59108";
reg = <0x27>;
led0@0 {
label = "orbi:led0:rgb";
reg = <0x0>;
linux,default_trigger = "default-on";
};
led1@1 {
label = "orbi:led1:rgb";
reg = <0x1>;
linux,default_trigger = "default-on";
};
led2@2 {
label = "orbi:led2:rgb";
reg = <0x2>;
linux,default_trigger = "default-on";
};
led3@3 {
label = "orbi:led3:rgb";
reg = <0x3>;
linux,default_trigger = "default-on";
};
};
};
&prng {
status = "okay";
};
&cryptobam {
status = "okay";
};
&crypto {
status = "okay";
};
&qpic_bam {
status = "okay";
};
&qpic_nand {
status = "okay";
nand@0 {
reg = <0>;
nand-ecc-strength = <4>;
nand-ecc-step-size = <512>;
nand-bus-width = <8>;
partitions {
compatible = "qcom,smem-part";
};
};
};
&mdio {
status = "okay";
pinctrl-0 = <&mdio_pins>;
pinctrl-names = "default";
reset-gpios = <&tlmm 25 1>;
ethernet-phy@0 {
reg = <0>;
// Disabled to resolve multiple configured reset lines causing issues
// reset-gpios = <&tlmm 37 0>;
};
ethernet-phy@1 {
reg = <1>;
};
ethernet-phy@2 {
reg = <2>;
};
ethernet-phy@3 {
reg = <3>;
};
ethernet-phy@4 {
reg = <28>;
// Disabled to resolve multiple configured reset lines causing issues
// reset-gpios = <&tlmm 25 1>;
};
};
&ess_switch {
switch_cpu_bmp = <0x1>; /* cpu port bitmap */
switch_lan_bmp = <0x3e>; /* lan port bitmap */
switch_wan_bmp = <0x40>; /* wan port bitmap */
switch_mac_mode = <0x0>; /* mac mode for uniphy instance0*/
switch_mac_mode1 = <0xff>; /* mac mode for uniphy instance1*/
switch_mac_mode2 = <0xf>; /* mac mode for uniphy instance2*/
bm_tick_mode = <0>; /* bm tick mode */
tm_tick_mode = <0>; /* tm tick mode */
qcom,port_phyinfo {
port@0 {
port_id = <1>;
phy_address = <0>;
};
port@1 {
port_id = <2>;
phy_address = <1>;
};
port@2 {
port_id = <3>;
phy_address = <2>;
};
port@3 {
port_id = <4>;
phy_address = <3>;
};
port@5 {
port_id = <6>;
phy_address = <28>;
port_mac_sel = "QGMAC_PORT";
};
};
port_scheduler_resource {
port@0 {
port_id = <0>;
ucast_queue = <0 143>;
mcast_queue = <256 271>;
l0sp = <0 35>;
l0cdrr = <0 47>;
l0edrr = <0 47>;
l1cdrr = <0 7>;
l1edrr = <0 7>;
};
port@1 {
port_id = <1>;
ucast_queue = <144 159>;
mcast_queue = <272 275>;
l0sp = <36 39>;
l0cdrr = <48 63>;
l0edrr = <48 63>;
l1cdrr = <8 11>;
l1edrr = <8 11>;
};
port@2 {
port_id = <2>;
ucast_queue = <160 175>;
mcast_queue = <276 279>;
l0sp = <40 43>;
l0cdrr = <64 79>;
l0edrr = <64 79>;
l1cdrr = <12 15>;
l1edrr = <12 15>;
};
port@3 {
port_id = <3>;
ucast_queue = <176 191>;
mcast_queue = <280 283>;
l0sp = <44 47>;
l0cdrr = <80 95>;
l0edrr = <80 95>;
l1cdrr = <16 19>;
l1edrr = <16 19>;
};
port@4 {
port_id = <4>;
ucast_queue = <192 207>;
mcast_queue = <284 287>;
l0sp = <48 51>;
l0cdrr = <96 111>;
l0edrr = <96 111>;
l1cdrr = <20 23>;
l1edrr = <20 23>;
};
port@5 {
port_id = <5>;
ucast_queue = <208 223>;
mcast_queue = <288 291>;
l0sp = <52 55>;
l0cdrr = <112 127>;
l0edrr = <112 127>;
l1cdrr = <24 27>;
l1edrr = <24 27>;
};
port@6 {
port_id = <6>;
ucast_queue = <224 239>;
mcast_queue = <292 295>;
l0sp = <56 59>;
l0cdrr = <128 143>;
l0edrr = <128 143>;
l1cdrr = <28 31>;
l1edrr = <28 31>;
};
port@7 {
port_id = <7>;
ucast_queue = <240 255>;
mcast_queue = <296 299>;
l0sp = <60 63>;
l0cdrr = <144 159>;
l0edrr = <144 159>;
l1cdrr = <32 35>;
l1edrr = <32 35>;
};
};
port_scheduler_config {
port@0 {
port_id = <0>;
l1scheduler {
group@0 {
sp = <0 1>; /*L0 SPs*/
/*cpri cdrr epri edrr*/
cfg = <0 0 0 0>;
};
};
l0scheduler {
group@0 {
/*unicast queues*/
ucast_queue = <0 4 8>;
/*multicast queues*/
mcast_queue = <256 260>;
/*sp cpri cdrr epri edrr*/
cfg = <0 0 0 0 0>;
};
group@1 {
ucast_queue = <1 5 9>;
mcast_queue = <257 261>;
cfg = <0 1 1 1 1>;
};
group@2 {
ucast_queue = <2 6 10>;
mcast_queue = <258 262>;
cfg = <0 2 2 2 2>;
};
group@3 {
ucast_queue = <3 7 11>;
mcast_queue = <259 263>;
cfg = <0 3 3 3 3>;
};
};
};
port@1 {
port_id = <1>;
l1scheduler {
group@0 {
sp = <36>;
cfg = <0 8 0 8>;
};
group@1 {
sp = <37>;
cfg = <1 9 1 9>;
};
};
l0scheduler {
group@0 {
ucast_queue = <144>;
ucast_loop_pri = <16>;
mcast_queue = <272>;
mcast_loop_pri = <4>;
cfg = <36 0 48 0 48>;
};
};
};
port@2 {
port_id = <2>;
l1scheduler {
group@0 {
sp = <40>;
cfg = <0 12 0 12>;
};
group@1 {
sp = <41>;
cfg = <1 13 1 13>;
};
};
l0scheduler {
group@0 {
ucast_queue = <160>;
ucast_loop_pri = <16>;
mcast_queue = <276>;
mcast_loop_pri = <4>;
cfg = <40 0 64 0 64>;
};
};
};
port@3 {
port_id = <3>;
l1scheduler {
group@0 {
sp = <44>;
cfg = <0 16 0 16>;
};
group@1 {
sp = <45>;
cfg = <1 17 1 17>;
};
};
l0scheduler {
group@0 {
ucast_queue = <176>;
ucast_loop_pri = <16>;
mcast_queue = <280>;
mcast_loop_pri = <4>;
cfg = <44 0 80 0 80>;
};
};
};
port@4 {
port_id = <4>;
l1scheduler {
group@0 {
sp = <48>;
cfg = <0 20 0 20>;
};
group@1 {
sp = <49>;
cfg = <1 21 1 21>;
};
};
l0scheduler {
group@0 {
ucast_queue = <192>;
ucast_loop_pri = <16>;
mcast_queue = <284>;
mcast_loop_pri = <4>;
cfg = <48 0 96 0 96>;
};
};
};
port@5 {
port_id = <5>;
l1scheduler {
group@0 {
sp = <52>;
cfg = <0 24 0 24>;
};
group@1 {
sp = <53>;
cfg = <1 25 1 25>;
};
};
l0scheduler {
group@0 {
ucast_queue = <208>;
ucast_loop_pri = <16>;
mcast_queue = <288>;
mcast_loop_pri = <4>;
cfg = <52 0 112 0 112>;
};
};
};
port@6 {
port_id = <6>;
l1scheduler {
group@0 {
sp = <56>;
cfg = <0 28 0 28>;
};
group@1 {
sp = <57>;
cfg = <1 29 1 29>;
};
};
l0scheduler {
group@0 {
ucast_queue = <224>;
ucast_loop_pri = <16>;
mcast_queue = <292>;
mcast_loop_pri = <4>;
cfg = <56 0 128 0 128>;
};
};
};
port@7 {
port_id = <7>;
l1scheduler {
group@0 {
sp = <60>;
cfg = <0 32 0 32>;
};
group@1 {
sp = <61>;
cfg = <1 33 1 33>;
};
};
l0scheduler {
group@0 {
ucast_queue = <240>;
ucast_loop_pri = <16>;
mcast_queue = <296>;
cfg = <60 0 144 0 144>;
};
};
};
};
};
&soc {
dp1: dp1 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <1>;
reg = <0x3a001000 0x200>;
qcom,mactype = <0>;
local-mac-address = [000000000000];
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <0>;
phy-mode = "sgmii";
mdio-bus = <&mdio>;
};
dp2: dp2 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <2>;
reg = <0x3a001200 0x200>;
qcom,mactype = <0>;
local-mac-address = [000000000000];
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <1>;
phy-mode = "sgmii";
mdio-bus = <&mdio>;
};
dp3: dp3 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <3>;
reg = <0x3a001400 0x200>;
qcom,mactype = <0>;
local-mac-address = [000000000000];
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <2>;
phy-mode = "sgmii";
mdio-bus = <&mdio>;
};
dp4: dp4 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <4>;
reg = <0x3a001600 0x200>;
qcom,mactype = <0>;
local-mac-address = [000000000000];
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <3>;
phy-mode = "sgmii";
mdio-bus = <&mdio>;
};
dp5: dp5 {
device_type = "network";
compatible = "qcom,nss-dp";
qcom,id = <5>;
reg = <0x3a001800 0x200>;
qcom,mactype = <0>;
local-mac-address = [000000000000];
qcom,link-poll = <1>;
qcom,phy-mdio-addr = <28>;
phy-mode = "sgmii";
mdio-bus = <&mdio>;
};
};
&wifi {
status = "okay";
qcom,ath11k-calibration-variant = "Netgear-SXR80";
};

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// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright (c) 2021 Sartura Ltd.
*
* Driver for the SMSC/Microchip EMC2301/2/3/5 fan controller.
*
* Author: Robert Marko <robert.marko@sartura.hr>
*/
#include <linux/bitfield.h>
#include <linux/delay.h>
#include <linux/hwmon-sysfs.h>
#include <linux/hwmon.h>
#include <linux/i2c.h>
#include <linux/module.h>
#include <linux/of_device.h>
#include <linux/regmap.h>
#define MANUFACTURER_ID_REG 0xfe
#define SMSC_MANUFACTURER_ID 0x5d
#define PRODUCT_ID_REG 0xfd
#define EMC2305_PRODUCT_ID 0x34
#define EMC2303_PRODUCT_ID 0x35
#define EMC2302_PRODUCT_ID 0x36
#define EMC2301_PRODUCT_ID 0x37
#define TACH1_HIGH_BYTE 0x3e
#define TACH1_LOW_BYTE 0x3f
#define FAN1_CONFIG 0x32
#define FAN_TACH_RANGE_MASK GENMASK(6, 5)
#define FAN_TACH_MULTIPLIER_8 3
#define FAN_TACH_MULTIPLIER_4 2
#define FAN_TACH_MULTIPLIER_2 1
#define FAN_TACH_MULTIPLIER_1 0
#define FAN_TACH_CONSTANT 3932160
#define FAN_TACH_READING_MASK GENMASK(15,3)
#define TACH1_TARGET_LOW_BYTE 0x3c
#define TACH1_TARGET_HIGH_BYTE 0x3d
#define TACH_HIGH_MASK GENMASK(12,5)
#define TACH_LOW_MASK GENMASK(4,0)
#define FANX_OFFSET 0x10
#define FAN_NUM_MAX 5
struct emc2305_fan_data {
u32 min_rpm;
u32 max_rpm;
u32 target_rpm;
};
struct emc2305_data {
struct regmap *regmap;
struct i2c_client *client;
struct emc2305_fan_data fan_data[FAN_NUM_MAX];
};
static struct regmap_config emc2305_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.max_register = 0xff,
};
static int emc2305_read_fan(struct emc2305_data *data, int channel,
long *val)
{
unsigned int regval, high_byte, low_byte;
u8 range, multiplier;
int ret;
ret = regmap_read(data->regmap,
FAN1_CONFIG + channel * FANX_OFFSET,
&regval);
if (ret < 0)
return ret;
range = FIELD_GET(FAN_TACH_RANGE_MASK, regval);
switch (range) {
case FAN_TACH_MULTIPLIER_8:
multiplier = 8;
break;
case FAN_TACH_MULTIPLIER_4:
multiplier = 4;
break;
case FAN_TACH_MULTIPLIER_2:
multiplier = 2;
break;
case FAN_TACH_MULTIPLIER_1:
multiplier = 1;
break;
default:
return -EINVAL;
}
ret = regmap_read(data->regmap,
TACH1_HIGH_BYTE + channel * FANX_OFFSET,
&high_byte);
if (ret < 0)
return ret;
ret = regmap_read(data->regmap,
TACH1_LOW_BYTE + channel * FANX_OFFSET,
&low_byte);
if (ret < 0)
return ret;
regval = (u8) high_byte << 8 | (u8) low_byte;
*val = (FAN_TACH_CONSTANT * multiplier) / FIELD_GET(FAN_TACH_READING_MASK, regval);
return 0;
}
static int emc2305_read_fan_target(struct emc2305_data *data, int channel,
long *val)
{
unsigned int regval;
int ret;
ret = regmap_bulk_read(data->regmap,
TACH1_TARGET_LOW_BYTE + channel * FANX_OFFSET,
&regval,
2);
if (ret < 0)
return ret;
*val = regval;
return 0;
}
static int emc2305_set_fan_target(struct emc2305_data *data, int channel,
long val)
{
int ret;
ret = regmap_write(data->regmap,
TACH1_TARGET_LOW_BYTE + channel * FANX_OFFSET,
val & TACH_LOW_MASK);
if (ret < 0)
return ret;
ret = regmap_write(data->regmap,
TACH1_TARGET_HIGH_BYTE + channel * FANX_OFFSET,
(val & TACH_HIGH_MASK) >> 5);
if (ret < 0)
return ret;
return 0;
}
static int emc2305_write(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long val)
{
struct emc2305_data *data = dev_get_drvdata(dev);
int err;
switch (type) {
case hwmon_fan:
switch (attr) {
case hwmon_fan_target:
err = emc2305_set_fan_target(data, channel, val);
break;
default:
return -EOPNOTSUPP;
}
break;
default:
return -EOPNOTSUPP;
}
return err;
}
static int emc2305_read(struct device *dev, enum hwmon_sensor_types type,
u32 attr, int channel, long *val)
{
struct emc2305_data *data = dev_get_drvdata(dev);
int err;
switch (type) {
case hwmon_fan:
switch (attr) {
case hwmon_fan_input:
err = emc2305_read_fan(data, channel, val);
break;
case hwmon_fan_target:
err = emc2305_read_fan_target(data, channel, val);
break;
default:
return -EOPNOTSUPP;
}
break;
default:
return -EOPNOTSUPP;
}
return err;
}
static const char * const emc2305_fan_label[] = {
"Fan1",
"Fan2",
"Fan3",
"Fan4",
"Fan5",
};
static int emc2305_read_string(struct device *dev,
enum hwmon_sensor_types type,
u32 attr, int channel, const char **str)
{
switch (type) {
case hwmon_fan:
*str = emc2305_fan_label[channel];
break;
default:
return -EOPNOTSUPP;
}
return 0;
}
static umode_t emc2305_is_visible(const void *data, enum hwmon_sensor_types type,
u32 attr, int channel)
{
switch (type) {
case hwmon_fan:
switch (attr) {
case hwmon_fan_input:
case hwmon_fan_label:
return 0444;
case hwmon_fan_target:
return 0644;
default:
return 0;
}
default:
return 0;
}
}
static const struct hwmon_channel_info *emc2301_info[] = {
HWMON_CHANNEL_INFO(fan,
HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_LABEL),
NULL
};
static const struct hwmon_channel_info *emc2302_info[] = {
HWMON_CHANNEL_INFO(fan,
HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_LABEL,
HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_LABEL),
NULL
};
static const struct hwmon_channel_info *emc2303_info[] = {
HWMON_CHANNEL_INFO(fan,
HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_LABEL,
HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_LABEL,
HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_LABEL),
NULL
};
static const struct hwmon_channel_info *emc2305_info[] = {
HWMON_CHANNEL_INFO(fan,
HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_LABEL,
HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_LABEL,
HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_LABEL,
HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_LABEL,
HWMON_F_INPUT | HWMON_F_TARGET | HWMON_F_LABEL),
NULL
};
static const struct hwmon_ops emc2305_hwmon_ops = {
.is_visible = emc2305_is_visible,
.write = emc2305_write,
.read = emc2305_read,
.read_string = emc2305_read_string,
};
static struct hwmon_chip_info emc2305_chip_info = {
.ops = &emc2305_hwmon_ops,
};
static int emc2305_probe(struct i2c_client *client)
{
struct device *dev = &client->dev;
struct emc2305_data *data;
struct device *hwmon_dev;
const char *model_name;
unsigned int regval;
int ret;
data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
if (!data)
return -ENOMEM;
data->client = client;
i2c_set_clientdata(client, data);
data->regmap = devm_regmap_init_i2c(client, &emc2305_regmap_config);
if (IS_ERR(data->regmap)) {
dev_err(dev, "failed to allocate register map\n");
return PTR_ERR(data->regmap);
}
ret = regmap_read(data->regmap, MANUFACTURER_ID_REG, &regval);
if (ret < 0)
return ret;
if (regval != SMSC_MANUFACTURER_ID) {
dev_err(dev, "Invalid manufacturer id: 0x%x\n", regval);
return -ENODEV;
}
ret = regmap_read(data->regmap, PRODUCT_ID_REG, &regval);
if (ret < 0)
return ret;
switch (regval) {
case EMC2305_PRODUCT_ID:
model_name = "emc2305";
emc2305_chip_info.info = emc2305_info;
break;
case EMC2303_PRODUCT_ID:
model_name = "emc2303";
emc2305_chip_info.info = emc2303_info;
break;
case EMC2302_PRODUCT_ID:
model_name = "emc2302";
emc2305_chip_info.info = emc2302_info;
break;
case EMC2301_PRODUCT_ID:
model_name = "emc2301";
emc2305_chip_info.info = emc2301_info;
break;
default:
dev_err(dev, "Unknown ID detected: 0x%x\n", regval);
return -ENODEV;
}
dev_info(dev, "%s detected\n", model_name);
hwmon_dev = devm_hwmon_device_register_with_info(dev, model_name,
data, &emc2305_chip_info,
NULL);
if (IS_ERR(hwmon_dev))
return PTR_ERR(hwmon_dev);
return 0;
}
static const struct of_device_id emc2305_of_match[] = {
{ .compatible = "smsc,emc2301", },
{ .compatible = "smsc,emc2302", },
{ .compatible = "smsc,emc2303", },
{ .compatible = "smsc,emc2305", },
{ },
};
MODULE_DEVICE_TABLE(of, emc2305_of_match);
static struct i2c_driver emc2305_driver = {
.probe_new = emc2305_probe,
.driver = {
.name = "emc2305",
.of_match_table = of_match_ptr(emc2305_of_match),
},
};
module_i2c_driver(emc2305_driver);
MODULE_LICENSE("GPL");
MODULE_AUTHOR("Robert Marko <robert.marko@sartura.hr>");
MODULE_DESCRIPTION("SMSC EMC2301/2/3/5 fan controller");

42
target/linux/ipq807x/image/Makefile
View File

@ -3,46 +3,16 @@ include $(INCLUDE_DIR)/image.mk
define Device/Default
PROFILES := Default
KERNEL_DEPENDS = $$(wildcard $(DEVICE_DTS_DIR)/$$(DEVICE_DTS).dts)
KERNEL_INITRAMFS_PREFIX := $$(IMG_PREFIX)-$(1)-initramfs
KERNEL_PREFIX := $$(IMAGE_PREFIX)
KERNEL_LOADADDR := 0x41080000
DEVICE_DTS_DIR := $(DTS_DIR)/qcom
KERNEL_DEPENDS = $$(wildcard $(DTS_DIR)/$$(DEVICE_DTS).dts)
KERNEL_LOADADDR := 0x41000000
DEVICE_DTS = $$(SOC)-$(lastword $(subst _, ,$(1)))
SUPPORTED_DEVICES := $(subst _,$(comma),$(1))
DEVICE_DTS_CONFIG := config@1
DEVICE_DTS_DIR := $(DTS_DIR)/qcom
IMAGES := sysupgrade.bin
IMAGE/sysupgrade.bin = sysupgrade-tar | append-metadata
IMAGE/sysupgrade.bin/squashfs :=
endef
define Device/FitImage
KERNEL_SUFFIX := -fit-uImage.itb
KERNEL = kernel-bin | gzip | fit gzip $$(DEVICE_DTS_DIR)/$$(DEVICE_DTS).dtb
KERNEL_NAME := Image
endef
define Device/FitImageLzma
KERNEL_SUFFIX := -fit-uImage.itb
KERNEL = kernel-bin | lzma | fit lzma $$(DEVICE_DTS_DIR)/$$(DEVICE_DTS).dtb
KERNEL_NAME := Image
endef
define Device/UbiFit
KERNEL_IN_UBI := 1
IMAGES := nand-factory.ubi nand-sysupgrade.bin
IMAGE/nand-factory.ubi := append-ubi
IMAGE/nand-sysupgrade.bin := sysupgrade-tar | append-metadata
endef
define Device/xiaomi_ax3600
$(call Device/FitImage)
$(call Device/UbiFit)
DEVICE_VENDOR := Xiaomi
DEVICE_MODEL := Mi AIoT Router AX3600
BLOCKSIZE := 128k
PAGESIZE := 2048
DEVICE_DTS_CONFIG := config@ac04
SOC := ipq8071
endef
TARGET_DEVICES += xiaomi_ax3600
include $(SUBTARGET).mk
$(eval $(call BuildImage))

73
target/linux/ipq807x/image/generic.mk Normal file
View File

@ -0,0 +1,73 @@
define Device/FitImage
KERNEL_SUFFIX := -fit-uImage.itb
KERNEL = kernel-bin | gzip | fit gzip $$(DEVICE_DTS_DIR)/$$(DEVICE_DTS).dtb
KERNEL_NAME := Image
endef
define Device/FitImageLzma
KERNEL_SUFFIX := -fit-uImage.itb
KERNEL = kernel-bin | lzma | fit lzma $$(DEVICE_DTS_DIR)/$$(DEVICE_DTS).dtb
KERNEL_NAME := Image
endef
define Device/FitzImage
KERNEL_SUFFIX := -fit-zImage.itb
KERNEL = kernel-bin | fit none $$(DEVICE_DTS_DIR)/$$(DEVICE_DTS).dtb
KERNEL_NAME := zImage
endef
define Device/UbiFit
KERNEL_IN_UBI := 1
IMAGES := nand-factory.ubi nand-sysupgrade.bin
IMAGE/nand-factory.ubi := append-ubi
IMAGE/nand-sysupgrade.bin := sysupgrade-tar | append-metadata
endef
define Device/netgear_sxr80
$(call Device/FitImage)
$(call Device/UbiFit)
DEVICE_VENDOR := Netgear
DEVICE_MODEL := SXR80
BLOCKSIZE := 128k
PAGESIZE := 2048
DEVICE_DTS_CONFIG := config@hk01
SOC := ipq8074
DEVICE_PACKAGES := ipq-wifi-netgear_sxr80 uboot-envtools
endef
TARGET_DEVICES += netgear_sxr80
define Device/redmi_ax6
$(call Device/xiaomi_ax3600)
DEVICE_VENDOR := Redmi
DEVICE_MODEL := AX6
DEVICE_PACKAGES := ipq-wifi-redmi_ax6 uboot-envtools
endef
TARGET_DEVICES += redmi_ax6
define Device/xiaomi_ax3600
$(call Device/FitImage)
$(call Device/UbiFit)
DEVICE_VENDOR := Xiaomi
DEVICE_MODEL := AX3600
BLOCKSIZE := 128k
PAGESIZE := 2048
DEVICE_DTS_CONFIG := config@ac04
SOC := ipq8071
DEVICE_PACKAGES := ipq-wifi-xiaomi_ax3600 kmod-ath10k-ct ath10k-firmware-qca9887-ct \
uboot-envtools
endef
TARGET_DEVICES += xiaomi_ax3600
define Device/xiaomi_ax9000
$(call Device/FitImage)
$(call Device/UbiFit)
DEVICE_VENDOR := Xiaomi
DEVICE_MODEL := AX9000
BLOCKSIZE := 128k
PAGESIZE := 2048
DEVICE_DTS_CONFIG := config@hk14
SOC := ipq8072
DEVICE_PACKAGES := ipq-wifi-xiaomi_ax9000 kmod-ath10k-ct ath10k-firmware-qca9887-ct \
uboot-envtools
endef
TARGET_DEVICES += xiaomi_ax9000

222
target/linux/ipq807x/patches-5.10/001-v5.11-remoteproc-sysmon-Expose-the-shutdown-result.patch Normal file
View File

@ -0,0 +1,222 @@
From c47b1e60f043925ecce585f8c5340c049deda25e Mon Sep 17 00:00:00 2001
From: Bjorn Andersson <bjorn.andersson@linaro.org>
Date: Sat, 21 Nov 2020 21:41:33 -0800
Subject: [PATCH] remoteproc: sysmon: Expose the shutdown result
A graceful shutdown of the Qualcomm remote processors where
traditionally performed by invoking a shared memory state signal and
waiting for the associated ack.
This was later superseded by the "sysmon" mechanism, where some form of
shared memory bus is used to send a "graceful shutdown request" message
and one of more signals comes back to indicate its success.
But when this newer mechanism is in effect the firmware is shut down by
the time the older mechanism, implemented in the remoteproc drivers,
attempts to perform a graceful shutdown - and as such it will never
receive an ack back.
This patch therefor track the success of the latest shutdown attempt in
sysmon and exposes a new function in the API that the remoteproc driver
can use to query the success and the necessity of invoking the older
mechanism.
Tested-by: Steev Klimaszewski <steev@kali.org>
Reviewed-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
Link: https://lore.kernel.org/r/20201122054135.802935-3-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
drivers/remoteproc/qcom_common.h | 6 +++
drivers/remoteproc/qcom_sysmon.c | 82 ++++++++++++++++++++++++--------
2 files changed, 69 insertions(+), 19 deletions(-)
--- a/drivers/remoteproc/qcom_common.h
+++ b/drivers/remoteproc/qcom_common.h
@@ -51,6 +51,7 @@ struct qcom_sysmon *qcom_add_sysmon_subd
const char *name,
int ssctl_instance);
void qcom_remove_sysmon_subdev(struct qcom_sysmon *sysmon);
+bool qcom_sysmon_shutdown_acked(struct qcom_sysmon *sysmon);
#else
static inline struct qcom_sysmon *qcom_add_sysmon_subdev(struct rproc *rproc,
const char *name,
@@ -62,6 +63,11 @@ static inline struct qcom_sysmon *qcom_a
static inline void qcom_remove_sysmon_subdev(struct qcom_sysmon *sysmon)
{
}
+
+static inline bool qcom_sysmon_shutdown_acked(struct qcom_sysmon *sysmon)
+{
+ return false;
+}
#endif
#endif
--- a/drivers/remoteproc/qcom_sysmon.c
+++ b/drivers/remoteproc/qcom_sysmon.c
@@ -44,6 +44,7 @@ struct qcom_sysmon {
struct mutex lock;
bool ssr_ack;
+ bool shutdown_acked;
struct qmi_handle qmi;
struct sockaddr_qrtr ssctl;
@@ -115,10 +116,13 @@ out_unlock:
/**
* sysmon_request_shutdown() - request graceful shutdown of remote
* @sysmon: sysmon context
+ *
+ * Return: boolean indicator of the remote processor acking the request
*/
-static void sysmon_request_shutdown(struct qcom_sysmon *sysmon)
+static bool sysmon_request_shutdown(struct qcom_sysmon *sysmon)
{
char *req = "ssr:shutdown";
+ bool acked = false;
int ret;
mutex_lock(&sysmon->lock);
@@ -141,9 +145,13 @@ static void sysmon_request_shutdown(stru
if (!sysmon->ssr_ack)
dev_err(sysmon->dev,
"unexpected response to sysmon shutdown request\n");
+ else
+ acked = true;
out_unlock:
mutex_unlock(&sysmon->lock);
+
+ return acked;
}
static int sysmon_callback(struct rpmsg_device *rpdev, void *data, int count,
@@ -297,14 +305,33 @@ static struct qmi_msg_handler qmi_indica
{}
};
+static bool ssctl_request_shutdown_wait(struct qcom_sysmon *sysmon)
+{
+ int ret;
+
+ ret = wait_for_completion_timeout(&sysmon->shutdown_comp, 10 * HZ);
+ if (ret)
+ return true;
+
+ ret = try_wait_for_completion(&sysmon->ind_comp);
+ if (ret)
+ return true;
+
+ dev_err(sysmon->dev, "timeout waiting for shutdown ack\n");
+ return false;
+}
+
/**
* ssctl_request_shutdown() - request shutdown via SSCTL QMI service
* @sysmon: sysmon context
+ *
+ * Return: boolean indicator of the remote processor acking the request
*/
-static void ssctl_request_shutdown(struct qcom_sysmon *sysmon)
+static bool ssctl_request_shutdown(struct qcom_sysmon *sysmon)
{
struct ssctl_shutdown_resp resp;
struct qmi_txn txn;
+ bool acked = false;
int ret;
reinit_completion(&sysmon->ind_comp);
@@ -312,7 +339,7 @@ static void ssctl_request_shutdown(struc
ret = qmi_txn_init(&sysmon->qmi, &txn, ssctl_shutdown_resp_ei, &resp);
if (ret < 0) {
dev_err(sysmon->dev, "failed to allocate QMI txn\n");
- return;
+ return false;
}
ret = qmi_send_request(&sysmon->qmi, &sysmon->ssctl, &txn,
@@ -320,27 +347,23 @@ static void ssctl_request_shutdown(struc
if (ret < 0) {
dev_err(sysmon->dev, "failed to send shutdown request\n");
qmi_txn_cancel(&txn);
- return;
+ return false;
}
ret = qmi_txn_wait(&txn, 5 * HZ);
- if (ret < 0)
+ if (ret < 0) {
dev_err(sysmon->dev, "failed receiving QMI response\n");
- else if (resp.resp.result)
+ } else if (resp.resp.result) {
dev_err(sysmon->dev, "shutdown request failed\n");
- else
+ } else {
dev_dbg(sysmon->dev, "shutdown request completed\n");
-
- if (sysmon->shutdown_irq > 0) {
- ret = wait_for_completion_timeout(&sysmon->shutdown_comp,
- 10 * HZ);
- if (!ret) {
- ret = try_wait_for_completion(&sysmon->ind_comp);
- if (!ret)
- dev_err(sysmon->dev,
- "timeout waiting for shutdown ack\n");
- }
+ acked = true;
}
+
+ if (sysmon->shutdown_irq > 0)
+ return ssctl_request_shutdown_wait(sysmon);
+
+ return acked;
}
/**
@@ -510,6 +533,9 @@ static void sysmon_stop(struct rproc_sub
.subsys_name = sysmon->name,
.ssr_event = SSCTL_SSR_EVENT_BEFORE_SHUTDOWN
};
+ bool acked;
+
+ sysmon->shutdown_acked = false;
mutex_lock(&sysmon->state_lock);
sysmon->state = SSCTL_SSR_EVENT_BEFORE_SHUTDOWN;
@@ -521,9 +547,11 @@ static void sysmon_stop(struct rproc_sub
return;
if (sysmon->ssctl_version)
- ssctl_request_shutdown(sysmon);
+ acked = ssctl_request_shutdown(sysmon);
else if (sysmon->ept)
- sysmon_request_shutdown(sysmon);
+ acked = sysmon_request_shutdown(sysmon);
+
+ sysmon->shutdown_acked = acked;
}
static void sysmon_unprepare(struct rproc_subdev *subdev)
@@ -682,6 +710,22 @@ void qcom_remove_sysmon_subdev(struct qc
EXPORT_SYMBOL_GPL(qcom_remove_sysmon_subdev);
/**
+ * qcom_sysmon_shutdown_acked() - query the success of the last shutdown
+ * @sysmon: sysmon context
+ *
+ * When sysmon is used to request a graceful shutdown of the remote processor
+ * this can be used by the remoteproc driver to query the success, in order to
+ * know if it should fall back to other means of requesting a shutdown.
+ *
+ * Return: boolean indicator of the success of the last shutdown request
+ */
+bool qcom_sysmon_shutdown_acked(struct qcom_sysmon *sysmon)
+{
+ return sysmon && sysmon->shutdown_acked;
+}
+EXPORT_SYMBOL_GPL(qcom_sysmon_shutdown_acked);
+
+/**
* sysmon_probe() - probe sys_mon channel
* @rpdev: rpmsg device handle
*

120
target/linux/ipq807x/patches-5.10/002-v5.11-remoteproc-qcom-q6v5-Query-sysmon-before-graceful-sh.patch Normal file
View File

@ -0,0 +1,120 @@
From 47c815630294b6d2284fff10377d808f376de2b2 Mon Sep 17 00:00:00 2001
From: Bjorn Andersson <bjorn.andersson@linaro.org>
Date: Sat, 21 Nov 2020 21:41:34 -0800
Subject: [PATCH 01/16] remoteproc: qcom: q6v5: Query sysmon before graceful
shutdown
Requesting a graceful shutdown through the shared memory state signals
will not be acked in the event that sysmon has already successfully shut
down the remote firmware. So extend the stop request API to optionally
take the remoteproc's sysmon instance and query if there's already been
a successful shutdown attempt, before doing the signal dance.
Tested-by: Steev Klimaszewski <steev@kali.org>
Reviewed-by: Rishabh Bhatnagar <rishabhb@codeaurora.org>
Link: https://lore.kernel.org/r/20201122054135.802935-4-bjorn.andersson@linaro.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
drivers/remoteproc/qcom_q6v5.c | 8 +++++++-
drivers/remoteproc/qcom_q6v5.h | 3 ++-
drivers/remoteproc/qcom_q6v5_adsp.c | 2 +-
drivers/remoteproc/qcom_q6v5_mss.c | 2 +-
drivers/remoteproc/qcom_q6v5_pas.c | 2 +-
drivers/remoteproc/qcom_q6v5_wcss.c | 2 +-
6 files changed, 13 insertions(+), 6 deletions(-)
--- a/drivers/remoteproc/qcom_q6v5.c
+++ b/drivers/remoteproc/qcom_q6v5.c
@@ -13,6 +13,7 @@
#include <linux/soc/qcom/smem.h>
#include <linux/soc/qcom/smem_state.h>
#include <linux/remoteproc.h>
+#include "qcom_common.h"
#include "qcom_q6v5.h"
#define Q6V5_PANIC_DELAY_MS 200
@@ -146,15 +147,20 @@ static irqreturn_t q6v5_stop_interrupt(i
/**
* qcom_q6v5_request_stop() - request the remote processor to stop
* @q6v5: reference to qcom_q6v5 context
+ * @sysmon: reference to the remote's sysmon instance, or NULL
*
* Return: 0 on success, negative errno on failure
*/
-int qcom_q6v5_request_stop(struct qcom_q6v5 *q6v5)
+int qcom_q6v5_request_stop(struct qcom_q6v5 *q6v5, struct qcom_sysmon *sysmon)
{
int ret;
q6v5->running = false;
+ /* Don't perform SMP2P dance if sysmon already shut down the remote */
+ if (qcom_sysmon_shutdown_acked(sysmon))
+ return 0;
+
qcom_smem_state_update_bits(q6v5->state,
BIT(q6v5->stop_bit), BIT(q6v5->stop_bit));
--- a/drivers/remoteproc/qcom_q6v5.h
+++ b/drivers/remoteproc/qcom_q6v5.h
@@ -8,6 +8,7 @@
struct rproc;
struct qcom_smem_state;
+struct qcom_sysmon;
struct qcom_q6v5 {
struct device *dev;
@@ -40,7 +41,7 @@ int qcom_q6v5_init(struct qcom_q6v5 *q6v
int qcom_q6v5_prepare(struct qcom_q6v5 *q6v5);
int qcom_q6v5_unprepare(struct qcom_q6v5 *q6v5);
-int qcom_q6v5_request_stop(struct qcom_q6v5 *q6v5);
+int qcom_q6v5_request_stop(struct qcom_q6v5 *q6v5, struct qcom_sysmon *sysmon);
int qcom_q6v5_wait_for_start(struct qcom_q6v5 *q6v5, int timeout);
unsigned long qcom_q6v5_panic(struct qcom_q6v5 *q6v5);
--- a/drivers/remoteproc/qcom_q6v5_adsp.c
+++ b/drivers/remoteproc/qcom_q6v5_adsp.c
@@ -266,7 +266,7 @@ static int adsp_stop(struct rproc *rproc
int handover;
int ret;
- ret = qcom_q6v5_request_stop(&adsp->q6v5);
+ ret = qcom_q6v5_request_stop(&adsp->q6v5, adsp->sysmon);
if (ret == -ETIMEDOUT)
dev_err(adsp->dev, "timed out on wait\n");
--- a/drivers/remoteproc/qcom_q6v5_mss.c
+++ b/drivers/remoteproc/qcom_q6v5_mss.c
@@ -1376,7 +1376,7 @@ static int q6v5_stop(struct rproc *rproc
struct q6v5 *qproc = (struct q6v5 *)rproc->priv;
int ret;
- ret = qcom_q6v5_request_stop(&qproc->q6v5);
+ ret = qcom_q6v5_request_stop(&qproc->q6v5, qproc->sysmon);
if (ret == -ETIMEDOUT)
dev_err(qproc->dev, "timed out on wait\n");
--- a/drivers/remoteproc/qcom_q6v5_pas.c
+++ b/drivers/remoteproc/qcom_q6v5_pas.c
@@ -217,7 +217,7 @@ static int adsp_stop(struct rproc *rproc
int handover;
int ret;
- ret = qcom_q6v5_request_stop(&adsp->q6v5);
+ ret = qcom_q6v5_request_stop(&adsp->q6v5, adsp->sysmon);
if (ret == -ETIMEDOUT)
dev_err(adsp->dev, "timed out on wait\n");
--- a/drivers/remoteproc/qcom_q6v5_wcss.c
+++ b/drivers/remoteproc/qcom_q6v5_wcss.c
@@ -390,7 +390,7 @@ static int q6v5_wcss_stop(struct rproc *
int ret;
/* WCSS powerdown */
- ret = qcom_q6v5_request_stop(&wcss->q6v5);
+ ret = qcom_q6v5_request_stop(&wcss->q6v5, NULL);
if (ret == -ETIMEDOUT) {
dev_err(wcss->dev, "timed out on wait\n");
return ret;

60
target/linux/ipq807x/patches-5.4/106-01-remoteproc-qcom-wcss-populate-hardcoded-param-using-driver-data.patch → target/linux/ipq807x/patches-5.10/003-v5.13-remoteproc-qcom-wcss-populate-hardcoded-param-using-.patch
View File

@ -1,58 +1,8 @@
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From: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
To: bjorn.andersson@linaro.org, linux-remoteproc@vger.kernel.org,
sboyd@kernel.org, linux-clk@vger.kernel.org,
linux-arm-msm@vger.kernel.org
Cc: agross@kernel.org, linux-soc@vger.kernel.org,
devicetree@vger.kernel.org, govinds@codeaurora.org,
sricharan@codeaurora.org, gokulsri@codeaurora.org
Subject: [PATCH v8 1/4] remoteproc: qcom: wcss: populate hardcoded param using
driver data
Date: Thu, 30 Jul 2020 17:44:01 +0530
Message-Id: <1596111244-28411-2-git-send-email-gokulsri@codeaurora.org>
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From 6a83f257a5a10b24c7311475f19d58399c475476 Mon Sep 17 00:00:00 2001
From: Govind Singh <govinds@codeaurora.org>
Date: Fri, 29 Jan 2021 00:18:12 +0530
Subject: [PATCH 02/16] remoteproc: qcom: wcss: populate hardcoded param using
driver data
Q6 based WiFi fw loading is supported across
different targets, ex: IPQ8074/QCS404. In order to
@ -61,6 +11,8 @@ hardcoded param using driver data.
Signed-off-by: Govind Singh <govinds@codeaurora.org>
Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
Link: https://lore.kernel.org/r/1611859695-11824-2-git-send-email-gokulsri@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
drivers/remoteproc/qcom_q6v5_wcss.c | 29 ++++++++++++++++++++++++-----
1 file changed, 24 insertions(+), 5 deletions(-)

83
target/linux/ipq807x/patches-5.4/106-02-remoteproc-qcom-wcss-Add-non-pas-wcss-Q6-support-for-QCS404.patch → target/linux/ipq807x/patches-5.10/004-v5.13-remoteproc-qcom-wcss-Add-non-pas-wcss-Q6-support-for.patch
View File

@ -1,57 +1,8 @@
From patchwork Thu Jul 30 12:14:03 2020
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From: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
To: bjorn.andersson@linaro.org, linux-remoteproc@vger.kernel.org,
sboyd@kernel.org, linux-clk@vger.kernel.org,
linux-arm-msm@vger.kernel.org
Cc: agross@kernel.org, linux-soc@vger.kernel.org,
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sricharan@codeaurora.org, gokulsri@codeaurora.org
Subject: [PATCH v8 3/4] remoteproc: qcom: wcss: Add non pas wcss Q6 support
for QCS404
Date: Thu, 30 Jul 2020 17:44:03 +0530
Message-Id: <1596111244-28411-4-git-send-email-gokulsri@codeaurora.org>
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From 155940892f022482c7e7a33c917fd766519d031b Mon Sep 17 00:00:00 2001
From: Govind Singh <govinds@codeaurora.org>
Date: Fri, 29 Jan 2021 00:18:14 +0530
Subject: [PATCH 03/16] remoteproc: qcom: wcss: Add non pas wcss Q6 support for
QCS404
Add non PAS WCSS remoteproc driver support for QCS404 SOC.
Add WCSS q6 bootup and shutdown sequence handled from
@ -59,9 +10,11 @@ Application Processor SubSystem(APSS).
Signed-off-by: Govind Singh <govinds@codeaurora.org>
Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
Link: https://lore.kernel.org/r/1611859695-11824-4-git-send-email-gokulsri@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
drivers/remoteproc/qcom_q6v5_wcss.c | 564 +++++++++++++++++++++++++++++++++---
1 file changed, 526 insertions(+), 38 deletions(-)
drivers/remoteproc/qcom_q6v5_wcss.c | 566 ++++++++++++++++++++++++++--
1 file changed, 528 insertions(+), 38 deletions(-)
--- a/drivers/remoteproc/qcom_q6v5_wcss.c
+++ b/drivers/remoteproc/qcom_q6v5_wcss.c
@ -465,12 +418,12 @@ Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
int ret;
/* WCSS powerdown */
- ret = qcom_q6v5_request_stop(&wcss->q6v5);
- ret = qcom_q6v5_request_stop(&wcss->q6v5, NULL);
- if (ret == -ETIMEDOUT) {
- dev_err(wcss->dev, "timed out on wait\n");
- return ret;
+ if (wcss->requires_force_stop) {
+ ret = qcom_q6v5_request_stop(&wcss->q6v5);
+ ret = qcom_q6v5_request_stop(&wcss->q6v5, NULL);
+ if (ret == -ETIMEDOUT) {
+ dev_err(wcss->dev, "timed out on wait\n");
+ return ret;
@ -768,17 +721,19 @@ Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
if (ret)
goto free_rproc;
@@ -584,6 +1051,9 @@ static int q6v5_wcss_probe(struct platfo
qcom_add_glink_subdev(rproc, &wcss->glink_subdev);
@@ -585,6 +1052,11 @@ static int q6v5_wcss_probe(struct platfo
qcom_add_glink_subdev(rproc, &wcss->glink_subdev, "q6wcss");
qcom_add_ssr_subdev(rproc, &wcss->ssr_subdev, "q6wcss");
+ wcss->sysmon = qcom_add_sysmon_subdev(rproc,
+ desc->sysmon_name,
+ desc->ssctl_id);
+ if (desc->ssctl_id)
+ wcss->sysmon = qcom_add_sysmon_subdev(rproc,
+ desc->sysmon_name,
+ desc->ssctl_id);
+
ret = rproc_add(rproc);
if (ret)
@@ -612,10 +1082,28 @@ static int q6v5_wcss_remove(struct platf
goto free_rproc;
@@ -612,10 +1084,28 @@ static int q6v5_wcss_remove(struct platf
static const struct wcss_data wcss_ipq8074_res_init = {
.firmware_name = "IPQ8074/q6_fw.mdt",
.crash_reason_smem = WCSS_CRASH_REASON,

43
target/linux/ipq807x/patches-5.10/005-v5.13-remoteproc-qcom-wcss-explicitly-request-exclusive-re.patch Normal file
View File

@ -0,0 +1,43 @@
From 7b230496f6b45e840bc7b13e7df2a8676bab9230 Mon Sep 17 00:00:00 2001
From: Govind Singh <govinds@codeaurora.org>
Date: Fri, 29 Jan 2021 00:18:15 +0530
Subject: [PATCH 04/16] remoteproc: qcom: wcss: explicitly request exclusive
reset control
Use request exclusive reset control for wcss reset controls.
Signed-off-by: Govind Singh <govinds@codeaurora.org>
Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
Link: https://lore.kernel.org/r/1611859695-11824-5-git-send-email-gokulsri@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
drivers/remoteproc/qcom_q6v5_wcss.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
--- a/drivers/remoteproc/qcom_q6v5_wcss.c
+++ b/drivers/remoteproc/qcom_q6v5_wcss.c
@@ -788,21 +788,21 @@ static int q6v5_wcss_init_reset(struct q
struct device *dev = wcss->dev;
if (desc->aon_reset_required) {
- wcss->wcss_aon_reset = devm_reset_control_get(dev, "wcss_aon_reset");
+ wcss->wcss_aon_reset = devm_reset_control_get_exclusive(dev, "wcss_aon_reset");
if (IS_ERR(wcss->wcss_aon_reset)) {
dev_err(wcss->dev, "fail to acquire wcss_aon_reset\n");
return PTR_ERR(wcss->wcss_aon_reset);
}
}
- wcss->wcss_reset = devm_reset_control_get(dev, "wcss_reset");
+ wcss->wcss_reset = devm_reset_control_get_exclusive(dev, "wcss_reset");
if (IS_ERR(wcss->wcss_reset)) {
dev_err(wcss->dev, "unable to acquire wcss_reset\n");
return PTR_ERR(wcss->wcss_reset);
}
if (desc->wcss_q6_reset_required) {
- wcss->wcss_q6_reset = devm_reset_control_get(dev, "wcss_q6_reset");
+ wcss->wcss_q6_reset = devm_reset_control_get_exclusive(dev, "wcss_q6_reset");
if (IS_ERR(wcss->wcss_q6_reset)) {
dev_err(wcss->dev, "unable to acquire wcss_q6_reset\n");
return PTR_ERR(wcss->wcss_q6_reset);

32
target/linux/ipq807x/patches-5.10/006-v5.13-remoteproc-qcom-wcss-Fix-return-value-check-in-q6v5_.patch Normal file
View File

@ -0,0 +1,32 @@
From 5b8b0967576f04d2ee3ea36310c078a3d50e7339 Mon Sep 17 00:00:00 2001
From: Wei Yongjun <weiyongjun1@huawei.com>
Date: Fri, 19 Mar 2021 09:41:00 +0000
Subject: [PATCH 05/16] remoteproc: qcom: wcss: Fix return value check in
q6v5_wcss_init_mmio()
In case of error, the function devm_ioremap() returns NULL pointer
not ERR_PTR(). The IS_ERR() test in the return value check should
be replaced with NULL test.
Fixes: 0af65b9b915e ("remoteproc: qcom: wcss: Add non pas wcss Q6 support for QCS404")
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Link: https://lore.kernel.org/r/20210319094100.4185044-1-weiyongjun1@huawei.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
drivers/remoteproc/qcom_q6v5_wcss.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
--- a/drivers/remoteproc/qcom_q6v5_wcss.c
+++ b/drivers/remoteproc/qcom_q6v5_wcss.c
@@ -829,8 +829,8 @@ static int q6v5_wcss_init_mmio(struct q6
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "qdsp6");
wcss->reg_base = devm_ioremap(&pdev->dev, res->start,
resource_size(res));
- if (IS_ERR(wcss->reg_base))
- return PTR_ERR(wcss->reg_base);
+ if (!wcss->reg_base)
+ return -ENOMEM;
if (wcss->version == WCSS_IPQ8074) {
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "rmb");

32
target/linux/ipq807x/patches-5.10/007-v5.13-remoteproc-qcom-wcss-Fix-wrong-pointer-passed-to-PTR.patch Normal file
View File

@ -0,0 +1,32 @@
From 6a52dbbde0e741e84f217cf762233589cc3efd13 Mon Sep 17 00:00:00 2001
From: Wei Yongjun <weiyongjun1@huawei.com>
Date: Fri, 26 Mar 2021 02:47:41 +0000
Subject: [PATCH 06/16] remoteproc: qcom: wcss: Fix wrong pointer passed to
PTR_ERR()
PTR_ERR should access the value just tested by IS_ERR, otherwise
the wrong error code will be returned.
This commit fix it by return 'ret' directly.
Reviewed-by: Dan Carpenter <dan.carpenter@oracle.com>
Fixes: 0af65b9b915e ("remoteproc: qcom: wcss: Add non pas wcss Q6 support for QCS404")
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Link: https://lore.kernel.org/r/20210326024741.841267-1-weiyongjun1@huawei.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
drivers/remoteproc/qcom_q6v5_wcss.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
--- a/drivers/remoteproc/qcom_q6v5_wcss.c
+++ b/drivers/remoteproc/qcom_q6v5_wcss.c
@@ -972,7 +972,7 @@ static int q6v5_wcss_init_clock(struct q
ret = PTR_ERR(wcss->qdsp6ss_axim_cbcr);
if (ret != -EPROBE_DEFER)
dev_err(wcss->dev, "failed to get axim cbcr clk\n");
- return PTR_ERR(wcss->qdsp6ss_abhm_cbcr);
+ return ret;
}
wcss->lcc_bcr_sleep = devm_clk_get(wcss->dev, "lcc_bcr_sleep");

89
target/linux/ipq807x/patches-5.10/008-v5.13-remoteproc-qcom-wcss-Remove-unnecessary-PTR_ERR.patch Normal file
View File

@ -0,0 +1,89 @@
From 00f24490f498db0ea67715a4dfe6c4a6ca11c6a0 Mon Sep 17 00:00:00 2001
From: Junlin Yang <yangjunlin@yulong.com>
Date: Thu, 8 Apr 2021 22:33:22 +0800
Subject: [PATCH 07/16] remoteproc: qcom: wcss: Remove unnecessary PTR_ERR()
Remove unnecessary PTR_ERR(), it has been assigned to ret before,
so return ret directly.
Signed-off-by: Junlin Yang <yangjunlin@yulong.com>
Link: https://lore.kernel.org/r/20210408143322.1647-1-angkery@163.com
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
---
drivers/remoteproc/qcom_q6v5_wcss.c | 16 ++++++++--------
1 file changed, 8 insertions(+), 8 deletions(-)
--- a/drivers/remoteproc/qcom_q6v5_wcss.c
+++ b/drivers/remoteproc/qcom_q6v5_wcss.c
@@ -913,7 +913,7 @@ static int q6v5_wcss_init_clock(struct q
ret = PTR_ERR(wcss->gcc_abhs_cbcr);
if (ret != -EPROBE_DEFER)
dev_err(wcss->dev, "failed to get gcc abhs clock");
- return PTR_ERR(wcss->gcc_abhs_cbcr);
+ return ret;
}
wcss->gcc_axim_cbcr = devm_clk_get(wcss->dev, "gcc_axim_cbcr");
@@ -921,7 +921,7 @@ static int q6v5_wcss_init_clock(struct q
ret = PTR_ERR(wcss->gcc_axim_cbcr);
if (ret != -EPROBE_DEFER)
dev_err(wcss->dev, "failed to get gcc axim clock\n");
- return PTR_ERR(wcss->gcc_axim_cbcr);
+ return ret;
}
wcss->ahbfabric_cbcr_clk = devm_clk_get(wcss->dev,
@@ -930,7 +930,7 @@ static int q6v5_wcss_init_clock(struct q
ret = PTR_ERR(wcss->ahbfabric_cbcr_clk);
if (ret != -EPROBE_DEFER)
dev_err(wcss->dev, "failed to get ahbfabric clock\n");
- return PTR_ERR(wcss->ahbfabric_cbcr_clk);
+ return ret;
}
wcss->lcc_csr_cbcr = devm_clk_get(wcss->dev, "tcsr_lcc_cbc");
@@ -938,7 +938,7 @@ static int q6v5_wcss_init_clock(struct q
ret = PTR_ERR(wcss->lcc_csr_cbcr);
if (ret != -EPROBE_DEFER)
dev_err(wcss->dev, "failed to get csr cbcr clk\n");
- return PTR_ERR(wcss->lcc_csr_cbcr);
+ return ret;
}
wcss->ahbs_cbcr = devm_clk_get(wcss->dev,
@@ -947,7 +947,7 @@ static int q6v5_wcss_init_clock(struct q
ret = PTR_ERR(wcss->ahbs_cbcr);
if (ret != -EPROBE_DEFER)
dev_err(wcss->dev, "failed to get ahbs_cbcr clk\n");
- return PTR_ERR(wcss->ahbs_cbcr);
+ return ret;
}
wcss->tcm_slave_cbcr = devm_clk_get(wcss->dev,
@@ -956,7 +956,7 @@ static int q6v5_wcss_init_clock(struct q
ret = PTR_ERR(wcss->tcm_slave_cbcr);
if (ret != -EPROBE_DEFER)
dev_err(wcss->dev, "failed to get tcm cbcr clk\n");
- return PTR_ERR(wcss->tcm_slave_cbcr);
+ return ret;
}
wcss->qdsp6ss_abhm_cbcr = devm_clk_get(wcss->dev, "lcc_abhm_cbc");
@@ -964,7 +964,7 @@ static int q6v5_wcss_init_clock(struct q
ret = PTR_ERR(wcss->qdsp6ss_abhm_cbcr);
if (ret != -EPROBE_DEFER)
dev_err(wcss->dev, "failed to get abhm cbcr clk\n");
- return PTR_ERR(wcss->qdsp6ss_abhm_cbcr);
+ return ret;
}
wcss->qdsp6ss_axim_cbcr = devm_clk_get(wcss->dev, "lcc_axim_cbc");
@@ -980,7 +980,7 @@ static int q6v5_wcss_init_clock(struct q
ret = PTR_ERR(wcss->lcc_bcr_sleep);
if (ret != -EPROBE_DEFER)
dev_err(wcss->dev, "failed to get bcr cbcr clk\n");
- return PTR_ERR(wcss->lcc_bcr_sleep);
+ return ret;
}
return 0;

217
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@ -0,0 +1,217 @@
From 803eb124e1a64e42888542c3444bfe6dac412c7f Mon Sep 17 00:00:00 2001
From: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Date: Mon, 4 Jan 2021 09:41:35 +0530
Subject: mtd: parsers: Add Qcom SMEM parser
NAND based Qualcomm platforms have the partition table populated in the
Shared Memory (SMEM). Hence, add a parser for parsing the partitions
from it.
Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Link: https://lore.kernel.org/linux-mtd/20210104041137.113075-3-manivannan.sadhasivam@linaro.org
---
drivers/mtd/parsers/Kconfig | 8 ++
drivers/mtd/parsers/Makefile | 1 +
drivers/mtd/parsers/qcomsmempart.c | 170 +++++++++++++++++++++++++++++++++++++
3 files changed, 179 insertions(+)
create mode 100644 drivers/mtd/parsers/qcomsmempart.c
--- a/drivers/mtd/parsers/Kconfig
+++ b/drivers/mtd/parsers/Kconfig
@@ -196,6 +196,14 @@ config MTD_REDBOOT_PARTS_READONLY
endif # MTD_REDBOOT_PARTS
+config MTD_QCOMSMEM_PARTS
+ tristate "Qualcomm SMEM NAND flash partition parser"
+ depends on MTD_NAND_QCOM || COMPILE_TEST
+ depends on QCOM_SMEM
+ help
+ This provides support for parsing partitions from Shared Memory (SMEM)
+ for NAND flash on Qualcomm platforms.
+
config MTD_ROUTERBOOT_PARTS
tristate "RouterBoot flash partition parser"
depends on MTD && OF
--- a/drivers/mtd/parsers/Makefile
+++ b/drivers/mtd/parsers/Makefile
@@ -13,4 +13,5 @@ obj-$(CONFIG_MTD_AFS_PARTS) += afs.o
obj-$(CONFIG_MTD_PARSER_TRX) += parser_trx.o
obj-$(CONFIG_MTD_SHARPSL_PARTS) += sharpslpart.o
obj-$(CONFIG_MTD_REDBOOT_PARTS) += redboot.o
+obj-$(CONFIG_MTD_QCOMSMEM_PARTS) += qcomsmempart.o
obj-$(CONFIG_MTD_ROUTERBOOT_PARTS) += routerbootpart.o
--- /dev/null
+++ b/drivers/mtd/parsers/qcomsmempart.c
@@ -0,0 +1,170 @@
+// SPDX-License-Identifier: GPL-2.0-only
+/*
+ * Qualcomm SMEM NAND flash partition parser
+ *
+ * Copyright (C) 2020, Linaro Ltd.
+ */
+
+#include <linux/ctype.h>
+#include <linux/module.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/slab.h>
+#include <linux/soc/qcom/smem.h>
+
+#define SMEM_AARM_PARTITION_TABLE 9
+#define SMEM_APPS 0
+
+#define SMEM_FLASH_PART_MAGIC1 0x55ee73aa
+#define SMEM_FLASH_PART_MAGIC2 0xe35ebddb
+#define SMEM_FLASH_PTABLE_V3 3
+#define SMEM_FLASH_PTABLE_V4 4
+#define SMEM_FLASH_PTABLE_MAX_PARTS_V3 16
+#define SMEM_FLASH_PTABLE_MAX_PARTS_V4 48
+#define SMEM_FLASH_PTABLE_HDR_LEN (4 * sizeof(u32))
+#define SMEM_FLASH_PTABLE_NAME_SIZE 16
+
+/**
+ * struct smem_flash_pentry - SMEM Flash partition entry
+ * @name: Name of the partition
+ * @offset: Offset in blocks
+ * @length: Length of the partition in blocks
+ * @attr: Flags for this partition
+ */
+struct smem_flash_pentry {
+ char name[SMEM_FLASH_PTABLE_NAME_SIZE];
+ __le32 offset;
+ __le32 length;
+ u8 attr;
+} __packed __aligned(4);
+
+/**
+ * struct smem_flash_ptable - SMEM Flash partition table
+ * @magic1: Partition table Magic 1
+ * @magic2: Partition table Magic 2
+ * @version: Partition table version
+ * @numparts: Number of partitions in this ptable
+ * @pentry: Flash partition entries belonging to this ptable
+ */
+struct smem_flash_ptable {
+ __le32 magic1;
+ __le32 magic2;
+ __le32 version;
+ __le32 numparts;
+ struct smem_flash_pentry pentry[SMEM_FLASH_PTABLE_MAX_PARTS_V4];
+} __packed __aligned(4);
+
+static int parse_qcomsmem_part(struct mtd_info *mtd,
+ const struct mtd_partition **pparts,
+ struct mtd_part_parser_data *data)
+{
+ struct smem_flash_pentry *pentry;
+ struct smem_flash_ptable *ptable;
+ size_t len = SMEM_FLASH_PTABLE_HDR_LEN;
+ struct mtd_partition *parts;
+ int ret, i, numparts;
+ char *name, *c;
+
+ pr_debug("Parsing partition table info from SMEM\n");
+ ptable = qcom_smem_get(SMEM_APPS, SMEM_AARM_PARTITION_TABLE, &len);
+ if (IS_ERR(ptable)) {
+ pr_err("Error reading partition table header\n");
+ return PTR_ERR(ptable);
+ }
+
+ /* Verify ptable magic */
+ if (le32_to_cpu(ptable->magic1) != SMEM_FLASH_PART_MAGIC1 ||
+ le32_to_cpu(ptable->magic2) != SMEM_FLASH_PART_MAGIC2) {
+ pr_err("Partition table magic verification failed\n");
+ return -EINVAL;
+ }
+
+ /* Ensure that # of partitions is less than the max we have allocated */
+ numparts = le32_to_cpu(ptable->numparts);
+ if (numparts > SMEM_FLASH_PTABLE_MAX_PARTS_V4) {
+ pr_err("Partition numbers exceed the max limit\n");
+ return -EINVAL;
+ }
+
+ /* Find out length of partition data based on table version */
+ if (le32_to_cpu(ptable->version) <= SMEM_FLASH_PTABLE_V3) {
+ len = SMEM_FLASH_PTABLE_HDR_LEN + SMEM_FLASH_PTABLE_MAX_PARTS_V3 *
+ sizeof(struct smem_flash_pentry);
+ } else if (le32_to_cpu(ptable->version) == SMEM_FLASH_PTABLE_V4) {
+ len = SMEM_FLASH_PTABLE_HDR_LEN + SMEM_FLASH_PTABLE_MAX_PARTS_V4 *
+ sizeof(struct smem_flash_pentry);
+ } else {
+ pr_err("Unknown ptable version (%d)", le32_to_cpu(ptable->version));
+ return -EINVAL;
+ }
+
+ /*
+ * Now that the partition table header has been parsed, verified
+ * and the length of the partition table calculated, read the
+ * complete partition table
+ */
+ ptable = qcom_smem_get(SMEM_APPS, SMEM_AARM_PARTITION_TABLE, &len);
+ if (IS_ERR_OR_NULL(ptable)) {
+ pr_err("Error reading partition table\n");
+ return PTR_ERR(ptable);
+ }
+
+ parts = kcalloc(numparts, sizeof(*parts), GFP_KERNEL);
+ if (!parts)
+ return -ENOMEM;
+
+ for (i = 0; i < numparts; i++) {
+ pentry = &ptable->pentry[i];
+ if (pentry->name[0] == '\0')
+ continue;
+
+ name = kstrdup(pentry->name, GFP_KERNEL);
+ if (!name) {
+ ret = -ENOMEM;
+ goto out_free_parts;
+ }
+
+ /* Convert name to lower case */
+ for (c = name; *c != '\0'; c++)
+ *c = tolower(*c);
+
+ parts[i].name = name;
+ parts[i].offset = le32_to_cpu(pentry->offset) * mtd->erasesize;
+ parts[i].mask_flags = pentry->attr;
+ parts[i].size = le32_to_cpu(pentry->length) * mtd->erasesize;
+ pr_debug("%d: %s offs=0x%08x size=0x%08x attr:0x%08x\n",
+ i, pentry->name, le32_to_cpu(pentry->offset),
+ le32_to_cpu(pentry->length), pentry->attr);
+ }
+
+ pr_debug("SMEM partition table found: ver: %d len: %d\n",
+ le32_to_cpu(ptable->version), numparts);
+ *pparts = parts;
+
+ return numparts;
+
+out_free_parts:
+ while (--i >= 0)
+ kfree(parts[i].name);
+ kfree(parts);
+ *pparts = NULL;
+
+ return ret;
+}
+
+static const struct of_device_id qcomsmem_of_match_table[] = {
+ { .compatible = "qcom,smem-part" },
+ {},
+};
+MODULE_DEVICE_TABLE(of, qcomsmem_of_match_table);
+
+static struct mtd_part_parser mtd_parser_qcomsmem = {
+ .parse_fn = parse_qcomsmem_part,
+ .name = "qcomsmem",
+ .of_match_table = qcomsmem_of_match_table,
+};
+module_mtd_part_parser(mtd_parser_qcomsmem);
+
+MODULE_LICENSE("GPL v2");
+MODULE_AUTHOR("Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>");
+MODULE_DESCRIPTION("Qualcomm SMEM NAND flash partition parser");

120
target/linux/ipq807x/patches-5.10/010-v5.11-PCI-dwc-Drop-the-.set_num_vectors-host-op.patch Normal file
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@ -0,0 +1,120 @@
From 80b960829a85e555b96bfd4e31f31b3db3e8f5da Mon Sep 17 00:00:00 2001
From: Rob Herring <robh@kernel.org>
Date: Thu, 5 Nov 2020 15:11:50 -0600
Subject: [PATCH 1/5] PCI: dwc: Drop the .set_num_vectors() host op
There's no reason for the .set_num_vectors() host op. Drivers needing a
non-default value can just initialize pcie_port.num_vectors directly.
Link: https://lore.kernel.org/r/20201105211159.1814485-8-robh@kernel.org
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Jingoo Han <jingoohan1@gmail.com>
Cc: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Jonathan Hunter <jonathanh@nvidia.com>
Cc: linux-tegra@vger.kernel.org
---
.../pci/controller/dwc/pcie-designware-host.c | 19 ++++---------------
.../pci/controller/dwc/pcie-designware-plat.c | 7 +------
drivers/pci/controller/dwc/pcie-designware.h | 1 -
drivers/pci/controller/dwc/pcie-tegra194.c | 7 +------
4 files changed, 6 insertions(+), 28 deletions(-)
--- a/drivers/pci/controller/dwc/pcie-designware-host.c
+++ b/drivers/pci/controller/dwc/pcie-designware-host.c
@@ -358,22 +358,11 @@ int dw_pcie_host_init(struct pcie_port *
pci->link_gen = of_pci_get_max_link_speed(np);
if (pci_msi_enabled()) {
- /*
- * If a specific SoC driver needs to change the
- * default number of vectors, it needs to implement
- * the set_num_vectors callback.
- */
- if (!pp->ops->set_num_vectors) {
+ if (!pp->num_vectors) {
pp->num_vectors = MSI_DEF_NUM_VECTORS;
- } else {
- pp->ops->set_num_vectors(pp);
-
- if (pp->num_vectors > MAX_MSI_IRQS ||
- pp->num_vectors == 0) {
- dev_err(dev,
- "Invalid number of vectors\n");
- return -EINVAL;
- }
+ } else if (pp->num_vectors > MAX_MSI_IRQS) {
+ dev_err(dev, "Invalid number of vectors\n");
+ return -EINVAL;
}
if (!pp->ops->msi_host_init) {
--- a/drivers/pci/controller/dwc/pcie-designware-plat.c
+++ b/drivers/pci/controller/dwc/pcie-designware-plat.c
@@ -44,14 +44,8 @@ static int dw_plat_pcie_host_init(struct
return 0;
}
-static void dw_plat_set_num_vectors(struct pcie_port *pp)
-{
- pp->num_vectors = MAX_MSI_IRQS;
-}
-
static const struct dw_pcie_host_ops dw_plat_pcie_host_ops = {
.host_init = dw_plat_pcie_host_init,
- .set_num_vectors = dw_plat_set_num_vectors,
};
static int dw_plat_pcie_establish_link(struct dw_pcie *pci)
@@ -128,6 +122,7 @@ static int dw_plat_add_pcie_port(struct
return pp->msi_irq;
}
+ pp->num_vectors = MAX_MSI_IRQS;
pp->ops = &dw_plat_pcie_host_ops;
ret = dw_pcie_host_init(pp);
--- a/drivers/pci/controller/dwc/pcie-designware.h
+++ b/drivers/pci/controller/dwc/pcie-designware.h
@@ -174,7 +174,6 @@ enum dw_pcie_device_mode {
struct dw_pcie_host_ops {
int (*host_init)(struct pcie_port *pp);
- void (*set_num_vectors)(struct pcie_port *pp);
int (*msi_host_init)(struct pcie_port *pp);
};
--- a/drivers/pci/controller/dwc/pcie-tegra194.c
+++ b/drivers/pci/controller/dwc/pcie-tegra194.c
@@ -990,11 +990,6 @@ static int tegra_pcie_dw_link_up(struct
return !!(val & PCI_EXP_LNKSTA_DLLLA);
}
-static void tegra_pcie_set_msi_vec_num(struct pcie_port *pp)
-{
- pp->num_vectors = MAX_MSI_IRQS;
-}
-
static int tegra_pcie_dw_start_link(struct dw_pcie *pci)
{
struct tegra_pcie_dw *pcie = to_tegra_pcie(pci);
@@ -1019,7 +1014,6 @@ static const struct dw_pcie_ops tegra_dw
static struct dw_pcie_host_ops tegra_pcie_dw_host_ops = {
.host_init = tegra_pcie_dw_host_init,
- .set_num_vectors = tegra_pcie_set_msi_vec_num,
};
static void tegra_pcie_disable_phy(struct tegra_pcie_dw *pcie)
@@ -2003,6 +1997,7 @@ static int tegra_pcie_dw_probe(struct pl
pci->n_fts[1] = FTS_VAL;
pp = &pci->pp;
+ pp->num_vectors = MAX_MSI_IRQS;
pcie->dev = &pdev->dev;
pcie->mode = (enum dw_pcie_device_mode)data->mode;

288
target/linux/ipq807x/patches-5.10/011-v5.11-PCI-dwc-Move-MSI-interrupt-setup-into-DWC-common-cod.patch Normal file
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@ -0,0 +1,288 @@
From 264b6fd7baa53bfaef2a6d41067b9568dff7163a Mon Sep 17 00:00:00 2001
From: Rob Herring <robh@kernel.org>
Date: Thu, 5 Nov 2020 15:11:51 -0600
Subject: [PATCH 2/5] PCI: dwc: Move MSI interrupt setup into DWC common code
Platforms using the built-in DWC MSI controller all have a dedicated
interrupt with "msi" name or at index 0, so let's move setting up the
interrupt to the common DWC code.
spear13xx and dra7xx are the 2 oddballs with muxed interrupts, so
we need to prevent configuring the MSI interrupt by setting msi_irq
to negative.
Link: https://lore.kernel.org/r/20201105211159.1814485-9-robh@kernel.org
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Jingoo Han <jingoohan1@gmail.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Kukjin Kim <kgene@kernel.org>
Cc: Krzysztof Kozlowski <krzk@kernel.org>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Yue Wang <yue.wang@Amlogic.com>
Cc: Kevin Hilman <khilman@baylibre.com>
Cc: Neil Armstrong <narmstrong@baylibre.com>
Cc: Jerome Brunet <jbrunet@baylibre.com>
Cc: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Cc: Jesper Nilsson <jesper.nilsson@axis.com>
Cc: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Cc: Xiaowei Song <songxiaowei@hisilicon.com>
Cc: Binghui Wang <wangbinghui@hisilicon.com>
Cc: Stanimir Varbanov <svarbanov@mm-sol.com>
Cc: Andy Gross <agross@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Pratyush Anand <pratyush.anand@gmail.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Jonathan Hunter <jonathanh@nvidia.com>
Cc: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: linux-samsung-soc@vger.kernel.org
Cc: linux-amlogic@lists.infradead.org
Cc: linux-arm-kernel@axis.com
Cc: linux-arm-msm@vger.kernel.org
Cc: linux-tegra@vger.kernel.org
---
drivers/pci/controller/dwc/pci-dra7xx.c | 3 +++
drivers/pci/controller/dwc/pci-exynos.c | 6 -----
drivers/pci/controller/dwc/pci-imx6.c | 6 -----
drivers/pci/controller/dwc/pci-meson.c | 6 -----
drivers/pci/controller/dwc/pcie-artpec6.c | 6 -----
.../pci/controller/dwc/pcie-designware-host.c | 11 +++++++++-
.../pci/controller/dwc/pcie-designware-plat.c | 6 -----
drivers/pci/controller/dwc/pcie-histb.c | 6 -----
drivers/pci/controller/dwc/pcie-kirin.c | 22 -------------------
drivers/pci/controller/dwc/pcie-qcom.c | 8 -------
drivers/pci/controller/dwc/pcie-spear13xx.c | 1 +
drivers/pci/controller/dwc/pcie-tegra194.c | 8 -------
drivers/pci/controller/dwc/pcie-uniphier.c | 6 -----
13 files changed, 14 insertions(+), 81 deletions(-)
--- a/drivers/pci/controller/dwc/pci-dra7xx.c
+++ b/drivers/pci/controller/dwc/pci-dra7xx.c
@@ -622,6 +622,9 @@ static int __init dra7xx_add_pcie_port(s
if (pp->irq < 0)
return pp->irq;
+ /* MSI IRQ is muxed */
+ pp->msi_irq = -ENODEV;
+
ret = dra7xx_pcie_init_irq_domain(pp);
if (ret < 0)
return ret;
--- a/drivers/pci/controller/dwc/pci-exynos.c
+++ b/drivers/pci/controller/dwc/pci-exynos.c
@@ -415,12 +415,6 @@ static int __init exynos_add_pcie_port(s
return ret;
}
- if (IS_ENABLED(CONFIG_PCI_MSI)) {
- pp->msi_irq = platform_get_irq(pdev, 0);
- if (pp->msi_irq < 0)
- return pp->msi_irq;
- }
-
pp->ops = &exynos_pcie_host_ops;
ret = dw_pcie_host_init(pp);
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -853,12 +853,6 @@ static int imx6_add_pcie_port(struct imx
struct device *dev = &pdev->dev;
int ret;
- if (IS_ENABLED(CONFIG_PCI_MSI)) {
- pp->msi_irq = platform_get_irq_byname(pdev, "msi");
- if (pp->msi_irq < 0)
- return pp->msi_irq;
- }
-
pp->ops = &imx6_pcie_host_ops;
ret = dw_pcie_host_init(pp);
--- a/drivers/pci/controller/dwc/pci-meson.c
+++ b/drivers/pci/controller/dwc/pci-meson.c
@@ -405,12 +405,6 @@ static int meson_add_pcie_port(struct me
struct device *dev = &pdev->dev;
int ret;
- if (IS_ENABLED(CONFIG_PCI_MSI)) {
- pp->msi_irq = platform_get_irq(pdev, 0);
- if (pp->msi_irq < 0)
- return pp->msi_irq;
- }
-
pp->ops = &meson_pcie_host_ops;
ret = dw_pcie_host_init(pp);
--- a/drivers/pci/controller/dwc/pcie-artpec6.c
+++ b/drivers/pci/controller/dwc/pcie-artpec6.c
@@ -348,12 +348,6 @@ static int artpec6_add_pcie_port(struct
struct device *dev = pci->dev;
int ret;
- if (IS_ENABLED(CONFIG_PCI_MSI)) {
- pp->msi_irq = platform_get_irq_byname(pdev, "msi");
- if (pp->msi_irq < 0)
- return pp->msi_irq;
- }
-
pp->ops = &artpec6_pcie_host_ops;
ret = dw_pcie_host_init(pp);
--- a/drivers/pci/controller/dwc/pcie-designware-host.c
+++ b/drivers/pci/controller/dwc/pcie-designware-host.c
@@ -366,13 +366,22 @@ int dw_pcie_host_init(struct pcie_port *
}
if (!pp->ops->msi_host_init) {
+ if (!pp->msi_irq) {
+ pp->msi_irq = platform_get_irq_byname_optional(pdev, "msi");
+ if (pp->msi_irq < 0) {
+ pp->msi_irq = platform_get_irq(pdev, 0);
+ if (pp->msi_irq < 0)
+ return pp->msi_irq;
+ }
+ }
+
pp->msi_irq_chip = &dw_pci_msi_bottom_irq_chip;
ret = dw_pcie_allocate_domains(pp);
if (ret)
return ret;
- if (pp->msi_irq)
+ if (pp->msi_irq > 0)
irq_set_chained_handler_and_data(pp->msi_irq,
dw_chained_msi_isr,
pp);
--- a/drivers/pci/controller/dwc/pcie-designware-plat.c
+++ b/drivers/pci/controller/dwc/pcie-designware-plat.c
@@ -116,12 +116,6 @@ static int dw_plat_add_pcie_port(struct
if (pp->irq < 0)
return pp->irq;
- if (IS_ENABLED(CONFIG_PCI_MSI)) {
- pp->msi_irq = platform_get_irq(pdev, 0);
- if (pp->msi_irq < 0)
- return pp->msi_irq;
- }
-
pp->num_vectors = MAX_MSI_IRQS;
pp->ops = &dw_plat_pcie_host_ops;
--- a/drivers/pci/controller/dwc/pcie-histb.c
+++ b/drivers/pci/controller/dwc/pcie-histb.c
@@ -400,12 +400,6 @@ static int histb_pcie_probe(struct platf
return PTR_ERR(hipcie->bus_reset);
}
- if (IS_ENABLED(CONFIG_PCI_MSI)) {
- pp->msi_irq = platform_get_irq_byname(pdev, "msi");
- if (pp->msi_irq < 0)
- return pp->msi_irq;
- }
-
hipcie->phy = devm_phy_get(dev, "phy");
if (IS_ERR(hipcie->phy)) {
dev_info(dev, "no pcie-phy found\n");
--- a/drivers/pci/controller/dwc/pcie-kirin.c
+++ b/drivers/pci/controller/dwc/pcie-kirin.c
@@ -444,31 +444,9 @@ static const struct dw_pcie_host_ops kir
.host_init = kirin_pcie_host_init,
};
-static int kirin_pcie_add_msi(struct dw_pcie *pci,
- struct platform_device *pdev)
-{
- int irq;
-
- if (IS_ENABLED(CONFIG_PCI_MSI)) {
- irq = platform_get_irq(pdev, 0);
- if (irq < 0)
- return irq;
-
- pci->pp.msi_irq = irq;
- }
-
- return 0;
-}
-
static int kirin_add_pcie_port(struct dw_pcie *pci,
struct platform_device *pdev)
{
- int ret;
-
- ret = kirin_pcie_add_msi(pci, pdev);
- if (ret)
- return ret;
-
pci->pp.ops = &kirin_pcie_host_ops;
return dw_pcie_host_init(&pci->pp);
--- a/drivers/pci/controller/dwc/pcie-qcom.c
+++ b/drivers/pci/controller/dwc/pcie-qcom.c
@@ -1434,14 +1434,6 @@ static int qcom_pcie_probe(struct platfo
pp->ops = &qcom_pcie_dw_ops;
- if (IS_ENABLED(CONFIG_PCI_MSI)) {
- pp->msi_irq = platform_get_irq_byname(pdev, "msi");
- if (pp->msi_irq < 0) {
- ret = pp->msi_irq;
- goto err_pm_runtime_put;
- }
- }
-
ret = phy_init(pcie->phy);
if (ret) {
pm_runtime_disable(&pdev->dev);
--- a/drivers/pci/controller/dwc/pcie-spear13xx.c
+++ b/drivers/pci/controller/dwc/pcie-spear13xx.c
@@ -183,6 +183,7 @@ static int spear13xx_add_pcie_port(struc
}
pp->ops = &spear13xx_pcie_host_ops;
+ pp->msi_irq = -ENODEV;
ret = dw_pcie_host_init(pp);
if (ret) {
--- a/drivers/pci/controller/dwc/pcie-tegra194.c
+++ b/drivers/pci/controller/dwc/pcie-tegra194.c
@@ -1554,14 +1554,6 @@ static int tegra_pcie_config_rp(struct t
char *name;
int ret;
- if (IS_ENABLED(CONFIG_PCI_MSI)) {
- pp->msi_irq = of_irq_get_byname(dev->of_node, "msi");
- if (!pp->msi_irq) {
- dev_err(dev, "Failed to get MSI interrupt\n");
- return -ENODEV;
- }
- }
-
pm_runtime_enable(dev);
ret = pm_runtime_get_sync(dev);
--- a/drivers/pci/controller/dwc/pcie-uniphier.c
+++ b/drivers/pci/controller/dwc/pcie-uniphier.c
@@ -341,12 +341,6 @@ static int uniphier_add_pcie_port(struct
pp->ops = &uniphier_pcie_host_ops;
- if (IS_ENABLED(CONFIG_PCI_MSI)) {
- pp->msi_irq = platform_get_irq_byname(pdev, "msi");
- if (pp->msi_irq < 0)
- return pp->msi_irq;
- }
-
ret = dw_pcie_host_init(pp);
if (ret) {
dev_err(dev, "Failed to initialize host (%d)\n", ret);

199
target/linux/ipq807x/patches-5.10/012-v5.11-PCI-dwc-Rework-MSI-initialization.patch Normal file
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@ -0,0 +1,199 @@
From ed016f820e3f1b980dfe0ef6137069e008f99109 Mon Sep 17 00:00:00 2001
From: Rob Herring <robh@kernel.org>
Date: Thu, 5 Nov 2020 15:11:52 -0600
Subject: [PATCH 3/5] PCI: dwc: Rework MSI initialization
There are 3 possible MSI implementations for the DWC host. The first is
using the built-in DWC MSI controller. The 2nd is a custom MSI
controller as part of the PCI host (keystone only). The 3rd is an
external MSI controller (typically GICv3 ITS). Currently, the last 2
are distinguished with a .msi_host_init() hook with the 3rd option using
an empty function. However we can detect the 3rd case with the presence
of 'msi-parent' or 'msi-map' properties, so let's do that instead and
remove the empty functions.
Link: https://lore.kernel.org/r/20201105211159.1814485-10-robh@kernel.org
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Jingoo Han <jingoohan1@gmail.com>
Cc: Murali Karicheri <m-karicheri2@ti.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Minghuan Lian <minghuan.Lian@nxp.com>
Cc: Mingkai Hu <mingkai.hu@nxp.com>
Cc: Roy Zang <roy.zang@nxp.com>
Cc: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Cc: linuxppc-dev@lists.ozlabs.org
---
drivers/pci/controller/dwc/pci-keystone.c | 9 -------
drivers/pci/controller/dwc/pci-layerscape.c | 25 -------------------
.../pci/controller/dwc/pcie-designware-host.c | 20 +++++++++------
drivers/pci/controller/dwc/pcie-designware.h | 1 +
drivers/pci/controller/dwc/pcie-intel-gw.c | 9 -------
5 files changed, 13 insertions(+), 51 deletions(-)
--- a/drivers/pci/controller/dwc/pci-keystone.c
+++ b/drivers/pci/controller/dwc/pci-keystone.c
@@ -272,14 +272,6 @@ static void ks_pcie_handle_legacy_irq(st
ks_pcie_app_writel(ks_pcie, IRQ_EOI, offset);
}
-/*
- * Dummy function so that DW core doesn't configure MSI
- */
-static int ks_pcie_am654_msi_host_init(struct pcie_port *pp)
-{
- return 0;
-}
-
static void ks_pcie_enable_error_irq(struct keystone_pcie *ks_pcie)
{
ks_pcie_app_writel(ks_pcie, ERR_IRQ_ENABLE_SET, ERR_IRQ_ALL);
@@ -855,7 +847,6 @@ static const struct dw_pcie_host_ops ks_
static const struct dw_pcie_host_ops ks_pcie_am654_host_ops = {
.host_init = ks_pcie_host_init,
- .msi_host_init = ks_pcie_am654_msi_host_init,
};
static irqreturn_t ks_pcie_err_irq_handler(int irq, void *priv)
--- a/drivers/pci/controller/dwc/pci-layerscape.c
+++ b/drivers/pci/controller/dwc/pci-layerscape.c
@@ -182,37 +182,12 @@ static int ls1021_pcie_host_init(struct
return ls_pcie_host_init(pp);
}
-static int ls_pcie_msi_host_init(struct pcie_port *pp)
-{
- struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
- struct device *dev = pci->dev;
- struct device_node *np = dev->of_node;
- struct device_node *msi_node;
-
- /*
- * The MSI domain is set by the generic of_msi_configure(). This
- * .msi_host_init() function keeps us from doing the default MSI
- * domain setup in dw_pcie_host_init() and also enforces the
- * requirement that "msi-parent" exists.
- */
- msi_node = of_parse_phandle(np, "msi-parent", 0);
- if (!msi_node) {
- dev_err(dev, "failed to find msi-parent\n");
- return -EINVAL;
- }
-
- of_node_put(msi_node);
- return 0;
-}
-
static const struct dw_pcie_host_ops ls1021_pcie_host_ops = {
.host_init = ls1021_pcie_host_init,
- .msi_host_init = ls_pcie_msi_host_init,
};
static const struct dw_pcie_host_ops ls_pcie_host_ops = {
.host_init = ls_pcie_host_init,
- .msi_host_init = ls_pcie_msi_host_init,
};
static const struct dw_pcie_ops dw_ls1021_pcie_ops = {
--- a/drivers/pci/controller/dwc/pcie-designware-host.c
+++ b/drivers/pci/controller/dwc/pcie-designware-host.c
@@ -358,6 +358,10 @@ int dw_pcie_host_init(struct pcie_port *
pci->link_gen = of_pci_get_max_link_speed(np);
if (pci_msi_enabled()) {
+ pp->has_msi_ctrl = !(pp->ops->msi_host_init ||
+ of_property_read_bool(np, "msi-parent") ||
+ of_property_read_bool(np, "msi-map"));
+
if (!pp->num_vectors) {
pp->num_vectors = MSI_DEF_NUM_VECTORS;
} else if (pp->num_vectors > MAX_MSI_IRQS) {
@@ -365,7 +369,11 @@ int dw_pcie_host_init(struct pcie_port *
return -EINVAL;
}
- if (!pp->ops->msi_host_init) {
+ if (pp->ops->msi_host_init) {
+ ret = pp->ops->msi_host_init(pp);
+ if (ret < 0)
+ return ret;
+ } else if (pp->has_msi_ctrl) {
if (!pp->msi_irq) {
pp->msi_irq = platform_get_irq_byname_optional(pdev, "msi");
if (pp->msi_irq < 0) {
@@ -395,10 +403,6 @@ int dw_pcie_host_init(struct pcie_port *
pp->msi_data = 0;
goto err_free_msi;
}
- } else {
- ret = pp->ops->msi_host_init(pp);
- if (ret < 0)
- return ret;
}
}
@@ -419,7 +423,7 @@ int dw_pcie_host_init(struct pcie_port *
return 0;
err_free_msi:
- if (pci_msi_enabled() && !pp->ops->msi_host_init)
+ if (pp->has_msi_ctrl)
dw_pcie_free_msi(pp);
return ret;
}
@@ -429,7 +433,7 @@ void dw_pcie_host_deinit(struct pcie_por
{
pci_stop_root_bus(pp->bridge->bus);
pci_remove_root_bus(pp->bridge->bus);
- if (pci_msi_enabled() && !pp->ops->msi_host_init)
+ if (pp->has_msi_ctrl)
dw_pcie_free_msi(pp);
}
EXPORT_SYMBOL_GPL(dw_pcie_host_deinit);
@@ -540,7 +544,7 @@ void dw_pcie_setup_rc(struct pcie_port *
dw_pcie_setup(pci);
- if (pci_msi_enabled() && !pp->ops->msi_host_init) {
+ if (pp->has_msi_ctrl) {
num_ctrls = pp->num_vectors / MAX_MSI_IRQS_PER_CTRL;
/* Initialize IRQ Status array */
--- a/drivers/pci/controller/dwc/pcie-designware.h
+++ b/drivers/pci/controller/dwc/pcie-designware.h
@@ -178,6 +178,7 @@ struct dw_pcie_host_ops {
};
struct pcie_port {
+ bool has_msi_ctrl:1;
u64 cfg0_base;
void __iomem *va_cfg0_base;
u32 cfg0_size;
--- a/drivers/pci/controller/dwc/pcie-intel-gw.c
+++ b/drivers/pci/controller/dwc/pcie-intel-gw.c
@@ -401,14 +401,6 @@ static int intel_pcie_rc_init(struct pci
return intel_pcie_host_setup(lpp);
}
-/*
- * Dummy function so that DW core doesn't configure MSI
- */
-static int intel_pcie_msi_init(struct pcie_port *pp)
-{
- return 0;
-}
-
static u64 intel_pcie_cpu_addr(struct dw_pcie *pcie, u64 cpu_addr)
{
return cpu_addr + BUS_IATU_OFFSET;
@@ -420,7 +412,6 @@ static const struct dw_pcie_ops intel_pc
static const struct dw_pcie_host_ops intel_pcie_dw_ops = {
.host_init = intel_pcie_rc_init,
- .msi_host_init = intel_pcie_msi_init,
};
static const struct intel_pcie_soc pcie_data = {

603
target/linux/ipq807x/patches-5.10/013-v5.11-PCI-dwc-Move-link-handling-into-common-code.patch Normal file
View File

@ -0,0 +1,603 @@
From 533bee2aeda70c212a3fb5547d5beb6406e3ccf7 Mon Sep 17 00:00:00 2001
From: Rob Herring <robh@kernel.org>
Date: Thu, 5 Nov 2020 15:11:53 -0600
Subject: [PATCH 4/5] PCI: dwc: Move link handling into common code
All the DWC drivers do link setup and checks at roughly the same time.
Let's use the existing .start_link() hook (currently only used in EP
mode) and move the link handling to the core code.
The behavior for a link down was inconsistent as some drivers would fail
probe in that case while others succeed. Let's standardize this to
succeed as there are usecases where devices (and the link) appear later
even without hotplug. For example, a reconfigured FPGA device.
Link: https://lore.kernel.org/r/20201105211159.1814485-11-robh@kernel.org
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Jingoo Han <jingoohan1@gmail.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Kukjin Kim <kgene@kernel.org>
Cc: Krzysztof Kozlowski <krzk@kernel.org>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Murali Karicheri <m-karicheri2@ti.com>
Cc: Yue Wang <yue.wang@Amlogic.com>
Cc: Kevin Hilman <khilman@baylibre.com>
Cc: Neil Armstrong <narmstrong@baylibre.com>
Cc: Jerome Brunet <jbrunet@baylibre.com>
Cc: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Cc: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Cc: Jesper Nilsson <jesper.nilsson@axis.com>
Cc: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Cc: Xiaowei Song <songxiaowei@hisilicon.com>
Cc: Binghui Wang <wangbinghui@hisilicon.com>
Cc: Andy Gross <agross@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Stanimir Varbanov <svarbanov@mm-sol.com>
Cc: Pratyush Anand <pratyush.anand@gmail.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Jonathan Hunter <jonathanh@nvidia.com>
Cc: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: linux-omap@vger.kernel.org
Cc: linux-samsung-soc@vger.kernel.org
Cc: linux-amlogic@lists.infradead.org
Cc: linux-arm-kernel@axis.com
Cc: linux-arm-msm@vger.kernel.org
Cc: linux-tegra@vger.kernel.org
---
drivers/pci/controller/dwc/pci-dra7xx.c | 2 -
drivers/pci/controller/dwc/pci-exynos.c | 41 +++++++----------
drivers/pci/controller/dwc/pci-imx6.c | 9 ++--
drivers/pci/controller/dwc/pci-keystone.c | 9 ----
drivers/pci/controller/dwc/pci-meson.c | 24 ++++------
drivers/pci/controller/dwc/pcie-armada8k.c | 39 +++++++---------
drivers/pci/controller/dwc/pcie-artpec6.c | 2 -
.../pci/controller/dwc/pcie-designware-host.c | 9 ++++
.../pci/controller/dwc/pcie-designware-plat.c | 3 --
drivers/pci/controller/dwc/pcie-histb.c | 34 +++++++-------
drivers/pci/controller/dwc/pcie-kirin.c | 23 ++--------
drivers/pci/controller/dwc/pcie-qcom.c | 19 ++------
drivers/pci/controller/dwc/pcie-spear13xx.c | 46 ++++++++-----------
drivers/pci/controller/dwc/pcie-tegra194.c | 1 -
drivers/pci/controller/dwc/pcie-uniphier.c | 13 ++----
15 files changed, 103 insertions(+), 171 deletions(-)
--- a/drivers/pci/controller/dwc/pci-dra7xx.c
+++ b/drivers/pci/controller/dwc/pci-dra7xx.c
@@ -183,8 +183,6 @@ static int dra7xx_pcie_host_init(struct
dw_pcie_setup_rc(pp);
- dra7xx_pcie_establish_link(pci);
- dw_pcie_wait_for_link(pci);
dw_pcie_msi_init(pp);
dra7xx_pcie_enable_interrupts(dra7xx);
--- a/drivers/pci/controller/dwc/pci-exynos.c
+++ b/drivers/pci/controller/dwc/pci-exynos.c
@@ -229,30 +229,9 @@ static void exynos_pcie_assert_reset(str
GPIOF_OUT_INIT_HIGH, "RESET");
}
-static int exynos_pcie_establish_link(struct exynos_pcie *ep)
+static int exynos_pcie_start_link(struct dw_pcie *pci)
{
- struct dw_pcie *pci = ep->pci;
- struct pcie_port *pp = &pci->pp;
- struct device *dev = pci->dev;
-
- if (dw_pcie_link_up(pci)) {
- dev_err(dev, "Link already up\n");
- return 0;
- }
-
- exynos_pcie_assert_core_reset(ep);
-
- phy_reset(ep->phy);
-
- exynos_pcie_writel(ep->mem_res->elbi_base, 1,
- PCIE_PWR_RESET);
-
- phy_power_on(ep->phy);
- phy_init(ep->phy);
-
- exynos_pcie_deassert_core_reset(ep);
- dw_pcie_setup_rc(pp);
- exynos_pcie_assert_reset(ep);
+ struct exynos_pcie *ep = to_exynos_pcie(pci);
/* assert LTSSM enable */
exynos_pcie_writel(ep->mem_res->elbi_base, PCIE_ELBI_LTSSM_ENABLE,
@@ -386,7 +365,20 @@ static int exynos_pcie_host_init(struct
pp->bridge->ops = &exynos_pci_ops;
- exynos_pcie_establish_link(ep);
+ exynos_pcie_assert_core_reset(ep);
+
+ phy_reset(ep->phy);
+
+ exynos_pcie_writel(ep->mem_res->elbi_base, 1,
+ PCIE_PWR_RESET);
+
+ phy_power_on(ep->phy);
+ phy_init(ep->phy);
+
+ exynos_pcie_deassert_core_reset(ep);
+ dw_pcie_setup_rc(pp);
+ exynos_pcie_assert_reset(ep);
+
exynos_pcie_enable_interrupts(ep);
return 0;
@@ -430,6 +422,7 @@ static const struct dw_pcie_ops dw_pcie_
.read_dbi = exynos_pcie_read_dbi,
.write_dbi = exynos_pcie_write_dbi,
.link_up = exynos_pcie_link_up,
+ .start_link = exynos_pcie_start_link,
};
static int __init exynos_pcie_probe(struct platform_device *pdev)
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -745,9 +745,9 @@ static void imx6_pcie_ltssm_enable(struc
}
}
-static int imx6_pcie_establish_link(struct imx6_pcie *imx6_pcie)
+static int imx6_pcie_start_link(struct dw_pcie *pci)
{
- struct dw_pcie *pci = imx6_pcie->pci;
+ struct imx6_pcie *imx6_pcie = to_imx6_pcie(pci);
struct device *dev = pci->dev;
u8 offset = dw_pcie_find_capability(pci, PCI_CAP_ID_EXP);
u32 tmp;
@@ -835,7 +835,6 @@ static int imx6_pcie_host_init(struct pc
imx6_pcie_deassert_core_reset(imx6_pcie);
imx6_setup_phy_mpll(imx6_pcie);
dw_pcie_setup_rc(pp);
- imx6_pcie_establish_link(imx6_pcie);
dw_pcie_msi_init(pp);
return 0;
@@ -865,7 +864,7 @@ static int imx6_add_pcie_port(struct imx
}
static const struct dw_pcie_ops dw_pcie_ops = {
- /* No special ops needed, but pcie-designware still expects this struct */
+ .start_link = imx6_pcie_start_link,
};
#ifdef CONFIG_PM_SLEEP
@@ -974,7 +973,7 @@ static int imx6_pcie_resume_noirq(struct
imx6_pcie_deassert_core_reset(imx6_pcie);
dw_pcie_setup_rc(pp);
- ret = imx6_pcie_establish_link(imx6_pcie);
+ ret = imx6_pcie_start_link(imx6_pcie->pci);
if (ret < 0)
dev_info(dev, "pcie link is down after resume.\n");
--- a/drivers/pci/controller/dwc/pci-keystone.c
+++ b/drivers/pci/controller/dwc/pci-keystone.c
@@ -511,14 +511,8 @@ static void ks_pcie_stop_link(struct dw_
static int ks_pcie_start_link(struct dw_pcie *pci)
{
struct keystone_pcie *ks_pcie = to_keystone_pcie(pci);
- struct device *dev = pci->dev;
u32 val;
- if (dw_pcie_link_up(pci)) {
- dev_dbg(dev, "link is already up\n");
- return 0;
- }
-
/* Initiate Link Training */
val = ks_pcie_app_readl(ks_pcie, CMD_STATUS);
ks_pcie_app_writel(ks_pcie, CMD_STATUS, LTSSM_EN_VAL | val);
@@ -834,9 +828,6 @@ static int __init ks_pcie_host_init(stru
"Asynchronous external abort");
#endif
- ks_pcie_start_link(pci);
- dw_pcie_wait_for_link(pci);
-
return 0;
}
--- a/drivers/pci/controller/dwc/pci-meson.c
+++ b/drivers/pci/controller/dwc/pci-meson.c
@@ -231,7 +231,7 @@ static void meson_pcie_assert_reset(stru
gpiod_set_value_cansleep(mp->reset_gpio, 0);
}
-static void meson_pcie_init_dw(struct meson_pcie *mp)
+static void meson_pcie_ltssm_enable(struct meson_pcie *mp)
{
u32 val;
@@ -289,20 +289,14 @@ static void meson_set_max_rd_req_size(st
dw_pcie_writel_dbi(pci, offset + PCI_EXP_DEVCTL, val);
}
-static int meson_pcie_establish_link(struct meson_pcie *mp)
+static int meson_pcie_start_link(struct dw_pcie *pci)
{
- struct dw_pcie *pci = &mp->pci;
- struct pcie_port *pp = &pci->pp;
-
- meson_pcie_init_dw(mp);
- meson_set_max_payload(mp, MAX_PAYLOAD_SIZE);
- meson_set_max_rd_req_size(mp, MAX_READ_REQ_SIZE);
-
- dw_pcie_setup_rc(pp);
+ struct meson_pcie *mp = to_meson_pcie(pci);
+ meson_pcie_ltssm_enable(mp);
meson_pcie_assert_reset(mp);
- return dw_pcie_wait_for_link(pci);
+ return 0;
}
static int meson_pcie_rd_own_conf(struct pci_bus *bus, u32 devfn,
@@ -380,14 +374,13 @@ static int meson_pcie_host_init(struct p
{
struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
struct meson_pcie *mp = to_meson_pcie(pci);
- int ret;
pp->bridge->ops = &meson_pci_ops;
- ret = meson_pcie_establish_link(mp);
- if (ret)
- return ret;
+ meson_set_max_payload(mp, MAX_PAYLOAD_SIZE);
+ meson_set_max_rd_req_size(mp, MAX_READ_REQ_SIZE);
+ dw_pcie_setup_rc(pp);
dw_pcie_msi_init(pp);
return 0;
@@ -418,6 +411,7 @@ static int meson_add_pcie_port(struct me
static const struct dw_pcie_ops dw_pcie_ops = {
.link_up = meson_pcie_link_up,
+ .start_link = meson_pcie_start_link,
};
static int meson_pcie_probe(struct platform_device *pdev)
--- a/drivers/pci/controller/dwc/pcie-armada8k.c
+++ b/drivers/pci/controller/dwc/pcie-armada8k.c
@@ -154,10 +154,24 @@ static int armada8k_pcie_link_up(struct
return 0;
}
-static void armada8k_pcie_establish_link(struct armada8k_pcie *pcie)
+static int armada8k_pcie_start_link(struct dw_pcie *pci)
+{
+ u32 reg;
+
+ /* Start LTSSM */
+ reg = dw_pcie_readl_dbi(pci, PCIE_GLOBAL_CONTROL_REG);
+ reg |= PCIE_APP_LTSSM_EN;
+ dw_pcie_writel_dbi(pci, PCIE_GLOBAL_CONTROL_REG, reg);
+
+ return 0;
+}
+
+static int armada8k_pcie_host_init(struct pcie_port *pp)
{
- struct dw_pcie *pci = pcie->pci;
u32 reg;
+ struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
+
+ dw_pcie_setup_rc(pp);
if (!dw_pcie_link_up(pci)) {
/* Disable LTSSM state machine to enable configuration */
@@ -193,26 +207,6 @@ static void armada8k_pcie_establish_link
PCIE_INT_C_ASSERT_MASK | PCIE_INT_D_ASSERT_MASK;
dw_pcie_writel_dbi(pci, PCIE_GLOBAL_INT_MASK1_REG, reg);
- if (!dw_pcie_link_up(pci)) {
- /* Configuration done. Start LTSSM */
- reg = dw_pcie_readl_dbi(pci, PCIE_GLOBAL_CONTROL_REG);
- reg |= PCIE_APP_LTSSM_EN;
- dw_pcie_writel_dbi(pci, PCIE_GLOBAL_CONTROL_REG, reg);
- }
-
- /* Wait until the link becomes active again */
- if (dw_pcie_wait_for_link(pci))
- dev_err(pci->dev, "Link not up after reconfiguration\n");
-}
-
-static int armada8k_pcie_host_init(struct pcie_port *pp)
-{
- struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
- struct armada8k_pcie *pcie = to_armada8k_pcie(pci);
-
- dw_pcie_setup_rc(pp);
- armada8k_pcie_establish_link(pcie);
-
return 0;
}
@@ -269,6 +263,7 @@ static int armada8k_add_pcie_port(struct
static const struct dw_pcie_ops dw_pcie_ops = {
.link_up = armada8k_pcie_link_up,
+ .start_link = armada8k_pcie_start_link,
};
static int armada8k_pcie_probe(struct platform_device *pdev)
--- a/drivers/pci/controller/dwc/pcie-artpec6.c
+++ b/drivers/pci/controller/dwc/pcie-artpec6.c
@@ -329,8 +329,6 @@ static int artpec6_pcie_host_init(struct
artpec6_pcie_deassert_core_reset(artpec6_pcie);
artpec6_pcie_wait_for_phy(artpec6_pcie);
dw_pcie_setup_rc(pp);
- artpec6_pcie_establish_link(pci);
- dw_pcie_wait_for_link(pci);
dw_pcie_msi_init(pp);
return 0;
--- a/drivers/pci/controller/dwc/pcie-designware-host.c
+++ b/drivers/pci/controller/dwc/pcie-designware-host.c
@@ -416,6 +416,15 @@ int dw_pcie_host_init(struct pcie_port *
goto err_free_msi;
}
+ if (!dw_pcie_link_up(pci) && pci->ops->start_link) {
+ ret = pci->ops->start_link(pci);
+ if (ret)
+ goto err_free_msi;
+ }
+
+ /* Ignore errors, the link may come up later */
+ dw_pcie_wait_for_link(pci);
+
bridge->sysdata = pp;
ret = pci_host_probe(bridge);
--- a/drivers/pci/controller/dwc/pcie-designware-plat.c
+++ b/drivers/pci/controller/dwc/pcie-designware-plat.c
@@ -35,10 +35,7 @@ static const struct of_device_id dw_plat
static int dw_plat_pcie_host_init(struct pcie_port *pp)
{
- struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
-
dw_pcie_setup_rc(pp);
- dw_pcie_wait_for_link(pci);
dw_pcie_msi_init(pp);
return 0;
--- a/drivers/pci/controller/dwc/pcie-histb.c
+++ b/drivers/pci/controller/dwc/pcie-histb.c
@@ -169,39 +169,36 @@ static int histb_pcie_link_up(struct dw_
return 0;
}
-static int histb_pcie_establish_link(struct pcie_port *pp)
+static int histb_pcie_start_link(struct dw_pcie *pci)
{
- struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
struct histb_pcie *hipcie = to_histb_pcie(pci);
u32 regval;
- if (dw_pcie_link_up(pci)) {
- dev_info(pci->dev, "Link already up\n");
- return 0;
- }
-
- /* PCIe RC work mode */
- regval = histb_pcie_readl(hipcie, PCIE_SYS_CTRL0);
- regval &= ~PCIE_DEVICE_TYPE_MASK;
- regval |= PCIE_WM_RC;
- histb_pcie_writel(hipcie, PCIE_SYS_CTRL0, regval);
-
- /* setup root complex */
- dw_pcie_setup_rc(pp);
-
/* assert LTSSM enable */
regval = histb_pcie_readl(hipcie, PCIE_SYS_CTRL7);
regval |= PCIE_APP_LTSSM_ENABLE;
histb_pcie_writel(hipcie, PCIE_SYS_CTRL7, regval);
- return dw_pcie_wait_for_link(pci);
+ return 0;
}
static int histb_pcie_host_init(struct pcie_port *pp)
{
+ struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
+ struct histb_pcie *hipcie = to_histb_pcie(pci);
+ u32 regval;
+
pp->bridge->ops = &histb_pci_ops;
- histb_pcie_establish_link(pp);
+ /* PCIe RC work mode */
+ regval = histb_pcie_readl(hipcie, PCIE_SYS_CTRL0);
+ regval &= ~PCIE_DEVICE_TYPE_MASK;
+ regval |= PCIE_WM_RC;
+ histb_pcie_writel(hipcie, PCIE_SYS_CTRL0, regval);
+
+ /* setup root complex */
+ dw_pcie_setup_rc(pp);
+
dw_pcie_msi_init(pp);
return 0;
@@ -300,6 +297,7 @@ static const struct dw_pcie_ops dw_pcie_
.read_dbi = histb_pcie_read_dbi,
.write_dbi = histb_pcie_write_dbi,
.link_up = histb_pcie_link_up,
+ .start_link = histb_pcie_start_link,
};
static int histb_pcie_probe(struct platform_device *pdev)
--- a/drivers/pci/controller/dwc/pcie-kirin.c
+++ b/drivers/pci/controller/dwc/pcie-kirin.c
@@ -395,32 +395,14 @@ static int kirin_pcie_link_up(struct dw_
return 0;
}
-static int kirin_pcie_establish_link(struct pcie_port *pp)
+static int kirin_pcie_start_link(struct dw_pcie *pci)
{
- struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
struct kirin_pcie *kirin_pcie = to_kirin_pcie(pci);
- struct device *dev = kirin_pcie->pci->dev;
- int count = 0;
-
- if (kirin_pcie_link_up(pci))
- return 0;
-
- dw_pcie_setup_rc(pp);
/* assert LTSSM enable */
kirin_apb_ctrl_writel(kirin_pcie, PCIE_LTSSM_ENABLE_BIT,
PCIE_APP_LTSSM_ENABLE);
- /* check if the link is up or not */
- while (!kirin_pcie_link_up(pci)) {
- usleep_range(LINK_WAIT_MIN, LINK_WAIT_MAX);
- count++;
- if (count == 1000) {
- dev_err(dev, "Link Fail\n");
- return -EINVAL;
- }
- }
-
return 0;
}
@@ -428,7 +410,7 @@ static int kirin_pcie_host_init(struct p
{
pp->bridge->ops = &kirin_pci_ops;
- kirin_pcie_establish_link(pp);
+ dw_pcie_setup_rc(pp);
dw_pcie_msi_init(pp);
return 0;
@@ -438,6 +420,7 @@ static const struct dw_pcie_ops kirin_dw
.read_dbi = kirin_pcie_read_dbi,
.write_dbi = kirin_pcie_write_dbi,
.link_up = kirin_pcie_link_up,
+ .start_link = kirin_pcie_start_link,
};
static const struct dw_pcie_host_ops kirin_pcie_host_ops = {
--- a/drivers/pci/controller/dwc/pcie-qcom.c
+++ b/drivers/pci/controller/dwc/pcie-qcom.c
@@ -207,18 +207,15 @@ static void qcom_ep_reset_deassert(struc
usleep_range(PERST_DELAY_US, PERST_DELAY_US + 500);
}
-static int qcom_pcie_establish_link(struct qcom_pcie *pcie)
+static int qcom_pcie_start_link(struct dw_pcie *pci)
{
- struct dw_pcie *pci = pcie->pci;
-
- if (dw_pcie_link_up(pci))
- return 0;
+ struct qcom_pcie *pcie = to_qcom_pcie(pci);
/* Enable Link Training state machine */
if (pcie->ops->ltssm_enable)
pcie->ops->ltssm_enable(pcie);
- return dw_pcie_wait_for_link(pci);
+ return 0;
}
static void qcom_pcie_2_1_0_ltssm_enable(struct qcom_pcie *pcie)
@@ -1290,15 +1287,8 @@ static int qcom_pcie_host_init(struct pc
qcom_ep_reset_deassert(pcie);
- ret = qcom_pcie_establish_link(pcie);
- if (ret)
- goto err;
-
return 0;
-err:
- qcom_ep_reset_assert(pcie);
- if (pcie->ops->post_deinit)
- pcie->ops->post_deinit(pcie);
+
err_disable_phy:
phy_power_off(pcie->phy);
err_deinit:
@@ -1365,6 +1355,7 @@ static const struct qcom_pcie_ops ops_2_
static const struct dw_pcie_ops dw_pcie_ops = {
.link_up = qcom_pcie_link_up,
+ .start_link = qcom_pcie_start_link,
};
static int qcom_pcie_probe(struct platform_device *pdev)
--- a/drivers/pci/controller/dwc/pcie-tegra194.c
+++ b/drivers/pci/controller/dwc/pcie-tegra194.c
@@ -1549,7 +1549,6 @@ static int tegra_pcie_deinit_controller(
static int tegra_pcie_config_rp(struct tegra_pcie_dw *pcie)
{
- struct pcie_port *pp = &pcie->pci.pp;
struct device *dev = pcie->dev;
char *name;
int ret;
--- a/drivers/pci/controller/dwc/pcie-uniphier.c
+++ b/drivers/pci/controller/dwc/pcie-uniphier.c
@@ -146,16 +146,13 @@ static int uniphier_pcie_link_up(struct
return (val & mask) == mask;
}
-static int uniphier_pcie_establish_link(struct dw_pcie *pci)
+static int uniphier_pcie_start_link(struct dw_pcie *pci)
{
struct uniphier_pcie_priv *priv = to_uniphier_pcie(pci);
- if (dw_pcie_link_up(pci))
- return 0;
-
uniphier_pcie_ltssm_enable(priv, true);
- return dw_pcie_wait_for_link(pci);
+ return 0;
}
static void uniphier_pcie_stop_link(struct dw_pcie *pci)
@@ -318,10 +315,6 @@ static int uniphier_pcie_host_init(struc
uniphier_pcie_irq_enable(priv);
dw_pcie_setup_rc(pp);
- ret = uniphier_pcie_establish_link(pci);
- if (ret)
- return ret;
-
dw_pcie_msi_init(pp);
return 0;
@@ -385,7 +378,7 @@ out_clk_disable:
}
static const struct dw_pcie_ops dw_pcie_ops = {
- .start_link = uniphier_pcie_establish_link,
+ .start_link = uniphier_pcie_start_link,
.stop_link = uniphier_pcie_stop_link,
.link_up = uniphier_pcie_link_up,
};

272
target/linux/ipq807x/patches-5.10/014-v5.11-PCI-dwc-Move-dw_pcie_msi_init-into-core.patch Normal file
View File

@ -0,0 +1,272 @@
From 02c98d70da854cd4d145afe800194768c5eefe1d Mon Sep 17 00:00:00 2001
From: Rob Herring <robh@kernel.org>
Date: Thu, 5 Nov 2020 15:11:54 -0600
Subject: [PATCH 5/5] PCI: dwc: Move dw_pcie_msi_init() into core
The host drivers which call dw_pcie_msi_init() are all the ones using
the built-in MSI controller, so let's move it into the common DWC code.
Link: https://lore.kernel.org/r/20201105211159.1814485-12-robh@kernel.org
Tested-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Rob Herring <robh@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Acked-by: Jingoo Han <jingoohan1@gmail.com>
Cc: Kishon Vijay Abraham I <kishon@ti.com>
Cc: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Cc: Bjorn Helgaas <bhelgaas@google.com>
Cc: Kukjin Kim <kgene@kernel.org>
Cc: Krzysztof Kozlowski <krzk@kernel.org>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: Lucas Stach <l.stach@pengutronix.de>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: Sascha Hauer <s.hauer@pengutronix.de>
Cc: Pengutronix Kernel Team <kernel@pengutronix.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: Yue Wang <yue.wang@Amlogic.com>
Cc: Kevin Hilman <khilman@baylibre.com>
Cc: Neil Armstrong <narmstrong@baylibre.com>
Cc: Jerome Brunet <jbrunet@baylibre.com>
Cc: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Cc: Jesper Nilsson <jesper.nilsson@axis.com>
Cc: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
Cc: Xiaowei Song <songxiaowei@hisilicon.com>
Cc: Binghui Wang <wangbinghui@hisilicon.com>
Cc: Stanimir Varbanov <svarbanov@mm-sol.com>
Cc: Andy Gross <agross@kernel.org>
Cc: Bjorn Andersson <bjorn.andersson@linaro.org>
Cc: Pratyush Anand <pratyush.anand@gmail.com>
Cc: Thierry Reding <thierry.reding@gmail.com>
Cc: Jonathan Hunter <jonathanh@nvidia.com>
Cc: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: linux-omap@vger.kernel.org
Cc: linux-samsung-soc@vger.kernel.org
Cc: linux-amlogic@lists.infradead.org
Cc: linux-arm-kernel@axis.com
Cc: linux-arm-msm@vger.kernel.org
Cc: linux-tegra@vger.kernel.org
---
drivers/pci/controller/dwc/pci-dra7xx.c | 2 --
drivers/pci/controller/dwc/pci-exynos.c | 4 ----
drivers/pci/controller/dwc/pci-imx6.c | 1 -
drivers/pci/controller/dwc/pci-meson.c | 1 -
drivers/pci/controller/dwc/pcie-artpec6.c | 1 -
drivers/pci/controller/dwc/pcie-designware-host.c | 9 +++++----
drivers/pci/controller/dwc/pcie-designware-plat.c | 1 -
drivers/pci/controller/dwc/pcie-designware.h | 10 ----------
drivers/pci/controller/dwc/pcie-histb.c | 2 --
drivers/pci/controller/dwc/pcie-kirin.c | 1 -
drivers/pci/controller/dwc/pcie-qcom.c | 2 --
drivers/pci/controller/dwc/pcie-spear13xx.c | 6 +-----
drivers/pci/controller/dwc/pcie-tegra194.c | 2 --
drivers/pci/controller/dwc/pcie-uniphier.c | 1 -
14 files changed, 6 insertions(+), 37 deletions(-)
--- a/drivers/pci/controller/dwc/pci-dra7xx.c
+++ b/drivers/pci/controller/dwc/pci-dra7xx.c
@@ -182,8 +182,6 @@ static int dra7xx_pcie_host_init(struct
struct dra7xx_pcie *dra7xx = to_dra7xx_pcie(pci);
dw_pcie_setup_rc(pp);
-
- dw_pcie_msi_init(pp);
dra7xx_pcie_enable_interrupts(dra7xx);
return 0;
--- a/drivers/pci/controller/dwc/pci-exynos.c
+++ b/drivers/pci/controller/dwc/pci-exynos.c
@@ -273,12 +273,8 @@ static irqreturn_t exynos_pcie_irq_handl
static void exynos_pcie_msi_init(struct exynos_pcie *ep)
{
- struct dw_pcie *pci = ep->pci;
- struct pcie_port *pp = &pci->pp;
u32 val;
- dw_pcie_msi_init(pp);
-
/* enable MSI interrupt */
val = exynos_pcie_readl(ep->mem_res->elbi_base, PCIE_IRQ_EN_LEVEL);
val |= IRQ_MSI_ENABLE;
--- a/drivers/pci/controller/dwc/pci-imx6.c
+++ b/drivers/pci/controller/dwc/pci-imx6.c
@@ -835,7 +835,6 @@ static int imx6_pcie_host_init(struct pc
imx6_pcie_deassert_core_reset(imx6_pcie);
imx6_setup_phy_mpll(imx6_pcie);
dw_pcie_setup_rc(pp);
- dw_pcie_msi_init(pp);
return 0;
}
--- a/drivers/pci/controller/dwc/pci-meson.c
+++ b/drivers/pci/controller/dwc/pci-meson.c
@@ -381,7 +381,6 @@ static int meson_pcie_host_init(struct p
meson_set_max_rd_req_size(mp, MAX_READ_REQ_SIZE);
dw_pcie_setup_rc(pp);
- dw_pcie_msi_init(pp);
return 0;
}
--- a/drivers/pci/controller/dwc/pcie-artpec6.c
+++ b/drivers/pci/controller/dwc/pcie-artpec6.c
@@ -329,7 +329,6 @@ static int artpec6_pcie_host_init(struct
artpec6_pcie_deassert_core_reset(artpec6_pcie);
artpec6_pcie_wait_for_phy(artpec6_pcie);
dw_pcie_setup_rc(pp);
- dw_pcie_msi_init(pp);
return 0;
}
--- a/drivers/pci/controller/dwc/pcie-designware-host.c
+++ b/drivers/pci/controller/dwc/pcie-designware-host.c
@@ -256,7 +256,7 @@ int dw_pcie_allocate_domains(struct pcie
return 0;
}
-void dw_pcie_free_msi(struct pcie_port *pp)
+static void dw_pcie_free_msi(struct pcie_port *pp)
{
if (pp->msi_irq) {
irq_set_chained_handler(pp->msi_irq, NULL);
@@ -275,19 +275,18 @@ void dw_pcie_free_msi(struct pcie_port *
}
}
-void dw_pcie_msi_init(struct pcie_port *pp)
+static void dw_pcie_msi_init(struct pcie_port *pp)
{
struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
u64 msi_target = (u64)pp->msi_data;
- if (!IS_ENABLED(CONFIG_PCI_MSI))
+ if (!pci_msi_enabled() || !pp->has_msi_ctrl)
return;
/* Program the msi_data */
dw_pcie_writel_dbi(pci, PCIE_MSI_ADDR_LO, lower_32_bits(msi_target));
dw_pcie_writel_dbi(pci, PCIE_MSI_ADDR_HI, upper_32_bits(msi_target));
}
-EXPORT_SYMBOL_GPL(dw_pcie_msi_init);
int dw_pcie_host_init(struct pcie_port *pp)
{
@@ -416,6 +415,8 @@ int dw_pcie_host_init(struct pcie_port *
goto err_free_msi;
}
+ dw_pcie_msi_init(pp);
+
if (!dw_pcie_link_up(pci) && pci->ops->start_link) {
ret = pci->ops->start_link(pci);
if (ret)
--- a/drivers/pci/controller/dwc/pcie-designware-plat.c
+++ b/drivers/pci/controller/dwc/pcie-designware-plat.c
@@ -36,7 +36,6 @@ static const struct of_device_id dw_plat
static int dw_plat_pcie_host_init(struct pcie_port *pp)
{
dw_pcie_setup_rc(pp);
- dw_pcie_msi_init(pp);
return 0;
}
--- a/drivers/pci/controller/dwc/pcie-designware.h
+++ b/drivers/pci/controller/dwc/pcie-designware.h
@@ -365,8 +365,6 @@ static inline void dw_pcie_dbi_ro_wr_dis
#ifdef CONFIG_PCIE_DW_HOST
irqreturn_t dw_handle_msi_irq(struct pcie_port *pp);
-void dw_pcie_msi_init(struct pcie_port *pp);
-void dw_pcie_free_msi(struct pcie_port *pp);
void dw_pcie_setup_rc(struct pcie_port *pp);
int dw_pcie_host_init(struct pcie_port *pp);
void dw_pcie_host_deinit(struct pcie_port *pp);
@@ -379,14 +377,6 @@ static inline irqreturn_t dw_handle_msi_
return IRQ_NONE;
}
-static inline void dw_pcie_msi_init(struct pcie_port *pp)
-{
-}
-
-static inline void dw_pcie_free_msi(struct pcie_port *pp)
-{
-}
-
static inline void dw_pcie_setup_rc(struct pcie_port *pp)
{
}
--- a/drivers/pci/controller/dwc/pcie-histb.c
+++ b/drivers/pci/controller/dwc/pcie-histb.c
@@ -199,8 +199,6 @@ static int histb_pcie_host_init(struct p
/* setup root complex */
dw_pcie_setup_rc(pp);
- dw_pcie_msi_init(pp);
-
return 0;
}
--- a/drivers/pci/controller/dwc/pcie-kirin.c
+++ b/drivers/pci/controller/dwc/pcie-kirin.c
@@ -411,7 +411,6 @@ static int kirin_pcie_host_init(struct p
pp->bridge->ops = &kirin_pci_ops;
dw_pcie_setup_rc(pp);
- dw_pcie_msi_init(pp);
return 0;
}
--- a/drivers/pci/controller/dwc/pcie-qcom.c
+++ b/drivers/pci/controller/dwc/pcie-qcom.c
@@ -1283,8 +1283,6 @@ static int qcom_pcie_host_init(struct pc
}
dw_pcie_setup_rc(pp);
- dw_pcie_msi_init(pp);
-
qcom_ep_reset_deassert(pcie);
return 0;
--- a/drivers/pci/controller/dwc/pcie-spear13xx.c
+++ b/drivers/pci/controller/dwc/pcie-spear13xx.c
@@ -124,16 +124,12 @@ static irqreturn_t spear13xx_pcie_irq_ha
static void spear13xx_pcie_enable_interrupts(struct spear13xx_pcie *spear13xx_pcie)
{
- struct dw_pcie *pci = spear13xx_pcie->pci;
- struct pcie_port *pp = &pci->pp;
struct pcie_app_reg *app_reg = spear13xx_pcie->app_base;
/* Enable MSI interrupt */
- if (IS_ENABLED(CONFIG_PCI_MSI)) {
- dw_pcie_msi_init(pp);
+ if (IS_ENABLED(CONFIG_PCI_MSI))
writel(readl(&app_reg->int_mask) |
MSI_CTRL_INT, &app_reg->int_mask);
- }
}
static int spear13xx_pcie_link_up(struct dw_pcie *pci)
--- a/drivers/pci/controller/dwc/pcie-tegra194.c
+++ b/drivers/pci/controller/dwc/pcie-tegra194.c
@@ -765,8 +765,6 @@ static void tegra_pcie_enable_msi_interr
struct tegra_pcie_dw *pcie = to_tegra_pcie(pci);
u32 val;
- dw_pcie_msi_init(pp);
-
/* Enable MSI interrupt generation */
val = appl_readl(pcie, APPL_INTR_EN_L0_0);
val |= APPL_INTR_EN_L0_0_SYS_MSI_INTR_EN;
--- a/drivers/pci/controller/dwc/pcie-uniphier.c
+++ b/drivers/pci/controller/dwc/pcie-uniphier.c
@@ -315,7 +315,6 @@ static int uniphier_pcie_host_init(struc
uniphier_pcie_irq_enable(priv);
dw_pcie_setup_rc(pp);
- dw_pcie_msi_init(pp);
return 0;
}

54
target/linux/ipq807x/patches-5.10/100-clk-qcom-ipq8074-fix-PCI-E-clock-oops.patch Normal file
View File

@ -0,0 +1,54 @@
From 8d111d707f71bc17c616b0bcca327ee0a3db50e8 Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Mon, 2 Nov 2020 19:03:59 +0100
Subject: [PATCH] clk: qcom: ipq8074: fix PCI-E clock oops
Fix PCI-E clock related kernel oops that are causes by missing
parent_names.
Without the use of parent_names kernel will panic on
clk_core_get_parent_by_index() due to a NULL pointer.
Without this earlycon is needed to even catch the OOPS as it will reset
the board before serial is initialized.
Fixes: f0cfcf1ade20 ("clk: qcom: ipq8074: Add missing clocks for pcie")
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
drivers/clk/qcom/gcc-ipq8074.c | 11 +++++------
1 file changed, 5 insertions(+), 6 deletions(-)
--- a/drivers/clk/qcom/gcc-ipq8074.c
+++ b/drivers/clk/qcom/gcc-ipq8074.c
@@ -4329,8 +4329,7 @@ static struct clk_rcg2 pcie0_rchng_clk_s
.parent_map = gcc_xo_gpll0_map,
.clkr.hw.init = &(struct clk_init_data){
.name = "pcie0_rchng_clk_src",
- .parent_hws = (const struct clk_hw *[]) {
- &gpll0.clkr.hw },
+ .parent_names = gcc_xo_gpll0,
.num_parents = 2,
.ops = &clk_rcg2_ops,
},
@@ -4344,8 +4343,8 @@ static struct clk_branch gcc_pcie0_rchng
.enable_mask = BIT(1),
.hw.init = &(struct clk_init_data){
.name = "gcc_pcie0_rchng_clk",
- .parent_hws = (const struct clk_hw *[]){
- &pcie0_rchng_clk_src.clkr.hw,
+ .parent_names = (const char *[]){
+ "pcie0_rchng_clk_src",
},
.num_parents = 1,
.flags = CLK_SET_RATE_PARENT,
@@ -4362,8 +4361,8 @@ static struct clk_branch gcc_pcie0_axi_s
.enable_mask = BIT(0),
.hw.init = &(struct clk_init_data){
.name = "gcc_pcie0_axi_s_bridge_clk",
- .parent_hws = (const struct clk_hw *[]){
- &pcie0_axi_clk_src.clkr.hw,
+ .parent_names = (const char *[]){
+ "pcie0_axi_clk_src"
},
.num_parents = 1,
.flags = CLK_SET_RATE_PARENT,

48
target/linux/ipq807x/patches-5.10/101-arm64-dts-ipq8074-add-crypto-nodes.patch Normal file
View File

@ -0,0 +1,48 @@
From 69581d91675df8c0d9b5f746de7c2f3d73344280 Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Tue, 11 May 2021 15:10:37 +0200
Subject: [PATCH] arm64: dts: ipq8074: add crypto nodes
IPQ8074 uses Qualcom QCE crypto engine v5.1
which is already supported.
So simply add nodes for its DMA and QCE itself.
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
arch/arm64/boot/dts/qcom/ipq8074.dtsi | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -197,6 +197,30 @@
status = "disabled";
};
+ cryptobam: dma@704000 {
+ compatible = "qcom,bam-v1.7.0";
+ reg = <0x00704000 0x20000>;
+ interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gcc GCC_CRYPTO_AHB_CLK>;
+ clock-names = "bam_clk";
+ #dma-cells = <1>;
+ qcom,ee = <1>;
+ qcom,controlled-remotely = <1>;
+ status = "disabled";
+ };
+
+ crypto: crypto@73a000 {
+ compatible = "qcom,crypto-v5.1";
+ reg = <0x0073a000 0x6000>;
+ clocks = <&gcc GCC_CRYPTO_AHB_CLK>,
+ <&gcc GCC_CRYPTO_AXI_CLK>,
+ <&gcc GCC_CRYPTO_CLK>;
+ clock-names = "iface", "bus", "core";
+ dmas = <&cryptobam 2>, <&cryptobam 3>;
+ dma-names = "rx", "tx";
+ status = "disabled";
+ };
+
tlmm: pinctrl@1000000 {
compatible = "qcom,ipq8074-pinctrl";
reg = <0x01000000 0x300000>;

30
target/linux/ipq807x/patches-5.10/102-arm64-dts-ipq8074-add-PRNG-node.patch Normal file
View File

@ -0,0 +1,30 @@
From ff46c62852e862ac360aeb1054180c8e715fbeb4 Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Tue, 11 May 2021 15:23:53 +0200
Subject: [PATCH] arm64: dts: ipq8074: add PRNG node
PRNG insinde of IPQ8074 is already supported,
so simply add the node for it.
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
arch/arm64/boot/dts/qcom/ipq8074.dtsi | 8 ++++++++
1 file changed, 8 insertions(+)
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -197,6 +197,14 @@
status = "disabled";
};
+ prng: rng@e3000 {
+ compatible = "qcom,prng-ee";
+ reg = <0x000e3000 0x1000>;
+ clocks = <&gcc GCC_PRNG_AHB_CLK>;
+ clock-names = "core";
+ status = "disabled";
+ };
+
cryptobam: dma@704000 {
compatible = "qcom,bam-v1.7.0";
reg = <0x00704000 0x20000>;

61
target/linux/ipq807x/patches-5.4/106-04-remoteproc-qcom-Add-PRNG-proxy-clock.patch → target/linux/ipq807x/patches-5.10/103-remoteproc-qcom-Add-PRNG-proxy-clock.patch
View File

@ -1,56 +1,7 @@
From patchwork Thu Jul 30 12:26:35 2020
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From e0d3c4e232c2b29532f7b894485814782201fdd9 Mon Sep 17 00:00:00 2001
From: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
To: gokulsri@codeaurora.org, agross@kernel.org,
bjorn.andersson@linaro.org, david.brown@linaro.org,
devicetree@vger.kernel.org, jassisinghbrar@gmail.com,
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Subject: [PATCH v7 1/9] remoteproc: qcom: Add PRNG proxy clock
Date: Thu, 30 Jul 2020 17:56:35 +0530
Message-Id: <1596112003-31663-2-git-send-email-gokulsri@codeaurora.org>
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Date: Sat, 30 Jan 2021 10:50:05 +0530
Subject: [PATCH 08/16] remoteproc: qcom: Add PRNG proxy clock
PRNG clock is needed by the secure PIL, support for the same
is added in subsequent patches.
@ -59,7 +10,7 @@ Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Signed-off-by: Nikhil Prakash V <nprakash@codeaurora.org>
---
drivers/remoteproc/qcom_q6v5_wcss.c | 65 +++++++++++++++++++++++++++----------
drivers/remoteproc/qcom_q6v5_wcss.c | 65 +++++++++++++++++++++--------
1 file changed, 47 insertions(+), 18 deletions(-)
--- a/drivers/remoteproc/qcom_q6v5_wcss.c
@ -185,7 +136,7 @@ Signed-off-by: Nikhil Prakash V <nprakash@codeaurora.org>
if (ret)
goto free_rproc;
}
@@ -1080,6 +1106,7 @@ static int q6v5_wcss_remove(struct platf
@@ -1082,6 +1108,7 @@ static int q6v5_wcss_remove(struct platf
}
static const struct wcss_data wcss_ipq8074_res_init = {
@ -193,7 +144,7 @@ Signed-off-by: Nikhil Prakash V <nprakash@codeaurora.org>
.firmware_name = "IPQ8074/q6_fw.mdt",
.crash_reason_smem = WCSS_CRASH_REASON,
.aon_reset_required = true,
@@ -1089,6 +1116,8 @@ static const struct wcss_data wcss_ipq80
@@ -1091,6 +1118,8 @@ static const struct wcss_data wcss_ipq80
};
static const struct wcss_data wcss_qcs404_res_init = {

61
target/linux/ipq807x/patches-5.4/106-05-remoteproc-qcom-Add-secure-PIL-support.patch → target/linux/ipq807x/patches-5.10/104-remoteproc-qcom-Add-secure-PIL-support.patch
View File

@ -1,56 +1,7 @@
From patchwork Thu Jul 30 12:26:36 2020
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From a6256ebbd66f3457e4a285b72b362d452bc6854f Mon Sep 17 00:00:00 2001
From: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
To: gokulsri@codeaurora.org, agross@kernel.org,
bjorn.andersson@linaro.org, david.brown@linaro.org,
devicetree@vger.kernel.org, jassisinghbrar@gmail.com,
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nprakash@codeaurora.org, ohad@wizery.com, robh+dt@kernel.org,
sboyd@kernel.org, sricharan@codeaurora.org
Subject: [PATCH v7 2/9] remoteproc: qcom: Add secure PIL support
Date: Thu, 30 Jul 2020 17:56:36 +0530
Message-Id: <1596112003-31663-3-git-send-email-gokulsri@codeaurora.org>
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Date: Sat, 30 Jan 2021 10:50:06 +0530
Subject: [PATCH 09/16] remoteproc: qcom: Add secure PIL support
IPQ8074 uses secure PIL. Hence, adding the support for the same.
@ -58,7 +9,7 @@ Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Signed-off-by: Nikhil Prakash V <nprakash@codeaurora.org>
---
drivers/remoteproc/qcom_q6v5_wcss.c | 43 ++++++++++++++++++++++++++++++++++---
drivers/remoteproc/qcom_q6v5_wcss.c | 43 +++++++++++++++++++++++++++--
1 file changed, 40 insertions(+), 3 deletions(-)
--- a/drivers/remoteproc/qcom_q6v5_wcss.c
@ -136,7 +87,7 @@ Signed-off-by: Nikhil Prakash V <nprakash@codeaurora.org>
+
/* WCSS powerdown */
if (wcss->requires_force_stop) {
ret = qcom_q6v5_request_stop(&wcss->q6v5);
ret = qcom_q6v5_request_stop(&wcss->q6v5, NULL);
@@ -741,6 +766,7 @@ static int q6v5_wcss_stop(struct rproc *
return ret;
}
@ -182,7 +133,7 @@ Signed-off-by: Nikhil Prakash V <nprakash@codeaurora.org>
ret = q6v5_wcss_init_mmio(wcss, pdev);
if (ret)
@@ -1113,6 +1149,7 @@ static const struct wcss_data wcss_ipq80
@@ -1115,6 +1151,7 @@ static const struct wcss_data wcss_ipq80
.wcss_q6_reset_required = true,
.ops = &q6v5_wcss_ipq8074_ops,
.requires_force_stop = true,

61
target/linux/ipq807x/patches-5.4/106-06-remoteproc-qcom-Add-support-for-split-q6-m3-wlan-firmware.patch → target/linux/ipq807x/patches-5.10/105-remoteproc-qcom-Add-support-for-split-q6-m3-wlan-fir.patch
View File

@ -1,57 +1,8 @@
From patchwork Thu Jul 30 12:26:37 2020
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From ea44aa0384fec6d6fcd5bf6bf52175628bad7319 Mon Sep 17 00:00:00 2001
From: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
To: gokulsri@codeaurora.org, agross@kernel.org,
bjorn.andersson@linaro.org, david.brown@linaro.org,
devicetree@vger.kernel.org, jassisinghbrar@gmail.com,
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sboyd@kernel.org, sricharan@codeaurora.org
Subject: [PATCH v7 3/9] remoteproc: qcom: Add support for split q6 + m3 wlan
Date: Sat, 30 Jan 2021 10:50:07 +0530
Subject: [PATCH 10/16] remoteproc: qcom: Add support for split q6 + m3 wlan
firmware
Date: Thu, 30 Jul 2020 17:56:37 +0530
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IPQ8074 supports split firmware for q6 and m3 as well.
So add support for loading the m3 firmware before q6.
@ -62,7 +13,7 @@ Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Signed-off-by: Nikhil Prakash V <nprakash@codeaurora.org>
---
drivers/remoteproc/qcom_q6v5_wcss.c | 33 +++++++++++++++++++++++++++++----
drivers/remoteproc/qcom_q6v5_wcss.c | 33 +++++++++++++++++++++++++----
1 file changed, 29 insertions(+), 4 deletions(-)
--- a/drivers/remoteproc/qcom_q6v5_wcss.c
@ -132,7 +83,7 @@ Signed-off-by: Nikhil Prakash V <nprakash@codeaurora.org>
ret = q6v5_wcss_init_mmio(wcss, pdev);
if (ret)
@@ -1143,7 +1167,8 @@ static int q6v5_wcss_remove(struct platf
@@ -1145,7 +1169,8 @@ static int q6v5_wcss_remove(struct platf
static const struct wcss_data wcss_ipq8074_res_init = {
.init_clock = ipq8074_init_clock,
@ -142,7 +93,7 @@ Signed-off-by: Nikhil Prakash V <nprakash@codeaurora.org>
.crash_reason_smem = WCSS_CRASH_REASON,
.aon_reset_required = true,
.wcss_q6_reset_required = true,
@@ -1156,7 +1181,7 @@ static const struct wcss_data wcss_qcs40
@@ -1158,7 +1183,7 @@ static const struct wcss_data wcss_qcs40
.init_clock = qcs404_init_clock,
.init_regulator = qcs404_init_regulator,
.crash_reason_smem = WCSS_CRASH_REASON,

24
target/linux/ipq807x/patches-5.10/106-remoteproc-qcom-Add-ssr-subdevice-identifier.patch Normal file
View File

@ -0,0 +1,24 @@
From dcfc2e3a3e346e0cad4c5b8707aaab96f4bbb59d Mon Sep 17 00:00:00 2001
From: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
Date: Sat, 30 Jan 2021 10:50:08 +0530
Subject: [PATCH 11/16] remoteproc: qcom: Add ssr subdevice identifier
Add name for ssr subdevice on IPQ8074 SoC.
Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Signed-off-by: Nikhil Prakash V <nprakash@codeaurora.org>
---
drivers/remoteproc/qcom_q6v5_wcss.c | 1 +
1 file changed, 1 insertion(+)
--- a/drivers/remoteproc/qcom_q6v5_wcss.c
+++ b/drivers/remoteproc/qcom_q6v5_wcss.c
@@ -1174,6 +1174,7 @@ static const struct wcss_data wcss_ipq80
.crash_reason_smem = WCSS_CRASH_REASON,
.aon_reset_required = true,
.wcss_q6_reset_required = true,
+ .ssr_name = "q6wcss",
.ops = &q6v5_wcss_ipq8074_ops,
.requires_force_stop = true,
.need_mem_protection = true,

80
target/linux/ipq807x/patches-5.10/107-remoteproc-qcom-Update-regmap-offsets-for-halt-regis.patch Normal file
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@ -0,0 +1,80 @@
From 543a7093420b500a197fc64361084613f248f07a Mon Sep 17 00:00:00 2001
From: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
Date: Sat, 30 Jan 2021 10:50:09 +0530
Subject: [PATCH 12/16] remoteproc: qcom: Update regmap offsets for halt
register
Fixed issue in reading halt-regs parameter from device-tree.
Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
---
drivers/remoteproc/qcom_q6v5_wcss.c | 22 ++++++++++++++--------
1 file changed, 14 insertions(+), 8 deletions(-)
--- a/drivers/remoteproc/qcom_q6v5_wcss.c
+++ b/drivers/remoteproc/qcom_q6v5_wcss.c
@@ -86,7 +86,7 @@
#define TCSR_WCSS_CLK_MASK 0x1F
#define TCSR_WCSS_CLK_ENABLE 0x14
-#define MAX_HALT_REG 3
+#define MAX_HALT_REG 4
#define WCNSS_PAS_ID 6
@@ -154,6 +154,7 @@ struct wcss_data {
u32 version;
bool aon_reset_required;
bool wcss_q6_reset_required;
+ bool bcr_reset_required;
const char *ssr_name;
const char *sysmon_name;
int ssctl_id;
@@ -874,10 +875,13 @@ static int q6v5_wcss_init_reset(struct q
}
}
- wcss->wcss_q6_bcr_reset = devm_reset_control_get_exclusive(dev, "wcss_q6_bcr_reset");
- if (IS_ERR(wcss->wcss_q6_bcr_reset)) {
- dev_err(wcss->dev, "unable to acquire wcss_q6_bcr_reset\n");
- return PTR_ERR(wcss->wcss_q6_bcr_reset);
+ if (desc->bcr_reset_required) {
+ wcss->wcss_q6_bcr_reset = devm_reset_control_get_exclusive(dev,
+ "wcss_q6_bcr_reset");
+ if (IS_ERR(wcss->wcss_q6_bcr_reset)) {
+ dev_err(wcss->dev, "unable to acquire wcss_q6_bcr_reset\n");
+ return PTR_ERR(wcss->wcss_q6_bcr_reset);
+ }
}
return 0;
@@ -925,9 +929,9 @@ static int q6v5_wcss_init_mmio(struct q6
return -EINVAL;
}
- wcss->halt_q6 = halt_reg[0];
- wcss->halt_wcss = halt_reg[1];
- wcss->halt_nc = halt_reg[2];
+ wcss->halt_q6 = halt_reg[1];
+ wcss->halt_wcss = halt_reg[2];
+ wcss->halt_nc = halt_reg[3];
return 0;
}
@@ -1174,6 +1178,7 @@ static const struct wcss_data wcss_ipq80
.crash_reason_smem = WCSS_CRASH_REASON,
.aon_reset_required = true,
.wcss_q6_reset_required = true,
+ .bcr_reset_required = false,
.ssr_name = "q6wcss",
.ops = &q6v5_wcss_ipq8074_ops,
.requires_force_stop = true,
@@ -1188,6 +1193,7 @@ static const struct wcss_data wcss_qcs40
.version = WCSS_QCS404,
.aon_reset_required = false,
.wcss_q6_reset_required = false,
+ .bcr_reset_required = true,
.ssr_name = "mpss",
.sysmon_name = "wcnss",
.ssctl_id = 0x12,

25
target/linux/ipq807x/patches-5.10/108-dt-bindings-clock-qcom-Add-reset-for-WCSSAON.patch Normal file
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@ -0,0 +1,25 @@
From 12c7588316e1aceb3a4918896735e8bc3757815f Mon Sep 17 00:00:00 2001
From: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
Date: Sat, 30 Jan 2021 10:50:10 +0530
Subject: [PATCH 13/16] dt-bindings: clock: qcom: Add reset for WCSSAON
Add binding for WCSSAON reset required for Q6v5 reset on IPQ8074 SoC.
Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Signed-off-by: Nikhil Prakash V <nprakash@codeaurora.org>
Acked-by: Rob Herring <robh@kernel.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
---
include/dt-bindings/clock/qcom,gcc-ipq8074.h | 1 +
1 file changed, 1 insertion(+)
--- a/include/dt-bindings/clock/qcom,gcc-ipq8074.h
+++ b/include/dt-bindings/clock/qcom,gcc-ipq8074.h
@@ -366,5 +366,6 @@
#define GCC_PCIE1_AHB_ARES 129
#define GCC_PCIE1_AXI_MASTER_STICKY_ARES 130
#define GCC_PCIE0_AXI_SLAVE_STICKY_ARES 131
+#define GCC_WCSSAON_RESET 132
#endif

25
target/linux/ipq807x/patches-5.10/109-clk-qcom-Add-WCSSAON-reset.patch Normal file
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@ -0,0 +1,25 @@
From 6de5e246382d6b15f297cadbf26bdd78ee7f9fea Mon Sep 17 00:00:00 2001
From: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
Date: Sat, 30 Jan 2021 10:50:11 +0530
Subject: [PATCH 14/16] clk: qcom: Add WCSSAON reset
Add WCSSAON reset required for Q6v5 on IPQ8074 SoC.
Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Signed-off-by: Nikhil Prakash V <nprakash@codeaurora.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
---
drivers/clk/qcom/gcc-ipq8074.c | 1 +
1 file changed, 1 insertion(+)
--- a/drivers/clk/qcom/gcc-ipq8074.c
+++ b/drivers/clk/qcom/gcc-ipq8074.c
@@ -4744,6 +4744,7 @@ static const struct qcom_reset_map gcc_i
[GCC_PCIE1_AXI_SLAVE_ARES] = { 0x76040, 4 },
[GCC_PCIE1_AHB_ARES] = { 0x76040, 5 },
[GCC_PCIE1_AXI_MASTER_STICKY_ARES] = { 0x76040, 6 },
+ [GCC_WCSSAON_RESET] = { 0x59010, 0 },
};
static const struct of_device_id gcc_ipq8074_match_table[] = {

28
target/linux/ipq807x/patches-5.10/110-arm64-dts-Add-support-for-scm-on-IPQ8074-SoCs.patch Normal file
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@ -0,0 +1,28 @@
From b177148d326cac30723f5fe9c939db2919aab33a Mon Sep 17 00:00:00 2001
From: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
Date: Sat, 30 Jan 2021 10:50:12 +0530
Subject: [PATCH 15/16] arm64: dts: Add support for scm on IPQ8074 SoCs
Enables scm support, clock is not needed for enabling scm interface.
Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
---
arch/arm64/boot/dts/qcom/ipq8074.dtsi | 6 ++++++
1 file changed, 6 insertions(+)
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -76,6 +76,12 @@
method = "smc";
};
+ firmware {
+ scm {
+ compatible = "qcom,scm-ipq8074", "qcom,scm";
+ };
+ };
+
soc: soc {
#address-cells = <0x1>;
#size-cells = <0x1>;

88
target/linux/ipq807x/patches-5.4/106-11-arm64-dts-qcom-Enable-Q6v5-WCSS-for-ipq8074-SoC.patch → target/linux/ipq807x/patches-5.10/111-arm64-dts-qcom-Enable-Q6v5-WCSS-for-ipq8074-SoC.patch
View File

@ -1,35 +1,59 @@
From cc3bb635a139e9967c43a5e4ba36ec6ff929cb8f Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Sun, 23 Aug 2020 00:00:44 +0200
Subject: [PATCH] arm64: dts: qcom: Enable Q6v5 WCSS for ipq8074 SoC
From 9428cd325c99212b25407df8035284012d65acdb Mon Sep 17 00:00:00 2001
From: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
Date: Sat, 30 Jan 2021 10:50:13 +0530
Subject: [PATCH 16/16] arm64: dts: qcom: Enable Q6v5 WCSS for ipq8074 SoC
Enable remoteproc WCSS PIL driver with glink
and ssr subdevices. Also configures shared memory
and enables smp2p and mailboxes required for IPC.
Signed-off-by: Robert Marko <robimarko@gmail.com>
Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Signed-off-by: Nikhil Prakash V <nprakash@codeaurora.org>
---
arch/arm64/boot/dts/qcom/ipq8074.dtsi | 93 ++++++++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 93 insertions(+)
arch/arm64/boot/dts/qcom/ipq8074.dtsi | 121 ++++++++++++++++++++++++++
1 file changed, 121 insertions(+)
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -107,6 +107,11 @@
reg = <0x0 0x4ab00000 0x0 0x100000>;
no-map;
};
@@ -76,12 +76,66 @@
method = "smc";
};
+ reserved-memory {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
+ smem_region: memory@4ab00000 {
+ no-map;
+ reg = <0x0 0x4ab00000 0x0 0x00100000>;
+ };
+
+ q6_region: memory@4b000000 {
+ no-map;
+ reg = <0x0 0x4b000000 0x0 0x05f00000>;
+ };
+ };
+
firmware {
scm {
compatible = "qcom,scm-ipq8074", "qcom,scm";
};
};
smem {
@@ -115,6 +120,32 @@
hwlocks = <&tcsr_mutex 0>;
};
+ tcsr_mutex: hwlock@193d000 {
+ compatible = "qcom,tcsr-mutex";
+ syscon = <&tcsr_mutex_regs 0 0x80>;
+ #hwlock-cells = <1>;
+ };
+
+ smem {
+ compatible = "qcom,smem";
+ memory-region = <&smem_region>;
+ hwlocks = <&tcsr_mutex 0>;
+ };
+
+ wcss: smp2p-wcss {
+ compatible = "qcom,smp2p";
+ qcom,smem = <435>, <428>;
@ -59,22 +83,21 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
soc: soc {
#address-cells = <0x1>;
#size-cells = <0x1>;
@@ -220,6 +251,11 @@
reg = <0x1905000 0x8000>;
@@ -727,5 +781,72 @@
"axi_m_sticky";
status = "disabled";
};
+
+ tcsr_q6: syscon@1945000 {
+ compatible = "syscon";
+ reg = <0x01945000 0xe000>;
+ };
+
sdhc_1: sdhci@7824900 {
compatible = "qcom,sdhci-msm-v4";
reg = <0x7824900 0x500>, <0x7824000 0x800>;
@@ -390,6 +426,13 @@
<GIC_PPI 1 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
};
+ tcsr_mutex_regs: syscon@193d000 {
+ compatible = "syscon";
+ reg = <0x01905000 0x8000>;
+ };
+
+ apcs_glb: mailbox@b111000 {
+ compatible = "qcom,ipq8074-apcs-apps-global";
+ reg = <0x0b111000 0x1000>;
@ -82,13 +105,6 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
+ #mbox-cells = <1>;
+ };
+
timer@b120000 {
#address-cells = <1>;
#size-cells = <1>;
@@ -449,6 +492,56 @@
};
};
+ q6v5_wcss: q6v5_wcss@cd00000 {
+ compatible = "qcom,ipq8074-wcss-pil";
+ reg = <0x0cd00000 0x4040>,
@ -138,7 +154,5 @@ Signed-off-by: Robert Marko <robimarko@gmail.com>
+ };
+ };
+ };
+
pcie1: pci@10000000 {
compatible = "qcom,pcie-ipq8074";
reg = <0x10000000 0xf1d
};
};

35
target/linux/ipq807x/patches-5.10/112-qcom-socinfo-Add-IPQ8074-SoC-family-ID-s.patch Normal file
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@ -0,0 +1,35 @@
From 5454294f432c0c095f3e2b54fd45491be779c545 Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Tue, 11 May 2021 18:11:13 +0200
Subject: [PATCH] soc: qcom: socinfo: Add IPQ8074 SoC family ID-s
Add ID-s for the Qualcomm IPQ8074 SoC family.
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
drivers/soc/qcom/socinfo.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
--- a/drivers/soc/qcom/socinfo.c
+++ b/drivers/soc/qcom/socinfo.c
@@ -224,8 +224,20 @@ static const struct soc_id soc_id[] = {
{ 312, "APQ8096SG" },
{ 318, "SDM630" },
{ 321, "SDM845" },
+ { 323, "IPQ8074" },
{ 341, "SDA845" },
+ { 342, "IPQ8072" },
+ { 343, "IPQ8076" },
+ { 344, "IPQ8078" },
{ 356, "SM8250" },
+ { 375, "IPQ8070" },
+ { 376, "IPQ8071" },
+ { 389, "IPQ8072A" },
+ { 390, "IPQ8074A" },
+ { 391, "IPQ8076A" },
+ { 392, "IPQ8078A" },
+ { 395, "IPQ8070A" },
+ { 396, "IPQ8071A" },
{ 402, "IPQ6018" },
{ 425, "SC7180" },
};

49
target/linux/ipq807x/patches-5.10/113-net-mdio-ipq4019-add-clock-handling.patch Normal file
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@ -0,0 +1,49 @@
From d91c466ec19e5ced30631cec703164c79525b986 Mon Sep 17 00:00:00 2001
From: Robert Marko <robert.marko@sartura.hr>
Date: Sun, 27 Dec 2020 18:55:56 +0100
Subject: [PATCH] net: mdio-ipq4019: add clock handling
Newer SoC-s like IPQ807x and IPQ60xx use the same MDIO controller,
but have separate MDIO clocks that need to be handled.
So lets add support for doing that.
Signed-off-by: Robert Marko <robert.marko@sartura.hr>
---
drivers/net/mdio/mdio-ipq4019.c | 12 ++++++++++++
1 file changed, 12 insertions(+)
--- a/drivers/net/mdio/mdio-ipq4019.c
+++ b/drivers/net/mdio/mdio-ipq4019.c
@@ -2,6 +2,7 @@
/* Copyright (c) 2015, The Linux Foundation. All rights reserved. */
/* Copyright (c) 2020 Sartura Ltd. */
+#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/kernel.h>
#include <linux/module.h>
@@ -33,6 +34,7 @@
struct ipq4019_mdio_data {
void __iomem *membase;
+ struct clk *clk;
};
static int ipq4019_mdio_wait_busy(struct mii_bus *bus)
@@ -187,6 +189,16 @@ static int ipq4019_mdio_probe(struct pla
if (IS_ERR(priv->membase))
return PTR_ERR(priv->membase);
+ priv->clk = devm_clk_get_optional(&pdev->dev, "mdio_ahb");
+ if (IS_ERR(priv->clk)) {
+ dev_err(&pdev->dev, "Failed getting clock!\n");
+ return PTR_ERR(priv->clk);
+ }
+
+ ret = clk_prepare_enable(priv->clk);
+ if (ret)
+ return ret;
+
bus->name = "ipq4019_mdio";
bus->read = ipq4019_mdio_read;
bus->write = ipq4019_mdio_write;

34
target/linux/ipq807x/patches-5.10/114-arm64-dts-ipq8074-Add-MDIO-support.patch Normal file
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@ -0,0 +1,34 @@
From 67ba6e563928123fc65dab604592a60da2cce648 Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Tue, 11 May 2021 18:24:35 +0200
Subject: [PATCH] arm64: dts: ipq8074: Add MDIO support
MDIO controller is the same one as in IPQ4019, so
lets add the node to support it.
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
arch/arm64/boot/dts/qcom/ipq8074.dtsi | 12 ++++++++++++
1 file changed, 12 insertions(+)
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -257,6 +257,18 @@
status = "disabled";
};
+ mdio: mdio@90000 {
+ compatible = "qcom,ipq4019-mdio";
+ reg = <0x00090000 0x64>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ clocks = <&gcc GCC_MDIO_AHB_CLK>;
+ clock-names = "mdio_ahb";
+
+ status = "disabled";
+ };
+
prng: rng@e3000 {
compatible = "qcom,prng-ee";
reg = <0x000e3000 0x1000>;

369
target/linux/ipq807x/patches-5.10/115-phy-qcom-qmp-Add-IPQ8074-PCIe-Gen3-QMP-PHY-support.patch Normal file
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@ -0,0 +1,369 @@
From 57887b141d68224dcf4039a2f5215011f43dd9f4 Mon Sep 17 00:00:00 2001
From: Sivaprakash Murugesan <sivaprak@codeaurora.org>
Date: Wed, 29 Jul 2020 21:00:04 +0530
Subject: [PATCH] phy: qcom-qmp: Add IPQ8074 PCIe Gen3 QMP PHY support
IPQ8074 has two PCIe ports, One Gen2 and one Gen3 port.
Since support for Gen2 PHY is already available, add support for
PCIe Gen3 PHY.
Co-developed-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org>
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
drivers/phy/qualcomm/phy-qcom-pcie3-qmp.h | 139 ++++++++++++++++++
drivers/phy/qualcomm/phy-qcom-qmp.c | 171 +++++++++++++++++++++-
2 files changed, 308 insertions(+), 2 deletions(-)
create mode 100644 drivers/phy/qualcomm/phy-qcom-pcie3-qmp.h
--- /dev/null
+++ b/drivers/phy/qualcomm/phy-qcom-pcie3-qmp.h
@@ -0,0 +1,139 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+
+/*
+ * Copyright (c) 2020, The Linux Foundation. All rights reserved.
+ */
+
+#ifndef PHY_QCOM_PCIE_H
+#define PHY_QCOM_PCIE_H
+
+/* QMP V2 PCIE PHY - Found in IPQ8074 gen3 port - QSERDES PLL registers */
+#define QSERDES_PLL_BG_TIMER 0x00c
+#define QSERDES_PLL_SSC_PER1 0x01c
+#define QSERDES_PLL_SSC_PER2 0x020
+#define QSERDES_PLL_SSC_STEP_SIZE1_MODE0 0x024
+#define QSERDES_PLL_SSC_STEP_SIZE2_MODE0 0x028
+#define QSERDES_PLL_SSC_STEP_SIZE1_MODE1 0x02c
+#define QSERDES_PLL_SSC_STEP_SIZE2_MODE1 0x030
+#define QSERDES_PLL_BIAS_EN_CLKBUFLR_EN 0x03c
+#define QSERDES_PLL_CLK_ENABLE1 0x040
+#define QSERDES_PLL_SYS_CLK_CTRL 0x044
+#define QSERDES_PLL_SYSCLK_BUF_ENABLE 0x048
+#define QSERDES_PLL_PLL_IVCO 0x050
+#define QSERDES_PLL_LOCK_CMP1_MODE0 0x054
+#define QSERDES_PLL_LOCK_CMP2_MODE0 0x058
+#define QSERDES_PLL_LOCK_CMP1_MODE1 0x060
+#define QSERDES_PLL_LOCK_CMP2_MODE1 0x064
+#define QSERDES_PLL_BG_TRIM 0x074
+#define QSERDES_PLL_CLK_EP_DIV_MODE0 0x078
+#define QSERDES_PLL_CLK_EP_DIV_MODE1 0x07c
+#define QSERDES_PLL_CP_CTRL_MODE0 0x080
+#define QSERDES_PLL_CP_CTRL_MODE1 0x084
+#define QSERDES_PLL_PLL_RCTRL_MODE0 0x088
+#define QSERDES_PLL_PLL_RCTRL_MODE1 0x08C
+#define QSERDES_PLL_PLL_CCTRL_MODE0 0x090
+#define QSERDES_PLL_PLL_CCTRL_MODE1 0x094
+#define QSERDES_PLL_BIAS_EN_CTRL_BY_PSM 0x0a4
+#define QSERDES_PLL_SYSCLK_EN_SEL 0x0a8
+#define QSERDES_PLL_RESETSM_CNTRL 0x0b0
+#define QSERDES_PLL_LOCK_CMP_EN 0x0c4
+#define QSERDES_PLL_DEC_START_MODE0 0x0cc
+#define QSERDES_PLL_DEC_START_MODE1 0x0d0
+#define QSERDES_PLL_DIV_FRAC_START1_MODE0 0x0d8
+#define QSERDES_PLL_DIV_FRAC_START2_MODE0 0x0dc
+#define QSERDES_PLL_DIV_FRAC_START3_MODE0 0x0e0
+#define QSERDES_PLL_DIV_FRAC_START1_MODE1 0x0e4
+#define QSERDES_PLL_DIV_FRAC_START2_MODE1 0x0e8
+#define QSERDES_PLL_DIV_FRAC_START3_MODE1 0x0eC
+#define QSERDES_PLL_INTEGLOOP_GAIN0_MODE0 0x100
+#define QSERDES_PLL_INTEGLOOP_GAIN1_MODE0 0x104
+#define QSERDES_PLL_INTEGLOOP_GAIN0_MODE1 0x108
+#define QSERDES_PLL_INTEGLOOP_GAIN1_MODE1 0x10c
+#define QSERDES_PLL_VCO_TUNE_MAP 0x120
+#define QSERDES_PLL_VCO_TUNE1_MODE0 0x124
+#define QSERDES_PLL_VCO_TUNE2_MODE0 0x128
+#define QSERDES_PLL_VCO_TUNE1_MODE1 0x12c
+#define QSERDES_PLL_VCO_TUNE2_MODE1 0x130
+#define QSERDES_PLL_VCO_TUNE_TIMER1 0x13c
+#define QSERDES_PLL_VCO_TUNE_TIMER2 0x140
+#define QSERDES_PLL_CLK_SELECT 0x16c
+#define QSERDES_PLL_HSCLK_SEL 0x170
+#define QSERDES_PLL_CORECLK_DIV 0x17c
+#define QSERDES_PLL_CORE_CLK_EN 0x184
+#define QSERDES_PLL_CMN_CONFIG 0x18c
+#define QSERDES_PLL_SVS_MODE_CLK_SEL 0x194
+#define QSERDES_PLL_CORECLK_DIV_MODE1 0x1b4
+
+/* QMP V2 PCIE PHY - Found in IPQ8074 gen3 port - - QSERDES TX registers */
+#define QSERDES_TX0_RES_CODE_LANE_OFFSET_TX 0x03c
+#define QSERDES_TX0_HIGHZ_DRVR_EN 0x058
+#define QSERDES_TX0_LANE_MODE_1 0x084
+#define QSERDES_TX0_RCV_DETECT_LVL_2 0x09c
+
+/* QMP V2 PCIE PHY - Found in IPQ8074 gen3 port - QSERDES RX registers */
+#define QSERDES_RX0_UCDR_FO_GAIN 0x008
+#define QSERDES_RX0_UCDR_SO_GAIN 0x014
+#define QSERDES_RX0_UCDR_SO_SATURATION_AND_ENABLE 0x034
+#define QSERDES_RX0_UCDR_PI_CONTROLS 0x044
+#define QSERDES_RX0_RX_EQU_ADAPTOR_CNTRL2 0x0ec
+#define QSERDES_RX0_RX_EQU_ADAPTOR_CNTRL3 0x0f0
+#define QSERDES_RX0_RX_EQU_ADAPTOR_CNTRL4 0x0f4
+#define QSERDES_RX0_RX_IDAC_TSETTLE_LOW 0x0f8
+#define QSERDES_RX0_RX_IDAC_TSETTLE_HIGH 0x0fc
+#define QSERDES_RX0_RX_EQ_OFFSET_ADAPTOR_CNTRL1 0x110
+#define QSERDES_RX0_RX_OFFSET_ADAPTOR_CNTRL2 0x114
+#define QSERDES_RX0_SIGDET_ENABLES 0x118
+#define QSERDES_RX0_SIGDET_CNTRL 0x11c
+#define QSERDES_RX0_SIGDET_DEGLITCH_CNTRL 0x124
+#define QSERDES_RX0_RX_MODE_00_LOW 0x170
+#define QSERDES_RX0_RX_MODE_00_HIGH 0x174
+#define QSERDES_RX0_RX_MODE_00_HIGH2 0x178
+#define QSERDES_RX0_RX_MODE_00_HIGH3 0x17c
+#define QSERDES_RX0_RX_MODE_00_HIGH4 0x180
+#define QSERDES_RX0_RX_MODE_01_LOW 0x184
+#define QSERDES_RX0_RX_MODE_01_HIGH 0x188
+#define QSERDES_RX0_RX_MODE_01_HIGH2 0x18c
+#define QSERDES_RX0_RX_MODE_01_HIGH3 0x190
+#define QSERDES_RX0_RX_MODE_01_HIGH4 0x194
+#define QSERDES_RX0_RX_MODE_10_LOW 0x198
+#define QSERDES_RX0_RX_MODE_10_HIGH 0x19c
+#define QSERDES_RX0_RX_MODE_10_HIGH2 0x1a0
+#define QSERDES_RX0_RX_MODE_10_HIGH3 0x1a4
+#define QSERDES_RX0_RX_MODE_10_HIGH4 0x1a8
+#define QSERDES_RX0_DFE_EN_TIMER 0x1b4
+
+/* QMP V2 PCIE PHY - Found in IPQ8074 gen3 port - PCS registers */
+
+#define PCS_COM_FLL_CNTRL1 0x098
+#define PCS_COM_FLL_CNTRL2 0x09c
+#define PCS_COM_FLL_CNT_VAL_L 0x0a0
+#define PCS_COM_FLL_CNT_VAL_H_TOL 0x0a4
+#define PCS_COM_FLL_MAN_CODE 0x0a8
+#define PCS_COM_REFGEN_REQ_CONFIG1 0x0dc
+#define PCS_COM_G12S1_TXDEEMPH_M3P5DB 0x16c
+#define PCS_COM_RX_SIGDET_LVL 0x188
+#define PCS_COM_P2U3_WAKEUP_DLY_TIME_AUXCLK_L 0x1a4
+#define PCS_COM_P2U3_WAKEUP_DLY_TIME_AUXCLK_H 0x1a8
+#define PCS_COM_RX_DCC_CAL_CONFIG 0x1d8
+#define PCS_COM_EQ_CONFIG5 0x1ec
+
+/* QMP V2 PCIE PHY - Found in IPQ8074 gen3 port - PCS Misc registers */
+
+#define PCS_PCIE_POWER_STATE_CONFIG2 0x40c
+#define PCS_PCIE_POWER_STATE_CONFIG4 0x414
+#define PCS_PCIE_ENDPOINT_REFCLK_DRIVE 0x41c
+#define PCS_PCIE_L1P1_WAKEUP_DLY_TIME_AUXCLK_L 0x440
+#define PCS_PCIE_L1P1_WAKEUP_DLY_TIME_AUXCLK_H 0x444
+#define PCS_PCIE_L1P2_WAKEUP_DLY_TIME_AUXCLK_L 0x448
+#define PCS_PCIE_L1P2_WAKEUP_DLY_TIME_AUXCLK_H 0x44c
+#define PCS_PCIE_OSC_DTCT_CONFIG2 0x45c
+#define PCS_PCIE_OSC_DTCT_MODE2_CONFIG2 0x478
+#define PCS_PCIE_OSC_DTCT_MODE2_CONFIG4 0x480
+#define PCS_PCIE_OSC_DTCT_MODE2_CONFIG5 0x484
+#define PCS_PCIE_OSC_DTCT_ACTIONS 0x490
+#define PCS_PCIE_EQ_CONFIG1 0x4a0
+#define PCS_PCIE_EQ_CONFIG2 0x4a4
+#define PCS_PCIE_PRESET_P10_PRE 0x4bc
+#define PCS_PCIE_PRESET_P10_POST 0x4e0
+
+#endif
--- a/drivers/phy/qualcomm/phy-qcom-qmp.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp.c
@@ -23,6 +23,7 @@
#include <dt-bindings/phy/phy.h>
#include "phy-qcom-qmp.h"
+#include "phy-qcom-pcie3-qmp.h"
/* QPHY_SW_RESET bit */
#define SW_RESET BIT(0)
@@ -676,6 +677,132 @@ static const struct qmp_phy_init_tbl ipq
QMP_PHY_INIT_CFG_L(QPHY_START_CTRL, 0x3),
};
+static const struct qmp_phy_init_tbl ipq8074_pcie_gen3_serdes_tbl[] = {
+ QMP_PHY_INIT_CFG(QSERDES_PLL_BIAS_EN_CLKBUFLR_EN, 0x18),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_BIAS_EN_CTRL_BY_PSM, 0x01),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_CLK_SELECT, 0x31),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_PLL_IVCO, 0x0f),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_BG_TRIM, 0x0f),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_CMN_CONFIG, 0x06),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_LOCK_CMP_EN, 0x42),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_RESETSM_CNTRL, 0x20),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_SVS_MODE_CLK_SEL, 0x01),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_VCO_TUNE_MAP, 0x04),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_SVS_MODE_CLK_SEL, 0x05),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_VCO_TUNE_TIMER1, 0xff),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_VCO_TUNE_TIMER2, 0x3f),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_CORE_CLK_EN, 0x30),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_HSCLK_SEL, 0x21),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_DEC_START_MODE0, 0x82),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_DIV_FRAC_START3_MODE0, 0x03),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_DIV_FRAC_START2_MODE0, 0x355),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_DIV_FRAC_START1_MODE0, 0x35555),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_LOCK_CMP2_MODE0, 0x1a),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_LOCK_CMP1_MODE0, 0x1a0a),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_CP_CTRL_MODE0, 0xb),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_PLL_RCTRL_MODE0, 0x16),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_PLL_CCTRL_MODE0, 0x28),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_INTEGLOOP_GAIN1_MODE0, 0x0),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_INTEGLOOP_GAIN0_MODE0, 0x40),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_VCO_TUNE2_MODE0, 0x02),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_VCO_TUNE1_MODE0, 0x24),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_SVS_MODE_CLK_SEL, 0x05),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_CORE_CLK_EN, 0x20),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_CORECLK_DIV, 0xa),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_CLK_SELECT, 0x32),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_SYS_CLK_CTRL, 0x02),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_SYSCLK_BUF_ENABLE, 0x07),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_SYSCLK_EN_SEL, 0x08),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_BG_TIMER, 0xa),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_HSCLK_SEL, 0x1),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_DEC_START_MODE1, 0x68),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_DIV_FRAC_START3_MODE1, 0x2),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_DIV_FRAC_START2_MODE1, 0x2aa),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_DIV_FRAC_START1_MODE1, 0x2aaab),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_CLK_ENABLE1, 0x90),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_LOCK_CMP2_MODE1, 0x34),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_LOCK_CMP1_MODE1, 0x3414),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_CP_CTRL_MODE1, 0x0b),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_PLL_RCTRL_MODE1, 0x16),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_PLL_CCTRL_MODE1, 0x28),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_INTEGLOOP_GAIN1_MODE1, 0x0),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_INTEGLOOP_GAIN0_MODE1, 0x40),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_VCO_TUNE2_MODE1, 0x03),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_VCO_TUNE1_MODE1, 0xb4),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_SVS_MODE_CLK_SEL, 0x05),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_CORE_CLK_EN, 0x0),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_CORECLK_DIV_MODE1, 0x08),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_CLK_EP_DIV_MODE0, 0x19),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_CLK_EP_DIV_MODE1, 0x28),
+ QMP_PHY_INIT_CFG(QSERDES_PLL_CLK_ENABLE1, 0x90),
+};
+
+static const struct qmp_phy_init_tbl ipq8074_pcie_gen3_tx_tbl[] = {
+ QMP_PHY_INIT_CFG(QSERDES_TX0_RES_CODE_LANE_OFFSET_TX, 0x02),
+ QMP_PHY_INIT_CFG(QSERDES_TX0_RCV_DETECT_LVL_2, 0x12),
+ QMP_PHY_INIT_CFG(QSERDES_TX0_HIGHZ_DRVR_EN, 0x10),
+ QMP_PHY_INIT_CFG(QSERDES_TX0_LANE_MODE_1, 0x06),
+};
+
+static const struct qmp_phy_init_tbl ipq8074_pcie_gen3_rx_tbl[] = {
+ QMP_PHY_INIT_CFG(QSERDES_RX0_SIGDET_CNTRL, 0x03),
+ QMP_PHY_INIT_CFG(QSERDES_RX0_SIGDET_ENABLES, 0x1c),
+ QMP_PHY_INIT_CFG(QSERDES_RX0_SIGDET_DEGLITCH_CNTRL, 0x14),
+ QMP_PHY_INIT_CFG(QSERDES_RX0_RX_EQU_ADAPTOR_CNTRL2, 0xe),
+ QMP_PHY_INIT_CFG(QSERDES_RX0_RX_EQU_ADAPTOR_CNTRL3, 0x4),
+ QMP_PHY_INIT_CFG(QSERDES_RX0_RX_EQU_ADAPTOR_CNTRL4, 0x1b),
+ QMP_PHY_INIT_CFG(QSERDES_RX0_DFE_EN_TIMER, 0x04),
+ QMP_PHY_INIT_CFG(QSERDES_RX0_UCDR_SO_SATURATION_AND_ENABLE, 0x7f),
+ QMP_PHY_INIT_CFG(QSERDES_RX0_UCDR_PI_CONTROLS, 0x70),
+ QMP_PHY_INIT_CFG(QSERDES_RX0_RX_EQ_OFFSET_ADAPTOR_CNTRL1, 0x73),
+ QMP_PHY_INIT_CFG(QSERDES_RX0_RX_OFFSET_ADAPTOR_CNTRL2, 0x80),
+ QMP_PHY_INIT_CFG(QSERDES_RX0_RX_MODE_10_LOW, 0x00),
+ QMP_PHY_INIT_CFG(QSERDES_RX0_RX_MODE_10_HIGH, 0x02),
+ QMP_PHY_INIT_CFG(QSERDES_RX0_RX_MODE_10_HIGH2, 0xc8),
+ QMP_PHY_INIT_CFG(QSERDES_RX0_RX_MODE_10_HIGH3, 0x09),
+ QMP_PHY_INIT_CFG(QSERDES_RX0_RX_MODE_10_HIGH4, 0xb1),
+ QMP_PHY_INIT_CFG(QSERDES_RX0_RX_MODE_01_LOW, 0x01),
+ QMP_PHY_INIT_CFG(QSERDES_RX0_RX_MODE_01_HIGH, 0x02),
+ QMP_PHY_INIT_CFG(QSERDES_RX0_RX_MODE_01_HIGH2, 0xc8),
+ QMP_PHY_INIT_CFG(QSERDES_RX0_RX_MODE_01_HIGH3, 0x09),
+ QMP_PHY_INIT_CFG(QSERDES_RX0_RX_MODE_01_HIGH4, 0xb1),
+ QMP_PHY_INIT_CFG(QSERDES_RX0_RX_MODE_00_LOW, 0xf0),
+ QMP_PHY_INIT_CFG(QSERDES_RX0_RX_MODE_00_HIGH, 0x2),
+ QMP_PHY_INIT_CFG(QSERDES_RX0_RX_MODE_00_HIGH2, 0x2f),
+ QMP_PHY_INIT_CFG(QSERDES_RX0_RX_MODE_00_HIGH3, 0xd3),
+ QMP_PHY_INIT_CFG(QSERDES_RX0_RX_MODE_00_HIGH4, 0x40),
+ QMP_PHY_INIT_CFG(QSERDES_RX0_RX_IDAC_TSETTLE_HIGH, 0x00),
+ QMP_PHY_INIT_CFG(QSERDES_RX0_RX_IDAC_TSETTLE_LOW, 0xc0),
+ QMP_PHY_INIT_CFG(QSERDES_RX0_UCDR_FO_GAIN, 0x0c),
+ QMP_PHY_INIT_CFG(QSERDES_RX0_UCDR_SO_GAIN, 0x02),
+};
+
+static const struct qmp_phy_init_tbl ipq8074_pcie_gen3_pcs_tbl[] = {
+ QMP_PHY_INIT_CFG(PCS_COM_FLL_CNTRL2, 0x83),
+ QMP_PHY_INIT_CFG(PCS_COM_FLL_CNT_VAL_L, 0x9),
+ QMP_PHY_INIT_CFG(PCS_COM_FLL_CNT_VAL_H_TOL, 0x42),
+ QMP_PHY_INIT_CFG(PCS_COM_FLL_MAN_CODE, 0x40),
+ QMP_PHY_INIT_CFG(PCS_COM_FLL_CNTRL1, 0x01),
+ QMP_PHY_INIT_CFG(PCS_COM_P2U3_WAKEUP_DLY_TIME_AUXCLK_H, 0x0),
+ QMP_PHY_INIT_CFG(PCS_COM_P2U3_WAKEUP_DLY_TIME_AUXCLK_L, 0x1),
+ QMP_PHY_INIT_CFG(PCS_PCIE_OSC_DTCT_ACTIONS, 0x0),
+ QMP_PHY_INIT_CFG(PCS_PCIE_L1P1_WAKEUP_DLY_TIME_AUXCLK_H, 0x00),
+ QMP_PHY_INIT_CFG(PCS_PCIE_L1P1_WAKEUP_DLY_TIME_AUXCLK_L, 0x01),
+ QMP_PHY_INIT_CFG(PCS_PCIE_L1P2_WAKEUP_DLY_TIME_AUXCLK_H, 0x00),
+ QMP_PHY_INIT_CFG(PCS_PCIE_L1P2_WAKEUP_DLY_TIME_AUXCLK_L, 0x01),
+ QMP_PHY_INIT_CFG(PCS_PCIE_EQ_CONFIG1, 0x11),
+ QMP_PHY_INIT_CFG(PCS_PCIE_EQ_CONFIG2, 0xb),
+ QMP_PHY_INIT_CFG(PCS_PCIE_POWER_STATE_CONFIG4, 0x07),
+ QMP_PHY_INIT_CFG(PCS_PCIE_OSC_DTCT_CONFIG2, 0x52),
+ QMP_PHY_INIT_CFG(PCS_PCIE_OSC_DTCT_MODE2_CONFIG2, 0x50),
+ QMP_PHY_INIT_CFG(PCS_PCIE_OSC_DTCT_MODE2_CONFIG4, 0x1a),
+ QMP_PHY_INIT_CFG(PCS_PCIE_OSC_DTCT_MODE2_CONFIG5, 0x6),
+ QMP_PHY_INIT_CFG(PCS_COM_G12S1_TXDEEMPH_M3P5DB, 0x10),
+ QMP_PHY_INIT_CFG(PCS_PCIE_ENDPOINT_REFCLK_DRIVE, 0xc1),
+ QMP_PHY_INIT_CFG(PCS_COM_RX_DCC_CAL_CONFIG, 0x01),
+ QMP_PHY_INIT_CFG(PCS_COM_RX_SIGDET_LVL, 0xaa),
+ QMP_PHY_INIT_CFG(PCS_COM_REFGEN_REQ_CONFIG1, 0x0d),
+};
static const struct qmp_phy_init_tbl sdm845_qmp_pcie_serdes_tbl[] = {
QMP_PHY_INIT_CFG(QSERDES_V3_COM_BIAS_EN_CLKBUFLR_EN, 0x14),
QMP_PHY_INIT_CFG(QSERDES_V3_COM_CLK_SELECT, 0x30),
@@ -2187,6 +2314,36 @@ static const struct qmp_phy_cfg ipq8074_
.pwrdn_delay_max = 1005, /* us */
};
+static const struct qmp_phy_cfg ipq8074_pciephy_gen3_cfg = {
+ .type = PHY_TYPE_PCIE,
+ .nlanes = 1,
+
+ .serdes_tbl = ipq8074_pcie_gen3_serdes_tbl,
+ .serdes_tbl_num = ARRAY_SIZE(ipq8074_pcie_gen3_serdes_tbl),
+ .tx_tbl = ipq8074_pcie_gen3_tx_tbl,
+ .tx_tbl_num = ARRAY_SIZE(ipq8074_pcie_gen3_tx_tbl),
+ .rx_tbl = ipq8074_pcie_gen3_rx_tbl,
+ .rx_tbl_num = ARRAY_SIZE(ipq8074_pcie_gen3_rx_tbl),
+ .pcs_tbl = ipq8074_pcie_gen3_pcs_tbl,
+ .pcs_tbl_num = ARRAY_SIZE(ipq8074_pcie_gen3_pcs_tbl),
+ .clk_list = ipq8074_pciephy_clk_l,
+ .num_clks = ARRAY_SIZE(ipq8074_pciephy_clk_l),
+ .reset_list = ipq8074_pciephy_reset_l,
+ .num_resets = ARRAY_SIZE(ipq8074_pciephy_reset_l),
+ .vreg_list = NULL,
+ .num_vregs = 0,
+ .regs = qmp_v4_usb3phy_regs_layout,
+
+ .start_ctrl = SERDES_START | PCS_START,
+ .pwrdn_ctrl = SW_PWRDN | REFCLK_DRV_DSBL,
+
+ .has_phy_com_ctrl = false,
+ .has_lane_rst = false,
+ .has_pwrdn_delay = true,
+ .pwrdn_delay_min = 995, /* us */
+ .pwrdn_delay_max = 1005, /* us */
+};
+
static const struct qmp_phy_cfg sdm845_qmp_pciephy_cfg = {
.type = PHY_TYPE_PCIE,
.nlanes = 1,
@@ -3476,8 +3633,15 @@ static int phy_pipe_clk_register(struct
init.ops = &clk_fixed_rate_ops;
- /* controllers using QMP phys use 125MHz pipe clock interface */
- fixed->fixed_rate = 125000000;
+ /*
+ * controllers using QMP phys use 125MHz pipe clock interface unless
+ * other frequency is specified in dts
+ */
+ ret = of_property_read_u32(np, "clock-output-rate",
+ (u32 *)&fixed->fixed_rate);
+ if (ret)
+ fixed->fixed_rate = 125000000;
+
fixed->hw.init = &init;
ret = devm_clk_hw_register(qmp->dev, &fixed->hw);
@@ -3859,6 +4023,9 @@ static const struct of_device_id qcom_qm
.compatible = "qcom,ipq8074-qmp-pcie-phy",
.data = &ipq8074_pciephy_cfg,
}, {
+ .compatible = "qcom,ipq8074-qmp-pcie-gen3-phy",
+ .data = &ipq8074_pciephy_gen3_cfg,
+ }, {
.compatible = "qcom,sc7180-qmp-usb3-phy",
.data = &sc7180_usb3phy_cfg,
}, {

44
target/linux/ipq807x/patches-5.10/116-PCI-dwc-tegra-move-GEN3_RELATED-DBI-register-to-comm.patch Normal file
View File

@ -0,0 +1,44 @@
From 35df745d335bd21094f522dc9dff7eaae92114d9 Mon Sep 17 00:00:00 2001
From: Baruch Siach <baruch@tkos.co.il>
Date: Wed, 5 May 2021 12:18:29 +0300
Subject: [PATCH] PCI: dwc: tegra: move GEN3_RELATED DBI register to common
header
These are common dwc macros that will be used for other platforms.
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
---
drivers/pci/controller/dwc/pcie-designware.h | 6 ++++++
drivers/pci/controller/dwc/pcie-tegra194.c | 6 ------
2 files changed, 6 insertions(+), 6 deletions(-)
--- a/drivers/pci/controller/dwc/pcie-designware.h
+++ b/drivers/pci/controller/dwc/pcie-designware.h
@@ -74,6 +74,12 @@
#define PCIE_MSI_INTR0_MASK 0x82C
#define PCIE_MSI_INTR0_STATUS 0x830
+#define GEN3_RELATED_OFF 0x890
+#define GEN3_RELATED_OFF_GEN3_ZRXDC_NONCOMPL BIT(0)
+#define GEN3_RELATED_OFF_GEN3_EQ_DISABLE BIT(16)
+#define GEN3_RELATED_OFF_RATE_SHADOW_SEL_SHIFT 24
+#define GEN3_RELATED_OFF_RATE_SHADOW_SEL_MASK GENMASK(25, 24)
+
#define PCIE_PORT_MULTI_LANE_CTRL 0x8C0
#define PORT_MLTI_UPCFG_SUPPORT BIT(7)
--- a/drivers/pci/controller/dwc/pcie-tegra194.c
+++ b/drivers/pci/controller/dwc/pcie-tegra194.c
@@ -193,12 +193,6 @@
#define GEN3_EQ_CONTROL_OFF_PSET_REQ_VEC_MASK GENMASK(23, 8)
#define GEN3_EQ_CONTROL_OFF_FB_MODE_MASK GENMASK(3, 0)
-#define GEN3_RELATED_OFF 0x890
-#define GEN3_RELATED_OFF_GEN3_ZRXDC_NONCOMPL BIT(0)
-#define GEN3_RELATED_OFF_GEN3_EQ_DISABLE BIT(16)
-#define GEN3_RELATED_OFF_RATE_SHADOW_SEL_SHIFT 24
-#define GEN3_RELATED_OFF_RATE_SHADOW_SEL_MASK GENMASK(25, 24)
-
#define PORT_LOGIC_AMBA_ERROR_RESPONSE_DEFAULT 0x8D0
#define AMBA_ERROR_RESPONSE_CRS_SHIFT 3
#define AMBA_ERROR_RESPONSE_CRS_MASK GENMASK(1, 0)

230
target/linux/ipq807x/patches-5.10/117-PCI-qcom-add-support-for-IPQ60xx-PCIe-controller.patch Normal file
View File

@ -0,0 +1,230 @@
From 809a720946f720dca2009bac29294992375a31b9 Mon Sep 17 00:00:00 2001
From: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
Date: Tue, 11 May 2021 21:53:08 +0200
Subject: [PATCH] PCI: qcom: add support for IPQ60xx PCIe controller
IPQ60xx series of SoCs have one port of PCIe gen 3. Add support for that
platform.
The code is based on downstream Codeaurora kernel v5.4. Split out the
DBI registers access part from .init into .post_init. DBI registers are
only accessible after phy_power_on().
Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org>
Signed-off-by: Baruch Siach <baruch@tkos.co.il>
---
drivers/pci/controller/dwc/pcie-designware.h | 1 +
drivers/pci/controller/dwc/pcie-qcom.c | 150 +++++++++++++++++++
2 files changed, 151 insertions(+)
--- a/drivers/pci/controller/dwc/pcie-designware.h
+++ b/drivers/pci/controller/dwc/pcie-designware.h
@@ -76,6 +76,7 @@
#define GEN3_RELATED_OFF 0x890
#define GEN3_RELATED_OFF_GEN3_ZRXDC_NONCOMPL BIT(0)
+#define GEN3_RELATED_OFF_RXEQ_RGRDLESS_RXTS BIT(13)
#define GEN3_RELATED_OFF_GEN3_EQ_DISABLE BIT(16)
#define GEN3_RELATED_OFF_RATE_SHADOW_SEL_SHIFT 24
#define GEN3_RELATED_OFF_RATE_SHADOW_SEL_MASK GENMASK(25, 24)
--- a/drivers/pci/controller/dwc/pcie-qcom.c
+++ b/drivers/pci/controller/dwc/pcie-qcom.c
@@ -51,6 +51,10 @@
#define PCIE20_PARF_DBI_BASE_ADDR 0x168
#define PCIE20_PARF_SLV_ADDR_SPACE_SIZE 0x16C
#define PCIE20_PARF_MHI_CLOCK_RESET_CTRL 0x174
+#define AHB_CLK_EN BIT(0)
+#define MSTR_AXI_CLK_EN BIT(1)
+#define BYPASS BIT(4)
+
#define PCIE20_PARF_AXI_MSTR_WR_ADDR_HALT 0x178
#define PCIE20_PARF_AXI_MSTR_WR_ADDR_HALT_V2 0x1A8
#define PCIE20_PARF_LTSSM 0x1B0
@@ -92,6 +96,12 @@
#define SLV_ADDR_SPACE_SZ 0x10000000
#define PCIE20_LNK_CONTROL2_LINK_STATUS2 0xa0
+#define PCIE_CAP_CURR_DEEMPHASIS BIT(16)
+#define SPEED_GEN1 0x1
+#define SPEED_GEN2 0x2
+#define SPEED_GEN3 0x3
+#define AXI_CLK_RATE 200000000
+#define RCHNG_CLK_RATE 100000000
#define DEVICE_TYPE_RC 0x4
@@ -161,6 +171,11 @@ struct qcom_pcie_resources_2_7_0 {
struct clk *pipe_clk;
};
+struct qcom_pcie_resources_2_9_0 {
+ struct clk_bulk_data clks[5];
+ struct reset_control *rst;
+};
+
union qcom_pcie_resources {
struct qcom_pcie_resources_1_0_0 v1_0_0;
struct qcom_pcie_resources_2_1_0 v2_1_0;
@@ -168,6 +183,7 @@ union qcom_pcie_resources {
struct qcom_pcie_resources_2_3_3 v2_3_3;
struct qcom_pcie_resources_2_4_0 v2_4_0;
struct qcom_pcie_resources_2_7_0 v2_7_0;
+ struct qcom_pcie_resources_2_9_0 v2_9_0;
};
struct qcom_pcie;
@@ -1252,6 +1268,130 @@ static void qcom_pcie_post_deinit_2_7_0(
clk_disable_unprepare(res->pipe_clk);
}
+static int qcom_pcie_get_resources_2_9_0(struct qcom_pcie *pcie)
+{
+ struct qcom_pcie_resources_2_9_0 *res = &pcie->res.v2_9_0;
+ struct dw_pcie *pci = pcie->pci;
+ struct device *dev = pci->dev;
+ int ret;
+
+ res->clks[0].id = "iface";
+ res->clks[1].id = "axi_m";
+ res->clks[2].id = "axi_s";
+ res->clks[3].id = "axi_bridge";
+ res->clks[4].id = "rchng";
+
+ ret = devm_clk_bulk_get(dev, ARRAY_SIZE(res->clks), res->clks);
+ if (ret < 0)
+ return ret;
+
+ res->rst = devm_reset_control_array_get_exclusive(dev);
+ if (IS_ERR(res->rst))
+ return PTR_ERR(res->rst);
+
+ return 0;
+}
+
+static void qcom_pcie_deinit_2_9_0(struct qcom_pcie *pcie)
+{
+ struct qcom_pcie_resources_2_9_0 *res = &pcie->res.v2_9_0;
+
+ clk_bulk_disable_unprepare(ARRAY_SIZE(res->clks), res->clks);
+}
+
+static int qcom_pcie_init_2_9_0(struct qcom_pcie *pcie)
+{
+ struct qcom_pcie_resources_2_9_0 *res = &pcie->res.v2_9_0;
+ struct device *dev = pcie->pci->dev;
+ int ret;
+
+ ret = reset_control_assert(res->rst);
+ if (ret) {
+ dev_err(dev, "reset assert failed (%d)\n", ret);
+ return ret;
+ }
+
+ usleep_range(2000, 2500);
+
+ ret = reset_control_deassert(res->rst);
+ if (ret) {
+ dev_err(dev, "reset deassert failed (%d)\n", ret);
+ return ret;
+ }
+
+ /*
+ * Don't have a way to see if the reset has completed.
+ * Wait for some time.
+ */
+ usleep_range(2000, 2500);
+
+ ret = clk_bulk_prepare_enable(ARRAY_SIZE(res->clks), res->clks);
+ if (ret)
+ goto err_reset;
+
+ return 0;
+
+ /*
+ * Not checking for failure, will anyway return
+ * the original failure in 'ret'.
+ */
+err_reset:
+ reset_control_assert(res->rst);
+
+ return ret;
+}
+
+static int qcom_pcie_post_init_2_9_0(struct qcom_pcie *pcie)
+{
+ struct dw_pcie *pci = pcie->pci;
+ u16 offset = dw_pcie_find_capability(pci, PCI_CAP_ID_EXP);
+ u32 val;
+ int i;
+
+ writel(SLV_ADDR_SPACE_SZ,
+ pcie->parf + PCIE20_v3_PARF_SLV_ADDR_SPACE_SIZE);
+
+ val = readl(pcie->parf + PCIE20_PARF_PHY_CTRL);
+ val &= ~BIT(0);
+ writel(val, pcie->parf + PCIE20_PARF_PHY_CTRL);
+
+ writel(0, pcie->parf + PCIE20_PARF_DBI_BASE_ADDR);
+
+ writel(DEVICE_TYPE_RC, pcie->parf + PCIE20_PARF_DEVICE_TYPE);
+ writel(BYPASS | MSTR_AXI_CLK_EN | AHB_CLK_EN,
+ pcie->parf + PCIE20_PARF_MHI_CLOCK_RESET_CTRL);
+ writel(GEN3_RELATED_OFF_RXEQ_RGRDLESS_RXTS
+ | GEN3_RELATED_OFF_GEN3_ZRXDC_NONCOMPL,
+ pci->dbi_base + GEN3_RELATED_OFF);
+
+ writel(MST_WAKEUP_EN | SLV_WAKEUP_EN | MSTR_ACLK_CGC_DIS
+ | SLV_ACLK_CGC_DIS | CORE_CLK_CGC_DIS |
+ AUX_PWR_DET | L23_CLK_RMV_DIS | L1_CLK_RMV_DIS,
+ pcie->parf + PCIE20_PARF_SYS_CTRL);
+
+ writel(0, pcie->parf + PCIE20_PARF_Q2A_FLUSH);
+
+ dw_pcie_dbi_ro_wr_en(pci);
+ writel(PCIE_CAP_LINK1_VAL, pci->dbi_base + offset + PCI_EXP_SLTCAP);
+
+ /* Configure PCIe link capabilities for ASPM */
+ val = readl(pci->dbi_base + offset + PCI_EXP_LNKCAP);
+ val &= ~PCI_EXP_LNKCAP_ASPMS;
+ writel(val, pci->dbi_base + offset + PCI_EXP_LNKCAP);
+
+ writel(PCI_EXP_DEVCTL2_COMP_TMOUT_DIS, pci->dbi_base + offset +
+ PCI_EXP_DEVCTL2);
+
+ writel(PCIE_CAP_CURR_DEEMPHASIS | SPEED_GEN3,
+ pci->dbi_base + offset + PCI_EXP_DEVCTL2);
+
+ for (i = 0;i < 256;i++)
+ writel(0x0, pcie->parf + PCIE20_PARF_BDF_TO_SID_TABLE_N
+ + (4 * i));
+
+ return 0;
+}
+
static int qcom_pcie_link_up(struct dw_pcie *pci)
{
u16 offset = dw_pcie_find_capability(pci, PCI_CAP_ID_EXP);
@@ -1351,6 +1491,15 @@ static const struct qcom_pcie_ops ops_2_
.post_deinit = qcom_pcie_post_deinit_2_7_0,
};
+/* Qcom IP rev.: 2.9.0 Synopsys IP rev.: 5.00a */
+static const struct qcom_pcie_ops ops_2_9_0 = {
+ .get_resources = qcom_pcie_get_resources_2_9_0,
+ .init = qcom_pcie_init_2_9_0,
+ .post_init = qcom_pcie_post_init_2_9_0,
+ .deinit = qcom_pcie_deinit_2_9_0,
+ .ltssm_enable = qcom_pcie_2_3_2_ltssm_enable,
+};
+
static const struct dw_pcie_ops dw_pcie_ops = {
.link_up = qcom_pcie_link_up,
.start_link = qcom_pcie_start_link,
@@ -1457,6 +1606,7 @@ static const struct of_device_id qcom_pc
{ .compatible = "qcom,pcie-ipq4019", .data = &ops_2_4_0 },
{ .compatible = "qcom,pcie-qcs404", .data = &ops_2_4_0 },
{ .compatible = "qcom,pcie-sdm845", .data = &ops_2_7_0 },
+ { .compatible = "qcom,pcie-ipq6018", .data = &ops_2_9_0 },
{ }
};

196
target/linux/ipq807x/patches-5.10/118-arm64-dts-ipq8074-Fixup-PCIe-dts-nodes.patch Normal file
View File

@ -0,0 +1,196 @@
From f46a2d9ff3346809e64fbf5c1796651207b57f00 Mon Sep 17 00:00:00 2001
From: Sivaprakash Murugesan <sivaprak@codeaurora.org>
Date: Wed, 29 Jul 2020 21:00:07 +0530
Subject: [PATCH] arm64: dts: ipq8074: Fixup PCIe dts nodes
ipq8074 PCIe nodes missing required properties to make them work.
Add these properties.
Signed-off-by: Sivaprakash Murugesan <sivaprak@codeaurora.org>
---
arch/arm64/boot/dts/qcom/ipq8074.dtsi | 109 +++++++++++++++++---------
1 file changed, 74 insertions(+), 35 deletions(-)
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -227,34 +227,66 @@
resets = <&gcc GCC_QUSB2_0_PHY_BCR>;
};
- pcie_phy0: phy@86000 {
- compatible = "qcom,ipq8074-qmp-pcie-phy";
- reg = <0x00086000 0x1000>;
- #phy-cells = <0>;
- clocks = <&gcc GCC_PCIE0_PIPE_CLK>;
- clock-names = "pipe_clk";
- clock-output-names = "pcie20_phy0_pipe_clk";
+ qmp_pcie_phy0: phy@84000 {
+ compatible = "qcom,ipq8074-qmp-pcie-gen3-phy";
+ reg = <0x00084000 0x1bc>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ clocks = <&gcc GCC_PCIE0_AUX_CLK>,
+ <&gcc GCC_PCIE0_AHB_CLK>;
+ clock-names = "aux", "cfg_ahb";
resets = <&gcc GCC_PCIE0_PHY_BCR>,
- <&gcc GCC_PCIE0PHY_PHY_BCR>;
+ <&gcc GCC_PCIE0PHY_PHY_BCR>;
reset-names = "phy",
"common";
+
status = "disabled";
+ pcie_phy0: lane@84200 {
+ reg = <0x84200 0x16c>, /* Serdes Tx */
+ <0x84400 0x200>, /* Serdes Rx */
+ <0x84800 0x4f4>; /* PCS: Lane0, COM, PCIE */
+ #phy-cells = <0>;
+
+ clocks = <&gcc GCC_PCIE0_PIPE_CLK>;
+ clock-names = "pipe0";
+ clock-output-names = "gcc_pcie0_pipe_clk_src";
+ clock-output-rate = <250000000>;
+ #clock-cells = <0>;
+ };
};
- pcie_phy1: phy@8e000 {
+ qmp_pcie_phy1: phy@8e000 {
compatible = "qcom,ipq8074-qmp-pcie-phy";
- reg = <0x0008e000 0x1000>;
- #phy-cells = <0>;
- clocks = <&gcc GCC_PCIE1_PIPE_CLK>;
- clock-names = "pipe_clk";
- clock-output-names = "pcie20_phy1_pipe_clk";
+ reg = <0x8e000 0x1c4>; /* Serdes PLL */
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ clocks = <&gcc GCC_PCIE1_AUX_CLK>,
+ <&gcc GCC_PCIE1_AHB_CLK>;
+ clock-names = "aux", "cfg_ahb";
resets = <&gcc GCC_PCIE1_PHY_BCR>,
- <&gcc GCC_PCIE1PHY_PHY_BCR>;
+ <&gcc GCC_PCIE1PHY_PHY_BCR>;
reset-names = "phy",
"common";
+
status = "disabled";
+ pcie_phy1: lane@8e200 {
+ reg = <0x8e200 0x130>, /* Serdes Tx */
+ <0x8e400 0x200>, /* Serdes Rx */
+ <0x8e800 0x1f8>; /* PCS */
+ #phy-cells = <0>;
+
+ clocks = <&gcc GCC_PCIE1_PIPE_CLK>;
+ clock-names = "pipe0";
+ clock-output-names = "gcc_pcie1_pipe_clk_src";
+ clock-output-rate = <125000000>;
+ #clock-cells = <0>;
+ };
};
mdio: mdio@90000 {
@@ -671,10 +703,10 @@
pcie1: pci@10000000 {
compatible = "qcom,pcie-ipq8074";
- reg = <0x10000000 0xf1d
- 0x10000f20 0xa8
- 0x00088000 0x2000
- 0x10100000 0x1000>;
+ reg = <0x10000000 0xf1d>,
+ <0x10000f20 0xa8>,
+ <0x00088000 0x2000>,
+ <0x10100000 0x1000>;
reg-names = "dbi", "elbi", "parf", "config";
device_type = "pci";
linux,pci-domain = <1>;
@@ -687,9 +719,9 @@
phy-names = "pciephy";
ranges = <0x81000000 0 0x10200000 0x10200000
- 0 0x100000 /* downstream I/O */
- 0x82000000 0 0x10300000 0x10300000
- 0 0xd00000>; /* non-prefetchable memory */
+ 0 0x100000>, /* downstream I/O */
+ <0x82000000 0 0x10220000 0x10220000
+ 0 0xfde0000>; /* non-prefetchable memory */
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "msi";
@@ -732,12 +764,13 @@
};
pcie0: pci@20000000 {
- compatible = "qcom,pcie-ipq8074";
- reg = <0x20000000 0xf1d
- 0x20000f20 0xa8
- 0x00080000 0x2000
- 0x20100000 0x1000>;
- reg-names = "dbi", "elbi", "parf", "config";
+ compatible = "qcom,pcie-ipq8074-gen3";
+ reg = <0x20000000 0xf1d>,
+ <0x20000f20 0xa8>,
+ <0x20001000 0x1000>,
+ <0x00080000 0x4000>,
+ <0x20100000 0x1000>;
+ reg-names = "dbi", "elbi", "atu", "parf", "config";
device_type = "pci";
linux,pci-domain = <0>;
bus-range = <0x00 0xff>;
@@ -749,9 +782,9 @@
phy-names = "pciephy";
ranges = <0x81000000 0 0x20200000 0x20200000
- 0 0x100000 /* downstream I/O */
- 0x82000000 0 0x20300000 0x20300000
- 0 0xd00000>; /* non-prefetchable memory */
+ 0 0x100000>, /* downstream I/O */
+ <0x82000000 0 0x20220000 0x20220000
+ 0 0xfde0000>; /* non-prefetchable memory */
interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "msi";
@@ -770,27 +803,33 @@
<&gcc GCC_PCIE0_AXI_M_CLK>,
<&gcc GCC_PCIE0_AXI_S_CLK>,
<&gcc GCC_PCIE0_AHB_CLK>,
- <&gcc GCC_PCIE0_AUX_CLK>;
+ <&gcc GCC_PCIE0_AUX_CLK>,
+ <&gcc GCC_PCIE0_AXI_S_BRIDGE_CLK>,
+ <&gcc GCC_PCIE0_RCHNG_CLK>;
clock-names = "iface",
"axi_m",
"axi_s",
"ahb",
- "aux";
+ "aux",
+ "axi_bridge",
+ "rchng";
resets = <&gcc GCC_PCIE0_PIPE_ARES>,
<&gcc GCC_PCIE0_SLEEP_ARES>,
<&gcc GCC_PCIE0_CORE_STICKY_ARES>,
<&gcc GCC_PCIE0_AXI_MASTER_ARES>,
<&gcc GCC_PCIE0_AXI_SLAVE_ARES>,
<&gcc GCC_PCIE0_AHB_ARES>,
- <&gcc GCC_PCIE0_AXI_MASTER_STICKY_ARES>;
+ <&gcc GCC_PCIE0_AXI_MASTER_STICKY_ARES>,
+ <&gcc GCC_PCIE0_AXI_SLAVE_STICKY_ARES>;
reset-names = "pipe",
"sleep",
"sticky",
"axi_m",
"axi_s",
"ahb",
- "axi_m_sticky";
+ "axi_m_sticky",
+ "axi_s_sticky";
status = "disabled";
};

26
target/linux/ipq807x/patches-5.10/119-qcom-backport-register-define.patch Normal file
View File

@ -0,0 +1,26 @@
From 5d3f9ed5a9eb305a2531015cc65200d48be5dbf4 Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Tue, 11 May 2021 22:21:57 +0200
Subject: [PATCH 1/2] PCI: qcom: backport register define
This is used by the pending IPQ6018 PCI support which
uses the same Gen3 IP and the one we are reusing for
IPQ8074.
Without it compilation will break.
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
drivers/pci/controller/dwc/pcie-qcom.c | 1 +
1 file changed, 1 insertion(+)
--- a/drivers/pci/controller/dwc/pcie-qcom.c
+++ b/drivers/pci/controller/dwc/pcie-qcom.c
@@ -61,6 +61,7 @@
#define PCIE20_PARF_SID_OFFSET 0x234
#define PCIE20_PARF_BDF_TRANSLATE_CFG 0x24C
#define PCIE20_PARF_DEVICE_TYPE 0x1000
+#define PCIE20_PARF_BDF_TO_SID_TABLE_N 0x2000
#define PCIE20_ELBI_SYS_CTRL 0x04
#define PCIE20_ELBI_SYS_CTRL_LT_ENABLE BIT(0)

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