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rockchip: enable hwrng for R66S/R68S

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This commit is contained in:
lean 2022-09-02 02:40:00 +08:00
parent d6f75eefa1
commit c06859e50f
3 changed files with 25 additions and 0 deletions
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2
target/linux/rockchip/armv8/config-5.15
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@ -289,6 +289,8 @@ CONFIG_HUGETLB_PAGE=y
CONFIG_HWMON=y
CONFIG_HWSPINLOCK=y
CONFIG_HW_CONSOLE=y
CONFIG_HW_RANDOM=y
CONFIG_HW_RANDOM_ROCKCHIP=y
CONFIG_HZ=250
# CONFIG_HZ_100 is not set
CONFIG_HZ_250=y

4
target/linux/rockchip/files-5.15/arch/arm64/boot/dts/rockchip/rk3568-fastrhino.dtsi
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@ -463,6 +463,10 @@
status = "okay";
};
&rng {
status = "okay";
};
&saradc {
vref-supply = <&vcca_1v8>;
status = "okay";

19
target/linux/rockchip/patches-5.15/802-arm64-dts-rockchip-add-hardware-random-number-genera.patch
View File

@ -48,3 +48,22 @@ Signed-off-by: wevsty <ty@wevs.org>
gpu: gpu@ff9a0000 {
compatible = "rockchip,rk3399-mali", "arm,mali-t860";
reg = <0x0 0xff9a0000 0x0 0x10000>;
--- a/arch/arm64/boot/dts/rockchip/rk3568.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3568.dtsi
@@ -211,6 +211,16 @@
};
};
+ rng: rng@fe388000 {
+ compatible = "rockchip,cryptov2-rng";
+ reg = <0x0 0xfe388000 0x0 0x2000>;
+ clocks = <&cru CLK_TRNG_NS>, <&cru HCLK_TRNG_NS>;
+ clock-names = "clk_trng", "hclk_trng";
+ resets = <&cru SRST_TRNG_NS>;
+ reset-names = "reset";
+ status = "disabled";
+ };
+
combphy0: phy@fe820000 {
compatible = "rockchip,rk3568-naneng-combphy";
reg = <0x0 0xfe820000 0x0 0x100>;