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kernel: bump to 4.9.168 , 4.14.111, 4.19.34

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This commit is contained in:
coolsnowwolf 2019-04-12 11:39:40 +08:00
parent d4ab022705
commit ab24168802
193 changed files with 11556 additions and 2158 deletions
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12
include/kernel-version.mk
View File

@ -3,14 +3,14 @@
LINUX_RELEASE?=1
LINUX_VERSION-3.18 = .136
LINUX_VERSION-4.9 = .166
LINUX_VERSION-4.14 = .109
LINUX_VERSION-4.19 = .25
LINUX_VERSION-4.9 = .168
LINUX_VERSION-4.14 = .111
LINUX_VERSION-4.19 = .34
LINUX_KERNEL_HASH-3.18.136 = 48c8775013d23229462134f911bbb14c7935096fcccfb19ce28ecd5f7154f35c
LINUX_KERNEL_HASH-4.9.166 = b8f87c087cbc35d35d55cae1c0c7e47c8d20226d241697bf5d4c0c524439baeb
LINUX_KERNEL_HASH-4.14.109 = 3764f165f779568745f1468d8f7e1db65d94eae9cd8d1350f4fe003a0fd88ee0
LINUX_KERNEL_HASH-4.19.25 = 7ec71d90d6e96e6f741676d157ac06f30c75be4eaf1649143a3c8b7d4f919731
LINUX_KERNEL_HASH-4.9.168 = 4d451c21effad77de323edc9bfeae095aa1faed1a801ef427d66f5763bef091e
LINUX_KERNEL_HASH-4.14.111 = f8197d56553f864d1d2e97abbe4fca50f8ab5e72089c292d22f0e4395340a6e8
LINUX_KERNEL_HASH-4.19.34 = dd795e2a1fddbee5b03c3bb55a1926829cc08df4fdcabce62dda717ba087b8cc
remove_uri_prefix=$(subst git://,,$(subst http://,,$(subst https://,,$(1))))
sanitize_uri=$(call qstrip,$(subst @,_,$(subst :,_,$(subst .,_,$(subst -,_,$(subst /,_,$(1)))))))

2
target/linux/apm821xx/patches-4.14/021-0004-crypto-crypto4xx-kill-MODULE_NAME.patch
View File

@ -36,7 +36,7 @@ Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
#define PPC460EX_SDR0_SRST 0x201
--- a/drivers/crypto/amcc/crypto4xx_trng.c
+++ b/drivers/crypto/amcc/crypto4xx_trng.c
@@ -92,7 +92,7 @@ void ppc4xx_trng_probe(struct crypto4xx_
@@ -94,7 +94,7 @@ void ppc4xx_trng_probe(struct crypto4xx_
if (!rng)
goto err_out;

6
target/linux/apm821xx/patches-4.19/801-usb-xhci-add-firmware-loader-for-uPD720201-and-uPD72.patch
View File

@ -44,7 +44,7 @@ Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
#include "xhci.h"
#include "xhci-trace.h"
@@ -261,6 +263,458 @@ static void xhci_pme_acpi_rtd3_enable(st
@@ -262,6 +264,458 @@ static void xhci_pme_acpi_rtd3_enable(st
static void xhci_pme_acpi_rtd3_enable(struct pci_dev *dev) { }
#endif /* CONFIG_ACPI */
@ -503,7 +503,7 @@ Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
/* called during probe() after chip reset completes */
static int xhci_pci_setup(struct usb_hcd *hcd)
{
@@ -299,6 +753,22 @@ static int xhci_pci_probe(struct pci_dev
@@ -300,6 +754,22 @@ static int xhci_pci_probe(struct pci_dev
struct hc_driver *driver;
struct usb_hcd *hcd;
@ -526,7 +526,7 @@ Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
driver = (struct hc_driver *)id->driver_data;
/* Prevent runtime suspending between USB-2 and USB-3 initialization */
@@ -360,6 +830,16 @@ static void xhci_pci_remove(struct pci_d
@@ -361,6 +831,16 @@ static void xhci_pci_remove(struct pci_d
{
struct xhci_hcd *xhci;

4
target/linux/apm821xx/patches-4.19/802-usb-xhci-force-msi-renesas-xhci.patch
View File

@ -13,7 +13,7 @@ produce a noisy warning.
--- a/drivers/usb/host/xhci-pci.c
+++ b/drivers/usb/host/xhci-pci.c
@@ -214,6 +214,7 @@ static void xhci_pci_quirks(struct devic
@@ -215,6 +215,7 @@ static void xhci_pci_quirks(struct devic
pdev->device == 0x0015) {
xhci->quirks |= XHCI_RESET_ON_RESUME;
xhci->quirks |= XHCI_ZERO_64B_REGS;
@ -43,7 +43,7 @@ produce a noisy warning.
hcd->msi_enabled = 1;
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -1859,6 +1859,7 @@ struct xhci_hcd {
@@ -1867,6 +1867,7 @@ struct xhci_hcd {
/* support xHCI 0.96 spec USB2 software LPM */
unsigned sw_lpm_support:1;
/* support xHCI 1.0 spec USB2 hardware LPM */

2
target/linux/ar71xx/patches-4.14/930-chipidea-pullup.patch
View File

@ -37,7 +37,7 @@
ret = hw_device_init(ci, base);
if (ret < 0) {
dev_err(dev, "can't initialize hardware\n");
@@ -1004,7 +1007,7 @@ static int ci_hdrc_probe(struct platform
@@ -1011,7 +1014,7 @@ static int ci_hdrc_probe(struct platform
goto deinit_gadget;
}

45
target/linux/ath79/base-files/etc/board.d/01_leds
View File

@ -38,6 +38,23 @@ comfast,cf-e110n-v2)
ucidef_set_led_rssi "rssimediumhigh" "RSSIMEDIUMHIGH" "$boardname:green:rssimediumhigh" "wlan0" "51" "100"
ucidef_set_led_rssi "rssihigh" "RSSIHIGH" "$boardname:green:rssihigh" "wlan0" "76" "100"
;;
comfast,cf-e120a-v3)
ucidef_set_led_netdev "lan" "LAN" "$boardname:green:lan" "eth0"
ucidef_set_led_switch "wan" "WAN" "$boardname:green:wan" "switch0" "0x04"
ucidef_set_rssimon "wlan0" "200000" "1"
ucidef_set_led_rssi "rssilow" "RSSILOW" "$boardname:red:rssilow" "wlan0" "1" "100"
ucidef_set_led_rssi "rssimediumlow" "RSSIMEDIUMLOW" "$boardname:red:rssimediumlow" "wlan0" "26" "100"
ucidef_set_led_rssi "rssimediumhigh" "RSSIMEDIUMHIGH" "$boardname:green:rssimediumhigh" "wlan0" "51" "100"
ucidef_set_led_rssi "rssihigh" "RSSIHIGH" "$boardname:green:rssihigh" "wlan0" "76" "100"
;;
comfast,cf-e5)
ucidef_set_led_switch "lan" "LAN" "$boardname:blue:lan" "switch0" "0x02"
ucidef_set_led_netdev "wan" "WAN" "$boardname:blue:wan" "eth0"
ucidef_set_rssimon "wlan0" "200000" "1"
ucidef_set_led_rssi "rssilow" "RSSILOW" "$boardname:blue:rssi0" "wlan0" "1" "100"
ucidef_set_led_rssi "rssimedium" "RSSIMEDIUM" "$boardname:blue:rssi1" "wlan0" "33" "100"
ucidef_set_led_rssi "rssihigh" "RSSIHIGH" "$boardname:blue:rssi2" "wlan0" "66" "100"
;;
dlink,dir-859-a1)
ucidef_set_led_switch "internet" "WAN" "$boardname:green:internet" "switch0" "0x20"
;;
@ -52,7 +69,14 @@ etactica,eg200)
;;
glinet,gl-ar150)
ucidef_set_led_netdev "wan" "WAN" "$boardname:green:wan" "eth0"
ucidef_set_led_netdev "lan" "LAN" "$boardname:green:lan" "eth1"
ucidef_set_led_switch "lan" "LAN" "$boardname:green:lan" "switch0" "0x02"
;;
glinet,gl-ar300m-nand|\
glinet,gl-ar300m-nor)
ucidef_set_led_netdev "lan" "LAN" "gl-ar300m:green:lan" "eth1"
;;
glinet,gl-ar300m-lite)
ucidef_set_led_netdev "lan" "LAN" "gl-ar300m-lite:green:lan" "eth0"
;;
glinet,gl-x750)
ucidef_set_led_netdev "wan" "WAN" "$boardname:green:wan" "eth0"
@ -99,6 +123,15 @@ tplink,archer-c6-v2)
ucidef_set_led_switch "lan" "LAN" "tp-link:green:lan" "switch0" "0x3C"
ucidef_set_led_switch "wan" "WAN" "tp-link:green:wan" "switch0" "0x02"
;;
tplink,cpe210-v2|\
tplink,cpe210-v3)
ucidef_set_led_netdev "lan" "LAN" "tp-link:green:lan" "eth0"
ucidef_set_rssimon "wlan0" "200000" "1"
ucidef_set_led_rssi "rssilow" "RSSILOW" "tp-link:green:link1" "wlan0" "1" "100"
ucidef_set_led_rssi "rssimediumlow" "RSSIMEDIUMLOW" "tp-link:green:link2" "wlan0" "30" "100"
ucidef_set_led_rssi "rssimediumhigh" "RSSIMEDIUMHIGH" "tp-link:green:link3" "wlan0" "60" "100"
ucidef_set_led_rssi "rssihigh" "RSSIHIGH" "tp-link:green:link4" "wlan0" "80" "100"
;;
tplink,re450-v2)
ucidef_set_led_netdev "lan_data" "LAN Data" "tp-link:green:lan_data" "eth0" "tx rx"
ucidef_set_led_netdev "lan_link" "LAN Link" "tp-link:green:lan_link" "eth0" "link"
@ -119,7 +152,7 @@ tplink,tl-wr941-v4)
ucidef_set_led_switch "lan3" "LAN3" "tp-link:green:lan3" "switch0" "0x08"
ucidef_set_led_switch "lan4" "LAN4" "tp-link:green:lan4" "switch0" "0x10"
;;
tplink,tl-wr740nd-v4|\
tplink,tl-wr740n-v4|\
tplink,tl-wr741nd-v4|\
tplink,tl-wr841-v8|\
tplink,tl-wr842n-v2)
@ -139,7 +172,8 @@ tplink,tl-wr841-v11)
;;
ubnt,bullet-m|\
ubnt,bullet-m-xw|\
ubnt,nano-m|\
ubnt,nanostation-m|\
ubnt,nanostation-m-xw|\
ubnt,rocket-m)
ucidef_set_rssimon "wlan0" "200000" "1"
ucidef_set_led_rssi "rssilow" "RSSILOW" "ubnt:red:link1" "wlan0" "1" "100"
@ -147,6 +181,7 @@ ubnt,rocket-m)
ucidef_set_led_rssi "rssimediumhigh" "RSSIMEDIUMHIGH" "ubnt:green:link3" "wlan0" "51" "100"
ucidef_set_led_rssi "rssihigh" "RSSIHIGH" "ubnt:green:link4" "wlan0" "76" "100"
;;
ubnt,nanobeam-ac|\
ubnt,nanostation-ac)
ucidef_set_rssimon "wlan0" "200000" "1"
ucidef_set_led_rssi "rssilow" "RSSILOW" "ubnt:blue:rssi0" "wlan0" "1" "100"
@ -161,6 +196,10 @@ wd,mynet-wifi-rangeextender)
ucidef_set_led_rssi "rssimedium" "RSSIMED" "$boardname:blue:rssi-med" "wlan0" "33" "100"
ucidef_set_led_rssi "rssihigh" "RSSIMAX" "$boardname:blue:rssi-max" "wlan0" "66" "100"
;;
yuncore,a770)
ucidef_set_led_netdev "wan" "WAN" "$boardname:green:wan" "eth0"
ucidef_set_led_switch "lan" "LAN" "$boardname:green:lan" "switch0" "0x10"
;;
esac
board_config_flush

94
target/linux/ath79/base-files/etc/board.d/02_network
View File

@ -13,11 +13,17 @@ ath79_setup_interfaces()
devolo,dvl1200i|\
devolo,dvl1750c|\
devolo,dvl1750i|\
glinet,ar300m-lite|\
netgear,ex6400|\
netgear,ex7300|\
ocedo,koala|\
ocedo,raccoon|\
pcs,cap324|\
pisen,wmm003n|\
pqi,air-pen|\
tplink,cpe210-v2|\
tplink,cpe210-v3|\
tplink,re350k-v1|\
tplink,re450-v2|\
tplink,tl-mr10u|\
tplink,tl-mr3020-v1|\
@ -27,6 +33,7 @@ ath79_setup_interfaces()
ubnt,bullet-m|\
ubnt,bullet-m-xw|\
ubnt,lap-120|\
ubnt,nanobeam-ac|\
ubnt,nanostation-ac-loco|\
ubnt,rocket-m|\
ubnt,unifiac-lite|\
@ -62,8 +69,20 @@ ath79_setup_interfaces()
ucidef_add_switch "switch0" \
"0@eth0" "1:lan:1" "3:lan:4" "4:lan:3" "5:lan:2" "2:wan"
;;
comfast,cf-e5|\
glinet,gl-ar150|\
glinet,gl-ar300m-nand|\
glinet,gl-ar300m-nor|\
glinet,gl-x750|\
tplink,tl-wr810n-v1|\
tplink,tl-wr810n-v2|\
ubnt,routerstation|\
yuncore,a770)
ucidef_set_interfaces_lan_wan "eth1" "eth0"
;;
devolo,dvl1200e|\
devolo,dvl1750e)
devolo,dvl1750e|\
ocedo,ursus)
ucidef_set_interface_lan "eth0 eth1"
;;
dlink,dir-825-b1)
@ -74,6 +93,7 @@ ath79_setup_interfaces()
dlink,dir-825-c1|\
dlink,dir-835-a1|\
dlink,dir-859-a1|\
engenius,epg5000|\
tplink,archer-c2-v3|\
tplink,tl-wr1043nd-v4)
ucidef_add_switch "switch0" \
@ -94,27 +114,30 @@ ath79_setup_interfaces()
etactica,eg200)
ucidef_set_interface_lan "eth0" "dhcp"
;;
glinet,gl-ar150|\
glinet,gl-ar300m-nand|\
glinet,gl-ar300m-nor|\
glinet,gl-x750|\
tplink,tl-wr810n-v1|\
tplink,tl-wr810n-v2|\
ubnt,routerstation)
ucidef_set_interfaces_lan_wan "eth1" "eth0"
;;
glinet,gl-ar750s)
ucidef_add_switch "switch0" \
"0@eth0" "2:lan:2" "3:lan:1" "1:wan"
;;
iodata,etg3-r|\
iodata,wn-ac1167dgr|\
iodata,wn-ac1600dgr|\
iodata,wn-ac1600dgr2|\
iodata,wn-ag300dgr|\
pcs,cr5000)
ucidef_add_switch "switch0" \
"0@eth0" "1:lan" "2:lan" "3:lan" "4:lan" "5:wan"
;;
librerouter,librerouter-v1)
ucidef_add_switch "switch0" \
"0@eth0" "5:wan" "6@eth1" "4:lan"
;;
nec,wg1200cr|\
ubnt,nanostation-ac|\
ubnt,unifiac-mesh-pro|\
ubnt,unifiac-pro)
ucidef_add_switch "switch0" \
"0@eth0" "2:lan" "3:wan"
;;
nec,wg800hp)
ucidef_add_switch "switch0" \
"0@eth0" "2:lan" "3:lan" "4:lan" "1:wan"
@ -131,10 +154,11 @@ ath79_setup_interfaces()
ucidef_add_switch_port_attr "switch0" 5 led 2
;;
netgear,wnr612-v2|\
on,n150r)
on,n150r|\
tplink,tl-wr841-v7)
ucidef_set_interface_wan "eth0"
ucidef_add_switch "switch0" \
"0@eth1" "1:lan" "2:lan" "3:lan:3" "4:lan:4"
"0@eth1" "1:lan" "2:lan" "3:lan" "4:lan"
;;
phicomm,k2t)
ucidef_add_switch "switch0" \
@ -144,6 +168,7 @@ ath79_setup_interfaces()
ucidef_add_switch "switch0" \
"0@eth0" "1:lan" "2:lan" "3:wan"
;;
tplink,archer-c5-v1|\
tplink,archer-c7-v1|\
tplink,archer-c7-v2|\
tplink,tl-wdr4900-v2)
@ -153,8 +178,6 @@ ath79_setup_interfaces()
buffalo,whr-g301n|\
tplink,tl-mr3220-v1|\
tplink,tl-mr3420-v1|\
tplink,tl-wr741nd-v4|\
tplink,tl-wr841-v7|\
tplink,tl-wr841-v9|\
tplink,tl-wr841-v11|\
ubnt,airrouter)
@ -195,7 +218,13 @@ ath79_setup_interfaces()
ucidef_add_switch "switch0" \
"0@eth1" "1:lan" "2:lan" "3:lan" "4:lan"
;;
tplink,tl-wr740nd-v4|\
tplink,tl-wr710n-v1)
ucidef_set_interface_wan "eth0"
ucidef_add_switch "switch0" \
"0@eth1" "3:lan"
;;
tplink,tl-wr740n-v4|\
tplink,tl-wr741nd-v4|\
tplink,tl-wr841-v8|\
tplink,tl-wr842n-v1|\
tplink,tl-wr842n-v2)
@ -206,16 +235,19 @@ ath79_setup_interfaces()
tplink,tl-wr941-v2)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" "wan"
;;
ubnt,acb-isp)
ucidef_set_interface_wan "eth0"
ucidef_add_switch "switch0" \
"0@eth1" "2:lan:1" "3:lan:3" "4:lan:2"
;;
ubnt,routerstation-pro)
ucidef_set_interface_wan "eth0"
ucidef_add_switch "switch0" \
"0@eth1" "2:lan:3" "3:lan:2" "4:lan:1"
;;
ubnt,nanostation-ac|\
ubnt,unifiac-mesh-pro|\
ubnt,unifiac-pro)
ubnt,nanostation-m-xw)
ucidef_add_switch "switch0" \
"0@eth0" "2:lan" "3:wan"
"0@eth0" "5:lan" "1:wan"
;;
xiaomi,mi-router-4q)
ucidef_set_interface_wan "eth0"
@ -249,7 +281,8 @@ ath79_setup_macs()
lan_mac=$(mtd_get_mac_text "mac" 4)
wan_mac=$(mtd_get_mac_text "mac" 24)
;;
dlink,dir-859-a1)
dlink,dir-859-a1|\
nec,wg1200cr)
lan_mac=$(mtd_get_mac_ascii devdata "lanmac")
wan_mac=$(mtd_get_mac_ascii devdata "wanmac")
;;
@ -257,6 +290,14 @@ ath79_setup_macs()
elecom,wrc-300ghbk2-i)
wan_mac=$(macaddr_add "$(mtd_get_mac_binary ART 4098)" -2)
;;
engenius,epg5000|\
iodata,wn-ac1167dgr|\
iodata,wn-ac1600dgr|\
iodata,wn-ac1600dgr2|\
iodata,wn-ag300dgr)
lan_mac=$(mtd_get_mac_ascii u-boot-env ethaddr)
wan_mac=$(mtd_get_mac_ascii u-boot-env wanaddr)
;;
engenius,ews511ap)
lan_mac=$(mtd_get_mac_text "u-boot-env" 233)
eth1_mac=$(macaddr_add "$lan_mac" 1)
@ -267,11 +308,9 @@ ath79_setup_macs()
lan_mac=$(mtd_get_mac_ascii u-boot-env ethaddr)
wan_mac=$(macaddr_add "$lan_mac" -1)
;;
iodata,wn-ac1167dgr|\
iodata,wn-ac1600dgr2|\
iodata,wn-ag300dgr)
lan_mac=$(mtd_get_mac_ascii u-boot-env ethaddr)
wan_mac=$(mtd_get_mac_ascii u-boot-env wanaddr)
jjplus,ja76pf2)
wan_mac=$(fconfig -s -r -d $(find_mtd_part "RedBoot config") -n alias/ethaddr)
lan_mac=$(macaddr_add "$wan_mac" 1)
;;
nec,wg800hp)
lan_mac=$(mtd_get_mac_text board_data 640)
@ -290,6 +329,11 @@ ath79_setup_macs()
wan_mac=$(mtd_get_mac_binary factory 0)
lan_mac=$(macaddr_setbit_la "$wan_mac")
;;
tplink,archer-a7-v5|\
tplink,archer-c7-v5)
base_mac=$(mtd_get_mac_binary info 8)
wan_mac=$(macaddr_add "$base_mac" 1)
;;
tplink,archer-c7-v4)
base_mac=$(mtd_get_mac_binary config 8)
wan_mac=$(macaddr_add "$base_mac" 1)

12
target/linux/ath79/base-files/etc/board.d/03_gpio_switches
View File

@ -10,13 +10,25 @@ board_config_update
board=$(board_name)
case "$board" in
comfast,cf-e5)
ucidef_add_gpio_switch "lte_power" "LTE Power" "14" "1"
ucidef_add_gpio_switch "lte_wakeup" "LTE Wakeup" "11" "1"
ucidef_add_gpio_switch "lte_poweroff" "LTE Poweroff" "1" "1"
ucidef_add_gpio_switch "lte_reset" "LTE Reset" "12" "1"
;;
dlink,dir-825-c1|\
dlink,dir-835-a1)
ucidef_add_gpio_switch "wan_led_auto" "WAN LED Auto" "20" "0"
;;
librerouter,librerouter-v1)
ucidef_add_gpio_switch "poe_passthrough" "PoE Passthrough" "1" "0"
;;
ubnt,nanostation-ac)
ucidef_add_gpio_switch "poe_passthrough" "PoE Passthrough" "3"
;;
ubnt,acb-isp)
ucidef_add_gpio_switch "poe_passthrough" "PoE Passthrough" "11"
;;
esac
board_config_flush

10
target/linux/ath79/base-files/etc/hotplug.d/firmware/10-ath9k-eeprom
View File

@ -20,7 +20,7 @@ ath9k_eeprom_extract() {
[ -n "$mtd" ] || \
ath9k_eeprom_die "no mtd device found for partition $part"
dd if=$mtd of=/lib/firmware/$FIRMWARE bs=1 skip=$offset count=$count 2>/dev/null || \
dd if=$mtd of=/lib/firmware/$FIRMWARE iflag=skip_bytes bs=$count skip=$offset count=1 2>/dev/null || \
ath9k_eeprom_die "failed to extract from $mtd"
}
@ -81,7 +81,7 @@ ath9k_patch_fw_mac() {
dd of=/lib/firmware/$FIRMWARE conv=notrunc bs=1 seek=$chksum_offset count=2
}
macaddr_2bin $mac | dd of=/lib/firmware/$FIRMWARE conv=notrunc bs=1 seek=$mac_offset count=6
macaddr_2bin $mac | dd of=/lib/firmware/$FIRMWARE conv=notrunc oflag=seek_bytes bs=6 seek=$mac_offset count=1
}
ath9k_patch_fw_mac_crc() {
@ -109,12 +109,18 @@ case "$FIRMWARE" in
ath9k_eeprom_extract "art" 4096 1088
ath9k_patch_fw_mac $(mtd_get_mac_ascii devdata "wlan24mac") 2
;;
engenius,epg5000|\
iodata,wn-ac1167dgr|\
iodata,wn-ac1600dgr|\
iodata,wn-ac1600dgr2|\
iodata,wn-ag300dgr)
ath9k_eeprom_extract "art" 4096 1088
ath9k_patch_fw_mac $(mtd_get_mac_ascii u-boot-env ethaddr) 2
;;
nec,wg1200cr)
ath9k_eeprom_extract "art" 4096 1088
ath9k_patch_fw_mac $(mtd_get_mac_ascii devdata wlan24mac) 2
;;
nec,wg800hp)
ath9k_eeprom_extract "art" 4096 1088
ath9k_patch_fw_mac $(mtd_get_mac_text board_data 1664) 2

40
target/linux/ath79/base-files/etc/hotplug.d/firmware/11-ath10k-caldata
View File

@ -28,7 +28,7 @@ ath10kcal_from_file() {
local offset=$2
local count=$3
dd if=$source of=/lib/firmware/$FIRMWARE bs=1 skip=$offset count=$count 2>/dev/null || \
dd if=$source of=/lib/firmware/$FIRMWARE iflag=skip_bytes bs=$count skip=$offset count=1 2>/dev/null || \
ath10kcal_die "failed to extract calibration data from $source"
}
@ -42,7 +42,7 @@ ath10kcal_extract() {
[ -n "$mtd" ] || \
ath10kcal_die "no mtd device found for partition $part"
dd if=$mtd of=/lib/firmware/$FIRMWARE bs=1 skip=$offset count=$count 2>/dev/null || \
dd if=$mtd of=/lib/firmware/$FIRMWARE iflag=skip_bytes bs=$count skip=$offset count=1 2>/dev/null || \
ath10kcal_die "failed to extract calibration data from $mtd"
}
@ -51,7 +51,7 @@ ath10kcal_patch_mac() {
[ -z "$mac" ] && return
macaddr_2bin $mac | dd of=/lib/firmware/$FIRMWARE conv=notrunc bs=1 seek=6 count=6
macaddr_2bin $mac | dd of=/lib/firmware/$FIRMWARE conv=notrunc oflag=seek_bytes bs=6 seek=6 count=1
}
ath10kcal_patch_mac_crc() {
@ -102,6 +102,12 @@ case "$FIRMWARE" in
elecom,wrc-1750ghbk2-i)
ath10kcal_extract "ART" 20480 2116
;;
engenius,epg5000|\
iodata,wn-ac1167dgr|\
iodata,wn-ac1600dgr2)
ath10kcal_extract "art" 20480 2116
ath10kcal_patch_mac $(macaddr_add $(mtd_get_mac_ascii u-boot-env ethaddr) +1)
;;
engenius,ews511ap|\
glinet,gl-ar750s|\
glinet,gl-x750|\
@ -109,16 +115,12 @@ case "$FIRMWARE" in
ath10kcal_extract "art" 20480 2116
ath10kcal_patch_mac $(macaddr_add $(cat /sys/class/net/eth0/address) +1)
;;
iodata,wn-ac1167dgr|\
iodata,wn-ac1600dgr2)
ath10kcal_extract "art" 20480 2116
ath10kcal_patch_mac $(macaddr_add $(mtd_get_mac_ascii u-boot-env ethaddr) +1)
;;
nec,wg800hp)
ath10kcal_extract "art" 20480 2116
ath10kcal_patch_mac_crc $(mtd_get_mac_text board_data 2176)
;;
ocedo,koala)
ocedo,koala|\
ocedo,ursus)
ath10kcal_extract "art" 20480 2116
ath10kcal_patch_mac $(mtd_get_mac_binary art 12)
;;
@ -130,6 +132,7 @@ case "$FIRMWARE" in
ath10kcal_extract "ART" 20480 2116
ath10kcal_patch_mac $(macaddr_add $(cat /sys/class/net/eth0/address) -1)
;;
tplink,archer-c5-v1|\
tplink,archer-c7-v2)
ath10kcal_extract "art" 20480 2116
ath10kcal_patch_mac $(macaddr_add $(cat /sys/class/net/eth1/address) -1)
@ -140,19 +143,38 @@ case "$FIRMWARE" in
ath10kcal_extract "art" 20480 2116
ath10kcal_patch_mac $(macaddr_add $(cat /sys/class/net/eth0/address) -1)
;;
tplink,re350k-v1)
ath10kcal_extract "art" 20480 2116
ath10kcal_patch_mac $(macaddr_add $(cat /sys/class/net/eth0/address) +2)
;;
ubnt,unifiac-lite|\
ubnt,unifiac-mesh|\
ubnt,unifiac-mesh-pro|\
ubnt,lap-120|\
ubnt,nanobeam-ac|\
ubnt,nanostation-ac|\
ubnt,nanostation-ac-loco|\
ubnt,unifiac-pro)
ath10kcal_extract "EEPROM" 20480 2116
;;
yuncore,a770)
ath10kcal_extract "art" 20480 2116
;;
esac
;;
"ath10k/pre-cal-pci-0000:00:00.0.bin")
case $board in
nec,wg1200cr)
ath10kcal_extract "art" 20480 12064
ath10kcal_patch_mac_crc $(mtd_get_mac_ascii devdata wlan5mac)
ln -sf /lib/firmware/ath10k/pre-cal-pci-0000\:00\:00.0.bin \
/lib/firmware/ath10k/QCA9888/hw2.0/board.bin
;;
netgear,ex6400|\
netgear,ex7300)
ath10kcal_extract "caldata" 20480 12064
ath10kcal_patch_mac $(mtd_get_mac_binary caldata 12)
;;
phicomm,k2t)
ath10kcal_extract "art" 20480 12064
ath10kcal_patch_mac_crc $(k2t_get_mac "5g_mac")

36
target/linux/ath79/base-files/etc/hotplug.d/ieee80211/00-wmac-migration Normal file
View File

@ -0,0 +1,36 @@
#!/bin/sh
WMAC_PATH_CHANGED=0
. /lib/functions.sh
migrate_wmac_path() {
local section="$1"
local path
config_get path ${section} path
case ${path} in
"platform/qca955x_wmac")
path="platform/ahb/ahb:apb/18100000.wmac"
WMAC_PATH_CHANGED=1
;;
"platform/ar933x_wmac")
path="platform/ahb/18100000.wmac"
WMAC_PATH_CHANGED=1
;;
*)
return 0
;;
esac
uci set wireless.${section}.path=${path}
}
[ "${ACTION}" = "add" ] && {
[ ! -e /etc/config/wireless ] && return 0
config_load wireless
config_foreach migrate_wmac_path wifi-device
[ "${WMAC_PATH_CHANGED}" = "1" ] && uci commit wireless
}

6
target/linux/ath79/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac
View File

@ -19,6 +19,12 @@ case "$board" in
[ "$PHYNBR" -eq 1 ] && \
echo $(macaddr_add "$(mtd_get_mac_ascii u-boot-env ethaddr)" 1) > /sys${DEVPATH}/macaddress
;;
iodata,wn-ac1600dgr)
# There is no eeprom data for 5 GHz wlan in "art" partition
# which would allow to patch the macaddress
[ "$PHYNBR" -eq 0 ] && \
echo $(macaddr_add "$(mtd_get_mac_ascii u-boot-env ethaddr)" 1) > /sys${DEVPATH}/macaddress
;;
phicomm,k2t)
# The K2T factory firmware does use LAN mac address as the 2.4G wifi mac address
[ "$PHYNBR" -eq 1 ] && \

16
target/linux/ath79/base-files/etc/uci-defaults/04_led_migration Normal file
View File

@ -0,0 +1,16 @@
#!/bin/sh
. /lib/functions.sh
. /lib/functions/migrations.sh
board=$(board_name)
case "$board" in
engenius,epg5000)
migrate_leds ":wlan-2g=:wlan2g" ":wlan-5g=:wlan5g"
;;
esac
migrations_apply system
exit 0

33
target/linux/ath79/base-files/lib/upgrade/platform.sh
View File

@ -5,13 +5,31 @@
PART_NAME=firmware
REQUIRE_IMAGE_METADATA=1
routerstation_do_upgrade() {
redboot_fis_do_upgrade() {
local append
local kern_length=0x$(dd if="$1" bs=2 skip=1 count=4 2>/dev/null)
local sysup_file="$1"
local kern_part="$2"
local magic=$(get_magic_word "$sysup_file")
[ -f "$CONF_TAR" -a "$SAVE_CONFIG" -eq 1 ] && append="-j $CONF_TAR"
dd if="$1" bs=64k skip=1 2>/dev/null | \
mtd -r $append -Fkernel:$kern_length:0x80060000,rootfs write - kernel:rootfs
if [ "$magic" = "4349" ]; then
local kern_length=0x$(dd if="$sysup_file" bs=2 skip=1 count=4 2>/dev/null)
[ -f "$CONF_TAR" -a "$SAVE_CONFIG" -eq 1 ] && append="-j $CONF_TAR"
dd if="$sysup_file" bs=64k skip=1 2>/dev/null | \
mtd -r $append -F$kern_part:$kern_length:0x80060000,rootfs write - $kern_part:rootfs
elif [ "$magic" = "7379" ]; then
local board_dir=$(tar tf $sysup_file | grep -m 1 '^sysupgrade-.*/$')
local kern_length=$(tar xf $sysup_file ${board_dir}kernel -O | wc -c)
[ -f "$CONF_TAR" -a "$SAVE_CONFIG" -eq 1 ] && append="-j $CONF_TAR"
tar xf $sysup_file ${board_dir}kernel ${board_dir}root -O | \
mtd -r $append -F$kern_part:$kern_length:0x80060000,rootfs write - $kern_part:rootfs
else
echo "Unknown image, aborting!"
return 1
fi
}
platform_check_image() {
@ -22,9 +40,12 @@ platform_do_upgrade() {
local board=$(board_name)
case "$board" in
jjplus,ja76pf2)
redboot_fis_do_upgrade "$ARGV" linux
;;
ubnt,routerstation|\
ubnt,routerstation-pro)
routerstation_do_upgrade "$ARGV"
redboot_fis_do_upgrade "$ARGV" kernel
;;
*)
default_do_upgrade "$ARGV"

229
target/linux/ath79/config-4.19 Normal file
View File

@ -0,0 +1,229 @@
CONFIG_AG71XX=y
# CONFIG_AG71XX_DEBUG is not set
CONFIG_AG71XX_DEBUG_FS=y
CONFIG_AR8216_PHY=y
CONFIG_AR8216_PHY_LEDS=y
CONFIG_ARCH_BINFMT_ELF_STATE=y
CONFIG_ARCH_CLOCKSOURCE_DATA=y
CONFIG_ARCH_DISCARD_MEMBLOCK=y
CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
CONFIG_ARCH_HAS_RESET_CONTROLLER=y
CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y
CONFIG_ARCH_HIBERNATION_POSSIBLE=y
CONFIG_ARCH_MMAP_RND_BITS_MAX=15
CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15
CONFIG_ARCH_SUPPORTS_UPROBES=y
CONFIG_ARCH_SUSPEND_POSSIBLE=y
CONFIG_ARCH_USE_BUILTIN_BSWAP=y
CONFIG_ARCH_USE_QUEUED_RWLOCKS=y
CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y
CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
CONFIG_ATH79=y
CONFIG_ATH79_WDT=y
CONFIG_CEVT_R4K=y
CONFIG_CLKDEV_LOOKUP=y
CONFIG_CLONE_BACKWARDS=y
CONFIG_CMDLINE="rootfstype=squashfs,jffs2"
CONFIG_CMDLINE_BOOL=y
# CONFIG_CMDLINE_OVERRIDE is not set
CONFIG_COMMON_CLK=y
# CONFIG_COMMON_CLK_BOSTON is not set
CONFIG_CPU_BIG_ENDIAN=y
CONFIG_CPU_GENERIC_DUMP_TLB=y
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_RIXI=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_CPU_MIPS32=y
CONFIG_CPU_MIPS32_R2=y
CONFIG_CPU_MIPSR2=y
CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y
CONFIG_CPU_R4K_CACHE_TLB=y
CONFIG_CPU_R4K_FPU=y
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_HIGHMEM=y
CONFIG_CPU_SUPPORTS_MSA=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_WORKQUEUE=y
CONFIG_CSRC_R4K=y
CONFIG_DMA_DIRECT_OPS=y
CONFIG_DMA_NONCOHERENT=y
CONFIG_DMA_NONCOHERENT_CACHE_SYNC=y
CONFIG_DMA_NONCOHERENT_MMAP=y
CONFIG_DMA_NONCOHERENT_OPS=y
CONFIG_DTC=y
CONFIG_EARLY_PRINTK=y
CONFIG_ETHERNET_PACKET_MANGLE=y
CONFIG_FIXED_PHY=y
CONFIG_GENERIC_ATOMIC64=y
CONFIG_GENERIC_CLOCKEVENTS=y
CONFIG_GENERIC_CMOS_UPDATE=y
CONFIG_GENERIC_CPU_AUTOPROBE=y
CONFIG_GENERIC_IRQ_CHIP=y
CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
CONFIG_GENERIC_IRQ_SHOW=y
CONFIG_GENERIC_LIB_ASHLDI3=y
CONFIG_GENERIC_LIB_ASHRDI3=y
CONFIG_GENERIC_LIB_CMPDI2=y
CONFIG_GENERIC_LIB_LSHRDI3=y
CONFIG_GENERIC_LIB_UCMPDI2=y
CONFIG_GENERIC_PCI_IOMAP=y
CONFIG_GENERIC_PHY=y
CONFIG_GENERIC_PINCONF=y
CONFIG_GENERIC_PINCTRL_GROUPS=y
CONFIG_GENERIC_PINMUX_FUNCTIONS=y
CONFIG_GENERIC_SCHED_CLOCK=y
CONFIG_GENERIC_SMP_IDLE_THREAD=y
CONFIG_GENERIC_TIME_VSYSCALL=y
CONFIG_GPIOLIB=y
CONFIG_GPIOLIB_IRQCHIP=y
CONFIG_GPIO_74X164=y
CONFIG_GPIO_ATH79=y
CONFIG_GPIO_GENERIC=y
CONFIG_GPIO_SYSFS=y
CONFIG_HANDLE_DOMAIN_IRQ=y
CONFIG_HARDWARE_WATCHPOINTS=y
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT_MAP=y
CONFIG_HAVE_ARCH_COMPILER_H=y
CONFIG_HAVE_ARCH_JUMP_LABEL=y
CONFIG_HAVE_ARCH_KGDB=y
CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
CONFIG_HAVE_ARCH_TRACEHOOK=y
CONFIG_HAVE_CBPF_JIT=y
CONFIG_HAVE_CLK=y
CONFIG_HAVE_CLK_PREPARE=y
CONFIG_HAVE_CONTEXT_TRACKING=y
CONFIG_HAVE_COPY_THREAD_TLS=y
CONFIG_HAVE_C_RECORDMCOUNT=y
CONFIG_HAVE_DEBUG_KMEMLEAK=y
CONFIG_HAVE_DEBUG_STACKOVERFLOW=y
CONFIG_HAVE_DMA_CONTIGUOUS=y
CONFIG_HAVE_DYNAMIC_FTRACE=y
CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
CONFIG_HAVE_FUNCTION_TRACER=y
CONFIG_HAVE_GENERIC_DMA_COHERENT=y
CONFIG_HAVE_IDE=y
CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y
CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
CONFIG_HAVE_KVM=y
CONFIG_HAVE_LATENCYTOP_SUPPORT=y
CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y
CONFIG_HAVE_MEMBLOCK=y
CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
CONFIG_HAVE_NET_DSA=y
CONFIG_HAVE_OPROFILE=y
CONFIG_HAVE_PERF_EVENTS=y
CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
CONFIG_HAVE_RSEQ=y
CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
CONFIG_HW_HAS_PCI=y
CONFIG_HZ_PERIODIC=y
CONFIG_IMAGE_CMDLINE_HACK=y
CONFIG_INITRAMFS_SOURCE=""
CONFIG_IRQCHIP=y
CONFIG_IRQ_DOMAIN=y
CONFIG_IRQ_FORCED_THREADING=y
CONFIG_IRQ_MIPS_CPU=y
CONFIG_IRQ_WORK=y
CONFIG_LEDS_GPIO=y
# CONFIG_LEDS_RESET is not set
CONFIG_LIBFDT=y
CONFIG_LOCK_DEBUGGING_SUPPORT=y
CONFIG_MDIO_BITBANG=y
CONFIG_MDIO_BUS=y
CONFIG_MDIO_DEVICE=y
CONFIG_MDIO_GPIO=y
CONFIG_MEMFD_CREATE=y
CONFIG_MFD_SYSCON=y
CONFIG_MIGRATION=y
CONFIG_MIPS=y
CONFIG_MIPS_ASID_BITS=8
CONFIG_MIPS_ASID_SHIFT=0
CONFIG_MIPS_CBPF_JIT=y
CONFIG_MIPS_CLOCK_VSYSCALL=y
# CONFIG_MIPS_CMDLINE_BUILTIN_EXTEND is not set
# CONFIG_MIPS_CMDLINE_DTB_EXTEND is not set
# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set
CONFIG_MIPS_CMDLINE_FROM_DTB=y
# CONFIG_MIPS_ELF_APPENDED_DTB is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
# CONFIG_MIPS_NO_APPENDED_DTB is not set
CONFIG_MIPS_RAW_APPENDED_DTB=y
CONFIG_MIPS_SPRAM=y
CONFIG_MODULES_USE_ELF_REL=y
CONFIG_MTD_CFI_ADV_OPTIONS=y
CONFIG_MTD_CFI_GEOMETRY=y
# CONFIG_MTD_CFI_I2 is not set
# CONFIG_MTD_CFI_INTELEXT is not set
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_M25P80=y
# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set
# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
CONFIG_MTD_PARSER_CYBERTAN=y
CONFIG_MTD_PHYSMAP=y
CONFIG_MTD_SPI_NOR=y
CONFIG_MTD_SPLIT_LZMA_FW=y
CONFIG_MTD_SPLIT_TPLINK_FW=y
CONFIG_MTD_SPLIT_UIMAGE_FW=y
CONFIG_MTD_TPLINK_PARTS=y
CONFIG_MTD_VIRT_CONCAT=y
CONFIG_NEED_DMA_MAP_STATE=y
CONFIG_NEED_PER_CPU_KM=y
CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
CONFIG_NVMEM=y
CONFIG_OF=y
CONFIG_OF_ADDRESS=y
CONFIG_OF_EARLY_FLATTREE=y
CONFIG_OF_FLATTREE=y
CONFIG_OF_GPIO=y
CONFIG_OF_IRQ=y
CONFIG_OF_KOBJ=y
CONFIG_OF_MDIO=y
CONFIG_OF_NET=y
CONFIG_PCI_DRIVERS_LEGACY=y
CONFIG_PERF_USE_VMALLOC=y
CONFIG_PGTABLE_LEVELS=2
CONFIG_PHYLIB=y
# CONFIG_PHY_AR7100_USB is not set
# CONFIG_PHY_AR7200_USB is not set
# CONFIG_PHY_ATH79_USB is not set
CONFIG_PINCTRL=y
CONFIG_RATIONAL=y
CONFIG_REGMAP=y
CONFIG_REGMAP_MMIO=y
CONFIG_RESET_ATH79=y
CONFIG_RESET_CONTROLLER=y
CONFIG_SERIAL_8250_NR_UARTS=1
CONFIG_SERIAL_8250_RUNTIME_UARTS=1
CONFIG_SERIAL_AR933X=y
CONFIG_SERIAL_AR933X_CONSOLE=y
CONFIG_SERIAL_AR933X_NR_UARTS=2
CONFIG_SERIAL_OF_PLATFORM=y
CONFIG_SPI=y
CONFIG_SPI_ATH79=y
CONFIG_SPI_BITBANG=y
CONFIG_SPI_GPIO=y
CONFIG_SPI_MASTER=y
CONFIG_SPI_MEM=y
# CONFIG_SPI_RB4XX is not set
CONFIG_SRCU=y
CONFIG_SWCONFIG=y
CONFIG_SWCONFIG_LEDS=y
CONFIG_SWPHY=y
CONFIG_SYSCTL_EXCEPTION_TRACE=y
CONFIG_SYS_HAS_CPU_MIPS32_R2=y
CONFIG_SYS_HAS_EARLY_PRINTK=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
CONFIG_SYS_SUPPORTS_MIPS16=y
CONFIG_SYS_SUPPORTS_ZBOOT=y
CONFIG_SYS_SUPPORTS_ZBOOT_UART_PROM=y
CONFIG_TICK_CPU_ACCOUNTING=y
CONFIG_TINY_SRCU=y
CONFIG_USB_SUPPORT=y
CONFIG_USE_OF=y

126
target/linux/ath79/dts/ar7161_jjplus_ja76pf2.dts Normal file
View File

@ -0,0 +1,126 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "ar7100.dtsi"
/ {
model = "jjPlus JA76PF2";
compatible = "jjplus,ja76pf2", "qca,ar7161";
memory@0 {
device_type = "memory";
reg = <0x0 0x4000000>;
};
chosen {
bootargs = "console=ttyS0,115200n8";
};
aliases {
led-boot = &d2;
led-failsafe = &d2;
led-running = &d2;
led-upgrade = &d2;
};
extosc: ref {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-output-names = "ref";
clock-frequency = <40000000>;
};
leds {
compatible = "gpio-leds";
d2: d2 {
label = "ja76pf2:green:d2";
gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
};
d3 {
label = "ja76pf2:green:d3";
gpios = <&gpio 4 GPIO_ACTIVE_HIGH>;
};
d4 {
label = "ja76pf2:green:d4";
gpios = <&gpio 3 GPIO_ACTIVE_HIGH>;
};
};
keys {
compatible = "gpio-keys-polled";
poll-interval = <20>;
sw1 {
label = "sw1";
linux,code = <KEY_RESTART>;
gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
sw2 {
label = "sw2";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
};
&mdio0 {
status = "okay";
phy-mask = <0x1>;
phy0: ethernet-phy@0 {
reg = <0>;
phy-mode = "rgmii";
};
phy4: ethernet-phy@4 {
reg = <4>;
phy-mode = "rgmii";
};
};
&eth0 {
status = "okay";
phy-handle = <&phy0>;
};
&eth1 {
status = "okay";
phy-handle = <&phy4>;
};
&pcie0 {
status = "okay";
};
&spi {
status = "okay";
num-cs = <1>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <104000000>;
partitions {
#address-cells = <1>;
#size-cells = <1>;
compatible = "ecoscentric,redboot-fis-partitions";
};
};
};
&uart {
status = "okay";
};

3
target/linux/ath79/dts/ar7240.dtsi
View File

@ -39,11 +39,12 @@
builtin-switch;
builtin_switch: switch0@1f {
compatible = "qca,ar8216-builtin";
compatible = "qca,ar7240sw";
reg = <0x1f>;
resets = <&rst 8>;
reset-names = "switch";
qca,mib-poll-interval = <500>;
mdio-bus {
#address-cells = <1>;

3
target/linux/ath79/dts/ar7241.dtsi
View File

@ -58,11 +58,12 @@
builtin-switch;
builtin_switch: switch0@1f {
compatible = "qca,ar8216-builtin";
compatible = "qca,ar7240sw";
reg = <0x1f>;
resets = <&rst 8>;
reset-names = "switch";
qca,mib-poll-interval = <500>;
mdio-bus {
#address-cells = <1>;

2
target/linux/ath79/dts/ar7241_tplink_tl-wr841-v7.dts
View File

@ -5,7 +5,7 @@
/ {
compatible = "tplink,tl-wr841-v7", "qca,ar7241";
model = "TP-LINK TL-WR841N/ND v7";
model = "TP-Link TL-WR841N/ND v7";
ath9k-leds {
compatible = "gpio-leds";

2
target/linux/ath79/dts/ar7241_ubnt_nano-m.dts → target/linux/ath79/dts/ar7241_ubnt_nanostation-m.dts
View File

@ -4,6 +4,6 @@
#include "ar7241_ubnt_xm_outdoor.dtsi"
/ {
compatible = "ubnt,nano-m", "ubnt,xm", "qca,ar7241";
compatible = "ubnt,nanostation-m", "ubnt,xm", "qca,ar7241";
model = "Ubiquiti Nanostation M";
};

3
target/linux/ath79/dts/ar7242.dtsi
View File

@ -61,12 +61,13 @@
builtin-switch;
builtin_switch: switch0@1f {
compatible = "qca,ar8216-builtin";
compatible = "qca,ar7240sw";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x1f>;
resets = <&rst 8>;
reset-names = "switch";
qca,mib-poll-interval = <500>;
};
};

2
target/linux/ath79/dts/ar7242_tplink_tl-wr2543-v1.dts
View File

@ -8,7 +8,7 @@
/ {
compatible = "tplink,tl-wr2543-v1", "qca,ar7242";
model = "TP-LINK TL-WR2543N/ND";
model = "TP-Link TL-WR2543N/ND";
aliases {
led-boot = &system;

2
target/linux/ath79/dts/ar9132_tplink_tl-wr1043nd-v1.dts
View File

@ -8,7 +8,7 @@
/ {
compatible = "tplink,tl-wr1043nd-v1", "qca,ar9132";
model = "TP-Link TL-WR1043ND Version 1";
model = "TP-Link TL-WR1043ND v1";
aliases {
led-boot = &system;

3
target/linux/ath79/dts/ar9330.dtsi
View File

@ -173,10 +173,11 @@
builtin-switch;
builtin_switch: switch0@1f {
compatible = "qca,ar8216-builtin";
compatible = "qca,ar7240sw";
reg = <0x1f>;
resets = <&rst 8>;
reset-names = "switch";
qca,mib-poll-interval = <500>;
mdio-bus {
#address-cells = <1>;

130
target/linux/ath79/dts/ar9331_tplink_tl-wr710n-v1.dts Normal file
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@ -0,0 +1,130 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "ar9331.dtsi"
/ {
model = "TP-Link TL-WR710N v1";
compatible = "tplink,tl-wr710n-v1", "qca,ar9331";
aliases {
serial0 = &uart;
led-boot = &led_system;
led-failsafe = &led_system;
led-running = &led_system;
led-upgrade = &led_system;
};
keys {
compatible = "gpio-keys-polled";
poll-interval = <20>;
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
leds {
compatible = "gpio-leds";
led_system: system {
label = "tl-wr710n:green:system";
gpios = <&gpio 27 GPIO_ACTIVE_LOW>;
};
};
reg_usb_vbus: regulator {
compatible = "regulator-fixed";
regulator-name = "usb_vbus";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
gpio = <&gpio 8 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};
&spi {
status = "okay";
num-cs = <1>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
uboot: partition@0 {
reg = <0x0 0x20000>;
label = "u-boot";
read-only;
};
firmware: partition@20000 {
compatible = "tplink,firmware";
reg = <0x20000 0x7d0000>;
label = "firmware";
};
art: partition@7f0000 {
reg = <0x7f0000 0x10000>;
label = "art";
read-only;
};
};
};
};
&eth0 {
status = "okay";
mtd-mac-address = <&uboot 0x1fc00>;
gmac-config {
device = <&gmac>;
switch-phy-addr-swap = <0>;
switch-phy-swap = <0>;
};
};
&eth1 {
status = "okay";
mtd-mac-address = <&uboot 0x1fc00>;
mtd-mac-address-increment = <(-1)>;
};
&gpio {
status = "okay";
};
&uart {
status = "okay";
};
&usb {
dr_mode = "host";
vbus-supply = <&reg_usb_vbus>;
status = "okay";
};
&usb_phy {
status = "okay";
};
&wmac {
status = "okay";
mtd-cal-data = <&art 0x1000>;
mtd-mac-address = <&uboot 0x1fc00>;
};

4
target/linux/ath79/dts/ar9331_tplink_tl-wr740nd-v4.dts → target/linux/ath79/dts/ar9331_tplink_tl-wr740n-v4.dts
View File

@ -4,6 +4,6 @@
#include "ar9331_tplink_tl-wr741nd-v4.dtsi"
/ {
model = "TP-Link TL-WR740N/ND v4";
compatible = "tplink,tl-wr740nd-v4", "qca,ar9331";
model = "TP-Link TL-WR740N v4";
compatible = "tplink,tl-wr740n-v4", "qca,ar9331";
};

64
target/linux/ath79/dts/ar9342_ubnt_nanobeam-ac.dts Normal file
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@ -0,0 +1,64 @@
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "ar9342_ubnt_wa.dtsi"
/ {
compatible = "ubnt,nanobeam-ac", "ubnt,wa", "qca,ar9342";
model = "Ubiquiti NanoBeam AC (WA)";
leds {
compatible = "gpio-leds";
rssi0 {
label = "ubnt:blue:rssi0";
gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
};
rssi1 {
label = "ubnt:blue:rssi1";
gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
};
rssi2 {
label = "ubnt:blue:rssi2";
gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
};
rssi3 {
label = "ubnt:blue:rssi3";
gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
};
};
};
&mdio0 {
status = "okay";
phy-mask = <4>;
phy4: ethernet-phy@4 {
phy-mode = "rgmii";
reg = <4>;
};
};
&eth0 {
status = "okay";
/* default for ar934x, except for 1000M and 10M */
pll-data = <0x06000000 0x00000101 0x00001313>;
mtd-mac-address = <&eeprom 0x0>;
phy-mode = "rgmii";
phy-handle = <&phy4>;
gmac-config {
device = <&gmac>;
rxd-delay = <3>;
rxdv-delay = <3>;
};
};

37
target/linux/ath79/dts/ar9342_ubnt_nanostation-m-xw.dts Normal file
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@ -0,0 +1,37 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "ar9342_ubnt_xw.dtsi"
/ {
compatible = "ubnt,nanostation-m-xw", "ubnt,xw", "qca,ar9342";
model = "Ubiquiti Nanostation M (XW)";
};
&mdio0 {
status = "okay";
phy4-mii-enable;
phy-mask = <0x23>;
phy4: ethernet-phy@0 {
reg = <0>;
phy-mode = "mii";
};
};
&eth0 {
status = "okay";
phy-mode = "mii";
phy-handle = <&phy4>;
gmac-config {
device = <&gmac>;
mii-gmac0 = <1>;
mii-gmac0-slave = <1>;
};
};

146
target/linux/ath79/dts/ar9344_comfast_cf-e120a-v3.dts Normal file
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@ -0,0 +1,146 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "ar9344.dtsi"
/ {
compatible = "comfast,cf-e120a-v3", "qca,ar9344";
model = "COMFAST CF-E120A v3";
aliases {
serial0 = &uart;
led-boot = &wan;
led-failsafe = &wan;
led-upgrade = &wan;
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&led_rssimediumhigh_pin>;
wan: wan {
label = "cf-e120a-v3:green:wan";
gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
};
lan {
label = "cf-e120a-v3:green:lan";
gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
};
wlan {
label = "cf-e120a-v3:green:wlan";
gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
rssilow {
label = "cf-e120a-v3:red:rssilow";
gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
};
rssimediumlow {
label = "cf-e120a-v3:red:rssimediumlow";
gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
};
rssimediumhigh {
label = "cf-e120a-v3:green:rssimediumhigh";
gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
};
rssihigh {
label = "cf-e120a-v3:green:rssihigh";
gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
};
};
keys {
compatible = "gpio-keys-polled";
poll-interval = <20>;
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
};
&pinmux {
led_rssimediumhigh_pin: pinmux_rssimediumhigh_pin {
pinctrl-single,bits = <0x10 0x0 0xff>;
};
};
&spi {
status = "okay";
num-cs = <1>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
uboot: partition@0 {
label = "u-boot";
reg = <0x000000 0x010000>;
read-only;
};
art: partition@10000 {
label = "art";
reg = <0x010000 0x010000>;
read-only;
};
firmware: partition@20000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x020000 0x7d0000>;
};
nvram: partition@7f0000 {
label = "nvram";
reg = <0x7f0000 0x010000>;
read-only;
};
};
};
};
&uart {
status = "okay";
};
&eth0 {
status = "okay";
phy-handle = <&swphy0>;
mtd-mac-address = <&art 0x0>;
gmac-config {
device = <&gmac>;
switch-phy-swap = <1>;
};
};
&eth1 {
status = "okay";
mtd-mac-address = <&art 0x6>;
};
&wmac {
status = "okay";
mtd-cal-data = <&art 0x1000>;
};

14
target/linux/ath79/dts/ar934x.dtsi
View File

@ -192,19 +192,16 @@
&mdio0 {
compatible = "qca,ar9340-mdio";
resets = <&rst 22>;
reset-names = "mdio";
};
&eth0 {
compatible = "qca,ar9340-eth", "syscon", "simple-mfd";
compatible = "qca,ar9340-eth", "syscon";
pll-data = <0x16000000 0x00000101 0x00001616>;
pll-reg = <0x4 0x2c 17>;
pll-handle = <&pll>;
resets = <&rst 9>;
reset-names = "mac";
resets = <&rst 9>, <&rst 22>;
reset-names = "mac", "mdio";
};
&mdio1 {
@ -216,13 +213,14 @@
builtin-switch;
builtin_switch: switch0@1f {
compatible = "qca,ar8229-builtin";
compatible = "qca,ar8229";
reg = <0x1f>;
resets = <&rst 8>;
reset-names = "switch";
phy-mode = "gmii";
phy4-mii-enable;
qca,mib-poll-interval = <500>;
qca,phy4-mii-enable;
mdio-bus {
#address-cells = <1>;

141
target/linux/ath79/dts/qca9531_comfast_cf-e5.dts Normal file
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@ -0,0 +1,141 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "qca953x.dtsi"
/ {
compatible = "comfast,cf-e5", "qca,qca9531";
model = "COMFAST CF-E5/E7";
keys {
compatible = "gpio-keys-polled";
poll-interval = <20>;
button0 {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
};
};
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&jtag_disable_pins &led_wan_pin>;
wan {
label = "cf-e5:blue:wan";
gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
};
lan {
label = "cf-e5:blue:lan";
gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
};
wlan {
label = "cf-e5:blue:wlan";
gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
rssi0 {
label = "cf-e5:blue:rssi0";
gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
};
rssi1 {
label = "cf-e5:blue:rssi1";
gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
};
rssi2 {
label = "cf-e5:blue:rssi2";
gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
};
};
};
&uart {
status = "okay";
};
&usb0 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
hub_port: port@1 {
reg = <1>;
#trigger-source-cells = <0>;
};
};
&usb_phy {
status = "okay";
};
&spi {
status = "okay";
num-cs = <1>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x000000 0x010000>;
read-only;
};
art: partition@10000 {
label = "art";
reg = <0x010000 0x010000>;
read-only;
};
partition@20000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x020000 0xfd0000>;
};
partition@ff0000 {
label = "art-backup";
reg = <0xff0000 0x010000>;
read-only;
};
};
};
};
&eth0 {
status = "okay";
mtd-mac-address = <&art 0x0>;
phy-handle = <&swphy4>;
};
&eth1 {
mtd-mac-address = <&art 0x6>;
};
&wmac {
status = "okay";
mtd-cal-data = <&art 0x1000>;
};
&pinmux {
led_wan_pin: pinmux_led_wan_pin {
pinctrl-single,bits = <0x4 0x0 0xff>;
};
};

22
target/linux/ath79/dts/qca9531_glinet_gl-ar300m-lite.dts Normal file
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@ -0,0 +1,22 @@
/dts-v1/;
#include "qca9531_glinet_gl-ar300m-nor.dts"
/ {
compatible = "glinet,gl-ar300m-lite", "qca,qca9531";
model = "GL.iNet GL-AR300M-Lite";
};
// GL-AR300M-Lite has different LED colors than the non-Lite version
&led_status {
label = "gl-ar300m-lite:red:status";
};
&led_lan {
label = "gl-ar300m-lite:green:lan";
};
&led_wlan {
label = "gl-ar300m-lite:green:wlan";
};

34
target/linux/ath79/dts/qca9531_glinet_gl-ar300m-nand.dts
View File

@ -8,42 +8,8 @@
};
&spi {
status = "okay";
num-cs = <1>;
flash@0 {
compatible = "winbond,w25q128", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x000000 0x040000>;
read-only;
};
partition@1 {
label = "u-boot-env";
reg = <0x040000 0x010000>;
};
partition@2 {
label = "reserved";
reg = <0x050000 0xfa0000>;
};
art: partition@3 {
label = "art";
reg = <0xff0000 0x010000>;
};
};
};
flash@1 {
compatible = "spinand,mt29f";
reg = <1>;

39
target/linux/ath79/dts/qca9531_glinet_gl-ar300m-nor.dts
View File

@ -9,42 +9,3 @@
compatible = "glinet,gl-ar300m-nor", "qca,qca9531";
model = "GL.iNet GL-AR300M (NOR)";
};
&spi {
status = "okay";
num-cs = <0>;
flash@0 {
compatible = "winbond,w25q128", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x000000 0x040000>;
read-only;
};
partition@1 {
label = "u-boot-env";
reg = <0x040000 0x010000>;
};
partition@2 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x050000 0xfa0000>;
};
art: partition@3 {
label = "art";
reg = <0xff0000 0x010000>;
};
};
};
};

60
target/linux/ath79/dts/qca9531_glinet_gl-ar300m.dtsi
View File

@ -41,20 +41,22 @@
leds {
compatible = "gpio-leds";
wlan {
label = "gl-ar300m:green:wlan";
gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
// Colors from non-Lite versions
led_status: status {
label = "gl-ar300m:green:status";
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
};
lan {
led_lan: lan {
label = "gl-ar300m:green:lan";
gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
};
led_status: status {
label = "gl-ar300m:red:status";
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
led_wlan: wlan {
label = "gl-ar300m:red:wlan";
gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
};
};
@ -63,6 +65,45 @@
status = "okay";
};
&spi {
status = "okay";
num-cs = <0>;
flash@0 {
compatible = "winbond,w25q128", "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x000000 0x040000>;
read-only;
};
partition@1 {
label = "u-boot-env";
reg = <0x040000 0x010000>;
};
partition@2 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x050000 0xfa0000>;
};
art: partition@3 {
label = "art";
reg = <0xff0000 0x010000>;
};
};
};
};
&uart {
status = "okay";
};
@ -84,7 +125,8 @@
};
&eth1 {
mtd-mac-address = <&art 0x6>;
mtd-mac-address = <&art 0x0>;
mtd-mac-address-increment = <1>;
};
&wmac {

3
target/linux/ath79/dts/qca9531_glinet_gl-x750.dts
View File

@ -126,7 +126,8 @@
};
&eth1 {
mtd-mac-address = <&art 0x6>;
mtd-mac-address = <&art 0x0>;
mtd-mac-address-increment = <1>;
};
&wmac {

126
target/linux/ath79/dts/qca9531_yuncore_a770.dts Normal file
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@ -0,0 +1,126 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "qca953x.dtsi"
/ {
model = "YunCore A770";
compatible = "yuncore,a770", "qca,qca9533";
aliases {
led-boot = &status;
led-failsafe = &status;
led-running = &status;
led-upgrade = &status;
};
chosen {
bootargs = "console=ttyS0,115200n8";
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
leds {
compatible = "gpio-leds";
lan {
label = "a770:green:lan";
gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
};
status: status {
label = "a770:green:status";
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
default-state = "keep";
};
wan {
label = "a770:green:wan";
gpios = <&gpio 4 GPIO_ACTIVE_LOW>;
};
wlan2g {
label = "a770:red:wlan2g";
gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1tpt";
};
};
};
&eth0 {
status = "okay";
phy-handle = <&swphy4>;
mtd-mac-address = <&art 0x0>;
};
&eth1 {
mtd-mac-address = <&art 0x6>;
};
&pcie0 {
status = "okay";
};
&spi {
status = "okay";
num-cs = <1>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x000000 0x040000>;
read-only;
};
partition@40000 {
label = "u-boot-env";
reg = <0x040000 0x010000>;
};
partition@50000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x050000 0xfa0000>;
};
art: partition@ff0000 {
label = "art";
reg = <0xff0000 0x010000>;
read-only;
};
};
};
};
&uart {
status = "okay";
};
&wmac {
status = "okay";
mtd-cal-data = <&art 0x1000>;
};

9
target/linux/ath79/dts/qca9533_tplink_cpe210-v2.dts Normal file
View File

@ -0,0 +1,9 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include "qca9533_tplink_cpe210.dtsi"
/ {
compatible = "tplink,cpe210-v2", "qca,qca9533";
model = "TP-LINK CPE210 v2";
};

9
target/linux/ath79/dts/qca9533_tplink_cpe210-v3.dts Normal file
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@ -0,0 +1,9 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include "qca9533_tplink_cpe210.dtsi"
/ {
compatible = "tplink,cpe210-v3", "qca,qca9533";
model = "TP-LINK CPE210 v3";
};

125
target/linux/ath79/dts/qca9533_tplink_cpe210.dtsi Normal file
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@ -0,0 +1,125 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "qca953x.dtsi"
/ {
chosen {
bootargs = "console=ttyS0,115200n8";
};
aliases {
led-boot = &system;
led-failsafe = &system;
led-running = &system;
led-upgrade = &system;
};
leds {
compatible = "gpio-leds";
lan {
label = "tp-link:green:lan";
gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
};
link1 {
label = "tp-link:green:link1";
gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
};
link2 {
label = "tp-link:green:link2";
gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
};
link3 {
label = "tp-link:green:link3";
gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
};
system: link4 {
label = "tp-link:green:link4";
gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
};
};
};
&uart {
status = "okay";
};
&spi {
status = "okay";
num-cs = <1>;
flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
uboot: partition@0 {
label = "u-boot";
reg = <0x000000 0x020000>;
read-only;
};
partition@20000 {
label = "partition-table";
reg = <0x020000 0x10000>;
read-only;
};
info: partition@30000 {
label = "product-info";
reg = <0x030000 0x10000>;
read-only;
};
partition@40000 {
label = "firmware";
reg = <0x040000 0x780000>;
compatible = "tplink,firmware";
};
config: partition@7c0000 {
label = "config";
reg = <0x7c0000 0x30000>;
read-only;
};
ART: partition@7f0000 {
label = "ART";
reg = <0x7f0000 0x10000>;
read-only;
};
};
};
};
&eth0 {
status = "okay";
phy-handle = <&swphy4>;
mtd-mac-address = <&info 0x8>;
};
&eth1 {
compatible = "syscon", "simple-mfd";
};
&wmac {
status = "okay";
mtd-cal-data = <&ART 0x1000>;
mtd-mac-address = <&info 0x8>;
};

2
target/linux/ath79/dts/qca9533_tplink_tl-wr841-v11.dts
View File

@ -8,7 +8,7 @@
/ {
compatible = "tplink,tl-wr841-v11", "qca,qca9533";
model = "TP-Link TL-WR841N/ND Version 11";
model = "TP-Link TL-WR841N/ND v11";
aliases {
led-boot = &system_led;

2
target/linux/ath79/dts/qca9533_tplink_tl-wr841-v9.dts
View File

@ -8,7 +8,7 @@
/ {
compatible = "tplink,tl-wr841-v9", "qca,qca9533";
model = "TP-Link TL-WR841N/ND Version 9";
model = "TP-Link TL-WR841N/ND v9";
aliases {
led-boot = &qss_led;

95
target/linux/ath79/dts/qca9533_ubnt_acb-isp.dts Normal file
View File

@ -0,0 +1,95 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "qca953x.dtsi"
/ {
compatible = "ubnt,acb-isp", "qca,qca9533";
model = "Ubiquiti airCube ISP";
keys {
compatible = "gpio-keys";
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
};
&spi {
status = "okay";
num-cs = <1>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x000000 0x040000>;
read-only;
};
partition@40000 {
label = "u-boot-env";
reg = <0x040000 0x010000>;
read-only;
};
partition@50000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x050000 0xf60000>;
};
partition@fb0000 {
label = "cfg";
reg = <0xfb0000 0x040000>;
read-only;
};
eeprom: partition@ff0000 {
label = "EEPROM";
reg = <0xff0000 0x010000>;
read-only;
};
};
};
};
&uart {
status = "okay";
};
&eth0 {
status = "okay";
mtd-mac-address = <&eeprom 0x0>;
phy-handle = <&swphy4>;
};
&eth1 {
status = "okay";
mtd-mac-address = <&eeprom 0x6>;
gmac-config {
device = <&gmac>;
};
};
&wmac {
status = "okay";
mtd-cal-data = <&eeprom 0x1000>;
mtd-mac-address = <&eeprom 0x1002>;
};

7
target/linux/ath79/dts/qca953x.dtsi
View File

@ -173,7 +173,7 @@
wmac: wmac@18100000 {
compatible = "qca,qca9530-wmac";
reg = <0x18100000 0x230000>;
reg = <0x18100000 0x20000>;
interrupt-parent = <&intc2>;
interrupts = <0>;
@ -245,13 +245,14 @@
builtin-switch;
builtin_switch: switch0@1f {
compatible = "qca,ar8229-builtin";
compatible = "qca,ar8229";
reg = <0x1f>;
resets = <&rst 8>;
reset-names = "switch";
phy-mode = "gmii";
phy4-mii-enable;
qca,phy4-mii-enable;
qca,mib-poll-interval = <500>;
mdio-bus {
#address-cells = <1>;

22
target/linux/ath79/dts/qca9557.dtsi
View File

@ -186,7 +186,7 @@
<0x180f0000 0x100>, /* CTRL */
<0x14000000 0x1000>; /* CFG */
reg-names = "crp_base", "ctrl_base", "cfg_base";
ranges = <0x2000000 0 0x10000000 0x10000000 0 0x04000000 /* pci memory */
ranges = <0x2000000 0 0x10000000 0x10000000 0 0x02000000 /* pci memory */
0x1000000 0 0x00000000 0x0000000 0 0x000001>; /* io space */
interrupt-parent = <&intc2>;
interrupts = <1>;
@ -209,7 +209,7 @@
<0x16000000 0x1000>; /* CFG */
reg-names = "crp_base", "ctrl_base", "cfg_base";
ranges = <0x2000000 0 0x12000000 0x12000000 0 0x02000000 /* pci memory */
0x1000000 0 0x00000000 0x0000000 0 0x000001>; /* io space */
0x1000000 0 0x00000000 0x0000001 0 0x000001>; /* io space */
interrupt-parent = <&intc3>;
interrupts = <0>;
@ -289,12 +289,11 @@
};
&mdio0 {
resets = <&rst 22>;
reset-names = "mdio";
compatible = "qca,ar9340-mdio";
};
&eth0 {
compatible = "qca,qca9550-eth", "syscon", "simple-mfd";
compatible = "qca,qca9550-eth", "syscon";
pll-reg = <0 0x28 0>;
pll-handle = <&pll>;
@ -302,17 +301,16 @@
pll-data = <0x16000000 0x00000101 0x00001616>;
phy-mode = "rgmii";
resets = <&rst 9>;
reset-names = "mac";
resets = <&rst 9>, <&rst 22>;
reset-names = "mac", "mdio";
};
&mdio1 {
resets = <&rst 23>;
reset-names = "mdio";
compatible = "qca,ar9340-mdio";
};
&eth1 {
compatible = "qca,qca9550-eth", "syscon", "simple-mfd";
compatible = "qca,qca9550-eth", "syscon";
pll-reg = <0 0x48 0>;
pll-handle = <&pll>;
@ -320,6 +318,6 @@
pll-data = <0x16000000 0x00000101 0x00001616>;
phy-mode = "sgmii";
resets = <&rst 13>;
reset-names = "mac";
resets = <&rst 13>, <&rst 23>;
reset-names = "mac", "mdio";
};

19
target/linux/ath79/dts/qca9557_iodata_wn-ac-dgr.dtsi
View File

@ -18,7 +18,7 @@
bootargs = "console=ttyS0,115200n8";
};
leds {
leds: leds {
compatible = "gpio-leds";
power: power {
@ -27,11 +27,6 @@
default-state = "on";
};
copy {
label = "iodata:green:copy";
gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
};
eco {
label = "iodata:green:eco";
gpios = <&gpio 3 GPIO_ACTIVE_LOW>;
@ -55,11 +50,11 @@
};
};
keys {
keys: keys {
compatible = "gpio-keys-polled";
poll-interval = <20>;
button_eco {
eco {
label = "eco";
gpios = <&gpio 0 GPIO_ACTIVE_LOW>;
linux,code = <BTN_1>;
@ -74,13 +69,6 @@
debounce-interval = <60>;
};
button_copy {
label = "copy";
gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
linux,code = <BTN_1>;
debounce-interval = <60>;
};
wps {
label = "wps";
gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
@ -190,7 +178,6 @@
wifi@0,0 {
compatible = "pci168c,003c";
reg = <0x0000 0 0 0 0>;
qca,no-eeprom;
};
};

16
target/linux/ath79/dts/qca9557_iodata_wn-ac1167dgr.dts
View File

@ -10,3 +10,19 @@
compatible = "iodata,wn-ac1167dgr", "qca,qca9557";
model = "I-O DATA WN-AC1167DGR";
};
&leds {
copy {
label = "iodata:green:copy";
gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
};
};
&keys {
copy {
label = "copy";
gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
linux,code = <BTN_1>;
debounce-interval = <60>;
};
};

28
target/linux/ath79/dts/qca9557_iodata_wn-ac1600dgr.dts Normal file
View File

@ -0,0 +1,28 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "qca9557_iodata_wn-ac-dgr.dtsi"
/ {
compatible = "iodata,wn-ac1600dgr", "qca,qca9557";
model = "I-O DATA WN-AC1600DGR";
};
&leds {
function {
label = "iodata:green:function";
gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
};
};
&keys {
function {
label = "function";
gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
linux,code = <BTN_1>;
debounce-interval = <60>;
};
};

16
target/linux/ath79/dts/qca9557_iodata_wn-ac1600dgr2.dts
View File

@ -10,3 +10,19 @@
compatible = "iodata,wn-ac1600dgr2", "qca,qca9557";
model = "I-O DATA WN-AC1600DGR2";
};
&leds {
copy {
label = "iodata:green:copy";
gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
};
};
&keys {
copy {
label = "copy";
gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
linux,code = <BTN_1>;
debounce-interval = <60>;
};
};

180
target/linux/ath79/dts/qca9558_engenius_epg5000.dts Normal file
View File

@ -0,0 +1,180 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "qca9557.dtsi"
/ {
model = "EnGenius EPG5000";
compatible = "engenius,epg5000", "qca,qca9557";
chosen {
bootargs = "console=ttyS0,115200n8";
};
aliases {
led-boot = &power;
led-failsafe = &power;
led-running = &power;
led-upgrade = &power;
};
leds {
compatible = "gpio-leds";
power: power {
label = "epg5000:amber:power";
gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
default-state = "on";
};
wlan2g {
label = "epg5000:blue:wlan2g";
gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1tpt";
};
wlan5g {
label = "epg5000:blue:wlan5g";
gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
wps_amber {
label = "epg5000:amber:wps";
gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
};
wps_blue {
label = "epg5000:blue:wps";
gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
};
};
keys {
compatible = "gpio-keys-polled";
poll-interval = <20>;
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
wps {
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
};
&eth0 {
status = "okay";
phy-handle = <&phy0>;
pll-data = <0xa6000000 0x00000101 0x00001616>;
};
&mdio0 {
status = "okay";
phy0: ethernet-phy@0 {
reg = <0>;
qca,ar8327-initvals = <
0x04 0x87600000 /* PORT0 PAD MODE CTRL */
0x7c 0x0000007e /* PORT0_STATUS */
>;
};
};
&pcie0 {
status = "okay";
wifi@0,0 {
compatible = "pci168c,003c";
reg = <0x0000 0 0 0 0>;
};
};
&spi {
status = "okay";
num-cs = <1>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x000000 0x030000>;
read-only;
};
partition@30000 {
label = "u-boot-env";
reg = <0x030000 0x010000>;
};
partition@40000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x040000 0xe50000>;
};
partition@790000 {
label = "manufacture";
reg = <0xe90000 0x100000>;
read-only;
};
partition@ed0000 {
label = "backup";
reg = <0xf90000 0x010000>;
read-only;
};
partition@fe0000 {
label = "storage";
reg = <0xfa0000 0x050000>;
read-only;
};
partition@ff0000 {
label = "art";
reg = <0xff0000 0x010000>;
read-only;
};
};
};
};
&uart {
status = "okay";
};
&usb_phy1 {
status = "okay";
};
&usb1 {
status = "okay";
};
&wmac {
status = "okay";
qca,no-eeprom;
};

211
target/linux/ath79/dts/qca9558_librerouter_librerouter-v1.dts Normal file
View File

@ -0,0 +1,211 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "qca9557.dtsi"
/ {
compatible = "librerouter,librerouter-v1", "qca,qca9558";
model = "LibreRouter v1";
chosen {
bootargs = "console=ttyS0,115200n8";
};
aliases {
led-boot = &system;
led-failsafe = &system;
led-running = &system;
led-upgrade = &system;
};
leds {
compatible = "gpio-leds";
system: system {
label = "librerouter-v1:green:system";
gpios = <&gpio 23 GPIO_ACTIVE_HIGH>;
default-state = "on";
};
wifi_green {
label = "librerouter-v1:green:wlan2g";
gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
status_blue {
label = "librerouter-v1:blue:status";
gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
};
};
button {
compatible = "gpio-keys";
reset {
label = "Reset";
linux,code = <KEY_RESTART>;
gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
watchdog {
compatible = "linux,wdt-gpio";
gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
hw_algo = "toggle";
hw_margin_ms = <1000>;
always-running;
};
};
&pcie0 {
status = "okay";
wifi@0,0 {
compatible = "pci168c,0033";
reg = <0x0000 0 0 0 0>;
};
};
&pcie1 {
status = "okay";
wifi@0,0 {
compatible = "pci168c,0033";
reg = <0x0000 0 0 0 0>;
};
};
&uart {
status = "okay";
};
&gpio {
status = "okay";
};
&usb_phy0 {
status = "okay";
};
&usb0 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
};
&usb_phy1 {
status = "okay";
};
&usb1 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
};
&spi {
status = "okay";
num-cs = <1>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x000000 0x040000>;
read-only;
};
partition@40000 {
label = "u-boot-env";
reg = <0x040000 0x010000>;
};
partition@50000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x050000 0x7c0000>;
};
partition@810000 {
label = "fw2";
reg = <0x810000 0x7d0000>;
};
partition@fd0000 {
label = "res";
reg = <0xfd0000 0x20000>;
};
ART: partition@ff0000 {
label = "ART";
reg = <0xff0000 0x010000>;
read-only;
};
};
};
};
&mdio0 {
status = "okay";
phy0: ethernet-phy@0 {
reg = <0>;
qca,ar8327-initvals = <
0x04 0x87600000 /* PORT0: RGMII, MAC0/6 exchage, tx_delay 01, rx_delay 10 */
0x0c 0x00000080 /* PORT6: SGMII */
0x10 0x81000080 /* POWER_ON_STRAP: LED open drain, SerDes auto-neg disabled */
0x50 0xcf37cf37 /* LED_CTRL0 */
0x54 0xcf37cf37 /* LED_CTRL1 */
0x58 0xcf37cf37 /* LED_CTRL2 */
0x5c 0x0 /* LED_CTRL3 */
0x7c 0x0000007e /* PORT0_STATUS */
0x94 0x0000007e /* PORT6 STATUS */
>;
};
};
&eth0 {
status = "okay";
pll-data = <0xa6000000 0x00000101 0x00001616>;
mtd-mac-address = <&ART 0x0>;
phy-handle = <&phy0>;
};
&eth1 {
status = "okay";
phy-mode = "sgmii";
pll-data = <0x03000101 0x00000101 0x00001616>;
mtd-mac-address = <&ART 0x6>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
&wmac {
status = "okay";
mtd-cal-data = <&ART 0x1000>;
mtd-mac-address = <&ART 0xc>;
};

9
target/linux/ath79/dts/qca9558_netgear_ex6400.dts Normal file
View File

@ -0,0 +1,9 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include "qca9558_netgear_ex7300.dtsi"
/ {
model = "Netgear EX6400";
compatible = "netgear,ex6400", "qca,qca9558";
};

9
target/linux/ath79/dts/qca9558_netgear_ex7300.dts Normal file
View File

@ -0,0 +1,9 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include "qca9558_netgear_ex7300.dtsi"
/ {
model = "Netgear EX7300";
compatible = "netgear,ex7300", "qca,qca9558";
};

222
target/linux/ath79/dts/qca9558_netgear_ex7300.dtsi Normal file
View File

@ -0,0 +1,222 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "qca9557.dtsi"
/ {
chosen {
bootargs = "console=ttyS0,115200n8";
};
aliases {
led-boot = &power_green;
led-failsafe = &power_amber;
led-running = &power_green;
led-upgrade = &power_amber;
};
led_spi {
compatible = "spi-gpio";
#address-cells = <1>;
#size-cells = <0>;
gpio-sck = <&gpio 18 GPIO_ACTIVE_HIGH>;
gpio-mosi = <&gpio 15 GPIO_ACTIVE_HIGH>;
num-chipselects = <0>;
led_gpio: led_gpio@0 {
compatible = "nxp,74lvc594";
reg = <0>;
gpio-controller;
#gpio-cells = <2>;
registers-number = <1>;
lines-initial-states = /bits/ 8 <0xff>;
spi-max-frequency = <500000>;
gpio_latch_bit {
gpio-hog;
gpios = <4 GPIO_ACTIVE_HIGH>;
output-high;
line-name = "gpio-latch-bit";
};
};
};
leds {
compatible = "gpio-leds";
power_green: power_green {
label = "netgear:green:power";
gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
};
power_amber: power_amber {
label = "netgear:amber:power";
gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
};
left_blue {
label = "netgear:blue:left";
gpios = <&led_gpio 7 GPIO_ACTIVE_LOW>;
};
right_blue {
label = "netgear:blue:right";
gpios = <&led_gpio 6 GPIO_ACTIVE_LOW>;
};
wps_green {
label = "netgear:green:wps";
gpios = <&led_gpio 5 GPIO_ACTIVE_LOW>;
};
client_red {
label = "netgear:red:client";
gpios = <&led_gpio 3 GPIO_ACTIVE_LOW>;
};
client_green {
label = "netgear:green:client";
gpios = <&led_gpio 2 GPIO_ACTIVE_LOW>;
};
router_red {
label = "netgear:red:router";
gpios = <&led_gpio 1 GPIO_ACTIVE_LOW>;
};
router_green {
label = "netgear:green:router";
gpios = <&led_gpio 0 GPIO_ACTIVE_LOW>;
};
};
keys {
compatible = "gpio-keys";
reset {
label = "Reset button";
linux,code = <KEY_RESTART>;
gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
wps {
label = "WPS button";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
extender_apmode {
label = "EXTENDER/APMODE switch";
gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
linux,code = <BTN_0>;
linux,input-type = <EV_SW>;
debounce-interval = <60>;
};
};
};
&pcie0 {
status = "okay";
};
&uart {
status = "okay";
};
&pll {
clocks = <&extosc>;
};
&spi {
status = "okay";
num-cs = <1>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
uboot: partition@0 {
label = "u-boot";
reg = <0x000000 0x040000>;
read-only;
};
partition@40000 {
label = "u-boot-env";
reg = <0x040000 0x010000>;
};
caldata: partition@50000 {
label = "caldata";
reg = <0x050000 0x010000>;
read-only;
};
partition@60000 {
label = "caldata-backup";
reg = <0x060000 0x010000>;
read-only;
};
partition@70000 {
label = "config";
reg = <0x070000 0x010000>;
};
partition@80000 {
label = "pot";
reg = <0x080000 0x010000>;
};
partition@90000 {
label = "firmware";
reg = <0x090000 0xf30000>;
compatible = "denx,uimage";
};
partition@fc0000 {
label = "language";
reg = <0xfc0000 0x040000>;
};
};
};
};
&wmac {
status = "okay";
mtd-cal-data = <&caldata 0x1000>;
mtd-mac-address = <&caldata 0x06>;
};
&mdio0 {
status = "okay";
phy4: ethernet-phy@4 {
reg = <4>;
phy-mode = "rgmii";
};
};
&eth0 {
status = "okay";
mtd-mac-address = <&caldata 0x00>;
phy-handle = <&phy4>;
phy-mode = "rgmii";
pll-data = <0x83000000 0x80000101 0x80001313>;
};

147
target/linux/ath79/dts/qca9558_ocedo_ursus.dts Normal file
View File

@ -0,0 +1,147 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "qca9557.dtsi"
/ {
compatible = "ocedo,ursus", "qca,qca9558";
model = "OCEDO Ursus";
chosen {
bootargs = "console=ttyS0,115200n8";
};
leds {
compatible = "gpio-leds";
wifi2 {
label = "ursus:green:wlan2g";
gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1tpt";
};
wifi5 {
label = "ursus:green:wlan5g";
gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
};
};
&pcie1 {
status = "okay";
};
&uart {
status = "okay";
};
&pll {
clocks = <&extosc>;
};
&spi {
status = "okay";
num-cs = <1>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
uboot: partition@0 {
label = "u-boot";
reg = <0x000000 0x040000>;
read-only;
};
partition@40000 {
label = "u-boot-env";
reg = <0x040000 0x010000>;
};
partition@50000 {
compatible = "denx,uimage";
label = "firmware";
reg = <0x050000 0x740000>;
};
partition@790000 {
label = "vendor";
reg = <0x790000 0x740000>;
read-only;
};
partition@ed0000 {
label = "data";
reg = <0xed0000 0x110000>;
read-only;
};
partition@fe0000 {
label = "id";
reg = <0xfe0000 0x010000>;
read-only;
};
art: partition@ff0000 {
label = "art";
reg = <0xff0000 0x010000>;
read-only;
};
};
};
};
&wmac {
status = "okay";
mtd-cal-data = <&art 0x1000>;
mtd-mac-address = <&art 0x06>;
};
&mdio0 {
status = "okay";
phy1: ethernet-phy@1 {
reg = <1>;
};
phy2: ethernet-phy@2 {
reg = <2>;
};
};
&eth0 {
status = "okay";
mtd-mac-address = <&art 0x00>;
phy-handle = <&phy1>;
pll-data = <0xa6000000 0x80000101 0x80001313>;
gmac_config: gmac-config {
device = <&gmac>;
rxdv-delay = <3>;
rxd-delay = <3>;
txen-delay = <0>;
txd-delay = <0>;
rgmii-enabled = <1>;
};
};
&eth1 {
status = "okay";
mtd-mac-address = <&art 0x12>;
phy-handle = <&phy2>;
pll-data = <0x3000101 0x101 0x1313>;
};

46
target/linux/ath79/dts/qca9558_tplink_archer-c5-v1.dts Normal file
View File

@ -0,0 +1,46 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "qca9558_tplink_archer-c7.dtsi"
/ {
compatible = "tplink,archer-c5-v1", "qca,qca9558";
model = "TP-Link Archer C5 v1";
};
&gpio_keys {
rfkill {
gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RFKILL>;
linux,input-type = <EV_SW>;
debounce-interval = <60>;
};
};
&gpio_leds {
wlan5g {
label = "tp-link:green:wlan5g";
gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
};
&mtdparts {
uboot: u-boot@0 {
reg = <0x000000 0x020000>;
read-only;
};
firmware@20000 {
reg = <0x020000 0xfd0000>;
compatible = "tplink,firmware";
};
art: art@ff0000 {
reg = <0xff0000 0x010000>;
read-only;
};
};

2
target/linux/ath79/dts/qca9558_tplink_archer-c7-v1.dts
View File

@ -8,7 +8,7 @@
/ {
compatible = "tplink,archer-c7-v1", "qca,qca9558";
model = "TP-Link Archer C7 Version 1";
model = "TP-Link Archer C7 v1";
};
&gpio_keys {

2
target/linux/ath79/dts/qca9558_tplink_archer-c7-v2.dts
View File

@ -8,7 +8,7 @@
/ {
compatible = "tplink,archer-c7-v2", "qca,qca9558";
model = "TP-Link Archer C7 Version 2";
model = "TP-Link Archer C7 v2";
};
&gpio_keys {

173
target/linux/ath79/dts/qca9558_tplink_re350k-v1.dts Normal file
View File

@ -0,0 +1,173 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "qca9557.dtsi"
/ {
model = "TP-Link RE350K v1";
compatible = "tplink,re350k-v1", "qca,qca9558";
aliases {
led-boot = &power;
led-failsafe = &power;
led-running = &power;
led-upgrade = &power;
mdio-gpio0 = &mdio2;
};
chosen {
bootargs = "console=ttyS0,115200n8";
};
keys {
compatible = "gpio-keys";
app-config {
label = "app-config";
linux,code = <BTN_0>;
gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
led {
label = "led";
linux,code = <BTN_1>;
gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
leds {
compatible = "gpio-leds";
power: power {
label = "tp-link:green:power";
gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
default-state = "on";
};
wlan2g-green {
label = "tp-link:green:wlan2g";
gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1tpt";
};
wlan2g-red {
label = "tp-link:red:wlan2g";
gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
};
wlan5g-green {
label = "tp-link:green:wlan5g";
gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
wlan5g-red {
label = "tp-link:red:wlan5g";
gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
};
};
mdio2: mdio {
compatible = "virtual,mdio-gpio";
#address-cells = <1>;
#size-cells = <0>;
gpios = <&gpio 23 GPIO_ACTIVE_HIGH>,
<&gpio 18 GPIO_ACTIVE_HIGH>;
phy0: ethernet-phy@4 {
reg = <4>;
phy-mode = "rgmii-rxid";
at803x-disable-smarteee;
};
};
};
&eth0 {
status = "okay";
mtd-mac-address = <&config 0x10008>;
pll-data = <0x9e000000 0x80000101 0x80001313>;
phy-handle = <&phy0>;
gmac-config {
device = <&gmac>;
rxdv-delay = <2>;
rxd-delay = <2>;
txen-delay = <0>;
txd-delay = <0>;
rgmii-enabled = <1>;
};
};
&pcie0 {
status = "okay";
};
&spi {
status = "okay";
num-cs = <1>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x000000 0x020000>;
read-only;
};
partition@20000 {
compatible = "tplink,firmware";
label = "firmware";
reg = <0x020000 0xd70000>;
};
config: partition@d90000 {
label = "config";
reg = <0xd90000 0x260000>;
read-only;
};
art: partition@ff0000 {
label = "art";
reg = <0xff0000 0x010000>;
read-only;
};
};
};
};
&uart {
status = "okay";
};
&wmac {
status = "okay";
mtd-cal-data = <&art 0x1000>;
mtd-mac-address = <&config 0x10008>;
};

2
target/linux/ath79/dts/qca9558_tplink_tl-wr1043nd-v2.dts
View File

@ -8,5 +8,5 @@
/ {
compatible = "tplink,tl-wr1043nd-v2", "qca,qca9557";
model = "TP-Link TL-WR1043ND Version 2";
model = "TP-Link TL-WR1043ND v2";
};

2
target/linux/ath79/dts/qca9558_tplink_tl-wr1043nd-v3.dts
View File

@ -8,5 +8,5 @@
/ {
compatible = "tplink,tl-wr1043nd-v3", "qca,qca9557";
model = "TP-Link TL-WR1043ND Version 3";
model = "TP-Link TL-WR1043ND v3";
};

2
target/linux/ath79/dts/qca9561_tplink_archer-c58-v1.dts
View File

@ -8,7 +8,7 @@
/ {
compatible = "tplink,archer-c58-v1", "qca,qca9560";
model = "TP-LINK Archer C58 v1";
model = "TP-Link Archer C58 v1";
aliases {
led-boot = &power;

2
target/linux/ath79/dts/qca9561_tplink_archer-c59-v1.dts
View File

@ -8,7 +8,7 @@
/ {
compatible = "tplink,archer-c59-v1", "qca,qca9560";
model = "TP-LINK Archer C59 v1";
model = "TP-Link Archer C59 v1";
aliases {
led-boot = &power;

176
target/linux/ath79/dts/qca9563_nec_wg1200cr.dts Normal file
View File

@ -0,0 +1,176 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "qca956x.dtsi"
/ {
model = "NEC Aterm WG1200CR";
compatible = "nec,wg1200cr", "qca,qca9563";
chosen {
bootargs = "console=ttyS0,115200n8";
};
aliases {
led-boot = &power_green;
led-failsafe = &power_red;
led-running = &power_green;
led-upgrade = &power_green;
};
leds {
compatible = "gpio-leds";
/* other LEDs are connected to ath10k (QCA9888) gpiochip */
power_green: power_green {
label = "wg1200cr:green:power";
gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
default-state = "on";
};
power_red: power_red {
label = "wg1200cr:red:power";
gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
};
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
debounce-interval = <60>;
};
wps {
label = "wps";
gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
debounce-interval = <60>;
};
bridge {
label = "br";
gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
linux,code = <BTN_0>;
linux,input-type = <EV_SW>;
debounce-interval = <60>;
};
converter {
label = "cnv";
gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
linux,code = <BTN_0>;
linux,input-type = <EV_SW>;
debounce-interval = <60>;
};
};
};
&spi {
status = "okay";
num-cs = <1>;
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <25000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x000000 0x040000>;
read-only;
};
partition@40000 {
label = "devdata";
reg = <0x040000 0x010000>;
read-only;
};
partition@50000 {
label = "devconf";
reg = <0x050000 0x010000>;
read-only;
};
partition@60000 {
label = "misc";
reg = <0x060000 0x010000>;
read-only;
};
partition@70000 {
label = "wifimngdata";
reg = <0x070000 0x010000>;
read-only;
};
partition@80000 {
compatible = "seama";
label = "firmware";
reg = <0x080000 0x770000>;
};
partition@7f0000 {
label = "art";
reg = <0x7f0000 0x010000>;
read-only;
};
};
};
};
&mdio0 {
status = "okay";
phy0: ethernet-phy@0 {
reg = <0>;
qca,ar8327-initvals = <
0x04 0x00000080 /* PORT0 PAD MODE CTRL */
0x50 0xcc35cc35 /* LED_CTRL0 */
0x54 0xca35ca35 /* LED_CTRL1 */
0x58 0xc935c935 /* LED_CTRL2 */
0x5c 0x03ffff00 /* LED_CTRL3 */
0x7c 0x0000007e /* PORT0_STATUS */
>;
};
};
&eth0 {
status = "okay";
pll-data = <0x03000101 0x00000101 0x00001919>;
phy-mode = "sgmii";
phy-handle = <&phy0>;
};
&pcie {
status = "okay";
wifi@0,0 {
compatible = "pci168c,0056";
reg = <0x0000 0 0 0 0>;
};
};
&uart {
status = "okay";
};
&wmac {
status = "okay";
qca,no-eeprom;
};

9
target/linux/ath79/dts/qca9563_tplink_archer-a7-v5.dts
View File

@ -8,6 +8,15 @@
model = "TP-Link Archer A7 v5";
};
&gpio_keys {
reset {
label = "Reset button";
linux,code = <KEY_RESTART>;
gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
&mtdparts {
factory-uboot@0 {
label = "factory-uboot";

2
target/linux/ath79/dts/qca9563_tplink_archer-c2-v3.dts
View File

@ -8,7 +8,7 @@
/ {
compatible = "tplink,archer-c2-v3", "qca,qca9563";
model = "TP-Link Archer C2 Version 3";
model = "TP-Link Archer C2 v3";
chosen {
bootargs = "console=ttyS0,115200n8";

8
target/linux/ath79/dts/qca9563_tplink_archer-c7-v4.dts
View File

@ -68,15 +68,15 @@
usb1 {
label = "tp-link:green:usb1";
gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
trigger-sources = <&hub_port0>;
gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
trigger-sources = <&hub_port1>;
linux,default-trigger = "usbport";
};
usb2 {
label = "tp-link:green:usb2";
gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
trigger-sources = <&hub_port1>;
gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
trigger-sources = <&hub_port0>;
linux,default-trigger = "usbport";
};

16
target/linux/ath79/dts/qca9563_tplink_archer-c7-v5.dts
View File

@ -8,6 +8,22 @@
model = "TP-Link Archer C7 v5";
};
&gpio_keys {
reset {
label = "Reset button";
linux,code = <KEY_RESTART>;
gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
wps {
label = "WPS button";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
};
&mtdparts {
partition@0 {
label = "factory-uboot";

108
target/linux/ath79/dts/qca9563_tplink_archer-x7-v5.dtsi
View File

@ -12,7 +12,10 @@
};
aliases {
led-status = &system;
led-boot = &system;
led-failsafe = &system;
led-running = &system;
led-upgrade = &system;
};
gpio_leds: leds {
@ -24,30 +27,64 @@
default-state = "on";
};
led_wlan2g: wlan2g {
label = "tp-link:green:wlan2g";
gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1tpt";
};
usb {
label = "tp-link:green:usb";
gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
trigger-sources = <&hub_port0>;
linux,default-trigger = "usbport";
};
wlan5g {
label = "tp-link:green:wlan5g";
gpios = <&gpio 9 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
led_wlan2g: wlan2g {
label = "tp-link:green:wlan2g";
gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy1tpt";
};
wan {
label = "tp-link:green:wan";
gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
};
wan_fail {
label = "tp-link:orange:wan";
gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
};
lan1 {
label = "tp-link:green:lan1";
gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
};
lan2 {
label = "tp-link:green:lan2";
gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
};
lan3 {
label = "tp-link:green:lan3";
gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
};
lan4 {
label = "tp-link:green:lan4";
gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
};
wps {
label = "tp-link:green:wps";
gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
};
};
gpio_keys: keys {
compatible = "gpio-keys";
reset {
label = "Reset button";
linux,code = <KEY_RESTART>;
gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
debounce-interval = <60>;
};
wps {
label = "WPS button";
linux,code = <KEY_WPS_BUTTON>;
@ -94,49 +131,6 @@
};
};
&gpio_leds {
wlan5g {
label = "tp-link:green:wlan5g";
gpios = <&gpio 9 GPIO_ACTIVE_LOW>;
linux,default-trigger = "phy0tpt";
};
wan {
label = "tp-link:green:wan";
gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
};
wan_fail {
label = "tp-link:orange:wan";
gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
};
lan1 {
label = "tp-link:green:lan1";
gpios = <&gpio 8 GPIO_ACTIVE_LOW>;
};
lan2 {
label = "tp-link:green:lan2";
gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
};
lan3 {
label = "tp-link:green:lan3";
gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
};
lan4 {
label = "tp-link:green:lan4";
gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
};
wps {
label = "tp-link:green:wps";
gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
};
};
&spi {
status = "okay";
num-cs = <1>;

2
target/linux/ath79/dts/qca9563_tplink_tl-wr1043nd-v4.dts
View File

@ -8,7 +8,7 @@
/ {
compatible = "tplink,tl-wr1043nd-v4", "qca,qca9563";
model = "TP-Link TL-WR1043ND Version 4";
model = "TP-Link TL-WR1043ND v4";
};
&gpio_leds {

5
target/linux/ath79/dts/qca956x.dtsi
View File

@ -274,12 +274,13 @@
builtin-switch;
builtin_switch: switch0@1f {
compatible = "qca,ar8229-builtin";
compatible = "qca,ar8229";
reg = <0x1f>;
resets = <&rst 8>;
reset-names = "switch";
phy-mode = "gmii";
phy4-mii-enable;
qca,phy4-mii-enable;
qca,mib-poll-interval = <500>;
mdio-bus {
#address-cells = <1>;

1
target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/Makefile
View File

@ -9,6 +9,5 @@ ag71xx-y += ag71xx_phy.o
ag71xx-$(CONFIG_AG71XX_DEBUG_FS) += ag71xx_debugfs.o
obj-$(CONFIG_AG71XX) += ag71xx_ar7240.o
obj-$(CONFIG_AG71XX) += ag71xx_mdio.o
obj-$(CONFIG_AG71XX) += ag71xx.o

1
target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h
View File

@ -188,6 +188,7 @@ struct ag71xx {
struct timer_list oom_timer;
struct reset_control *mac_reset;
struct reset_control *mdio_reset;
u32 fifodata[3];
u32 plldata[3];

1344
target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar7240.c
View File

File diff suppressed because it is too large Load Diff

1
target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_gmac.c
View File

@ -53,6 +53,7 @@ static void ag71xx_setup_gmac_934x(struct device_node *np, void __iomem *base)
ag71xx_of_bit(np, "rgmii-gmac0", &val, AR934X_ETH_CFG_RGMII_GMAC0);
ag71xx_of_bit(np, "mii-gmac0", &val, AR934X_ETH_CFG_MII_GMAC0);
ag71xx_of_bit(np, "mii-gmac0-slave", &val, AR934X_ETH_CFG_MII_GMAC0_SLAVE);
ag71xx_of_bit(np, "gmii-gmac0", &val, AR934X_ETH_CFG_GMII_GMAC0);
ag71xx_of_bit(np, "switch-phy-swap", &val, AR934X_ETH_CFG_SW_PHY_SWAP);
ag71xx_of_bit(np, "switch-only-mode", &val,

132
target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c
View File

@ -162,7 +162,7 @@ static void ag71xx_ring_rx_clean(struct ag71xx *ag)
for (i = 0; i < ring_size; i++)
if (ring->buf[i].rx_buf) {
dma_unmap_single(&ag->dev->dev, ring->buf[i].dma_addr,
dma_unmap_single(&ag->pdev->dev, ring->buf[i].dma_addr,
ag->rx_buf_size, DMA_FROM_DEVICE);
skb_free_frag(ring->buf[i].rx_buf);
}
@ -187,7 +187,7 @@ static bool ag71xx_fill_rx_buf(struct ag71xx *ag, struct ag71xx_buf *buf,
return false;
buf->rx_buf = data;
buf->dma_addr = dma_map_single(&ag->dev->dev, data, ag->rx_buf_size,
buf->dma_addr = dma_map_single(&ag->pdev->dev, data, ag->rx_buf_size,
DMA_FROM_DEVICE);
desc->data = (u32) buf->dma_addr + offset;
return true;
@ -276,7 +276,7 @@ static int ag71xx_rings_init(struct ag71xx *ag)
if (!tx->buf)
return -ENOMEM;
tx->descs_cpu = dma_alloc_coherent(NULL, ring_size * AG71XX_DESC_SIZE,
tx->descs_cpu = dma_alloc_coherent(&ag->pdev->dev, ring_size * AG71XX_DESC_SIZE,
&tx->descs_dma, GFP_ATOMIC);
if (!tx->descs_cpu) {
kfree(tx->buf);
@ -299,7 +299,7 @@ static void ag71xx_rings_free(struct ag71xx *ag)
int ring_size = BIT(tx->order) + BIT(rx->order);
if (tx->descs_cpu)
dma_free_coherent(NULL, ring_size * AG71XX_DESC_SIZE,
dma_free_coherent(&ag->pdev->dev, ring_size * AG71XX_DESC_SIZE,
tx->descs_cpu, tx->descs_dma);
kfree(tx->buf);
@ -453,8 +453,12 @@ static void ag71xx_hw_init(struct ag71xx *ag)
udelay(20);
reset_control_assert(ag->mac_reset);
if (ag->mdio_reset)
reset_control_assert(ag->mdio_reset);
msleep(100);
reset_control_deassert(ag->mac_reset);
if (ag->mdio_reset)
reset_control_deassert(ag->mdio_reset);
msleep(200);
ag71xx_hw_setup(ag);
@ -888,7 +892,7 @@ static netdev_tx_t ag71xx_hard_start_xmit(struct sk_buff *skb,
goto err_drop;
}
dma_addr = dma_map_single(&dev->dev, skb->data, skb->len,
dma_addr = dma_map_single(&ag->pdev->dev, skb->data, skb->len,
DMA_TO_DEVICE);
i = ring->curr & ring_mask;
@ -930,7 +934,7 @@ static netdev_tx_t ag71xx_hard_start_xmit(struct sk_buff *skb,
return NETDEV_TX_OK;
err_drop_unmap:
dma_unmap_single(&dev->dev, dma_addr, skb->len, DMA_TO_DEVICE);
dma_unmap_single(&ag->pdev->dev, dma_addr, skb->len, DMA_TO_DEVICE);
err_drop:
dev->stats.tx_dropped++;
@ -981,10 +985,16 @@ static int ag71xx_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
return -EOPNOTSUPP;
}
#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,15,0))
static void ag71xx_oom_timer_handler(unsigned long data)
{
struct net_device *dev = (struct net_device *) data;
struct ag71xx *ag = netdev_priv(dev);
#else
static void ag71xx_oom_timer_handler(struct timer_list *t)
{
struct ag71xx *ag = from_timer(ag, t, oom_timer);
#endif
napi_schedule(&ag->napi);
}
@ -1137,7 +1147,7 @@ static int ag71xx_rx_packets(struct ag71xx *ag, int limit)
pktlen = desc->ctrl & pktlen_mask;
pktlen -= ETH_FCS_LEN;
dma_unmap_single(&dev->dev, ring->buf[i].dma_addr,
dma_unmap_single(&ag->pdev->dev, ring->buf[i].dma_addr,
ag->rx_buf_size, DMA_FROM_DEVICE);
dev->stats.rx_packets++;
@ -1279,20 +1289,6 @@ static irqreturn_t ag71xx_interrupt(int irq, void *dev_id)
return IRQ_HANDLED;
}
#ifdef CONFIG_NET_POLL_CONTROLLER
/*
* Polling 'interrupt' - used by things like netconsole to send skbs
* without having to re-enable interrupts. It's not called while
* the interrupt routine is executing.
*/
static void ag71xx_netpoll(struct net_device *dev)
{
disable_irq(dev->irq);
ag71xx_interrupt(dev->irq, dev);
enable_irq(dev->irq);
}
#endif
static int ag71xx_change_mtu(struct net_device *dev, int new_mtu)
{
struct ag71xx *ag = netdev_priv(dev);
@ -1313,35 +1309,11 @@ static const struct net_device_ops ag71xx_netdev_ops = {
.ndo_change_mtu = ag71xx_change_mtu,
.ndo_set_mac_address = eth_mac_addr,
.ndo_validate_addr = eth_validate_addr,
#ifdef CONFIG_NET_POLL_CONTROLLER
.ndo_poll_controller = ag71xx_netpoll,
#endif
};
static const char *ag71xx_get_phy_if_mode_name(phy_interface_t mode)
{
switch (mode) {
case PHY_INTERFACE_MODE_MII:
return "MII";
case PHY_INTERFACE_MODE_GMII:
return "GMII";
case PHY_INTERFACE_MODE_RMII:
return "RMII";
case PHY_INTERFACE_MODE_RGMII:
return "RGMII";
case PHY_INTERFACE_MODE_SGMII:
return "SGMII";
default:
break;
}
return "unknown";
}
static int ag71xx_probe(struct platform_device *pdev)
{
struct device_node *np = pdev->dev.of_node;
struct device_node *mdio_node;
struct net_device *dev;
struct resource *res;
struct ag71xx *ag;
@ -1352,7 +1324,7 @@ static int ag71xx_probe(struct platform_device *pdev)
if (!np)
return -ENODEV;
dev = alloc_etherdev(sizeof(*ag));
dev = devm_alloc_etherdev(&pdev->dev, sizeof(*ag));
if (!dev)
return -ENOMEM;
@ -1373,13 +1345,14 @@ static int ag71xx_probe(struct platform_device *pdev)
AG71XX_DEFAULT_MSG_ENABLE);
spin_lock_init(&ag->lock);
ag->mac_reset = devm_reset_control_get(&pdev->dev, "mac");
ag->mac_reset = devm_reset_control_get_exclusive(&pdev->dev, "mac");
if (IS_ERR(ag->mac_reset)) {
dev_err(&pdev->dev, "missing mac reset\n");
err = PTR_ERR(ag->mac_reset);
goto err_free;
return PTR_ERR(ag->mac_reset);
}
ag->mdio_reset = devm_reset_control_get_optional_exclusive(&pdev->dev, "mdio");
if (of_property_read_u32_array(np, "fifo-data", ag->fifodata, 3)) {
if (of_device_is_compatible(np, "qca,ar9130-eth") ||
of_device_is_compatible(np, "qca,ar7100-eth")) {
@ -1410,18 +1383,15 @@ static int ag71xx_probe(struct platform_device *pdev)
ag->mac_base = devm_ioremap_nocache(&pdev->dev, res->start,
res->end - res->start + 1);
if (!ag->mac_base) {
err = -ENOMEM;
goto err_free;
}
if (!ag->mac_base)
return -ENOMEM;
res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
if (res) {
ag->mii_base = devm_ioremap_nocache(&pdev->dev, res->start,
res->end - res->start + 1);
if (!ag->mii_base) {
err = -ENOMEM;
goto err_free;
}
if (!ag->mii_base)
return -ENOMEM;
}
dev->irq = platform_get_irq(pdev, 0);
@ -1429,7 +1399,7 @@ static int ag71xx_probe(struct platform_device *pdev)
0x0, dev_name(&pdev->dev), dev);
if (err) {
dev_err(&pdev->dev, "unable to request IRQ %d\n", dev->irq);
goto err_free;
return err;
}
dev->netdev_ops = &ag71xx_netdev_ops;
@ -1437,9 +1407,13 @@ static int ag71xx_probe(struct platform_device *pdev)
INIT_DELAYED_WORK(&ag->restart_work, ag71xx_restart_work_func);
#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,15,0))
init_timer(&ag->oom_timer);
ag->oom_timer.data = (unsigned long) dev;
ag->oom_timer.function = ag71xx_oom_timer_handler;
#else
timer_setup(&ag->oom_timer, ag71xx_oom_timer_handler, 0);
#endif
tx_size = AG71XX_TX_RING_SIZE_DEFAULT;
ag->rx_ring.order = ag71xx_ring_size_order(AG71XX_RX_RING_SIZE_DEFAULT);
@ -1462,7 +1436,14 @@ static int ag71xx_probe(struct platform_device *pdev)
dev->min_mtu = 68;
dev->max_mtu = max_frame_len - ag71xx_max_frame_len(0);
if (of_device_is_compatible(np, "qca,ar7240-eth"))
if (of_device_is_compatible(np, "qca,ar7240-eth") ||
of_device_is_compatible(np, "qca,ar7241-eth") ||
of_device_is_compatible(np, "qca,ar7242-eth") ||
of_device_is_compatible(np, "qca,ar9330-eth") ||
of_device_is_compatible(np, "qca,ar9340-eth") ||
of_device_is_compatible(np, "qca,qca9530-eth") ||
of_device_is_compatible(np, "qca,qca9550-eth") ||
of_device_is_compatible(np, "qca,qca9560-eth"))
ag->tx_hang_workaround = 1;
ag->rx_buf_offset = NET_SKB_PAD;
@ -1480,7 +1461,7 @@ static int ag71xx_probe(struct platform_device *pdev)
sizeof(struct ag71xx_desc),
&ag->stop_desc_dma, GFP_KERNEL);
if (!ag->stop_desc)
goto err_free;
return -ENOMEM;
ag->stop_desc->data = 0;
ag->stop_desc->ctrl = 0;
@ -1497,8 +1478,7 @@ static int ag71xx_probe(struct platform_device *pdev)
ag->phy_if_mode = of_get_phy_mode(np);
if (ag->phy_if_mode < 0) {
dev_err(&pdev->dev, "missing phy-mode property in DT\n");
err = ag->phy_if_mode;
goto err_free;
return ag->phy_if_mode;
}
if (of_property_read_u32(np, "qca,mac-idx", &ag->mac_idx))
@ -1525,15 +1505,23 @@ static int ag71xx_probe(struct platform_device *pdev)
ag71xx_dump_regs(ag);
if (!of_device_is_compatible(np, "simple-mfd")) {
mdio_node = of_get_child_by_name(np, "mdio-bus");
if (!IS_ERR(mdio_node))
of_platform_device_create(mdio_node, NULL, NULL);
/*
* populate current node to register mdio-bus as a subdevice.
* the mdio bus works independently on ar7241 and later chips
* and we need to load mdio1 before gmac0, which can be done
* by adding a "simple-mfd" compatible to gmac node. The
* following code checks OF_POPULATED_BUS flag before populating
* to avoid duplicated population.
*/
if (!of_node_check_flag(np, OF_POPULATED_BUS)) {
err = of_platform_populate(np, NULL, NULL, &pdev->dev);
if (err)
return err;
}
err = ag71xx_phy_connect(ag);
if (err)
goto err_free;
return err;
err = ag71xx_debugfs_init(ag);
if (err)
@ -1549,16 +1537,14 @@ static int ag71xx_probe(struct platform_device *pdev)
goto err_phy_disconnect;
}
pr_info("%s: Atheros AG71xx at 0x%08lx, irq %d, mode:%s\n",
pr_info("%s: Atheros AG71xx at 0x%08lx, irq %d, mode: %s\n",
dev->name, (unsigned long) ag->mac_base, dev->irq,
ag71xx_get_phy_if_mode_name(ag->phy_if_mode));
phy_modes(ag->phy_if_mode));
return 0;
err_phy_disconnect:
ag71xx_phy_disconnect(ag);
err_free:
free_netdev(dev);
return err;
}
@ -1574,11 +1560,7 @@ static int ag71xx_remove(struct platform_device *pdev)
ag71xx_debugfs_exit(ag);
ag71xx_phy_disconnect(ag);
unregister_netdev(dev);
free_irq(dev->irq, dev);
iounmap(ag->mac_base);
kfree(dev);
platform_set_drvdata(pdev, NULL);
return 0;
}

2
target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_mdio.c
View File

@ -190,7 +190,7 @@ static int ag71xx_mdio_probe(struct platform_device *pdev)
if (!mii_bus)
return -ENOMEM;
am->mdio_reset = of_reset_control_get_exclusive(np, "mdio");
am->mdio_reset = devm_reset_control_get_exclusive(amdev, "mdio");
builtin_switch = of_property_read_bool(np, "builtin-switch");
mii_bus->name = "ag71xx_mdio";

1
target/linux/ath79/generic/config-default
View File

@ -8,6 +8,7 @@ CONFIG_LEDS_RESET=y
CONFIG_MARVELL_PHY=y
CONFIG_MICREL_PHY=y
CONFIG_MTD_REDBOOT_PARTS=y
CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-2
CONFIG_MTD_SPLIT_EVA_FW=y
CONFIG_OF_ADDRESS_PCI=y
CONFIG_OF_PCI=y

17
target/linux/ath79/image/common-netgear.mk
View File

@ -19,6 +19,23 @@ define Build/netgear-squashfs
rm -rf $@.squashfs $@.fs
endef
define Build/netgear-rootfs
mkimage \
-A mips -O linux -T filesystem -C none \
-M $(NETGEAR_KERNEL_MAGIC) \
-n '$(VERSION_DIST) filesystem' \
-d $(IMAGE_ROOTFS) $@.fs
cat $@.fs >> $@
rm -rf $@.fs
endef
define Build/netgear-uImage
$(call Build/uImage,$(1) -M $(NETGEAR_KERNEL_MAGIC))
endef
define Device/netgear_ath79
KERNEL := kernel-bin | append-dtb | lzma -d20 | netgear-uImage lzma
IMAGES += factory.img
IMAGE/sysupgrade.bin := $$(IMAGE/default) | append-metadata | check-size $$$$(IMAGE_SIZE)
IMAGE/factory.img := $$(IMAGE/default) | netgear-dni | check-size $$$$(IMAGE_SIZE)
endef

7
target/linux/ath79/image/common-tp-link.mk
View File

@ -86,7 +86,7 @@ define Device/tplink-8m
endef
define Device/tplink-8mlzma
$(Device/tplink)
$(Device/tplink)
TPLINK_FLASHLAYOUT := 8Mlzma
IMAGE_SIZE := 7936k
endef
@ -99,8 +99,9 @@ endef
define Device/tplink-safeloader
$(Device/tplink)
KERNEL := kernel-bin | append-dtb | lzma | tplink-v1-header
IMAGE/sysupgrade.bin := append-rootfs | tplink-safeloader sysupgrade | append-metadata
KERNEL := kernel-bin | append-dtb | lzma | tplink-v1-header -O
IMAGE/sysupgrade.bin := append-rootfs | tplink-safeloader sysupgrade | \
append-metadata | check-size $$$$(IMAGE_SIZE)
IMAGE/factory.bin := append-rootfs | tplink-safeloader factory
endef

114
target/linux/ath79/image/generic-tp-link.mk
View File

@ -4,7 +4,7 @@ define Device/tplink_archer-a7-v5
$(Device/tplink-safeloader-uimage)
ATH_SOC := qca9563
IMAGE_SIZE := 15104k
DEVICE_TITLE := TP-LINK Archer A7 v5
DEVICE_TITLE := TP-Link Archer A7 v5
DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-ledtrig-usbport kmod-ath10k-ct ath10k-firmware-qca988x-ct
TPLINK_BOARD_ID := ARCHER-A7-V5
BOARDNAME := ARCHER-A7-V5
@ -16,7 +16,7 @@ define Device/tplink_archer-c2-v3
$(Device/tplink-safeloader-uimage)
ATH_SOC := qca9563
IMAGE_SIZE := 7808k
DEVICE_TITLE := TP-LINK Archer C2 v3
DEVICE_TITLE := TP-Link Archer C2 v3
DEVICE_PACKAGES := kmod-ath10k-ct ath10k-firmware-qca9887-ct
TPLINK_BOARD_ID := ARCHER-C2-V3
endef
@ -26,7 +26,7 @@ define Device/tplink_archer-c58-v1
$(Device/tplink-safeloader-uimage)
ATH_SOC := qca9561
IMAGE_SIZE := 7936k
DEVICE_TITLE := TP-LINK Archer C58 v1
DEVICE_TITLE := TP-Link Archer C58 v1
TPLINK_BOARD_ID := ARCHER-C58-V1
DEVICE_PACKAGES := kmod-ath10k-ct ath10k-firmware-qca9888-ct
SUPPORTED_DEVICES += archer-c58-v1
@ -37,7 +37,7 @@ define Device/tplink_archer-c59-v1
$(Device/tplink-safeloader-uimage)
ATH_SOC := qca9561
IMAGE_SIZE := 14528k
DEVICE_TITLE := TP-LINK Archer C59 v1
DEVICE_TITLE := TP-Link Archer C59 v1
TPLINK_BOARD_ID := ARCHER-C59-V1
DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-ledtrig-usbport kmod-ath10k-ct ath10k-firmware-qca9888-ct
SUPPORTED_DEVICES += archer-c59-v1
@ -48,16 +48,26 @@ define Device/tplink_archer-c6-v2
$(Device/tplink-safeloader-uimage)
ATH_SOC := qca9563
IMAGE_SIZE := 7808k
DEVICE_TITLE := TP-LINK Archer C6 v2
DEVICE_TITLE := TP-Link Archer C6 v2
TPLINK_BOARD_ID := ARCHER-C6-V2
DEVICE_PACKAGES := kmod-ath10k-ct ath10k-firmware-qca9888-ct
endef
TARGET_DEVICES += tplink_archer-c6-v2
define Device/tplink_archer-c5-v1
$(Device/tplink-16mlzma)
ATH_SOC := qca9558
DEVICE_TITLE := TP-Link Archer C5 v1
DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-ledtrig-usbport kmod-ath10k-ct ath10k-firmware-qca988x-ct
TPLINK_HWID := 0xc5000001
SUPPORTED_DEVICES += archer-c5
endef
TARGET_DEVICES += tplink_archer-c5-v1
define Device/tplink_archer-c7-v1
$(Device/tplink-8mlzma)
ATH_SOC := qca9558
DEVICE_TITLE := TP-LINK Archer C7 v1
DEVICE_TITLE := TP-Link Archer C7 v1
DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-ledtrig-usbport kmod-ath10k-ct ath10k-firmware-qca988x-ct
TPLINK_HWID := 0x75000001
endef
@ -66,7 +76,7 @@ TARGET_DEVICES += tplink_archer-c7-v1
define Device/tplink_archer-c7-v2
$(Device/tplink-16mlzma)
ATH_SOC := qca9558
DEVICE_TITLE := TP-LINK Archer C7 v2
DEVICE_TITLE := TP-Link Archer C7 v2
DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-ledtrig-usbport kmod-ath10k-ct ath10k-firmware-qca988x-ct
TPLINK_HWID := 0xc7000002
IMAGES += factory-us.bin factory-eu.bin
@ -79,7 +89,7 @@ define Device/tplink_archer-c7-v4
$(Device/tplink-safeloader-uimage)
ATH_SOC := qca9563
IMAGE_SIZE := 15104k
DEVICE_TITLE := TP-LINK Archer C7 v4
DEVICE_TITLE := TP-Link Archer C7 v4
DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-ledtrig-usbport kmod-ath10k-ct ath10k-firmware-qca988x-ct
TPLINK_BOARD_ID := ARCHER-C7-V4
BOARDNAME := ARCHER-C7-V4
@ -91,7 +101,7 @@ define Device/tplink_archer-c7-v5
$(Device/tplink-safeloader-uimage)
ATH_SOC := qca9563
IMAGE_SIZE := 15360k
DEVICE_TITLE := TP-LINK Archer C7 v5
DEVICE_TITLE := TP-Link Archer C7 v5
DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-ledtrig-usbport kmod-ath10k-ct ath10k-firmware-qca988x-ct
TPLINK_BOARD_ID := ARCHER-C7-V5
BOARDNAME := ARCHER-C7-V5
@ -99,37 +109,69 @@ define Device/tplink_archer-c7-v5
endef
TARGET_DEVICES += tplink_archer-c7-v5
define Device/tplink_cpe210-v2
$(Device/tplink-safeloader)
ATH_SOC := qca9533
IMAGE_SIZE := 7680k
DEVICE_TITLE := TP-Link CPE210 v2
TPLINK_BOARD_ID := CPE210V2
DEVICE_PACKAGES := rssileds
LOADER_TYPE := elf
SUPPORTED_DEVICES += cpe210-v2
endef
TARGET_DEVICES += tplink_cpe210-v2
define Device/tplink_cpe210-v3
$(Device/tplink-safeloader)
ATH_SOC := qca9533
IMAGE_SIZE := 7680k
DEVICE_TITLE := TP-Link CPE210 v3
DEVICE_PACKAGES := rssileds
TPLINK_BOARD_ID := CPE210V3
LOADER_TYPE := elf
SUPPORTED_DEVICES += cpe210-v3
endef
TARGET_DEVICES += tplink_cpe210-v3
define Device/tplink_re350k-v1
$(Device/tplink-safeloader)
ATH_SOC := qca9558
IMAGE_SIZE := 13760k
DEVICE_TITLE := TP-Link RE350K v1
DEVICE_PACKAGES := kmod-ath10k-ct ath10k-firmware-qca988x-ct
TPLINK_BOARD_ID := RE350K-V1
TPLINK_HWID := 0x0
TPLINK_HWREV := 0
endef
TARGET_DEVICES += tplink_re350k-v1
define Device/tplink_re450-v2
$(Device/tplink)
$(Device/tplink-safeloader)
ATH_SOC := qca9563
IMAGE_SIZE := 6016k
DEVICE_TITLE := TP-LINK RE450 v2
DEVICE_TITLE := TP-Link RE450 v2
DEVICE_PACKAGES := kmod-ath10k-ct ath10k-firmware-qca988x-ct
TPLINK_HWID := 0x0
TPLINK_HWREV := 0
TPLINK_BOARD_ID := RE450-V2
LOADER_TYPE := elf
KERNEL := kernel-bin | append-dtb | lzma | tplink-v1-header -O
IMAGE/sysupgrade.bin := append-rootfs | tplink-safeloader sysupgrade | \
append-metadata | check-size $$$$(IMAGE_SIZE)
IMAGE/factory.bin := append-rootfs | tplink-safeloader factory
endef
TARGET_DEVICES += tplink_re450-v2
define Device/tplink_tl-wdr3600
$(Device/tplink-8mlzma)
ATH_SOC := ar9344
DEVICE_TITLE := TP-LINK TL-WDR3600
DEVICE_TITLE := TP-Link TL-WDR3600
DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-ledtrig-usbport
TPLINK_HWID := 0x36000001
SUPPORTED_DEVICES += tl-wdr3600
SUPPORTED_DEVICES += tl-wdr4300
endef
TARGET_DEVICES += tplink_tl-wdr3600
define Device/tplink_tl-wdr4300
$(Device/tplink-8mlzma)
ATH_SOC := ar9344
DEVICE_TITLE := TP-LINK TL-WDR4300
DEVICE_TITLE := TP-Link TL-WDR4300
DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-ledtrig-usbport
TPLINK_HWID := 0x43000001
SUPPORTED_DEVICES += tl-wdr4300
@ -139,7 +181,7 @@ TARGET_DEVICES += tplink_tl-wdr4300
define Device/tplink_tl-wdr4900-v2
$(Device/tplink-8mlzma)
ATH_SOC := qca9558
DEVICE_TITLE := TP-LINK TL-WDR4900 v2
DEVICE_TITLE := TP-Link TL-WDR4900 v2
DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-ledtrig-usbport
TPLINK_HWID := 0x49000002
endef
@ -148,7 +190,7 @@ TARGET_DEVICES += tplink_tl-wdr4900-v2
define Device/tplink_tl-wr1043nd-v1
$(Device/tplink-8m)
ATH_SOC := ar9132
DEVICE_TITLE := TP-LINK TL-WR1043N/ND v1
DEVICE_TITLE := TP-Link TL-WR1043N/ND v1
DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-ledtrig-usbport
TPLINK_HWID := 0x10430001
SUPPORTED_DEVICES += tl-wr1043nd
@ -158,7 +200,7 @@ TARGET_DEVICES += tplink_tl-wr1043nd-v1
define Device/tplink_tl-wr810n-v1
$(Device/tplink-8mlzma)
ATH_SOC := qca9531
DEVICE_TITLE := TP-LINK TL-WR810N v1
DEVICE_TITLE := TP-Link TL-WR810N v1
TPLINK_HWID := 0x8100001
DEVICE_PACKAGES := kmod-usb2 kmod-usb-ledtrig-usbport
endef
@ -167,15 +209,25 @@ TARGET_DEVICES += tplink_tl-wr810n-v1
define Device/tplink_tl-wr810n-v2
$(Device/tplink-8mlzma)
ATH_SOC := qca9533
DEVICE_TITLE := TP-LINK TL-WR810N v2
DEVICE_TITLE := TP-Link TL-WR810N v2
TPLINK_HWID := 0x8100002
endef
TARGET_DEVICES += tplink_tl-wr810n-v2
define Device/tplink_tl-wr710n-v1
$(Device/tplink-8mlzma)
ATH_SOC := ar9331
DEVICE_TITLE := TP-Link TL-WR710N v1
DEVICE_PACKAGES := kmod-usb-core kmod-usb-chipidea2 kmod-usb-ledtrig-usbport
TPLINK_HWID := 0x07100001
SUPPORTED_DEVICES += tl-wr710n
endef
TARGET_DEVICES += tplink_tl-wr710n-v1
define Device/tplink_tl-wr842n-v1
$(Device/tplink-8m)
ATH_SOC := ar7241
DEVICE_TITLE := TP-LINK TL-WR842N/ND v1
DEVICE_TITLE := TP-Link TL-WR842N/ND v1
DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-ledtrig-usbport
TPLINK_HWID := 0x8420001
endef
@ -184,7 +236,7 @@ TARGET_DEVICES += tplink_tl-wr842n-v1
define Device/tplink_tl-wr842n-v2
$(Device/tplink-8mlzma)
ATH_SOC := ar9341
DEVICE_TITLE := TP-LINK TL-WR842N/ND v2
DEVICE_TITLE := TP-Link TL-WR842N/ND v2
DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-ledtrig-usbport
TPLINK_HWID := 0x8420002
SUPPORTED_DEVICES += tl-wr842n-v2
@ -194,7 +246,7 @@ TARGET_DEVICES += tplink_tl-wr842n-v2
define Device/tplink_tl-wr1043nd-v2
$(Device/tplink-8mlzma)
ATH_SOC := qca9558
DEVICE_TITLE := TP-LINK TL-WR1043N/ND v2
DEVICE_TITLE := TP-Link TL-WR1043N/ND v2
DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-ledtrig-usbport
TPLINK_HWID := 0x10430002
SUPPORTED_DEVICES += tl-wr1043nd-v2
@ -204,7 +256,7 @@ TARGET_DEVICES += tplink_tl-wr1043nd-v2
define Device/tplink_tl-wr1043nd-v3
$(Device/tplink-8mlzma)
ATH_SOC := qca9558
DEVICE_TITLE := TP-LINK TL-WR1043N/ND v3
DEVICE_TITLE := TP-Link TL-WR1043N/ND v3
DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-ledtrig-usbport
TPLINK_HWID := 0x10430003
SUPPORTED_DEVICES += tl-wr1043nd-v3
@ -212,17 +264,13 @@ endef
TARGET_DEVICES += tplink_tl-wr1043nd-v3
define Device/tplink_tl-wr1043nd-v4
$(Device/tplink)
$(Device/tplink-safeloader)
ATH_SOC := qca9563
IMAGE_SIZE := 15552k
DEVICE_TITLE := TP-LINK TL-WR1043N/ND v4
DEVICE_TITLE := TP-Link TL-WR1043N/ND v4
DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-ledtrig-usbport
TPLINK_HWID := 0x10430004
TPLINK_BOARD_ID := TLWR1043NDV4
KERNEL := kernel-bin | append-dtb | lzma | tplink-v1-header -O
IMAGE/sysupgrade.bin := append-rootfs | tplink-safeloader sysupgrade | \
append-metadata | check-size $$$$(IMAGE_SIZE)
IMAGE/factory.bin := append-rootfs | tplink-safeloader factory
SUPPORTED_DEVICES += tl-wr1043nd-v4
endef
TARGET_DEVICES += tplink_tl-wr1043nd-v4
@ -230,7 +278,7 @@ TARGET_DEVICES += tplink_tl-wr1043nd-v4
define Device/tplink_tl-wr2543-v1
$(Device/tplink-8mlzma)
ATH_SOC := ar7242
DEVICE_TITLE := TP-LINK TL-WR2543N/ND v1
DEVICE_TITLE := TP-Link TL-WR2543N/ND v1
DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-ledtrig-usbport
TPLINK_HWID := 0x25430001
IMAGE/sysupgrade.bin := append-rootfs | mktplinkfw sysupgrade -v 3.13.99 | \

37
target/linux/ath79/image/generic-ubnt.mk
View File

@ -106,12 +106,19 @@ define Device/ubnt_rocket-m
endef
TARGET_DEVICES += ubnt_rocket-m
define Device/ubnt_nano-m
define Device/ubnt_nanostation-m
$(Device/ubnt-xm)
DEVICE_TITLE := Ubiquiti Nano-M
DEVICE_TITLE := Ubiquiti Nanostation M
SUPPORTED_DEVICES += nano-m
endef
TARGET_DEVICES += ubnt_nano-m
TARGET_DEVICES += ubnt_nanostation-m
define Device/ubnt_nanostation-m-xw
$(Device/ubnt-xw)
DEVICE_TITLE := Ubiquiti Nanostation M (XW)
SUPPORTED_DEVICES += nano-m-xw
endef
TARGET_DEVICES += ubnt_nanostation-m-xw
define Device/ubnt_lap-120
$(Device/ubnt-wa)
@ -122,6 +129,15 @@ define Device/ubnt_lap-120
endef
TARGET_DEVICES += ubnt_lap-120
define Device/ubnt_nanobeam-ac
$(Device/ubnt-wa)
DEVICE_TITLE := Ubiquiti NanoBeam AC
DEVICE_PACKAGES += kmod-ath10k-ct ath10k-firmware-qca988x-ct
IMAGE_SIZE := 15744k
IMAGE/factory.bin := $$(IMAGE/sysupgrade.bin) | mkubntimage-split
endef
TARGET_DEVICES += ubnt_nanobeam-ac
define Device/ubnt_nanostation-ac
$(Device/ubnt-wa)
DEVICE_TITLE := Ubiquiti Nanostation AC
@ -189,7 +205,8 @@ define Device/ubnt_routerstation_common
IMAGE_SIZE := 16128k
IMAGES += factory.bin
IMAGE/factory.bin := append-rootfs | pad-rootfs | mkubntimage | check-size $$$$(IMAGE_SIZE)
IMAGE/sysupgrade.bin := append-rootfs | pad-rootfs | combined-image | check-size $$$$(IMAGE_SIZE) | append-metadata
IMAGE/sysupgrade.bin := append-rootfs | pad-rootfs | combined-image | check-size $$$$(IMAGE_SIZE)
# IMAGE/sysupgrade.bin := append-rootfs | pad-rootfs | check-size $$$$(IMAGE_SIZE) | sysupgrade-tar rootfs=$$$$@ | append-metadata
KERNEL := kernel-bin | append-dtb | lzma | pad-to $$(BLOCKSIZE)
KERNEL_INITRAMFS := kernel-bin | append-dtb
endef
@ -212,3 +229,15 @@ define Device/ubnt_routerstation-pro
UBNT_CHIP := ar7100pro
endef
TARGET_DEVICES += ubnt_routerstation-pro
define Device/ubnt_acb-isp
$(Device/ubnt)
ATH_SOC := qca9533
IMAGE_SIZE := 15744k
DEVICE_TITLE := Ubiquiti airCube ISP
UBNT_BOARD := ACB-ISP
UBNT_TYPE := ACB
UBNT_CHIP := qca9533
IMAGES := sysupgrade.bin
endef
TARGET_DEVICES += ubnt_acb-isp

146
target/linux/ath79/image/generic.mk
View File

@ -42,6 +42,12 @@ define Build/add-elecom-factory-initramfs
fi
endef
define Build/nec-enc
$(STAGING_DIR_HOST)/bin/nec-enc \
-i $@ -o $@.new -k $(1)
mv $@.new $@
endef
define Build/nec-fw
( stat -c%s $@ | tr -d "\n" | dd bs=16 count=1 conv=sync; ) >> $@
( \
@ -92,6 +98,7 @@ define Device/avm_fritz4020
append-squashfs-fakeroot-be | pad-to 256 | \
append-rootfs | pad-rootfs | append-metadata | check-size $$$$(IMAGE_SIZE)
DEVICE_PACKAGES := fritz-tffs
SUPPORTED_DEVICES += fritz4020
endef
TARGET_DEVICES += avm_fritz4020
@ -162,6 +169,23 @@ define Device/comfast_cf-e110n-v2
endef
TARGET_DEVICES += comfast_cf-e110n-v2
define Device/comfast_cf-e120a-v3
ATH_SOC := ar9344
DEVICE_TITLE := COMFAST CF-E120A v3
DEVICE_PACKAGES := rssileds kmod-leds-gpio -uboot-envtools
IMAGE_SIZE := 8000k
endef
TARGET_DEVICES += comfast_cf-e120a-v3
define Device/comfast_cf-e5
ATH_SOC := qca9531
DEVICE_TITLE := COMFAST CF-E5/E7
DEVICE_PACKAGES := rssileds kmod-leds-gpio kmod-usb-core kmod-usb2 kmod-usb-net \
kmod-usb-net-qmi-wwan -swconfig -uboot-envtools
IMAGE_SIZE := 16192k
endef
TARGET_DEVICES += comfast_cf-e5
define Device/devolo_dvl1200e
ATH_SOC := qca9558
DEVICE_TITLE := devolo WiFi pro 1200e
@ -278,6 +302,19 @@ define Device/embeddedwireless_dorin
endef
TARGET_DEVICES += embeddedwireless_dorin
define Device/engenius_epg5000
ATH_SOC := qca9558
DEVICE_TITLE := EnGenius EPG5000
DEVICE_PACKAGES := ath10k-firmware-qca988x-ct kmod-ath10k-ct kmod-usb2
IMAGE_SIZE := 14656k
IMAGES += factory.dlf
IMAGE/factory.dlf := append-kernel | pad-to $$$$(BLOCKSIZE) | \
append-rootfs | pad-rootfs | check-size $$$$(IMAGE_SIZE) | \
senao-header -r 0x101 -p 0x71 -t 2
SUPPORTED_DEVICES += epg5000
endef
TARGET_DEVICES += engenius_epg5000
define Device/engenius_ews511ap
ATH_SOC := qca9531
DEVICE_TITLE := EnGenius EWS511AP
@ -304,13 +341,23 @@ define Device/glinet_gl-ar150
endef
TARGET_DEVICES += glinet_gl-ar150
define Device/glinet_gl-ar300m-nor
define Device/glinet_gl-ar300m-common-nor
ATH_SOC := qca9531
DEVICE_TITLE := GL.iNet GL-AR300M
DEVICE_PACKAGES := kmod-usb-core kmod-usb2
IMAGE_SIZE := 16000k
SUPPORTED_DEVICES += gl-ar300m
endef
define Device/glinet_gl-ar300m-lite
$(Device/glinet_gl-ar300m-common-nor)
DEVICE_TITLE := GL.iNet GL-AR300M-Lite
endef
TARGET_DEVICES += glinet_gl-ar300m-lite
define Device/glinet_gl-ar300m-nor
$(Device/glinet_gl-ar300m-common-nor)
DEVICE_TITLE := GL.iNet GL-AR300M
endef
TARGET_DEVICES += glinet_gl-ar300m-nor
define Device/glinet_gl-ar750s
@ -349,6 +396,18 @@ define Device/iodata_wn-ac1167dgr
endef
TARGET_DEVICES += iodata_wn-ac1167dgr
define Device/iodata_wn-ac1600dgr
ATH_SOC := qca9557
DEVICE_TITLE := I-O DATA WN-AC1600DGR
IMAGE_SIZE := 14656k
IMAGES += factory.bin
IMAGE/factory.bin := append-kernel | pad-to $$$$(BLOCKSIZE) | \
append-rootfs | pad-rootfs | check-size $$$$(IMAGE_SIZE) | \
senao-header -r 0x30a -p 0x60 -t 2 -v 200
DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-ath10k-ct ath10k-firmware-qca988x-ct
endef
TARGET_DEVICES += iodata_wn-ac1600dgr
define Device/iodata_wn-ac1600dgr2
ATH_SOC := qca9557
DEVICE_TITLE := I-O DATA WN-AC1600DGR2
@ -373,6 +432,44 @@ define Device/iodata_wn-ag300dgr
endef
TARGET_DEVICES += iodata_wn-ag300dgr
define Device/jjplus_ja76pf2
ATH_SOC := ar7161
DEVICE_TITLE := jjPlus JA76PF2
DEVICE_PACKAGES += -kmod-ath9k -swconfig -wpad-mini -uboot-envtools fconfig
IMAGE/sysupgrade.bin := append-rootfs | pad-rootfs | combined-image | check-size $$$$(IMAGE_SIZE)
# IMAGE/sysupgrade.bin := append-rootfs | pad-rootfs | check-size $$$$(IMAGE_SIZE) | sysupgrade-tar rootfs=$$$$@ | append-metadata
KERNEL := kernel-bin | append-dtb | lzma | pad-to $$(BLOCKSIZE)
KERNEL_INITRAMFS := kernel-bin | append-dtb
IMAGE_SIZE := 16000k
endef
TARGET_DEVICES += jjplus_ja76pf2
define Device/librerouter_librerouter-v1
ATH_SOC := qca9558
DEVICE_TITLE := LibreRouter v1
IMAGE_SIZE := 7936k
DEVICE_PACKAGES := kmod-usb-core kmod-usb2
endef
TARGET_DEVICES += librerouter_librerouter-v1
define Device/nec_wg1200cr
ATH_SOC := qca9563
DEVICE_TITLE := NEC Aterm WG1200CR
IMAGE_SIZE := 7616k
SEAMA_MTDBLOCK := 6
SEAMA_SIGNATURE := wrgac72_necpf.2016gui_wg1200cr
IMAGES += factory.bin
IMAGE/default := \
append-kernel | pad-offset $$$$(BLOCKSIZE) 64 | append-rootfs
IMAGE/sysupgrade.bin := \
$$(IMAGE/default) | seama | pad-rootfs | append-metadata | check-size $$$$(IMAGE_SIZE)
IMAGE/factory.bin := \
$$(IMAGE/default) | pad-rootfs -x 64 | seama | seama-seal | nec-enc 9gsiy9nzep452pad | \
check-size $$$$(IMAGE_SIZE)
DEVICE_PACKAGES := kmod-ath10k-ct ath10k-firmware-qca9888-ct
endef
TARGET_DEVICES += nec_wg1200cr
define Device/nec_wg800hp
ATH_SOC := qca9563
DEVICE_TITLE := NEC Aterm WG800HP
@ -404,6 +501,15 @@ define Device/ocedo_raccoon
endef
TARGET_DEVICES += ocedo_raccoon
define Device/ocedo_ursus
ATH_SOC := qca9558
DEVICE_TITLE := OCEDO Ursus
DEVICE_PACKAGES := kmod-ath10k-ct ath10k-firmware-qca988x-ct
IMAGE_SIZE := 7424k
IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | append-metadata | check-size $$$$(IMAGE_SIZE)
endef
TARGET_DEVICES += ocedo_ursus
define Device/openmesh_om5p-ac-v2
ATH_SOC := qca9558
DEVICE_TITLE := OpenMesh OM5P-AC v2
@ -440,14 +546,34 @@ TARGET_DEVICES += pcs_cr5000
define Device/netgear_wndr3x00
ATH_SOC := ar7161
KERNEL := kernel-bin | append-dtb | lzma -d20 | netgear-uImage lzma
IMAGES += factory.img
IMAGE/default := append-kernel | pad-to $$$$(BLOCKSIZE) | netgear-squashfs | append-rootfs | pad-rootfs
IMAGE/sysupgrade.bin := $$(IMAGE/default) | append-metadata | check-size $$$$(IMAGE_SIZE)
IMAGE/factory.img := $$(IMAGE/default) | netgear-dni | check-size $$$$(IMAGE_SIZE)
DEVICE_PACKAGES := kmod-usb-core kmod-usb-ohci kmod-usb2 kmod-usb-ledtrig-usbport kmod-leds-reset kmod-owl-loader
$(Device/netgear_ath79)
endef
define Device/netgear_ex7300_ex6400
ATH_SOC := qca9558
NETGEAR_KERNEL_MAGIC := 0x27051956
NETGEAR_BOARD_ID := EX7300series
NETGEAR_HW_ID := 29765104+16+0+128
IMAGE_SIZE := 15552k
IMAGE/default := append-kernel | pad-offset $$$$(BLOCKSIZE) 64 | netgear-rootfs | pad-rootfs
DEVICE_PACKAGES := kmod-ath10k-ct ath10k-firmware-qca99x0-ct
$(Device/netgear_ath79)
endef
define Device/netgear_ex6400
$(Device/netgear_ex7300_ex6400)
DEVICE_TITLE := NETGEAR EX6400
endef
TARGET_DEVICES += netgear_ex6400
define Device/netgear_ex7300
$(Device/netgear_ex7300_ex6400)
DEVICE_TITLE := NETGEAR EX7300
endef
TARGET_DEVICES += netgear_ex7300
define Device/netgear_wndr3700
$(Device/netgear_wndr3x00)
DEVICE_TITLE := NETGEAR WNDR3700
@ -535,3 +661,11 @@ define Device/xiaomi_mi-router-4q
IMAGE_SIZE := 14336k
endef
TARGET_DEVICES += xiaomi_mi-router-4q
define Device/yuncore_a770
ATH_SOC := qca9531
DEVICE_TITLE := YunCore A770
DEVICE_PACKAGES := kmod-ath10k-ct ath10k-firmware-qca9887-ct
IMAGE_SIZE := 16000k
endef
TARGET_DEVICES += yuncore_a770

28
target/linux/ath79/image/tiny-netgear.mk
View File

@ -1,35 +1,27 @@
include ./common-netgear.mk
define Device/netgear_ar7240
ATH_SOC := ar7240
NETGEAR_KERNEL_MAGIC := 0x32303631
KERNEL_INITRAMFS := kernel-bin | append-dtb | lzma -d20 | netgear-uImage lzma
IMAGE_SIZE := 3904k
IMAGE/default := append-kernel | pad-to $$$$(BLOCKSIZE) | netgear-squashfs | append-rootfs | pad-rootfs
$(Device/netgear_ath79)
endef
define Device/netgear_wnr612-v2
ATH_SOC := ar7240
$(Device/netgear_ar7240)
DEVICE_TITLE := Netgear WNR612v2
DEVICE_DTS := ar7240_netgear_wnr612-v2
NETGEAR_KERNEL_MAGIC := 0x32303631
KERNEL := kernel-bin | append-dtb | lzma -d20 | netgear-uImage lzma
KERNEL_INITRAMFS := kernel-bin | append-dtb | lzma -d20 | netgear-uImage lzma
NETGEAR_BOARD_ID := REALWNR612V2
IMAGE_SIZE := 3904k
IMAGES += factory.img
IMAGE/default := append-kernel | pad-to $$$$(BLOCKSIZE) | netgear-squashfs | append-rootfs | pad-rootfs
IMAGE/sysupgrade.bin := $$(IMAGE/default) | append-metadata | check-size $$$$(IMAGE_SIZE)
IMAGE/factory.img := $$(IMAGE/default) | netgear-dni | check-size $$$$(IMAGE_SIZE)
SUPPORTED_DEVICES += wnr612-v2
endef
TARGET_DEVICES += netgear_wnr612-v2
define Device/on_n150r
ATH_SOC := ar7240
$(Device/netgear_ar7240)
DEVICE_TITLE := ON Network N150R
NETGEAR_KERNEL_MAGIC := 0x32303631
KERNEL := kernel-bin | append-dtb | lzma -d20 | netgear-uImage lzma
KERNEL_INITRAMFS := kernel-bin | append-dtb | lzma -d20 | netgear-uImage lzma
NETGEAR_BOARD_ID := N150R
IMAGE_SIZE := 3904k
IMAGES += factory.img
IMAGE/default := append-kernel | pad-to $$$$(BLOCKSIZE) | netgear-squashfs | append-rootfs | pad-rootfs
IMAGE/sysupgrade.bin := $$(IMAGE/default) | append-metadata | check-size $$$$(IMAGE_SIZE)
IMAGE/factory.img := $$(IMAGE/default) | netgear-dni | check-size $$$$(IMAGE_SIZE)
SUPPORTED_DEVICES += n150r
endef
TARGET_DEVICES += on_n150r

20
target/linux/ath79/image/tiny-tp-link.mk
View File

@ -14,7 +14,7 @@ TARGET_DEVICES += tplink_tl-mr10u
define Device/tplink_tl-mr3020-v1
$(Device/tplink-4mlzma)
ATH_SOC := ar9331
DEVICE_TITLE := TP-LINK TL-MR3020 v1
DEVICE_TITLE := TP-Link TL-MR3020 v1
DEVICE_PACKAGES := kmod-usb-core kmod-usb-chipidea2 kmod-usb-ledtrig-usbport
TPLINK_HWID := 0x30200001
SUPPORTED_DEVICES += tl-mr3020
@ -24,7 +24,7 @@ TARGET_DEVICES += tplink_tl-mr3020-v1
define Device/tplink_tl-mr3040-v2
$(Device/tplink-4mlzma)
ATH_SOC := ar9331
DEVICE_TITLE := TP-LINK TL-MR3040 v2
DEVICE_TITLE := TP-Link TL-MR3040 v2
DEVICE_PACKAGES := kmod-usb-core kmod-usb-chipidea2 kmod-usb-ledtrig-usbport
TPLINK_HWID := 0x30400002
SUPPORTED_DEVICES += tl-mr3040-v2
@ -85,14 +85,14 @@ define Device/tplink_tl-wr740n-v3
endef
TARGET_DEVICES += tplink_tl-wr740n-v3
define Device/tplink_tl-wr740nd-v4
define Device/tplink_tl-wr740n-v4
$(Device/tplink-4mlzma)
ATH_SOC := ar9331
DEVICE_TITLE := TP-LINK TL-WR740N/ND v4
DEVICE_TITLE := TP-Link TL-WR740N v4
TPLINK_HWID := 0x07400004
SUPPORTED_DEVICES += tl-wr740n-v4
endef
TARGET_DEVICES += tplink_tl-wr740nd-v4
TARGET_DEVICES += tplink_tl-wr740n-v4
define Device/tplink_tl-wr741-v1
$(Device/tplink-4m)
@ -105,7 +105,7 @@ TARGET_DEVICES += tplink_tl-wr741-v1
define Device/tplink_tl-wr741nd-v4
$(Device/tplink-4mlzma)
ATH_SOC := ar9331
DEVICE_TITLE := TP-LINK TL-WR741N/ND v4
DEVICE_TITLE := TP-Link TL-WR741N/ND v4
TPLINK_HWID := 0x07410004
SUPPORTED_DEVICES += tl-wr741n-v4
endef
@ -130,7 +130,7 @@ TARGET_DEVICES += tplink_tl-wr841-v5
define Device/tplink_tl-wr841-v7
$(Device/tplink-4m)
ATH_SOC := ar7241
DEVICE_TITLE := TP-LINK TL-WR841N/ND v7
DEVICE_TITLE := TP-Link TL-WR841N/ND v7
TPLINK_HWID := 0x08410007
SUPPORTED_DEVICES += tl-wr841-v7
endef
@ -139,7 +139,7 @@ TARGET_DEVICES += tplink_tl-wr841-v7
define Device/tplink_tl-wr841-v8
$(Device/tplink-4mlzma)
ATH_SOC := ar9341
DEVICE_TITLE := TP-LINK TL-WR841N/ND v8
DEVICE_TITLE := TP-Link TL-WR841N/ND v8
TPLINK_HWID := 0x08410008
SUPPORTED_DEVICES += tl-wr841n-v8
endef
@ -148,7 +148,7 @@ TARGET_DEVICES += tplink_tl-wr841-v8
define Device/tplink_tl-wr841-v9
$(Device/tplink-4mlzma)
ATH_SOC := qca9533
DEVICE_TITLE := TP-LINK TL-WR841N/ND v9
DEVICE_TITLE := TP-Link TL-WR841N/ND v9
TPLINK_HWID := 0x08410009
endef
TARGET_DEVICES += tplink_tl-wr841-v9
@ -156,7 +156,7 @@ TARGET_DEVICES += tplink_tl-wr841-v9
define Device/tplink_tl-wr841-v11
$(Device/tplink-4mlzma)
ATH_SOC := qca9533
DEVICE_TITLE := TP-LINK TL-WR841N/ND v11
DEVICE_TITLE := TP-Link TL-WR841N/ND v11
TPLINK_HWID := 0x08410011
IMAGES += factory-us.bin factory-eu.bin
IMAGE/factory-us.bin := append-rootfs | mktplinkfw factory -C US

44
target/linux/ath79/patches-4.14/408-mtd-redboot_partition_scan.patch Normal file
View File

@ -0,0 +1,44 @@
--- a/drivers/mtd/redboot.c
+++ b/drivers/mtd/redboot.c
@@ -76,12 +76,18 @@ static int parse_redboot_partitions(stru
static char nullstring[] = "unallocated";
#endif
+ buf = vmalloc(master->erasesize);
+ if (!buf)
+ return -ENOMEM;
+
+ restart:
if ( directory < 0 ) {
offset = master->size + directory * master->erasesize;
while (mtd_block_isbad(master, offset)) {
if (!offset) {
nogood:
printk(KERN_NOTICE "Failed to find a non-bad block to check for RedBoot partition table\n");
+ vfree(buf);
return -EIO;
}
offset -= master->erasesize;
@@ -94,10 +100,6 @@ static int parse_redboot_partitions(stru
goto nogood;
}
}
- buf = vmalloc(master->erasesize);
-
- if (!buf)
- return -ENOMEM;
printk(KERN_NOTICE "Searching for RedBoot partition table in %s at offset 0x%lx\n",
master->name, offset);
@@ -170,6 +172,11 @@ static int parse_redboot_partitions(stru
}
if (i == numslots) {
/* Didn't find it */
+ if (offset + master->erasesize < master->size) {
+ /* not at the end of the flash yet, maybe next block :) */
+ directory++;
+ goto restart;
+ }
printk(KERN_NOTICE "No RedBoot partition table detected in %s\n",
master->name);
ret = 0;

32
target/linux/ath79/patches-4.19/0002-watchdog-ath79-fix-maximum-timeout.patch Normal file
View File

@ -0,0 +1,32 @@
From 5f5c9858af167f842ee8df053920b98387a71af1 Mon Sep 17 00:00:00 2001
From: John Crispin <john@phrozen.org>
Date: Mon, 5 Mar 2018 11:41:25 +0100
Subject: [PATCH 02/27] watchdog: ath79: fix maximum timeout
If the userland tries to set a timeout higher than the max_timeout,
then we should fallback to max_timeout.
Signed-off-by: John Crispin <john@phrozen.org>
---
drivers/watchdog/ath79_wdt.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
--- a/drivers/watchdog/ath79_wdt.c
+++ b/drivers/watchdog/ath79_wdt.c
@@ -115,10 +115,14 @@ static inline void ath79_wdt_disable(voi
static int ath79_wdt_set_timeout(int val)
{
- if (val < 1 || val > max_timeout)
+ if (val < 1)
return -EINVAL;
- timeout = val;
+ if (val > max_timeout)
+ timeout = max_timeout;
+ else
+ timeout = val;
+
ath79_wdt_keepalive();
return 0;

186
target/linux/ath79/patches-4.19/0003-leds-add-reset-controller-based-driver.patch Normal file
View File

@ -0,0 +1,186 @@
From ecbd9c87f073f097d9fe56390353e64e963e866a Mon Sep 17 00:00:00 2001
From: John Crispin <john@phrozen.org>
Date: Tue, 6 Mar 2018 10:03:03 +0100
Subject: [PATCH 03/27] leds: add reset-controller based driver
Signed-off-by: John Crispin <john@phrozen.org>
---
drivers/leds/Kconfig | 11 ++++
drivers/leds/Makefile | 1 +
drivers/leds/leds-reset.c | 137 ++++++++++++++++++++++++++++++++++++++++++++++
3 files changed, 149 insertions(+)
create mode 100644 drivers/leds/leds-reset.c
--- a/drivers/leds/Kconfig
+++ b/drivers/leds/Kconfig
@@ -756,6 +756,17 @@ config LEDS_NIC78BX
To compile this driver as a module, choose M here: the module
will be called leds-nic78bx.
+config LEDS_RESET
+ tristate "LED support for reset-controller API"
+ depends on LEDS_CLASS
+ depends on RESET_CONTROLLER
+ help
+ This option enables support for LEDs connected to pins driven by reset
+ controllers. Yes, DNI actual built HW like that.
+
+ To compile this driver as a module, choose M here: the module
+ will be called leds-reset.
+
comment "LED Triggers"
source "drivers/leds/trigger/Kconfig"
--- /dev/null
+++ b/drivers/leds/leds-reset.c
@@ -0,0 +1,140 @@
+/*
+ * Copyright (C) 2018 John Crispin <john@phrozen.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ */
+#include <linux/err.h>
+#include <linux/reset.h>
+#include <linux/kernel.h>
+#include <linux/leds.h>
+#include <linux/module.h>
+#include <linux/of.h>
+#include <linux/platform_device.h>
+#include <linux/reset.h>
+
+struct reset_led_data {
+ struct led_classdev cdev;
+ struct reset_control *rst;
+};
+
+static inline struct reset_led_data *
+ cdev_to_reset_led_data(struct led_classdev *led_cdev)
+{
+ return container_of(led_cdev, struct reset_led_data, cdev);
+}
+
+static void reset_led_set(struct led_classdev *led_cdev,
+ enum led_brightness value)
+{
+ struct reset_led_data *led_dat = cdev_to_reset_led_data(led_cdev);
+
+ if (value == LED_OFF)
+ reset_control_assert(led_dat->rst);
+ else
+ reset_control_deassert(led_dat->rst);
+}
+
+struct reset_leds_priv {
+ int num_leds;
+ struct reset_led_data leds[];
+};
+
+static inline int sizeof_reset_leds_priv(int num_leds)
+{
+ return sizeof(struct reset_leds_priv) +
+ (sizeof(struct reset_led_data) * num_leds);
+}
+
+static struct reset_leds_priv *reset_leds_create(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct fwnode_handle *child;
+ struct reset_leds_priv *priv;
+ int count, ret;
+
+ count = device_get_child_node_count(dev);
+ if (!count)
+ return ERR_PTR(-ENODEV);
+
+ priv = devm_kzalloc(dev, sizeof_reset_leds_priv(count), GFP_KERNEL);
+ if (!priv)
+ return ERR_PTR(-ENOMEM);
+
+ device_for_each_child_node(dev, child) {
+ struct reset_led_data *led = &priv->leds[priv->num_leds];
+ struct device_node *np = to_of_node(child);
+
+ ret = fwnode_property_read_string(child, "label", &led->cdev.name);
+ if (!led->cdev.name) {
+ fwnode_handle_put(child);
+ return ERR_PTR(-EINVAL);
+ }
+ led->rst = __of_reset_control_get(np, NULL, 0, 0, 0);
+ if (IS_ERR(led->rst))
+ return ERR_PTR(-EINVAL);
+
+ fwnode_property_read_string(child, "linux,default-trigger",
+ &led->cdev.default_trigger);
+
+ led->cdev.brightness_set = reset_led_set;
+ ret = devm_of_led_classdev_register(&pdev->dev, np, &led->cdev);
+ if (ret < 0)
+ return ERR_PTR(ret);
+ led->cdev.dev->of_node = np;
+ priv->num_leds++;
+ }
+
+ return priv;
+}
+
+static const struct of_device_id of_reset_leds_match[] = {
+ { .compatible = "reset-leds", },
+ {},
+};
+
+MODULE_DEVICE_TABLE(of, of_reset_leds_match);
+
+static int reset_led_probe(struct platform_device *pdev)
+{
+ struct reset_leds_priv *priv;
+
+ priv = reset_leds_create(pdev);
+ if (IS_ERR(priv))
+ return PTR_ERR(priv);
+
+ platform_set_drvdata(pdev, priv);
+
+ return 0;
+}
+
+static void reset_led_shutdown(struct platform_device *pdev)
+{
+ struct reset_leds_priv *priv = platform_get_drvdata(pdev);
+ int i;
+
+ for (i = 0; i < priv->num_leds; i++) {
+ struct reset_led_data *led = &priv->leds[i];
+
+ if (!(led->cdev.flags & LED_RETAIN_AT_SHUTDOWN))
+ reset_led_set(&led->cdev, LED_OFF);
+ }
+}
+
+static struct platform_driver reset_led_driver = {
+ .probe = reset_led_probe,
+ .shutdown = reset_led_shutdown,
+ .driver = {
+ .name = "leds-reset",
+ .of_match_table = of_reset_leds_match,
+ },
+};
+
+module_platform_driver(reset_led_driver);
+
+MODULE_AUTHOR("John Crispin <john@phrozen.org>");
+MODULE_DESCRIPTION("reset controller LED driver");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:leds-reset");
--- a/drivers/leds/Makefile
+++ b/drivers/leds/Makefile
@@ -78,6 +78,7 @@ obj-$(CONFIG_LEDS_MT6323) += leds-mt632
obj-$(CONFIG_LEDS_LM3692X) += leds-lm3692x.o
obj-$(CONFIG_LEDS_SC27XX_BLTC) += leds-sc27xx-bltc.o
obj-$(CONFIG_LEDS_LM3601X) += leds-lm3601x.o
+obj-$(CONFIG_LEDS_RESET) += leds-reset.o
# LED SPI Drivers
obj-$(CONFIG_LEDS_CR0014114) += leds-cr0014114.o

320
target/linux/ath79/patches-4.19/0004-phy-add-ath79-usb-phys.patch Normal file
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@ -0,0 +1,320 @@
From 08c9d6ceef01893678a5d2e8a15517c745417f21 Mon Sep 17 00:00:00 2001
From: John Crispin <john@phrozen.org>
Date: Tue, 6 Mar 2018 10:04:05 +0100
Subject: [PATCH 04/27] phy: add ath79 usb phys
Signed-off-by: John Crispin <john@phrozen.org>
---
drivers/phy/Kconfig | 16 ++++++
drivers/phy/Makefile | 2 +
drivers/phy/phy-ar7100-usb.c | 124 +++++++++++++++++++++++++++++++++++++++++++
drivers/phy/phy-ar7200-usb.c | 108 +++++++++++++++++++++++++++++++++++++
4 files changed, 250 insertions(+)
create mode 100644 drivers/phy/phy-ar7100-usb.c
create mode 100644 drivers/phy/phy-ar7200-usb.c
--- a/drivers/phy/Kconfig
+++ b/drivers/phy/Kconfig
@@ -15,6 +15,22 @@ config GENERIC_PHY
phy users can obtain reference to the PHY. All the users of this
framework should select this config.
+config PHY_AR7100_USB
+ tristate "Atheros AR7100 USB PHY driver"
+ depends on ATH79 || COMPILE_TEST
+ default y if USB_EHCI_HCD_PLATFORM
+ select PHY_SIMPLE
+ help
+ Enable this to support the USB PHY on Atheros AR7100 SoCs.
+
+config PHY_AR7200_USB
+ tristate "Atheros AR7200 USB PHY driver"
+ depends on ATH79 || COMPILE_TEST
+ default y if USB_EHCI_HCD_PLATFORM
+ select PHY_SIMPLE
+ help
+ Enable this to support the USB PHY on Atheros AR7200 SoCs.
+
config PHY_LPC18XX_USB_OTG
tristate "NXP LPC18xx/43xx SoC USB OTG PHY driver"
depends on OF && (ARCH_LPC18XX || COMPILE_TEST)
--- a/drivers/phy/Makefile
+++ b/drivers/phy/Makefile
@@ -4,6 +4,8 @@
#
obj-$(CONFIG_GENERIC_PHY) += phy-core.o
+obj-$(CONFIG_PHY_AR7100_USB) += phy-ar7100-usb.o
+obj-$(CONFIG_PHY_AR7200_USB) += phy-ar7200-usb.o
obj-$(CONFIG_PHY_LPC18XX_USB_OTG) += phy-lpc18xx-usb-otg.o
obj-$(CONFIG_PHY_XGENE) += phy-xgene.o
obj-$(CONFIG_PHY_PISTACHIO_USB) += phy-pistachio-usb.o
--- /dev/null
+++ b/drivers/phy/phy-ar7100-usb.c
@@ -0,0 +1,140 @@
+/*
+ * Copyright (C) 2018 John Crispin <john@phrozen.org>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/phy/phy.h>
+#include <linux/delay.h>
+#include <linux/reset.h>
+#include <linux/of_gpio.h>
+
+#include <asm/mach-ath79/ath79.h>
+#include <asm/mach-ath79/ar71xx_regs.h>
+
+struct ar7100_usb_phy {
+ struct reset_control *rst_phy;
+ struct reset_control *rst_host;
+ struct reset_control *rst_ohci_dll;
+ void __iomem *io_base;
+ struct phy *phy;
+ int gpio;
+};
+
+static int ar7100_usb_phy_power_off(struct phy *phy)
+{
+ struct ar7100_usb_phy *priv = phy_get_drvdata(phy);
+ int err = 0;
+
+ err |= reset_control_assert(priv->rst_host);
+ err |= reset_control_assert(priv->rst_phy);
+ err |= reset_control_assert(priv->rst_ohci_dll);
+
+ return err;
+}
+
+static int ar7100_usb_phy_power_on(struct phy *phy)
+{
+ struct ar7100_usb_phy *priv = phy_get_drvdata(phy);
+ int err = 0;
+
+ err |= ar7100_usb_phy_power_off(phy);
+ mdelay(100);
+ err |= reset_control_deassert(priv->rst_ohci_dll);
+ err |= reset_control_deassert(priv->rst_phy);
+ err |= reset_control_deassert(priv->rst_host);
+ mdelay(500);
+ iowrite32(0xf0000, priv->io_base + AR71XX_USB_CTRL_REG_CONFIG);
+ iowrite32(0x20c00, priv->io_base + AR71XX_USB_CTRL_REG_FLADJ);
+
+ return err;
+}
+
+static const struct phy_ops ar7100_usb_phy_ops = {
+ .power_on = ar7100_usb_phy_power_on,
+ .power_off = ar7100_usb_phy_power_off,
+ .owner = THIS_MODULE,
+};
+
+static int ar7100_usb_phy_probe(struct platform_device *pdev)
+{
+ struct phy_provider *phy_provider;
+ struct resource *res;
+ struct ar7100_usb_phy *priv;
+
+ priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ priv->io_base = devm_ioremap_resource(&pdev->dev, res);
+ if (IS_ERR(priv->io_base))
+ return PTR_ERR(priv->io_base);
+
+ priv->rst_phy = devm_reset_control_get(&pdev->dev, "usb-phy");
+ if (IS_ERR(priv->rst_phy)) {
+ dev_err(&pdev->dev, "phy reset is missing\n");
+ return PTR_ERR(priv->rst_phy);
+ }
+
+ priv->rst_host = devm_reset_control_get(&pdev->dev, "usb-host");
+ if (IS_ERR(priv->rst_host)) {
+ dev_err(&pdev->dev, "host reset is missing\n");
+ return PTR_ERR(priv->rst_host);
+ }
+
+ priv->rst_ohci_dll = devm_reset_control_get(&pdev->dev, "usb-ohci-dll");
+ if (IS_ERR(priv->rst_ohci_dll)) {
+ dev_err(&pdev->dev, "ohci-dll reset is missing\n");
+ return PTR_ERR(priv->rst_host);
+ }
+
+ priv->phy = devm_phy_create(&pdev->dev, NULL, &ar7100_usb_phy_ops);
+ if (IS_ERR(priv->phy)) {
+ dev_err(&pdev->dev, "failed to create PHY\n");
+ return PTR_ERR(priv->phy);
+ }
+
+ priv->gpio = of_get_gpio(pdev->dev.of_node, 0);
+ if (priv->gpio >= 0) {
+ int ret = devm_gpio_request(&pdev->dev, priv->gpio, dev_name(&pdev->dev));
+
+ if (ret) {
+ dev_err(&pdev->dev, "failed to request gpio\n");
+ return ret;
+ }
+ gpio_export_with_name(priv->gpio, 0, dev_name(&pdev->dev));
+ gpio_set_value(priv->gpio, 1);
+ }
+
+ phy_set_drvdata(priv->phy, priv);
+
+ phy_provider = devm_of_phy_provider_register(&pdev->dev, of_phy_simple_xlate);
+
+
+ return PTR_ERR_OR_ZERO(phy_provider);
+}
+
+static const struct of_device_id ar7100_usb_phy_of_match[] = {
+ { .compatible = "qca,ar7100-usb-phy" },
+ {}
+};
+MODULE_DEVICE_TABLE(of, ar7100_usb_phy_of_match);
+
+static struct platform_driver ar7100_usb_phy_driver = {
+ .probe = ar7100_usb_phy_probe,
+ .driver = {
+ .of_match_table = ar7100_usb_phy_of_match,
+ .name = "ar7100-usb-phy",
+ }
+};
+module_platform_driver(ar7100_usb_phy_driver);
+
+MODULE_DESCRIPTION("ATH79 USB PHY driver");
+MODULE_AUTHOR("Alban Bedel <albeu@free.fr>");
+MODULE_LICENSE("GPL");
--- /dev/null
+++ b/drivers/phy/phy-ar7200-usb.c
@@ -0,0 +1,123 @@
+/*
+ * Copyright (C) 2015 Alban Bedel <albeu@free.fr>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/phy/phy.h>
+#include <linux/reset.h>
+#include <linux/of_gpio.h>
+
+struct ar7200_usb_phy {
+ struct reset_control *rst_phy;
+ struct reset_control *suspend_override;
+ struct phy *phy;
+ int gpio;
+};
+
+static int ar7200_usb_phy_power_on(struct phy *phy)
+{
+ struct ar7200_usb_phy *priv = phy_get_drvdata(phy);
+ int err = 0;
+
+ if (priv->rst_phy)
+ err = reset_control_deassert(priv->rst_phy);
+ if (!err && priv->suspend_override)
+ err = reset_control_assert(priv->suspend_override);
+ if (err && priv->rst_phy)
+ err = reset_control_assert(priv->rst_phy);
+
+ return err;
+}
+
+static int ar7200_usb_phy_power_off(struct phy *phy)
+{
+ struct ar7200_usb_phy *priv = phy_get_drvdata(phy);
+ int err = 0;
+
+ if (priv->suspend_override)
+ err = reset_control_deassert(priv->suspend_override);
+ if (priv->rst_phy)
+ err |= reset_control_assert(priv->rst_phy);
+
+ return err;
+}
+
+static const struct phy_ops ar7200_usb_phy_ops = {
+ .power_on = ar7200_usb_phy_power_on,
+ .power_off = ar7200_usb_phy_power_off,
+ .owner = THIS_MODULE,
+};
+
+static int ar7200_usb_phy_probe(struct platform_device *pdev)
+{
+ struct phy_provider *phy_provider;
+ struct ar7200_usb_phy *priv;
+
+ priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL);
+ if (!priv)
+ return -ENOMEM;
+
+ priv->rst_phy = devm_reset_control_get(&pdev->dev, "usb-phy");
+ if (IS_ERR(priv->rst_phy)) {
+ dev_err(&pdev->dev, "phy reset is missing\n");
+ return PTR_ERR(priv->rst_phy);
+ }
+
+ priv->suspend_override = devm_reset_control_get_optional(
+ &pdev->dev, "usb-suspend-override");
+ if (IS_ERR(priv->suspend_override)) {
+ if (PTR_ERR(priv->suspend_override) == -ENOENT)
+ priv->suspend_override = NULL;
+ else
+ return PTR_ERR(priv->suspend_override);
+ }
+
+ priv->phy = devm_phy_create(&pdev->dev, NULL, &ar7200_usb_phy_ops);
+ if (IS_ERR(priv->phy)) {
+ dev_err(&pdev->dev, "failed to create PHY\n");
+ return PTR_ERR(priv->phy);
+ }
+
+ priv->gpio = of_get_gpio(pdev->dev.of_node, 0);
+ if (priv->gpio >= 0) {
+ int ret = devm_gpio_request(&pdev->dev, priv->gpio, dev_name(&pdev->dev));
+
+ if (ret) {
+ dev_err(&pdev->dev, "failed to request gpio\n");
+ return ret;
+ }
+ gpio_export_with_name(priv->gpio, 0, dev_name(&pdev->dev));
+ gpio_set_value(priv->gpio, 1);
+ }
+
+ phy_set_drvdata(priv->phy, priv);
+
+ phy_provider = devm_of_phy_provider_register(&pdev->dev, of_phy_simple_xlate);
+
+ return PTR_ERR_OR_ZERO(phy_provider);
+}
+
+static const struct of_device_id ar7200_usb_phy_of_match[] = {
+ { .compatible = "qca,ar7200-usb-phy" },
+ {}
+};
+MODULE_DEVICE_TABLE(of, ar7200_usb_phy_of_match);
+
+static struct platform_driver ar7200_usb_phy_driver = {
+ .probe = ar7200_usb_phy_probe,
+ .driver = {
+ .of_match_table = ar7200_usb_phy_of_match,
+ .name = "ar7200-usb-phy",
+ }
+};
+module_platform_driver(ar7200_usb_phy_driver);
+
+MODULE_DESCRIPTION("ATH79 USB PHY driver");
+MODULE_AUTHOR("Alban Bedel <albeu@free.fr>");
+MODULE_LICENSE("GPL");

24
target/linux/ath79/patches-4.19/0005-usb-add-more-OF-quirk-properties.patch Normal file
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@ -0,0 +1,24 @@
From 2201818e5bd33f389beceb3943fdfcf5a698fc5b Mon Sep 17 00:00:00 2001
From: John Crispin <john@phrozen.org>
Date: Tue, 6 Mar 2018 10:01:43 +0100
Subject: [PATCH 05/27] usb: add more OF/quirk properties
Signed-off-by: John Crispin <john@phrozen.org>
---
drivers/usb/host/ehci-platform.c | 5 +++++
1 file changed, 5 insertions(+)
--- a/drivers/usb/host/ehci-platform.c
+++ b/drivers/usb/host/ehci-platform.c
@@ -161,6 +161,11 @@ static int ehci_platform_probe(struct pl
ehci = hcd_to_ehci(hcd);
if (pdata == &ehci_platform_defaults && dev->dev.of_node) {
+ of_property_read_u32(dev->dev.of_node, "caps-offset", &pdata->caps_offset);
+
+ if (of_property_read_bool(dev->dev.of_node, "has-synopsys-hc-bug"))
+ pdata->has_synopsys_hc_bug = 1;
+
if (of_property_read_bool(dev->dev.of_node, "big-endian-regs"))
ehci->big_endian_mmio = 1;

168
target/linux/ath79/patches-4.19/0007-irqchip-irq-ath79-intc-add-irq-cascade-driver-for-QC.patch Normal file
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@ -0,0 +1,168 @@
From f3eacff2310a60348a755c50a8da6fc251fc8587 Mon Sep 17 00:00:00 2001
From: John Crispin <john@phrozen.org>
Date: Tue, 6 Mar 2018 09:55:13 +0100
Subject: [PATCH 07/33] irqchip/irq-ath79-intc: add irq cascade driver for
QCA9556 SoCs
Signed-off-by: John Crispin <john@phrozen.org>
---
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-ath79-intc.c | 142 +++++++++++++++++++++++++++++++++++++++
2 files changed, 143 insertions(+)
create mode 100644 drivers/irqchip/irq-ath79-intc.c
--- a/drivers/irqchip/Makefile
+++ b/drivers/irqchip/Makefile
@@ -3,6 +3,7 @@ obj-$(CONFIG_IRQCHIP) += irqchip.o
obj-$(CONFIG_ALPINE_MSI) += irq-alpine-msi.o
obj-$(CONFIG_ATH79) += irq-ath79-cpu.o
+obj-$(CONFIG_ATH79) += irq-ath79-intc.o
obj-$(CONFIG_ATH79) += irq-ath79-misc.o
obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o
obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2836.o
--- /dev/null
+++ b/drivers/irqchip/irq-ath79-intc.c
@@ -0,0 +1,142 @@
+/*
+ * Atheros AR71xx/AR724x/AR913x specific interrupt handling
+ *
+ * Copyright (C) 2018 John Crispin <john@phrozen.org>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include <linux/interrupt.h>
+#include <linux/irqchip.h>
+#include <linux/of.h>
+#include <linux/of_irq.h>
+#include <linux/irqdomain.h>
+
+#include <asm/irq_cpu.h>
+#include <asm/mach-ath79/ath79.h>
+#include <asm/mach-ath79/ar71xx_regs.h>
+
+#define ATH79_MAX_INTC_CASCADE 3
+
+struct ath79_intc {
+ struct irq_chip chip;
+ u32 irq;
+ u32 pending_mask;
+ u32 int_status;
+ u32 irq_mask[ATH79_MAX_INTC_CASCADE];
+ u32 irq_wb_chan[ATH79_MAX_INTC_CASCADE];
+};
+
+static void ath79_intc_irq_handler(struct irq_desc *desc)
+{
+ struct irq_domain *domain = irq_desc_get_handler_data(desc);
+ struct ath79_intc *intc = domain->host_data;
+ u32 pending;
+
+ pending = ath79_reset_rr(intc->int_status);
+ pending &= intc->pending_mask;
+
+ if (pending) {
+ int i;
+
+ for (i = 0; i < domain->hwirq_max; i++)
+ if (pending & intc->irq_mask[i]) {
+ if (intc->irq_wb_chan[i] != 0xffffffff)
+ ath79_ddr_wb_flush(intc->irq_wb_chan[i]);
+ generic_handle_irq(irq_find_mapping(domain, i));
+ }
+ } else {
+ spurious_interrupt();
+ }
+}
+
+static void ath79_intc_irq_enable(struct irq_data *d)
+{
+ struct ath79_intc *intc = d->domain->host_data;
+ enable_irq(intc->irq);
+}
+
+static void ath79_intc_irq_disable(struct irq_data *d)
+{
+ struct ath79_intc *intc = d->domain->host_data;
+ disable_irq(intc->irq);
+}
+
+static int ath79_intc_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw)
+{
+ struct ath79_intc *intc = d->host_data;
+
+ irq_set_chip_and_handler(irq, &intc->chip, handle_level_irq);
+
+ return 0;
+}
+
+static const struct irq_domain_ops ath79_irq_domain_ops = {
+ .xlate = irq_domain_xlate_onecell,
+ .map = ath79_intc_map,
+};
+
+static int __init ath79_intc_of_init(
+ struct device_node *node, struct device_node *parent)
+{
+ struct irq_domain *domain;
+ struct ath79_intc *intc;
+ int cnt, cntwb, i, err;
+
+ cnt = of_property_count_u32_elems(node, "qca,pending-bits");
+ if (cnt > ATH79_MAX_INTC_CASCADE)
+ panic("Too many INTC pending bits\n");
+
+ intc = kzalloc(sizeof(*intc), GFP_KERNEL);
+ if (!intc)
+ panic("Failed to allocate INTC memory\n");
+ intc->chip = dummy_irq_chip;
+ intc->chip.name = "INTC";
+ intc->chip.irq_disable = ath79_intc_irq_disable;
+ intc->chip.irq_enable = ath79_intc_irq_enable;
+
+ if (of_property_read_u32(node, "qca,int-status-addr", &intc->int_status) < 0) {
+ panic("Missing address of interrupt status register\n");
+ }
+
+ of_property_read_u32_array(node, "qca,pending-bits", intc->irq_mask, cnt);
+ for (i = 0; i < cnt; i++) {
+ intc->pending_mask |= intc->irq_mask[i];
+ intc->irq_wb_chan[i] = 0xffffffff;
+ }
+
+ cntwb = of_count_phandle_with_args(
+ node, "qca,ddr-wb-channels", "#qca,ddr-wb-channel-cells");
+
+ for (i = 0; i < cntwb; i++) {
+ struct of_phandle_args args;
+ u32 irq = i;
+
+ of_property_read_u32_index(
+ node, "qca,ddr-wb-channel-interrupts", i, &irq);
+ if (irq >= ATH79_MAX_INTC_CASCADE)
+ continue;
+
+ err = of_parse_phandle_with_args(
+ node, "qca,ddr-wb-channels",
+ "#qca,ddr-wb-channel-cells",
+ i, &args);
+ if (err)
+ return err;
+
+ intc->irq_wb_chan[irq] = args.args[0];
+ }
+
+ intc->irq = irq_of_parse_and_map(node, 0);
+ if (!intc->irq)
+ panic("Failed to get INTC IRQ");
+
+ domain = irq_domain_add_linear(node, cnt, &ath79_irq_domain_ops, intc);
+ irq_set_chained_handler_and_data(intc->irq, ath79_intc_irq_handler, domain);
+
+ return 0;
+}
+IRQCHIP_DECLARE(ath79_intc, "qca,ar9340-intc",
+ ath79_intc_of_init);

23
target/linux/ath79/patches-4.19/0008-irqchip-irq-ath79-cpu-drop-OF-init-helper.patch Normal file
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@ -0,0 +1,23 @@
From e029f998594f151008ecbfa024e2957edd2a5189 Mon Sep 17 00:00:00 2001
From: John Crispin <john@phrozen.org>
Date: Tue, 6 Mar 2018 09:58:19 +0100
Subject: [PATCH 08/33] irqchip/irq-ath79-cpu: drop !OF init helper
Signed-off-by: John Crispin <john@phrozen.org>
---
drivers/irqchip/irq-ath79-cpu.c | 7 -------
1 file changed, 7 deletions(-)
--- a/drivers/irqchip/irq-ath79-cpu.c
+++ b/drivers/irqchip/irq-ath79-cpu.c
@@ -88,10 +88,3 @@ static int __init ar79_cpu_intc_of_init(
}
IRQCHIP_DECLARE(ar79_cpu_intc, "qca,ar7100-cpu-intc",
ar79_cpu_intc_of_init);
-
-void __init ath79_cpu_irq_init(unsigned irq_wb_chan2, unsigned irq_wb_chan3)
-{
- irq_wb_chan[2] = irq_wb_chan2;
- irq_wb_chan[3] = irq_wb_chan3;
- mips_cpu_irq_init();
-}

24
target/linux/ath79/patches-4.19/0011-MIPS-ath79-select-the-PINCTRL-subsystem.patch Normal file
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@ -0,0 +1,24 @@
From 0c8856211d26f84277f7fcb0b9595e5c646bc464 Mon Sep 17 00:00:00 2001
From: John Crispin <john@phrozen.org>
Date: Tue, 6 Mar 2018 10:00:55 +0100
Subject: [PATCH 11/33] MIPS: ath79: select the PINCTRL subsystem
The pinmux on QCA SoCs is controlled by a single register. The
"pinctrl-single" driver can be used but requires the target
to select PINCTRL.
Signed-off-by: John Crispin <john@phrozen.org>
---
arch/mips/Kconfig | 1 +
1 file changed, 1 insertion(+)
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -288,6 +288,7 @@ config BCM63XX
select SYS_HAS_EARLY_PRINTK
select SWAP_IO_SPACE
select GPIOLIB
+ select PINCTRL
select HAVE_CLK
select MIPS_L1_CACHE_SHIFT_4
select CLKDEV_LOOKUP

57
target/linux/ath79/patches-4.19/0017-dt-bindings-PCI-qcom-ar7100-adds-binding-doc.patch Normal file
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@ -0,0 +1,57 @@
From 4a4f869ec58ed8910b9b2e68d0eee50957e9bb20 Mon Sep 17 00:00:00 2001
From: John Crispin <john@phrozen.org>
Date: Mon, 25 Jun 2018 15:52:10 +0200
Subject: [PATCH 17/33] dt-bindings: PCI: qcom,ar7100: adds binding doc
With the driver being converted from platform_data to pure OF, we need to
also add some docs.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: John Crispin <john@phrozen.org>
---
.../devicetree/bindings/pci/qcom,ar7100-pci.txt | 38 ++++++++++++++++++++++
1 file changed, 38 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pci/qcom,ar7100-pci.txt
--- /dev/null
+++ b/Documentation/devicetree/bindings/pci/qcom,ar7100-pci.txt
@@ -0,0 +1,38 @@
+* Qualcomm Atheros AR7100 PCI express root complex
+
+Required properties:
+- compatible: should contain "qcom,ar7100-pci" to identify the core.
+- reg: Should contain the register ranges as listed in the reg-names property.
+- reg-names: Definition: Must include the following entries
+ - "cfg_base" IO Memory
+- #address-cells: set to <3>
+- #size-cells: set to <2>
+- ranges: ranges for the PCI memory and I/O regions
+- interrupt-map-mask and interrupt-map: standard PCI
+ properties to define the mapping of the PCIe interface to interrupt
+ numbers.
+- #interrupt-cells: set to <1>
+- interrupt-controller: define to enable the builtin IRQ cascade.
+
+Optional properties:
+- interrupt-parent: phandle to the MIPS IRQ controller
+
+* Example for ar7100
+ pcie-controller@180c0000 {
+ compatible = "qca,ar7100-pci";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ bus-range = <0x0 0x0>;
+ reg = <0x17010000 0x100>;
+ reg-names = "cfg_base";
+ ranges = <0x2000000 0 0x10000000 0x10000000 0 0x07000000
+ 0x1000000 0 0x00000000 0x00000000 0 0x00000001>;
+ interrupt-parent = <&cpuintc>;
+ interrupts = <2>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-map-mask = <0 0 0 1>;
+ interrupt-map = <0 0 0 0 &pcie0 0>;
+ };

202
target/linux/ath79/patches-4.19/0018-MIPS-pci-ar71xx-convert-to-OF.patch Normal file
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@ -0,0 +1,202 @@
From 1855ab6b1d27f5b38a648baf57ff6a534afec26d Mon Sep 17 00:00:00 2001
From: John Crispin <john@phrozen.org>
Date: Sat, 23 Jun 2018 15:07:23 +0200
Subject: [PATCH 18/33] MIPS: pci-ar71xx: convert to OF
With the ath79 target getting converted to pure OF, we can drop all the
platform data code and add the missing OF bits to the driver. We also add
a irq domain for the PCI/e controllers cascade, thus making it usable from
dts files.
Signed-off-by: John Crispin <john@phrozen.org>
---
arch/mips/pci/pci-ar71xx.c | 82 +++++++++++++++++++++++-----------------------
1 file changed, 41 insertions(+), 41 deletions(-)
--- a/arch/mips/pci/pci-ar71xx.c
+++ b/arch/mips/pci/pci-ar71xx.c
@@ -18,8 +18,11 @@
#include <linux/pci.h>
#include <linux/pci_regs.h>
#include <linux/interrupt.h>
+#include <linux/irqchip/chained_irq.h>
#include <linux/init.h>
#include <linux/platform_device.h>
+#include <linux/of_irq.h>
+#include <linux/of_pci.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include <asm/mach-ath79/ath79.h>
@@ -49,12 +52,13 @@
#define AR71XX_PCI_IRQ_COUNT 5
struct ar71xx_pci_controller {
+ struct device_node *np;
void __iomem *cfg_base;
int irq;
- int irq_base;
struct pci_controller pci_ctrl;
struct resource io_res;
struct resource mem_res;
+ struct irq_domain *domain;
};
/* Byte lane enable bits */
@@ -228,29 +232,30 @@ static struct pci_ops ar71xx_pci_ops = {
static void ar71xx_pci_irq_handler(struct irq_desc *desc)
{
- struct ar71xx_pci_controller *apc;
void __iomem *base = ath79_reset_base;
+ struct irq_chip *chip = irq_desc_get_chip(desc);
+ struct ar71xx_pci_controller *apc = irq_desc_get_handler_data(desc);
u32 pending;
- apc = irq_desc_get_handler_data(desc);
-
+ chained_irq_enter(chip, desc);
pending = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_STATUS) &
__raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
if (pending & AR71XX_PCI_INT_DEV0)
- generic_handle_irq(apc->irq_base + 0);
+ generic_handle_irq(irq_linear_revmap(apc->domain, 1));
else if (pending & AR71XX_PCI_INT_DEV1)
- generic_handle_irq(apc->irq_base + 1);
+ generic_handle_irq(irq_linear_revmap(apc->domain, 2));
else if (pending & AR71XX_PCI_INT_DEV2)
- generic_handle_irq(apc->irq_base + 2);
+ generic_handle_irq(irq_linear_revmap(apc->domain, 3));
else if (pending & AR71XX_PCI_INT_CORE)
- generic_handle_irq(apc->irq_base + 4);
+ generic_handle_irq(irq_linear_revmap(apc->domain, 4));
else
spurious_interrupt();
+ chained_irq_exit(chip, desc);
}
static void ar71xx_pci_irq_unmask(struct irq_data *d)
@@ -261,7 +266,7 @@ static void ar71xx_pci_irq_unmask(struct
u32 t;
apc = irq_data_get_irq_chip_data(d);
- irq = d->irq - apc->irq_base;
+ irq = irq_linear_revmap(apc->domain, d->irq);
t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
__raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE);
@@ -278,7 +283,7 @@ static void ar71xx_pci_irq_mask(struct i
u32 t;
apc = irq_data_get_irq_chip_data(d);
- irq = d->irq - apc->irq_base;
+ irq = irq_linear_revmap(apc->domain, d->irq);
t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE);
__raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE);
@@ -294,24 +299,31 @@ static struct irq_chip ar71xx_pci_irq_ch
.irq_mask_ack = ar71xx_pci_irq_mask,
};
+static int ar71xx_pci_irq_map(struct irq_domain *d,
+ unsigned int irq, irq_hw_number_t hw)
+{
+ struct ar71xx_pci_controller *apc = d->host_data;
+
+ irq_set_chip_and_handler(irq, &ar71xx_pci_irq_chip, handle_level_irq);
+ irq_set_chip_data(irq, apc);
+
+ return 0;
+}
+
+static const struct irq_domain_ops ar71xx_pci_domain_ops = {
+ .xlate = irq_domain_xlate_onecell,
+ .map = ar71xx_pci_irq_map,
+};
+
static void ar71xx_pci_irq_init(struct ar71xx_pci_controller *apc)
{
void __iomem *base = ath79_reset_base;
- int i;
__raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_ENABLE);
__raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_STATUS);
- BUILD_BUG_ON(ATH79_PCI_IRQ_COUNT < AR71XX_PCI_IRQ_COUNT);
-
- apc->irq_base = ATH79_PCI_IRQ_BASE;
- for (i = apc->irq_base;
- i < apc->irq_base + AR71XX_PCI_IRQ_COUNT; i++) {
- irq_set_chip_and_handler(i, &ar71xx_pci_irq_chip,
- handle_level_irq);
- irq_set_chip_data(i, apc);
- }
-
+ apc->domain = irq_domain_add_linear(apc->np, AR71XX_PCI_IRQ_COUNT,
+ &ar71xx_pci_domain_ops, apc);
irq_set_chained_handler_and_data(apc->irq, ar71xx_pci_irq_handler,
apc);
}
@@ -328,6 +340,11 @@ static void ar71xx_pci_reset(void)
mdelay(100);
}
+static const struct of_device_id ar71xx_pci_ids[] = {
+ { .compatible = "qca,ar7100-pci" },
+ {},
+};
+
static int ar71xx_pci_probe(struct platform_device *pdev)
{
struct ar71xx_pci_controller *apc;
@@ -348,26 +365,6 @@ static int ar71xx_pci_probe(struct platf
if (apc->irq < 0)
return -EINVAL;
- res = platform_get_resource_byname(pdev, IORESOURCE_IO, "io_base");
- if (!res)
- return -EINVAL;
-
- apc->io_res.parent = res;
- apc->io_res.name = "PCI IO space";
- apc->io_res.start = res->start;
- apc->io_res.end = res->end;
- apc->io_res.flags = IORESOURCE_IO;
-
- res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mem_base");
- if (!res)
- return -EINVAL;
-
- apc->mem_res.parent = res;
- apc->mem_res.name = "PCI memory space";
- apc->mem_res.start = res->start;
- apc->mem_res.end = res->end;
- apc->mem_res.flags = IORESOURCE_MEM;
-
ar71xx_pci_reset();
/* setup COMMAND register */
@@ -380,9 +377,11 @@ static int ar71xx_pci_probe(struct platf
ar71xx_pci_irq_init(apc);
+ apc->np = pdev->dev.of_node;
apc->pci_ctrl.pci_ops = &ar71xx_pci_ops;
apc->pci_ctrl.mem_resource = &apc->mem_res;
apc->pci_ctrl.io_resource = &apc->io_res;
+ pci_load_of_ranges(&apc->pci_ctrl, pdev->dev.of_node);
register_pci_controller(&apc->pci_ctrl);
@@ -393,6 +392,7 @@ static struct platform_driver ar71xx_pci
.probe = ar71xx_pci_probe,
.driver = {
.name = "ar71xx-pci",
+ .of_match_table = of_match_ptr(ar71xx_pci_ids),
},
};

61
target/linux/ath79/patches-4.19/0019-dt-bindings-PCI-qcom-ar7240-adds-binding-doc.patch Normal file
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@ -0,0 +1,61 @@
From ea27764bc3ef2a05decf3ae05edffc289cd0d93c Mon Sep 17 00:00:00 2001
From: John Crispin <john@phrozen.org>
Date: Mon, 25 Jun 2018 15:52:02 +0200
Subject: [PATCH 19/33] dt-bindings: PCI: qcom,ar7240: adds binding doc
With the driver being converted from platform_data to pure OF, we need to
also add some docs.
Cc: Rob Herring <robh+dt@kernel.org>
Cc: devicetree@vger.kernel.org
Signed-off-by: John Crispin <john@phrozen.org>
---
.../devicetree/bindings/pci/qcom,ar7240-pci.txt | 42 ++++++++++++++++++++++
1 file changed, 42 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pci/qcom,ar7240-pci.txt
--- /dev/null
+++ b/Documentation/devicetree/bindings/pci/qcom,ar7240-pci.txt
@@ -0,0 +1,42 @@
+* Qualcomm Atheros AR724X PCI express root complex
+
+Required properties:
+- compatible: should contain "qcom,ar7240-pci" to identify the core.
+- reg: Should contain the register ranges as listed in the reg-names property.
+- reg-names: Definition: Must include the following entries
+ - "crp_base" Configuration registers
+ - "ctrl_base" Control registers
+ - "cfg_base" IO Memory
+- #address-cells: set to <3>
+- #size-cells: set to <2>
+- ranges: ranges for the PCI memory and I/O regions
+- interrupt-map-mask and interrupt-map: standard PCI
+ properties to define the mapping of the PCIe interface to interrupt
+ numbers.
+- #interrupt-cells: set to <1>
+- interrupt-parent: phandle to the MIPS IRQ controller
+
+Optional properties:
+- interrupt-controller: define to enable the builtin IRQ cascade.
+
+* Example for qca9557
+ pcie-controller@180c0000 {
+ compatible = "qcom,ar7240-pci";
+ #address-cells = <3>;
+ #size-cells = <2>;
+ bus-range = <0x0 0x0>;
+ reg = <0x180c0000 0x1000>,
+ <0x180f0000 0x100>,
+ <0x14000000 0x1000>;
+ reg-names = "crp_base", "ctrl_base", "cfg_base";
+ ranges = <0x2000000 0 0x10000000 0x10000000 0 0x04000000
+ 0x1000000 0 0x00000000 0x00000000 0 0x00000001>;
+ interrupt-parent = <&intc2>;
+ interrupts = <1>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-map-mask = <0 0 0 1>;
+ interrupt-map = <0 0 0 0 &pcie0 0>;
+ };

205
target/linux/ath79/patches-4.19/0020-MIPS-pci-ar724x-convert-to-OF.patch Normal file
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@ -0,0 +1,205 @@
From a522ee0199d5d3ea114ca2e211f6ac398d3e8e0b Mon Sep 17 00:00:00 2001
From: John Crispin <john@phrozen.org>
Date: Sat, 23 Jun 2018 15:07:37 +0200
Subject: [PATCH 20/33] MIPS: pci-ar724x: convert to OF
With the ath79 target getting converted to pure OF, we can drop all the
platform data code and add the missing OF bits to the driver. We also add
a irq domain for the PCI/e controllers cascade, thus making it usable from
dts files.
Signed-off-by: John Crispin <john@phrozen.org>
---
arch/mips/pci/pci-ar724x.c | 88 ++++++++++++++++++++++------------------------
1 file changed, 42 insertions(+), 46 deletions(-)
--- a/arch/mips/pci/pci-ar724x.c
+++ b/arch/mips/pci/pci-ar724x.c
@@ -14,8 +14,11 @@
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/platform_device.h>
+#include <linux/irqchip/chained_irq.h>
#include <asm/mach-ath79/ath79.h>
#include <asm/mach-ath79/ar71xx_regs.h>
+#include <linux/of_irq.h>
+#include <linux/of_pci.h>
#define AR724X_PCI_REG_APP 0x00
#define AR724X_PCI_REG_RESET 0x18
@@ -45,17 +48,20 @@ struct ar724x_pci_controller {
void __iomem *crp_base;
int irq;
- int irq_base;
bool link_up;
bool bar0_is_cached;
u32 bar0_value;
+ struct device_node *np;
struct pci_controller pci_controller;
+ struct irq_domain *domain;
struct resource io_res;
struct resource mem_res;
};
+static struct irq_chip ar724x_pci_irq_chip;
+
static inline bool ar724x_pci_check_link(struct ar724x_pci_controller *apc)
{
u32 reset;
@@ -231,35 +237,31 @@ static struct pci_ops ar724x_pci_ops = {
static void ar724x_pci_irq_handler(struct irq_desc *desc)
{
- struct ar724x_pci_controller *apc;
- void __iomem *base;
+ struct irq_chip *chip = irq_desc_get_chip(desc);
+ struct ar724x_pci_controller *apc = irq_desc_get_handler_data(desc);
u32 pending;
- apc = irq_desc_get_handler_data(desc);
- base = apc->ctrl_base;
-
- pending = __raw_readl(base + AR724X_PCI_REG_INT_STATUS) &
- __raw_readl(base + AR724X_PCI_REG_INT_MASK);
+ chained_irq_enter(chip, desc);
+ pending = __raw_readl(apc->ctrl_base + AR724X_PCI_REG_INT_STATUS) &
+ __raw_readl(apc->ctrl_base + AR724X_PCI_REG_INT_MASK);
if (pending & AR724X_PCI_INT_DEV0)
- generic_handle_irq(apc->irq_base + 0);
-
+ generic_handle_irq(irq_linear_revmap(apc->domain, 1));
else
spurious_interrupt();
+ chained_irq_exit(chip, desc);
}
static void ar724x_pci_irq_unmask(struct irq_data *d)
{
struct ar724x_pci_controller *apc;
void __iomem *base;
- int offset;
u32 t;
apc = irq_data_get_irq_chip_data(d);
base = apc->ctrl_base;
- offset = apc->irq_base - d->irq;
- switch (offset) {
+ switch (irq_linear_revmap(apc->domain, d->irq)) {
case 0:
t = __raw_readl(base + AR724X_PCI_REG_INT_MASK);
__raw_writel(t | AR724X_PCI_INT_DEV0,
@@ -273,14 +275,12 @@ static void ar724x_pci_irq_mask(struct i
{
struct ar724x_pci_controller *apc;
void __iomem *base;
- int offset;
u32 t;
apc = irq_data_get_irq_chip_data(d);
base = apc->ctrl_base;
- offset = apc->irq_base - d->irq;
- switch (offset) {
+ switch (irq_linear_revmap(apc->domain, d->irq)) {
case 0:
t = __raw_readl(base + AR724X_PCI_REG_INT_MASK);
__raw_writel(t & ~AR724X_PCI_INT_DEV0,
@@ -305,26 +305,34 @@ static struct irq_chip ar724x_pci_irq_ch
.irq_mask_ack = ar724x_pci_irq_mask,
};
+static int ar724x_pci_irq_map(struct irq_domain *d,
+ unsigned int irq, irq_hw_number_t hw)
+{
+ struct ar724x_pci_controller *apc = d->host_data;
+
+ irq_set_chip_and_handler(irq, &ar724x_pci_irq_chip, handle_level_irq);
+ irq_set_chip_data(irq, apc);
+
+ return 0;
+}
+
+static const struct irq_domain_ops ar724x_pci_domain_ops = {
+ .xlate = irq_domain_xlate_onecell,
+ .map = ar724x_pci_irq_map,
+};
+
static void ar724x_pci_irq_init(struct ar724x_pci_controller *apc,
int id)
{
void __iomem *base;
- int i;
base = apc->ctrl_base;
__raw_writel(0, base + AR724X_PCI_REG_INT_MASK);
__raw_writel(0, base + AR724X_PCI_REG_INT_STATUS);
- apc->irq_base = ATH79_PCI_IRQ_BASE + (id * AR724X_PCI_IRQ_COUNT);
-
- for (i = apc->irq_base;
- i < apc->irq_base + AR724X_PCI_IRQ_COUNT; i++) {
- irq_set_chip_and_handler(i, &ar724x_pci_irq_chip,
- handle_level_irq);
- irq_set_chip_data(i, apc);
- }
-
+ apc->domain = irq_domain_add_linear(apc->np, 2,
+ &ar724x_pci_domain_ops, apc);
irq_set_chained_handler_and_data(apc->irq, ar724x_pci_irq_handler,
apc);
}
@@ -394,29 +402,11 @@ static int ar724x_pci_probe(struct platf
if (apc->irq < 0)
return -EINVAL;
- res = platform_get_resource_byname(pdev, IORESOURCE_IO, "io_base");
- if (!res)
- return -EINVAL;
-
- apc->io_res.parent = res;
- apc->io_res.name = "PCI IO space";
- apc->io_res.start = res->start;
- apc->io_res.end = res->end;
- apc->io_res.flags = IORESOURCE_IO;
-
- res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mem_base");
- if (!res)
- return -EINVAL;
-
- apc->mem_res.parent = res;
- apc->mem_res.name = "PCI memory space";
- apc->mem_res.start = res->start;
- apc->mem_res.end = res->end;
- apc->mem_res.flags = IORESOURCE_MEM;
-
+ apc->np = pdev->dev.of_node;
apc->pci_controller.pci_ops = &ar724x_pci_ops;
apc->pci_controller.io_resource = &apc->io_res;
apc->pci_controller.mem_resource = &apc->mem_res;
+ pci_load_of_ranges(&apc->pci_controller, pdev->dev.of_node);
/*
* Do the full PCIE Root Complex Initialization Sequence if the PCIe
@@ -438,10 +428,16 @@ static int ar724x_pci_probe(struct platf
return 0;
}
+static const struct of_device_id ar724x_pci_ids[] = {
+ { .compatible = "qcom,ar7240-pci" },
+ {},
+};
+
static struct platform_driver ar724x_pci_driver = {
.probe = ar724x_pci_probe,
.driver = {
.name = "ar724x-pci",
+ .of_match_table = of_match_ptr(ar724x_pci_ids),
},
};

243
target/linux/ath79/patches-4.19/0021-MIPS-ath79-add-helpers-for-setting-clocks-and-expose.patch Normal file
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@ -0,0 +1,243 @@
From 288a8eb0d41f09fda242e05f8a7bd1f5b3489477 Mon Sep 17 00:00:00 2001
From: Felix Fietkau <nbd@nbd.name>
Date: Tue, 6 Mar 2018 13:19:26 +0100
Subject: [PATCH 21/33] MIPS: ath79: add helpers for setting clocks and expose
the ref clock
Preparation for transitioning the legacy clock setup code over
to OF.
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Signed-off-by: John Crispin <john@phrozen.org>
---
arch/mips/ath79/clock.c | 128 ++++++++++++++++++----------------
include/dt-bindings/clock/ath79-clk.h | 3 +-
2 files changed, 68 insertions(+), 63 deletions(-)
--- a/arch/mips/ath79/clock.c
+++ b/arch/mips/ath79/clock.c
@@ -37,20 +37,46 @@ static struct clk_onecell_data clk_data
.clk_num = ARRAY_SIZE(clks),
};
-static struct clk *__init ath79_add_sys_clkdev(
- const char *id, unsigned long rate)
+static const char * const clk_names[ATH79_CLK_END] = {
+ [ATH79_CLK_CPU] = "cpu",
+ [ATH79_CLK_DDR] = "ddr",
+ [ATH79_CLK_AHB] = "ahb",
+ [ATH79_CLK_REF] = "ref",
+};
+
+static const char * __init ath79_clk_name(int type)
{
- struct clk *clk;
- int err;
+ BUG_ON(type >= ARRAY_SIZE(clk_names) || !clk_names[type]);
+ return clk_names[type];
+}
- clk = clk_register_fixed_rate(NULL, id, NULL, 0, rate);
+static void __init __ath79_set_clk(int type, const char *name, struct clk *clk)
+{
if (IS_ERR(clk))
- panic("failed to allocate %s clock structure", id);
+ panic("failed to allocate %s clock structure", clk_names[type]);
- err = clk_register_clkdev(clk, id, NULL);
- if (err)
- panic("unable to register %s clock device", id);
+ clks[type] = clk;
+ clk_register_clkdev(clk, name, NULL);
+}
+static struct clk * __init ath79_set_clk(int type, unsigned long rate)
+{
+ const char *name = ath79_clk_name(type);
+ struct clk *clk;
+
+ clk = clk_register_fixed_rate(NULL, name, NULL, 0, rate);
+ __ath79_set_clk(type, name, clk);
+ return clk;
+}
+
+static struct clk * __init ath79_set_ff_clk(int type, const char *parent,
+ unsigned int mult, unsigned int div)
+{
+ const char *name = ath79_clk_name(type);
+ struct clk *clk;
+
+ clk = clk_register_fixed_factor(NULL, name, parent, 0, mult, div);
+ __ath79_set_clk(type, name, clk);
return clk;
}
@@ -80,27 +106,15 @@ static void __init ar71xx_clocks_init(vo
div = (((pll >> AR71XX_AHB_DIV_SHIFT) & AR71XX_AHB_DIV_MASK) + 1) * 2;
ahb_rate = cpu_rate / div;
- ath79_add_sys_clkdev("ref", ref_rate);
- clks[ATH79_CLK_CPU] = ath79_add_sys_clkdev("cpu", cpu_rate);
- clks[ATH79_CLK_DDR] = ath79_add_sys_clkdev("ddr", ddr_rate);
- clks[ATH79_CLK_AHB] = ath79_add_sys_clkdev("ahb", ahb_rate);
+ ath79_set_clk(ATH79_CLK_REF, ref_rate);
+ ath79_set_clk(ATH79_CLK_CPU, cpu_rate);
+ ath79_set_clk(ATH79_CLK_DDR, ddr_rate);
+ ath79_set_clk(ATH79_CLK_AHB, ahb_rate);
clk_add_alias("wdt", NULL, "ahb", NULL);
clk_add_alias("uart", NULL, "ahb", NULL);
}
-static struct clk * __init ath79_reg_ffclk(const char *name,
- const char *parent_name, unsigned int mult, unsigned int div)
-{
- struct clk *clk;
-
- clk = clk_register_fixed_factor(NULL, name, parent_name, 0, mult, div);
- if (IS_ERR(clk))
- panic("failed to allocate %s clock structure", name);
-
- return clk;
-}
-
static void __init ar724x_clk_init(struct clk *ref_clk, void __iomem *pll_base)
{
u32 pll;
@@ -114,24 +128,19 @@ static void __init ar724x_clk_init(struc
ddr_div = ((pll >> AR724X_DDR_DIV_SHIFT) & AR724X_DDR_DIV_MASK) + 1;
ahb_div = (((pll >> AR724X_AHB_DIV_SHIFT) & AR724X_AHB_DIV_MASK) + 1) * 2;
- clks[ATH79_CLK_CPU] = ath79_reg_ffclk("cpu", "ref", mult, div);
- clks[ATH79_CLK_DDR] = ath79_reg_ffclk("ddr", "ref", mult, div * ddr_div);
- clks[ATH79_CLK_AHB] = ath79_reg_ffclk("ahb", "ref", mult, div * ahb_div);
+ ath79_set_ff_clk(ATH79_CLK_CPU, "ref", mult, div);
+ ath79_set_ff_clk(ATH79_CLK_DDR, "ref", mult, div * ddr_div);
+ ath79_set_ff_clk(ATH79_CLK_AHB, "ref", mult, div * ahb_div);
}
static void __init ar724x_clocks_init(void)
{
struct clk *ref_clk;
- ref_clk = ath79_add_sys_clkdev("ref", AR724X_BASE_FREQ);
+ ref_clk = ath79_set_clk(ATH79_CLK_REF, AR724X_BASE_FREQ);
ar724x_clk_init(ref_clk, ath79_pll_base);
- /* just make happy plat_time_init() from arch/mips/ath79/setup.c */
- clk_register_clkdev(clks[ATH79_CLK_CPU], "cpu", NULL);
- clk_register_clkdev(clks[ATH79_CLK_DDR], "ddr", NULL);
- clk_register_clkdev(clks[ATH79_CLK_AHB], "ahb", NULL);
-
clk_add_alias("wdt", NULL, "ahb", NULL);
clk_add_alias("uart", NULL, "ahb", NULL);
}
@@ -186,12 +195,12 @@ static void __init ar9330_clk_init(struc
AR933X_PLL_CLOCK_CTRL_AHB_DIV_MASK) + 1;
}
- clks[ATH79_CLK_CPU] = ath79_reg_ffclk("cpu", "ref",
- ninit_mul, ref_div * out_div * cpu_div);
- clks[ATH79_CLK_DDR] = ath79_reg_ffclk("ddr", "ref",
- ninit_mul, ref_div * out_div * ddr_div);
- clks[ATH79_CLK_AHB] = ath79_reg_ffclk("ahb", "ref",
- ninit_mul, ref_div * out_div * ahb_div);
+ ath79_set_ff_clk(ATH79_CLK_CPU, "ref", ninit_mul,
+ ref_div * out_div * cpu_div);
+ ath79_set_ff_clk(ATH79_CLK_DDR, "ref", ninit_mul,
+ ref_div * out_div * ddr_div);
+ ath79_set_ff_clk(ATH79_CLK_AHB, "ref", ninit_mul,
+ ref_div * out_div * ahb_div);
}
static void __init ar933x_clocks_init(void)
@@ -206,15 +215,10 @@ static void __init ar933x_clocks_init(vo
else
ref_rate = (25 * 1000 * 1000);
- ref_clk = ath79_add_sys_clkdev("ref", ref_rate);
+ ref_clk = ath79_set_clk(ATH79_CLK_REF, ref_rate);
ar9330_clk_init(ref_clk, ath79_pll_base);
- /* just make happy plat_time_init() from arch/mips/ath79/setup.c */
- clk_register_clkdev(clks[ATH79_CLK_CPU], "cpu", NULL);
- clk_register_clkdev(clks[ATH79_CLK_DDR], "ddr", NULL);
- clk_register_clkdev(clks[ATH79_CLK_AHB], "ahb", NULL);
-
clk_add_alias("wdt", NULL, "ahb", NULL);
clk_add_alias("uart", NULL, "ref", NULL);
}
@@ -344,10 +348,10 @@ static void __init ar934x_clocks_init(vo
else
ahb_rate = cpu_pll / (postdiv + 1);
- ath79_add_sys_clkdev("ref", ref_rate);
- clks[ATH79_CLK_CPU] = ath79_add_sys_clkdev("cpu", cpu_rate);
- clks[ATH79_CLK_DDR] = ath79_add_sys_clkdev("ddr", ddr_rate);
- clks[ATH79_CLK_AHB] = ath79_add_sys_clkdev("ahb", ahb_rate);
+ ath79_set_clk(ATH79_CLK_REF, ref_rate);
+ ath79_set_clk(ATH79_CLK_CPU, cpu_rate);
+ ath79_set_clk(ATH79_CLK_DDR, ddr_rate);
+ ath79_set_clk(ATH79_CLK_AHB, ahb_rate);
clk_add_alias("wdt", NULL, "ref", NULL);
clk_add_alias("uart", NULL, "ref", NULL);
@@ -431,10 +435,10 @@ static void __init qca953x_clocks_init(v
else
ahb_rate = cpu_pll / (postdiv + 1);
- ath79_add_sys_clkdev("ref", ref_rate);
- ath79_add_sys_clkdev("cpu", cpu_rate);
- ath79_add_sys_clkdev("ddr", ddr_rate);
- ath79_add_sys_clkdev("ahb", ahb_rate);
+ ath79_set_clk(ATH79_CLK_REF, ref_rate);
+ ath79_set_clk(ATH79_CLK_CPU, cpu_rate);
+ ath79_set_clk(ATH79_CLK_DDR, ddr_rate);
+ ath79_set_clk(ATH79_CLK_AHB, ahb_rate);
clk_add_alias("wdt", NULL, "ref", NULL);
clk_add_alias("uart", NULL, "ref", NULL);
@@ -516,10 +520,10 @@ static void __init qca955x_clocks_init(v
else
ahb_rate = cpu_pll / (postdiv + 1);
- ath79_add_sys_clkdev("ref", ref_rate);
- clks[ATH79_CLK_CPU] = ath79_add_sys_clkdev("cpu", cpu_rate);
- clks[ATH79_CLK_DDR] = ath79_add_sys_clkdev("ddr", ddr_rate);
- clks[ATH79_CLK_AHB] = ath79_add_sys_clkdev("ahb", ahb_rate);
+ ath79_set_clk(ATH79_CLK_REF, ref_rate);
+ ath79_set_clk(ATH79_CLK_CPU, cpu_rate);
+ ath79_set_clk(ATH79_CLK_DDR, ddr_rate);
+ ath79_set_clk(ATH79_CLK_AHB, ahb_rate);
clk_add_alias("wdt", NULL, "ref", NULL);
clk_add_alias("uart", NULL, "ref", NULL);
@@ -620,10 +624,10 @@ static void __init qca956x_clocks_init(v
else
ahb_rate = cpu_pll / (postdiv + 1);
- ath79_add_sys_clkdev("ref", ref_rate);
- ath79_add_sys_clkdev("cpu", cpu_rate);
- ath79_add_sys_clkdev("ddr", ddr_rate);
- ath79_add_sys_clkdev("ahb", ahb_rate);
+ ath79_set_clk(ATH79_CLK_REF, ref_rate);
+ ath79_set_clk(ATH79_CLK_CPU, cpu_rate);
+ ath79_set_clk(ATH79_CLK_DDR, ddr_rate);
+ ath79_set_clk(ATH79_CLK_AHB, ahb_rate);
clk_add_alias("wdt", NULL, "ref", NULL);
clk_add_alias("uart", NULL, "ref", NULL);
--- a/include/dt-bindings/clock/ath79-clk.h
+++ b/include/dt-bindings/clock/ath79-clk.h
@@ -13,7 +13,8 @@
#define ATH79_CLK_CPU 0
#define ATH79_CLK_DDR 1
#define ATH79_CLK_AHB 2
+#define ATH79_CLK_REF 3
-#define ATH79_CLK_END 3
+#define ATH79_CLK_END 4
#endif /* __DT_BINDINGS_ATH79_CLK_H */

114
target/linux/ath79/patches-4.19/0022-MIPS-ath79-move-legacy-wdt-and-uart-clock-aliases-ou.patch Normal file
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@ -0,0 +1,114 @@
From 339c191a95e978353c9ba3aafab0261e14de109b Mon Sep 17 00:00:00 2001
From: Felix Fietkau <nbd@nbd.name>
Date: Tue, 6 Mar 2018 13:22:43 +0100
Subject: [PATCH 22/33] MIPS: ath79: move legacy "wdt" and "uart" clock aliases
out of soc init
Preparation for reusing functions for DT
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Signed-off-by: John Crispin <john@phrozen.org>
---
arch/mips/ath79/clock.c | 38 +++++++++++++++++---------------------
1 file changed, 17 insertions(+), 21 deletions(-)
--- a/arch/mips/ath79/clock.c
+++ b/arch/mips/ath79/clock.c
@@ -110,9 +110,6 @@ static void __init ar71xx_clocks_init(vo
ath79_set_clk(ATH79_CLK_CPU, cpu_rate);
ath79_set_clk(ATH79_CLK_DDR, ddr_rate);
ath79_set_clk(ATH79_CLK_AHB, ahb_rate);
-
- clk_add_alias("wdt", NULL, "ahb", NULL);
- clk_add_alias("uart", NULL, "ahb", NULL);
}
static void __init ar724x_clk_init(struct clk *ref_clk, void __iomem *pll_base)
@@ -140,9 +137,6 @@ static void __init ar724x_clocks_init(vo
ref_clk = ath79_set_clk(ATH79_CLK_REF, AR724X_BASE_FREQ);
ar724x_clk_init(ref_clk, ath79_pll_base);
-
- clk_add_alias("wdt", NULL, "ahb", NULL);
- clk_add_alias("uart", NULL, "ahb", NULL);
}
static void __init ar9330_clk_init(struct clk *ref_clk, void __iomem *pll_base)
@@ -218,9 +212,6 @@ static void __init ar933x_clocks_init(vo
ref_clk = ath79_set_clk(ATH79_CLK_REF, ref_rate);
ar9330_clk_init(ref_clk, ath79_pll_base);
-
- clk_add_alias("wdt", NULL, "ahb", NULL);
- clk_add_alias("uart", NULL, "ref", NULL);
}
static u32 __init ar934x_get_pll_freq(u32 ref, u32 ref_div, u32 nint, u32 nfrac,
@@ -353,9 +344,6 @@ static void __init ar934x_clocks_init(vo
ath79_set_clk(ATH79_CLK_DDR, ddr_rate);
ath79_set_clk(ATH79_CLK_AHB, ahb_rate);
- clk_add_alias("wdt", NULL, "ref", NULL);
- clk_add_alias("uart", NULL, "ref", NULL);
-
iounmap(dpll_base);
}
@@ -439,9 +427,6 @@ static void __init qca953x_clocks_init(v
ath79_set_clk(ATH79_CLK_CPU, cpu_rate);
ath79_set_clk(ATH79_CLK_DDR, ddr_rate);
ath79_set_clk(ATH79_CLK_AHB, ahb_rate);
-
- clk_add_alias("wdt", NULL, "ref", NULL);
- clk_add_alias("uart", NULL, "ref", NULL);
}
static void __init qca955x_clocks_init(void)
@@ -524,9 +509,6 @@ static void __init qca955x_clocks_init(v
ath79_set_clk(ATH79_CLK_CPU, cpu_rate);
ath79_set_clk(ATH79_CLK_DDR, ddr_rate);
ath79_set_clk(ATH79_CLK_AHB, ahb_rate);
-
- clk_add_alias("wdt", NULL, "ref", NULL);
- clk_add_alias("uart", NULL, "ref", NULL);
}
static void __init qca956x_clocks_init(void)
@@ -628,13 +610,13 @@ static void __init qca956x_clocks_init(v
ath79_set_clk(ATH79_CLK_CPU, cpu_rate);
ath79_set_clk(ATH79_CLK_DDR, ddr_rate);
ath79_set_clk(ATH79_CLK_AHB, ahb_rate);
-
- clk_add_alias("wdt", NULL, "ref", NULL);
- clk_add_alias("uart", NULL, "ref", NULL);
}
void __init ath79_clocks_init(void)
{
+ const char *wdt;
+ const char *uart;
+
if (soc_is_ar71xx())
ar71xx_clocks_init();
else if (soc_is_ar724x() || soc_is_ar913x())
@@ -651,6 +633,20 @@ void __init ath79_clocks_init(void)
qca956x_clocks_init();
else
BUG();
+
+ if (soc_is_ar71xx() || soc_is_ar724x() || soc_is_ar913x()) {
+ wdt = "ahb";
+ uart = "ahb";
+ } else if (soc_is_ar933x()) {
+ wdt = "ahb";
+ uart = "ref";
+ } else {
+ wdt = "ref";
+ uart = "ref";
+ }
+
+ clk_add_alias("wdt", NULL, wdt, NULL);
+ clk_add_alias("uart", NULL, uart, NULL);
}
unsigned long __init

242
target/linux/ath79/patches-4.19/0023-MIPS-ath79-pass-PLL-base-to-clock-init-functions.patch Normal file
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@ -0,0 +1,242 @@
From 6350b2c36c522fecbc91a80b63f49319dafd2a72 Mon Sep 17 00:00:00 2001
From: Felix Fietkau <nbd@nbd.name>
Date: Tue, 6 Mar 2018 13:23:20 +0100
Subject: [PATCH 23/33] MIPS: ath79: pass PLL base to clock init functions
Preparation for passing the mapped base via DT
Signed-off-by: Felix Fietkau <nbd@nbd.name>
Signed-off-by: John Crispin <john@phrozen.org>
---
arch/mips/ath79/clock.c | 60 ++++++++++++++++++++++++-------------------------
1 file changed, 30 insertions(+), 30 deletions(-)
--- a/arch/mips/ath79/clock.c
+++ b/arch/mips/ath79/clock.c
@@ -80,7 +80,7 @@ static struct clk * __init ath79_set_ff_
return clk;
}
-static void __init ar71xx_clocks_init(void)
+static void __init ar71xx_clocks_init(void __iomem *pll_base)
{
unsigned long ref_rate;
unsigned long cpu_rate;
@@ -92,7 +92,7 @@ static void __init ar71xx_clocks_init(vo
ref_rate = AR71XX_BASE_FREQ;
- pll = ath79_pll_rr(AR71XX_PLL_REG_CPU_CONFIG);
+ pll = __raw_readl(pll_base + AR71XX_PLL_REG_CPU_CONFIG);
div = ((pll >> AR71XX_PLL_FB_SHIFT) & AR71XX_PLL_FB_MASK) + 1;
freq = div * ref_rate;
@@ -130,13 +130,13 @@ static void __init ar724x_clk_init(struc
ath79_set_ff_clk(ATH79_CLK_AHB, "ref", mult, div * ahb_div);
}
-static void __init ar724x_clocks_init(void)
+static void __init ar724x_clocks_init(void __iomem *pll_base)
{
struct clk *ref_clk;
ref_clk = ath79_set_clk(ATH79_CLK_REF, AR724X_BASE_FREQ);
- ar724x_clk_init(ref_clk, ath79_pll_base);
+ ar724x_clk_init(ref_clk, pll_base);
}
static void __init ar9330_clk_init(struct clk *ref_clk, void __iomem *pll_base)
@@ -197,7 +197,7 @@ static void __init ar9330_clk_init(struc
ref_div * out_div * ahb_div);
}
-static void __init ar933x_clocks_init(void)
+static void __init ar933x_clocks_init(void __iomem *pll_base)
{
struct clk *ref_clk;
unsigned long ref_rate;
@@ -234,7 +234,7 @@ static u32 __init ar934x_get_pll_freq(u3
return ret;
}
-static void __init ar934x_clocks_init(void)
+static void __init ar934x_clocks_init(void __iomem *pll_base)
{
unsigned long ref_rate;
unsigned long cpu_rate;
@@ -265,7 +265,7 @@ static void __init ar934x_clocks_init(vo
AR934X_SRIF_DPLL1_REFDIV_MASK;
frac = 1 << 18;
} else {
- pll = ath79_pll_rr(AR934X_PLL_CPU_CONFIG_REG);
+ pll = __raw_readl(pll_base + AR934X_PLL_CPU_CONFIG_REG);
out_div = (pll >> AR934X_PLL_CPU_CONFIG_OUTDIV_SHIFT) &
AR934X_PLL_CPU_CONFIG_OUTDIV_MASK;
ref_div = (pll >> AR934X_PLL_CPU_CONFIG_REFDIV_SHIFT) &
@@ -292,7 +292,7 @@ static void __init ar934x_clocks_init(vo
AR934X_SRIF_DPLL1_REFDIV_MASK;
frac = 1 << 18;
} else {
- pll = ath79_pll_rr(AR934X_PLL_DDR_CONFIG_REG);
+ pll = __raw_readl(pll_base + AR934X_PLL_DDR_CONFIG_REG);
out_div = (pll >> AR934X_PLL_DDR_CONFIG_OUTDIV_SHIFT) &
AR934X_PLL_DDR_CONFIG_OUTDIV_MASK;
ref_div = (pll >> AR934X_PLL_DDR_CONFIG_REFDIV_SHIFT) &
@@ -307,7 +307,7 @@ static void __init ar934x_clocks_init(vo
ddr_pll = ar934x_get_pll_freq(ref_rate, ref_div, nint,
nfrac, frac, out_div);
- clk_ctrl = ath79_pll_rr(AR934X_PLL_CPU_DDR_CLK_CTRL_REG);
+ clk_ctrl = __raw_readl(pll_base + AR934X_PLL_CPU_DDR_CLK_CTRL_REG);
postdiv = (clk_ctrl >> AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_POST_DIV_SHIFT) &
AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_POST_DIV_MASK;
@@ -347,7 +347,7 @@ static void __init ar934x_clocks_init(vo
iounmap(dpll_base);
}
-static void __init qca953x_clocks_init(void)
+static void __init qca953x_clocks_init(void __iomem *pll_base)
{
unsigned long ref_rate;
unsigned long cpu_rate;
@@ -363,7 +363,7 @@ static void __init qca953x_clocks_init(v
else
ref_rate = 25 * 1000 * 1000;
- pll = ath79_pll_rr(QCA953X_PLL_CPU_CONFIG_REG);
+ pll = __raw_readl(pll_base + QCA953X_PLL_CPU_CONFIG_REG);
out_div = (pll >> QCA953X_PLL_CPU_CONFIG_OUTDIV_SHIFT) &
QCA953X_PLL_CPU_CONFIG_OUTDIV_MASK;
ref_div = (pll >> QCA953X_PLL_CPU_CONFIG_REFDIV_SHIFT) &
@@ -377,7 +377,7 @@ static void __init qca953x_clocks_init(v
cpu_pll += frac * (ref_rate >> 6) / ref_div;
cpu_pll /= (1 << out_div);
- pll = ath79_pll_rr(QCA953X_PLL_DDR_CONFIG_REG);
+ pll = __raw_readl(pll_base + QCA953X_PLL_DDR_CONFIG_REG);
out_div = (pll >> QCA953X_PLL_DDR_CONFIG_OUTDIV_SHIFT) &
QCA953X_PLL_DDR_CONFIG_OUTDIV_MASK;
ref_div = (pll >> QCA953X_PLL_DDR_CONFIG_REFDIV_SHIFT) &
@@ -391,7 +391,7 @@ static void __init qca953x_clocks_init(v
ddr_pll += frac * (ref_rate >> 6) / (ref_div << 4);
ddr_pll /= (1 << out_div);
- clk_ctrl = ath79_pll_rr(QCA953X_PLL_CLK_CTRL_REG);
+ clk_ctrl = __raw_readl(pll_base + QCA953X_PLL_CLK_CTRL_REG);
postdiv = (clk_ctrl >> QCA953X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT) &
QCA953X_PLL_CLK_CTRL_CPU_POST_DIV_MASK;
@@ -429,7 +429,7 @@ static void __init qca953x_clocks_init(v
ath79_set_clk(ATH79_CLK_AHB, ahb_rate);
}
-static void __init qca955x_clocks_init(void)
+static void __init qca955x_clocks_init(void __iomem *pll_base)
{
unsigned long ref_rate;
unsigned long cpu_rate;
@@ -445,7 +445,7 @@ static void __init qca955x_clocks_init(v
else
ref_rate = 25 * 1000 * 1000;
- pll = ath79_pll_rr(QCA955X_PLL_CPU_CONFIG_REG);
+ pll = __raw_readl(pll_base + QCA955X_PLL_CPU_CONFIG_REG);
out_div = (pll >> QCA955X_PLL_CPU_CONFIG_OUTDIV_SHIFT) &
QCA955X_PLL_CPU_CONFIG_OUTDIV_MASK;
ref_div = (pll >> QCA955X_PLL_CPU_CONFIG_REFDIV_SHIFT) &
@@ -459,7 +459,7 @@ static void __init qca955x_clocks_init(v
cpu_pll += frac * ref_rate / (ref_div * (1 << 6));
cpu_pll /= (1 << out_div);
- pll = ath79_pll_rr(QCA955X_PLL_DDR_CONFIG_REG);
+ pll = __raw_readl(pll_base + QCA955X_PLL_DDR_CONFIG_REG);
out_div = (pll >> QCA955X_PLL_DDR_CONFIG_OUTDIV_SHIFT) &
QCA955X_PLL_DDR_CONFIG_OUTDIV_MASK;
ref_div = (pll >> QCA955X_PLL_DDR_CONFIG_REFDIV_SHIFT) &
@@ -473,7 +473,7 @@ static void __init qca955x_clocks_init(v
ddr_pll += frac * ref_rate / (ref_div * (1 << 10));
ddr_pll /= (1 << out_div);
- clk_ctrl = ath79_pll_rr(QCA955X_PLL_CLK_CTRL_REG);
+ clk_ctrl = __raw_readl(pll_base + QCA955X_PLL_CLK_CTRL_REG);
postdiv = (clk_ctrl >> QCA955X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT) &
QCA955X_PLL_CLK_CTRL_CPU_POST_DIV_MASK;
@@ -511,7 +511,7 @@ static void __init qca955x_clocks_init(v
ath79_set_clk(ATH79_CLK_AHB, ahb_rate);
}
-static void __init qca956x_clocks_init(void)
+static void __init qca956x_clocks_init(void __iomem *pll_base)
{
unsigned long ref_rate;
unsigned long cpu_rate;
@@ -537,13 +537,13 @@ static void __init qca956x_clocks_init(v
else
ref_rate = 25 * 1000 * 1000;
- pll = ath79_pll_rr(QCA956X_PLL_CPU_CONFIG_REG);
+ pll = __raw_readl(pll_base + QCA956X_PLL_CPU_CONFIG_REG);
out_div = (pll >> QCA956X_PLL_CPU_CONFIG_OUTDIV_SHIFT) &
QCA956X_PLL_CPU_CONFIG_OUTDIV_MASK;
ref_div = (pll >> QCA956X_PLL_CPU_CONFIG_REFDIV_SHIFT) &
QCA956X_PLL_CPU_CONFIG_REFDIV_MASK;
- pll = ath79_pll_rr(QCA956X_PLL_CPU_CONFIG1_REG);
+ pll = __raw_readl(pll_base + QCA956X_PLL_CPU_CONFIG1_REG);
nint = (pll >> QCA956X_PLL_CPU_CONFIG1_NINT_SHIFT) &
QCA956X_PLL_CPU_CONFIG1_NINT_MASK;
hfrac = (pll >> QCA956X_PLL_CPU_CONFIG1_NFRAC_H_SHIFT) &
@@ -556,12 +556,12 @@ static void __init qca956x_clocks_init(v
cpu_pll += (hfrac >> 13) * ref_rate / ref_div;
cpu_pll /= (1 << out_div);
- pll = ath79_pll_rr(QCA956X_PLL_DDR_CONFIG_REG);
+ pll = __raw_readl(pll_base + QCA956X_PLL_DDR_CONFIG_REG);
out_div = (pll >> QCA956X_PLL_DDR_CONFIG_OUTDIV_SHIFT) &
QCA956X_PLL_DDR_CONFIG_OUTDIV_MASK;
ref_div = (pll >> QCA956X_PLL_DDR_CONFIG_REFDIV_SHIFT) &
QCA956X_PLL_DDR_CONFIG_REFDIV_MASK;
- pll = ath79_pll_rr(QCA956X_PLL_DDR_CONFIG1_REG);
+ pll = __raw_readl(pll_base + QCA956X_PLL_DDR_CONFIG1_REG);
nint = (pll >> QCA956X_PLL_DDR_CONFIG1_NINT_SHIFT) &
QCA956X_PLL_DDR_CONFIG1_NINT_MASK;
hfrac = (pll >> QCA956X_PLL_DDR_CONFIG1_NFRAC_H_SHIFT) &
@@ -574,7 +574,7 @@ static void __init qca956x_clocks_init(v
ddr_pll += (hfrac >> 13) * ref_rate / ref_div;
ddr_pll /= (1 << out_div);
- clk_ctrl = ath79_pll_rr(QCA956X_PLL_CLK_CTRL_REG);
+ clk_ctrl = __raw_readl(pll_base + QCA956X_PLL_CLK_CTRL_REG);
postdiv = (clk_ctrl >> QCA956X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT) &
QCA956X_PLL_CLK_CTRL_CPU_POST_DIV_MASK;
@@ -618,19 +618,19 @@ void __init ath79_clocks_init(void)
const char *uart;
if (soc_is_ar71xx())
- ar71xx_clocks_init();
+ ar71xx_clocks_init(ath79_pll_base);
else if (soc_is_ar724x() || soc_is_ar913x())
- ar724x_clocks_init();
+ ar724x_clocks_init(ath79_pll_base);
else if (soc_is_ar933x())
- ar933x_clocks_init();
+ ar933x_clocks_init(ath79_pll_base);
else if (soc_is_ar934x())
- ar934x_clocks_init();
+ ar934x_clocks_init(ath79_pll_base);
else if (soc_is_qca953x())
- qca953x_clocks_init();
+ qca953x_clocks_init(ath79_pll_base);
else if (soc_is_qca955x())
- qca955x_clocks_init();
+ qca955x_clocks_init(ath79_pll_base);
else if (soc_is_qca956x() || soc_is_tp9343())
- qca956x_clocks_init();
+ qca956x_clocks_init(ath79_pll_base);
else
BUG();

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