From ab2416880283cf1fadbe9acc90009a76296a2ce3 Mon Sep 17 00:00:00 2001 From: coolsnowwolf Date: Fri, 12 Apr 2019 11:39:40 +0800 Subject: [PATCH] kernel: bump to 4.9.168 , 4.14.111, 4.19.34 --- include/kernel-version.mk | 12 +- ...04-crypto-crypto4xx-kill-MODULE_NAME.patch | 2 +- ...mware-loader-for-uPD720201-and-uPD72.patch | 6 +- .../802-usb-xhci-force-msi-renesas-xhci.patch | 4 +- .../patches-4.14/930-chipidea-pullup.patch | 2 +- .../ath79/base-files/etc/board.d/01_leds | 45 +- .../ath79/base-files/etc/board.d/02_network | 94 +- .../base-files/etc/board.d/03_gpio_switches | 12 + .../etc/hotplug.d/firmware/10-ath9k-eeprom | 10 +- .../etc/hotplug.d/firmware/11-ath10k-caldata | 40 +- .../etc/hotplug.d/ieee80211/00-wmac-migration | 36 + .../etc/hotplug.d/ieee80211/10_fix_wifi_mac | 6 + .../etc/uci-defaults/04_led_migration | 16 + .../ath79/base-files/lib/upgrade/platform.sh | 33 +- target/linux/ath79/config-4.19 | 229 +++ .../linux/ath79/dts/ar7161_jjplus_ja76pf2.dts | 126 ++ target/linux/ath79/dts/ar7240.dtsi | 3 +- target/linux/ath79/dts/ar7241.dtsi | 3 +- .../ath79/dts/ar7241_tplink_tl-wr841-v7.dts | 2 +- ...no-m.dts => ar7241_ubnt_nanostation-m.dts} | 2 +- target/linux/ath79/dts/ar7242.dtsi | 3 +- .../ath79/dts/ar7242_tplink_tl-wr2543-v1.dts | 2 +- .../dts/ar9132_tplink_tl-wr1043nd-v1.dts | 2 +- target/linux/ath79/dts/ar9330.dtsi | 3 +- .../ath79/dts/ar9331_tplink_tl-wr710n-v1.dts | 130 ++ ...-v4.dts => ar9331_tplink_tl-wr740n-v4.dts} | 4 +- .../ath79/dts/ar9342_ubnt_nanobeam-ac.dts | 64 + .../dts/ar9342_ubnt_nanostation-m-xw.dts | 37 + .../ath79/dts/ar9344_comfast_cf-e120a-v3.dts | 146 ++ target/linux/ath79/dts/ar934x.dtsi | 14 +- .../linux/ath79/dts/qca9531_comfast_cf-e5.dts | 141 ++ .../dts/qca9531_glinet_gl-ar300m-lite.dts | 22 + .../dts/qca9531_glinet_gl-ar300m-nand.dts | 34 - .../dts/qca9531_glinet_gl-ar300m-nor.dts | 39 - .../ath79/dts/qca9531_glinet_gl-ar300m.dtsi | 60 +- .../ath79/dts/qca9531_glinet_gl-x750.dts | 3 +- .../linux/ath79/dts/qca9531_yuncore_a770.dts | 126 ++ .../ath79/dts/qca9533_tplink_cpe210-v2.dts | 9 + .../ath79/dts/qca9533_tplink_cpe210-v3.dts | 9 + .../ath79/dts/qca9533_tplink_cpe210.dtsi | 125 ++ .../ath79/dts/qca9533_tplink_tl-wr841-v11.dts | 2 +- .../ath79/dts/qca9533_tplink_tl-wr841-v9.dts | 2 +- .../linux/ath79/dts/qca9533_ubnt_acb-isp.dts | 95 ++ target/linux/ath79/dts/qca953x.dtsi | 7 +- target/linux/ath79/dts/qca9557.dtsi | 22 +- .../ath79/dts/qca9557_iodata_wn-ac-dgr.dtsi | 19 +- .../ath79/dts/qca9557_iodata_wn-ac1167dgr.dts | 16 + .../ath79/dts/qca9557_iodata_wn-ac1600dgr.dts | 28 + .../dts/qca9557_iodata_wn-ac1600dgr2.dts | 16 + .../ath79/dts/qca9558_engenius_epg5000.dts | 180 +++ .../qca9558_librerouter_librerouter-v1.dts | 211 +++ .../ath79/dts/qca9558_netgear_ex6400.dts | 9 + .../ath79/dts/qca9558_netgear_ex7300.dts | 9 + .../ath79/dts/qca9558_netgear_ex7300.dtsi | 222 +++ .../linux/ath79/dts/qca9558_ocedo_ursus.dts | 147 ++ .../ath79/dts/qca9558_tplink_archer-c5-v1.dts | 46 + .../ath79/dts/qca9558_tplink_archer-c7-v1.dts | 2 +- .../ath79/dts/qca9558_tplink_archer-c7-v2.dts | 2 +- .../ath79/dts/qca9558_tplink_re350k-v1.dts | 173 +++ .../dts/qca9558_tplink_tl-wr1043nd-v2.dts | 2 +- .../dts/qca9558_tplink_tl-wr1043nd-v3.dts | 2 +- .../dts/qca9561_tplink_archer-c58-v1.dts | 2 +- .../dts/qca9561_tplink_archer-c59-v1.dts | 2 +- .../linux/ath79/dts/qca9563_nec_wg1200cr.dts | 176 +++ .../ath79/dts/qca9563_tplink_archer-a7-v5.dts | 9 + .../ath79/dts/qca9563_tplink_archer-c2-v3.dts | 2 +- .../ath79/dts/qca9563_tplink_archer-c7-v4.dts | 8 +- .../ath79/dts/qca9563_tplink_archer-c7-v5.dts | 16 + .../dts/qca9563_tplink_archer-x7-v5.dtsi | 108 +- .../dts/qca9563_tplink_tl-wr1043nd-v4.dts | 2 +- target/linux/ath79/dts/qca956x.dtsi | 5 +- .../net/ethernet/atheros/ag71xx/Makefile | 1 - .../net/ethernet/atheros/ag71xx/ag71xx.h | 1 + .../ethernet/atheros/ag71xx/ag71xx_ar7240.c | 1344 ----------------- .../net/ethernet/atheros/ag71xx/ag71xx_gmac.c | 1 + .../net/ethernet/atheros/ag71xx/ag71xx_main.c | 132 +- .../net/ethernet/atheros/ag71xx/ag71xx_mdio.c | 2 +- target/linux/ath79/generic/config-default | 1 + target/linux/ath79/image/common-netgear.mk | 17 + target/linux/ath79/image/common-tp-link.mk | 7 +- target/linux/ath79/image/generic-tp-link.mk | 114 +- target/linux/ath79/image/generic-ubnt.mk | 37 +- target/linux/ath79/image/generic.mk | 146 +- target/linux/ath79/image/tiny-netgear.mk | 28 +- target/linux/ath79/image/tiny-tp-link.mk | 20 +- .../408-mtd-redboot_partition_scan.patch | 44 + ...2-watchdog-ath79-fix-maximum-timeout.patch | 32 + ...ds-add-reset-controller-based-driver.patch | 186 +++ .../0004-phy-add-ath79-usb-phys.patch | 320 ++++ ...005-usb-add-more-OF-quirk-properties.patch | 24 + ...9-intc-add-irq-cascade-driver-for-QC.patch | 168 +++ ...ip-irq-ath79-cpu-drop-OF-init-helper.patch | 23 + ...S-ath79-select-the-PINCTRL-subsystem.patch | 24 + ...ngs-PCI-qcom-ar7100-adds-binding-doc.patch | 57 + .../0018-MIPS-pci-ar71xx-convert-to-OF.patch | 202 +++ ...ngs-PCI-qcom-ar7240-adds-binding-doc.patch | 61 + .../0020-MIPS-pci-ar724x-convert-to-OF.patch | 205 +++ ...elpers-for-setting-clocks-and-expose.patch | 243 +++ ...legacy-wdt-and-uart-clock-aliases-ou.patch | 114 ++ ...ass-PLL-base-to-clock-init-functions.patch | 242 +++ ...specifying-the-reference-clock-in-DT.patch | 229 +++ ...rt-setting-up-clock-via-DT-on-all-So.patch | 77 + ...9-export-switch-MDIO-reference-clock.patch | 59 + ...0027-MIPS-ath79-drop-legacy-IRQ-code.patch | 233 +++ .../0028-MIPS-ath79-drop-machfiles.patch | 1048 +++++++++++++ ...0029-MIPS-ath79-drop-legacy-pci-code.patch | 379 +++++ ...op-platform-device-registration-code.patch | 933 ++++++++++++ .../0031-MIPS-ath79-drop-OF-clock-code.patch | 95 ++ .../0032-MIPS-ath79-sanitize-symbols.patch | 93 ++ .../0033-spi-ath79-drop-pdata-support.patch | 73 + .../0034-MIPS-ath79-ath9k-exports.patch | 27 + .../0036-GPIO-add-named-gpio-exports.patch | 165 ++ ...-MIPS-ath79-remove-irq-code-from-pci.patch | 139 ++ .../patches-4.19/0037-missing-registers.patch | 21 + .../004-register_gpio_driver_earlier.patch | 18 + ...mtd_fix_cfi_cmdset_0002_status_check.patch | 64 + .../404-mtd-cybertan-trx-parser.patch | 20 + .../405-mtd-tp-link-partition-parser.patch | 25 + .../420-net-ar71xx_mac_driver.patch | 28 + .../430-drivers-link-spi-before-mtd.patch | 12 + ...ath79-swizzle-pci-address-for-ar71xx.patch | 98 ++ ...490-usb-ehci-add-quirks-for-qca-socs.patch | 103 ++ .../900-mdio_bitbang_ignore_ta_value.patch | 32 + ...-prevent-rescheduling-during-command.patch | 61 + .../910-unaligned_access_hacks.patch | 891 +++++++++++ ...support-for-performing-fake-doorbell.patch | 2 +- .../905-BCM53573-minor-hacks.patch | 2 +- ...50-0056-fbdev-add-FBIOCOPYAREA-ioctl.patch | 8 +- ...oup-Disable-cgroup-memory-by-default.patch | 2 +- ...able-USB-power-on-Netgear-WNDR3400v2.patch | 5 - ...-set-MRSS-128-to-fix-CNS3xxx-BM-DMA..patch | 2 +- target/linux/gemini/Makefile | 4 +- target/linux/gemini/config-4.14 | 2 + target/linux/gemini/config-4.19 | 2 + target/linux/gemini/image/Makefile | 52 +- .../linux/gemini/image/dns313_gen_hdd_img.sh | 28 + ...emini-Indent-DIR-685-partition-table.patch | 105 ++ ...-DIR-685-partition-table-for-OpenWrt.patch | 35 + ...ption-fix-dwm-158-3g-modem-interface.patch | 2 +- ...e-size-of-hook-entry-point-locations.patch | 2 +- ...conntrack-add-IPS_OFFLOAD-status-bit.patch | 6 +- ...w_table-fix-offloaded-connection-tim.patch | 4 +- .../020-backport_netfilter_rtcache.patch | 4 +- ...rt-Fix-build-failure-with-disabled-c.patch | 94 ++ ...ow_offload-handle-netdevice-events-f.patch | 4 +- ...w_table-clean-up-and-fix-dst-handlin.patch | 11 +- ...w_table-fix-offloaded-connection-tim.patch | 10 +- ...w_table-fix-up-ct-state-of-flows-aft.patch | 2 +- ...dev-fix-refcnt-leak-on-interface-ren.patch | 69 + ...ault-compression-selection-in-ubifs.patch} | 11 +- target/linux/generic/config-4.19 | 2 + .../generic/hack-4.14/902-debloat_proc.patch | 2 +- .../hack-4.19/207-disable-modorder.patch | 4 +- .../generic/hack-4.19/220-gc_sections.patch | 2 +- .../hack-4.19/647-netfilter-flow-acct.patch | 4 +- .../650-netfilter-add-xt_OFFLOAD-target.patch | 4 +- .../661-use_fq_codel_by_default.patch | 4 +- .../hack-4.19/662-remove_pfifo_fast.patch | 7 +- .../702-phy_add_aneg_done_function.patch | 6 +- .../generic/hack-4.19/902-debloat_proc.patch | 2 +- .../hack-4.19/904-debloat_dma_buf.patch | 2 +- ...p-offload-hooks-on-netdev-unregister.patch | 4 +- .../generic/hack-4.9/902-debloat_proc.patch | 2 +- .../pending-4.19/201-extra_optimization.patch | 2 +- .../pending-4.19/305-mips_module_reloc.patch | 11 +- .../pending-4.19/308-mips32r2_tune.patch | 2 +- .../332-arc-add-OWRTDTB-section.patch | 66 +- ...-netfilter_optional_tcp_window_check.patch | 2 +- ...w_table-add-hardware-offload-support.patch | 24 +- ...w_table-rework-hardware-offload-time.patch | 2 +- ...ng-with-source-address-failed-policy.patch | 16 +- ...edia-i2c-tda1997x-select-V4L2_FWNODE.patch | 43 + .../807-usb-support-layerscape.patch | 10 +- .../812-flexspi-support-layerscape.patch | 2 +- .../102-powerpc-add-cmdline-override.patch | 2 +- .../octeon/base-files/lib/upgrade/platform.sh | 2 +- target/linux/octeon/config-4.19 | 280 ++++ .../100-ubnt_edgerouter2_support.patch | 31 + .../110-er200-ethernet_probe_order.patch | 34 + .../patches-4.19/120-cmdline-hack.patch | 47 + .../firmware/brcm/brcmfmac43430a0-sdio.txt | 1 + target/linux/sunxi/cortexa53/config-4.14 | 1 + target/linux/sunxi/cortexa53/config-4.19 | 1 + target/linux/sunxi/cortexa53/config-default | 109 -- target/linux/sunxi/cortexa7/config-default | 10 - target/linux/sunxi/cortexa8/config-default | 22 - target/linux/sunxi/image/cortex-a7.mk | 32 +- ...arch_counter_get_cntpct-to-read-the-.patch | 118 ++ ...ers-arch_timer-Workaround-for-Allwin.patch | 244 +++ ...nner-a64-Enable-A64-timer-workaround.patch | 26 + .../115-musb-ignore-vbus-errors.patch | 26 - .../131-reset-add-h3-resets.patch | 92 -- ...nner-a64-Enable-A64-timer-workaround.patch | 26 + 193 files changed, 11556 insertions(+), 2158 deletions(-) create mode 100644 target/linux/ath79/base-files/etc/hotplug.d/ieee80211/00-wmac-migration create mode 100644 target/linux/ath79/base-files/etc/uci-defaults/04_led_migration create mode 100644 target/linux/ath79/config-4.19 create mode 100644 target/linux/ath79/dts/ar7161_jjplus_ja76pf2.dts rename target/linux/ath79/dts/{ar7241_ubnt_nano-m.dts => ar7241_ubnt_nanostation-m.dts} (70%) create mode 100644 target/linux/ath79/dts/ar9331_tplink_tl-wr710n-v1.dts rename target/linux/ath79/dts/{ar9331_tplink_tl-wr740nd-v4.dts => ar9331_tplink_tl-wr740n-v4.dts} (56%) create mode 100644 target/linux/ath79/dts/ar9342_ubnt_nanobeam-ac.dts create mode 100644 target/linux/ath79/dts/ar9342_ubnt_nanostation-m-xw.dts create mode 100644 target/linux/ath79/dts/ar9344_comfast_cf-e120a-v3.dts create mode 100644 target/linux/ath79/dts/qca9531_comfast_cf-e5.dts create mode 100644 target/linux/ath79/dts/qca9531_glinet_gl-ar300m-lite.dts create mode 100644 target/linux/ath79/dts/qca9531_yuncore_a770.dts create mode 100644 target/linux/ath79/dts/qca9533_tplink_cpe210-v2.dts create mode 100644 target/linux/ath79/dts/qca9533_tplink_cpe210-v3.dts create mode 100644 target/linux/ath79/dts/qca9533_tplink_cpe210.dtsi create mode 100644 target/linux/ath79/dts/qca9533_ubnt_acb-isp.dts create mode 100644 target/linux/ath79/dts/qca9557_iodata_wn-ac1600dgr.dts create mode 100644 target/linux/ath79/dts/qca9558_engenius_epg5000.dts create mode 100644 target/linux/ath79/dts/qca9558_librerouter_librerouter-v1.dts create mode 100644 target/linux/ath79/dts/qca9558_netgear_ex6400.dts create mode 100644 target/linux/ath79/dts/qca9558_netgear_ex7300.dts create mode 100644 target/linux/ath79/dts/qca9558_netgear_ex7300.dtsi create mode 100644 target/linux/ath79/dts/qca9558_ocedo_ursus.dts create mode 100644 target/linux/ath79/dts/qca9558_tplink_archer-c5-v1.dts create mode 100644 target/linux/ath79/dts/qca9558_tplink_re350k-v1.dts create mode 100644 target/linux/ath79/dts/qca9563_nec_wg1200cr.dts delete mode 100644 target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar7240.c create mode 100644 target/linux/ath79/patches-4.14/408-mtd-redboot_partition_scan.patch create mode 100644 target/linux/ath79/patches-4.19/0002-watchdog-ath79-fix-maximum-timeout.patch create mode 100644 target/linux/ath79/patches-4.19/0003-leds-add-reset-controller-based-driver.patch create mode 100644 target/linux/ath79/patches-4.19/0004-phy-add-ath79-usb-phys.patch create mode 100644 target/linux/ath79/patches-4.19/0005-usb-add-more-OF-quirk-properties.patch create mode 100644 target/linux/ath79/patches-4.19/0007-irqchip-irq-ath79-intc-add-irq-cascade-driver-for-QC.patch create mode 100644 target/linux/ath79/patches-4.19/0008-irqchip-irq-ath79-cpu-drop-OF-init-helper.patch create mode 100644 target/linux/ath79/patches-4.19/0011-MIPS-ath79-select-the-PINCTRL-subsystem.patch create mode 100644 target/linux/ath79/patches-4.19/0017-dt-bindings-PCI-qcom-ar7100-adds-binding-doc.patch create mode 100644 target/linux/ath79/patches-4.19/0018-MIPS-pci-ar71xx-convert-to-OF.patch create mode 100644 target/linux/ath79/patches-4.19/0019-dt-bindings-PCI-qcom-ar7240-adds-binding-doc.patch create mode 100644 target/linux/ath79/patches-4.19/0020-MIPS-pci-ar724x-convert-to-OF.patch create mode 100644 target/linux/ath79/patches-4.19/0021-MIPS-ath79-add-helpers-for-setting-clocks-and-expose.patch create mode 100644 target/linux/ath79/patches-4.19/0022-MIPS-ath79-move-legacy-wdt-and-uart-clock-aliases-ou.patch create mode 100644 target/linux/ath79/patches-4.19/0023-MIPS-ath79-pass-PLL-base-to-clock-init-functions.patch create mode 100644 target/linux/ath79/patches-4.19/0024-MIPS-ath79-make-specifying-the-reference-clock-in-DT.patch create mode 100644 target/linux/ath79/patches-4.19/0025-MIPS-ath79-support-setting-up-clock-via-DT-on-all-So.patch create mode 100644 target/linux/ath79/patches-4.19/0026-MIPS-ath79-export-switch-MDIO-reference-clock.patch create mode 100644 target/linux/ath79/patches-4.19/0027-MIPS-ath79-drop-legacy-IRQ-code.patch create mode 100644 target/linux/ath79/patches-4.19/0028-MIPS-ath79-drop-machfiles.patch create mode 100644 target/linux/ath79/patches-4.19/0029-MIPS-ath79-drop-legacy-pci-code.patch create mode 100644 target/linux/ath79/patches-4.19/0030-MIPS-ath79-drop-platform-device-registration-code.patch create mode 100644 target/linux/ath79/patches-4.19/0031-MIPS-ath79-drop-OF-clock-code.patch create mode 100644 target/linux/ath79/patches-4.19/0032-MIPS-ath79-sanitize-symbols.patch create mode 100644 target/linux/ath79/patches-4.19/0033-spi-ath79-drop-pdata-support.patch create mode 100644 target/linux/ath79/patches-4.19/0034-MIPS-ath79-ath9k-exports.patch create mode 100644 target/linux/ath79/patches-4.19/0036-GPIO-add-named-gpio-exports.patch create mode 100644 target/linux/ath79/patches-4.19/0036-MIPS-ath79-remove-irq-code-from-pci.patch create mode 100644 target/linux/ath79/patches-4.19/0037-missing-registers.patch create mode 100644 target/linux/ath79/patches-4.19/004-register_gpio_driver_earlier.patch create mode 100644 target/linux/ath79/patches-4.19/403-mtd_fix_cfi_cmdset_0002_status_check.patch create mode 100644 target/linux/ath79/patches-4.19/404-mtd-cybertan-trx-parser.patch create mode 100644 target/linux/ath79/patches-4.19/405-mtd-tp-link-partition-parser.patch create mode 100644 target/linux/ath79/patches-4.19/420-net-ar71xx_mac_driver.patch create mode 100644 target/linux/ath79/patches-4.19/430-drivers-link-spi-before-mtd.patch create mode 100644 target/linux/ath79/patches-4.19/470-MIPS-ath79-swizzle-pci-address-for-ar71xx.patch create mode 100644 target/linux/ath79/patches-4.19/490-usb-ehci-add-quirks-for-qca-socs.patch create mode 100644 target/linux/ath79/patches-4.19/900-mdio_bitbang_ignore_ta_value.patch create mode 100644 target/linux/ath79/patches-4.19/901-phy-mdio-bitbang-prevent-rescheduling-during-command.patch create mode 100644 target/linux/ath79/patches-4.19/910-unaligned_access_hacks.patch create mode 100755 target/linux/gemini/image/dns313_gen_hdd_img.sh create mode 100644 target/linux/gemini/patches-4.19/0019-ARM-dts-gemini-Indent-DIR-685-partition-table.patch create mode 100644 target/linux/gemini/patches-4.19/0020-ARM-dts-Augment-DIR-685-partition-table-for-OpenWrt.patch create mode 100644 target/linux/generic/backport-4.19/060-v5.1-serial-ar933x_uart-Fix-build-failure-with-disabled-c.patch create mode 100644 target/linux/generic/backport-4.19/400-v5.2-leds-trigger-netdev-fix-refcnt-leak-on-interface-ren.patch rename target/linux/generic/{pending-4.19/551-ubifs-fix-default-compression-selection.patch => backport-4.19/500-v4.20-ubifs-Fix-default-compression-selection-in-ubifs.patch} (66%) create mode 100644 target/linux/generic/pending-4.19/840-media-i2c-tda1997x-select-V4L2_FWNODE.patch create mode 100644 target/linux/octeon/config-4.19 create mode 100644 target/linux/octeon/patches-4.19/100-ubnt_edgerouter2_support.patch create mode 100644 target/linux/octeon/patches-4.19/110-er200-ethernet_probe_order.patch create mode 100644 target/linux/octeon/patches-4.19/120-cmdline-hack.patch create mode 120000 target/linux/sunxi/base-files/lib/firmware/brcm/brcmfmac43430a0-sdio.txt delete mode 100644 target/linux/sunxi/cortexa53/config-default delete mode 100644 target/linux/sunxi/cortexa7/config-default delete mode 100644 target/linux/sunxi/cortexa8/config-default create mode 100644 target/linux/sunxi/patches-4.14/031-arm64-Implement-arch_counter_get_cntpct-to-read-the-.patch create mode 100644 target/linux/sunxi/patches-4.14/100-clocksource-drivers-arch_timer-Workaround-for-Allwin.patch create mode 100644 target/linux/sunxi/patches-4.14/101-arm64-dts-allwinner-a64-Enable-A64-timer-workaround.patch delete mode 100644 target/linux/sunxi/patches-4.14/115-musb-ignore-vbus-errors.patch delete mode 100644 target/linux/sunxi/patches-4.14/131-reset-add-h3-resets.patch create mode 100644 target/linux/sunxi/patches-4.19/101-arm64-dts-allwinner-a64-Enable-A64-timer-workaround.patch diff --git a/include/kernel-version.mk b/include/kernel-version.mk index 707bea661..8f80c3197 100644 --- a/include/kernel-version.mk +++ b/include/kernel-version.mk @@ -3,14 +3,14 @@ LINUX_RELEASE?=1 LINUX_VERSION-3.18 = .136 -LINUX_VERSION-4.9 = .166 -LINUX_VERSION-4.14 = .109 -LINUX_VERSION-4.19 = .25 +LINUX_VERSION-4.9 = .168 +LINUX_VERSION-4.14 = .111 +LINUX_VERSION-4.19 = .34 LINUX_KERNEL_HASH-3.18.136 = 48c8775013d23229462134f911bbb14c7935096fcccfb19ce28ecd5f7154f35c -LINUX_KERNEL_HASH-4.9.166 = b8f87c087cbc35d35d55cae1c0c7e47c8d20226d241697bf5d4c0c524439baeb -LINUX_KERNEL_HASH-4.14.109 = 3764f165f779568745f1468d8f7e1db65d94eae9cd8d1350f4fe003a0fd88ee0 -LINUX_KERNEL_HASH-4.19.25 = 7ec71d90d6e96e6f741676d157ac06f30c75be4eaf1649143a3c8b7d4f919731 +LINUX_KERNEL_HASH-4.9.168 = 4d451c21effad77de323edc9bfeae095aa1faed1a801ef427d66f5763bef091e +LINUX_KERNEL_HASH-4.14.111 = f8197d56553f864d1d2e97abbe4fca50f8ab5e72089c292d22f0e4395340a6e8 +LINUX_KERNEL_HASH-4.19.34 = dd795e2a1fddbee5b03c3bb55a1926829cc08df4fdcabce62dda717ba087b8cc remove_uri_prefix=$(subst git://,,$(subst http://,,$(subst https://,,$(1)))) sanitize_uri=$(call qstrip,$(subst @,_,$(subst :,_,$(subst .,_,$(subst -,_,$(subst /,_,$(1))))))) diff --git a/target/linux/apm821xx/patches-4.14/021-0004-crypto-crypto4xx-kill-MODULE_NAME.patch b/target/linux/apm821xx/patches-4.14/021-0004-crypto-crypto4xx-kill-MODULE_NAME.patch index 4ee99f44c..87d7a3e67 100644 --- a/target/linux/apm821xx/patches-4.14/021-0004-crypto-crypto4xx-kill-MODULE_NAME.patch +++ b/target/linux/apm821xx/patches-4.14/021-0004-crypto-crypto4xx-kill-MODULE_NAME.patch @@ -36,7 +36,7 @@ Signed-off-by: Christian Lamparter #define PPC460EX_SDR0_SRST 0x201 --- a/drivers/crypto/amcc/crypto4xx_trng.c +++ b/drivers/crypto/amcc/crypto4xx_trng.c -@@ -92,7 +92,7 @@ void ppc4xx_trng_probe(struct crypto4xx_ +@@ -94,7 +94,7 @@ void ppc4xx_trng_probe(struct crypto4xx_ if (!rng) goto err_out; diff --git a/target/linux/apm821xx/patches-4.19/801-usb-xhci-add-firmware-loader-for-uPD720201-and-uPD72.patch b/target/linux/apm821xx/patches-4.19/801-usb-xhci-add-firmware-loader-for-uPD720201-and-uPD72.patch index 630aaca7e..2c4996278 100644 --- a/target/linux/apm821xx/patches-4.19/801-usb-xhci-add-firmware-loader-for-uPD720201-and-uPD72.patch +++ b/target/linux/apm821xx/patches-4.19/801-usb-xhci-add-firmware-loader-for-uPD720201-and-uPD72.patch @@ -44,7 +44,7 @@ Signed-off-by: Christian Lamparter #include "xhci.h" #include "xhci-trace.h" -@@ -261,6 +263,458 @@ static void xhci_pme_acpi_rtd3_enable(st +@@ -262,6 +264,458 @@ static void xhci_pme_acpi_rtd3_enable(st static void xhci_pme_acpi_rtd3_enable(struct pci_dev *dev) { } #endif /* CONFIG_ACPI */ @@ -503,7 +503,7 @@ Signed-off-by: Christian Lamparter /* called during probe() after chip reset completes */ static int xhci_pci_setup(struct usb_hcd *hcd) { -@@ -299,6 +753,22 @@ static int xhci_pci_probe(struct pci_dev +@@ -300,6 +754,22 @@ static int xhci_pci_probe(struct pci_dev struct hc_driver *driver; struct usb_hcd *hcd; @@ -526,7 +526,7 @@ Signed-off-by: Christian Lamparter driver = (struct hc_driver *)id->driver_data; /* Prevent runtime suspending between USB-2 and USB-3 initialization */ -@@ -360,6 +830,16 @@ static void xhci_pci_remove(struct pci_d +@@ -361,6 +831,16 @@ static void xhci_pci_remove(struct pci_d { struct xhci_hcd *xhci; diff --git a/target/linux/apm821xx/patches-4.19/802-usb-xhci-force-msi-renesas-xhci.patch b/target/linux/apm821xx/patches-4.19/802-usb-xhci-force-msi-renesas-xhci.patch index 90fb27935..fc4553d2d 100644 --- a/target/linux/apm821xx/patches-4.19/802-usb-xhci-force-msi-renesas-xhci.patch +++ b/target/linux/apm821xx/patches-4.19/802-usb-xhci-force-msi-renesas-xhci.patch @@ -13,7 +13,7 @@ produce a noisy warning. --- a/drivers/usb/host/xhci-pci.c +++ b/drivers/usb/host/xhci-pci.c -@@ -214,6 +214,7 @@ static void xhci_pci_quirks(struct devic +@@ -215,6 +215,7 @@ static void xhci_pci_quirks(struct devic pdev->device == 0x0015) { xhci->quirks |= XHCI_RESET_ON_RESUME; xhci->quirks |= XHCI_ZERO_64B_REGS; @@ -43,7 +43,7 @@ produce a noisy warning. hcd->msi_enabled = 1; --- a/drivers/usb/host/xhci.h +++ b/drivers/usb/host/xhci.h -@@ -1859,6 +1859,7 @@ struct xhci_hcd { +@@ -1867,6 +1867,7 @@ struct xhci_hcd { /* support xHCI 0.96 spec USB2 software LPM */ unsigned sw_lpm_support:1; /* support xHCI 1.0 spec USB2 hardware LPM */ diff --git a/target/linux/ar71xx/patches-4.14/930-chipidea-pullup.patch b/target/linux/ar71xx/patches-4.14/930-chipidea-pullup.patch index 6e293305d..2e9a87863 100644 --- a/target/linux/ar71xx/patches-4.14/930-chipidea-pullup.patch +++ b/target/linux/ar71xx/patches-4.14/930-chipidea-pullup.patch @@ -37,7 +37,7 @@ ret = hw_device_init(ci, base); if (ret < 0) { dev_err(dev, "can't initialize hardware\n"); -@@ -1004,7 +1007,7 @@ static int ci_hdrc_probe(struct platform +@@ -1011,7 +1014,7 @@ static int ci_hdrc_probe(struct platform goto deinit_gadget; } diff --git a/target/linux/ath79/base-files/etc/board.d/01_leds b/target/linux/ath79/base-files/etc/board.d/01_leds index 2f65a8948..af26425da 100755 --- a/target/linux/ath79/base-files/etc/board.d/01_leds +++ b/target/linux/ath79/base-files/etc/board.d/01_leds @@ -38,6 +38,23 @@ comfast,cf-e110n-v2) ucidef_set_led_rssi "rssimediumhigh" "RSSIMEDIUMHIGH" "$boardname:green:rssimediumhigh" "wlan0" "51" "100" ucidef_set_led_rssi "rssihigh" "RSSIHIGH" "$boardname:green:rssihigh" "wlan0" "76" "100" ;; +comfast,cf-e120a-v3) + ucidef_set_led_netdev "lan" "LAN" "$boardname:green:lan" "eth0" + ucidef_set_led_switch "wan" "WAN" "$boardname:green:wan" "switch0" "0x04" + ucidef_set_rssimon "wlan0" "200000" "1" + ucidef_set_led_rssi "rssilow" "RSSILOW" "$boardname:red:rssilow" "wlan0" "1" "100" + ucidef_set_led_rssi "rssimediumlow" "RSSIMEDIUMLOW" "$boardname:red:rssimediumlow" "wlan0" "26" "100" + ucidef_set_led_rssi "rssimediumhigh" "RSSIMEDIUMHIGH" "$boardname:green:rssimediumhigh" "wlan0" "51" "100" + ucidef_set_led_rssi "rssihigh" "RSSIHIGH" "$boardname:green:rssihigh" "wlan0" "76" "100" + ;; +comfast,cf-e5) + ucidef_set_led_switch "lan" "LAN" "$boardname:blue:lan" "switch0" "0x02" + ucidef_set_led_netdev "wan" "WAN" "$boardname:blue:wan" "eth0" + ucidef_set_rssimon "wlan0" "200000" "1" + ucidef_set_led_rssi "rssilow" "RSSILOW" "$boardname:blue:rssi0" "wlan0" "1" "100" + ucidef_set_led_rssi "rssimedium" "RSSIMEDIUM" "$boardname:blue:rssi1" "wlan0" "33" "100" + ucidef_set_led_rssi "rssihigh" "RSSIHIGH" "$boardname:blue:rssi2" "wlan0" "66" "100" + ;; dlink,dir-859-a1) ucidef_set_led_switch "internet" "WAN" "$boardname:green:internet" "switch0" "0x20" ;; @@ -52,7 +69,14 @@ etactica,eg200) ;; glinet,gl-ar150) ucidef_set_led_netdev "wan" "WAN" "$boardname:green:wan" "eth0" - ucidef_set_led_netdev "lan" "LAN" "$boardname:green:lan" "eth1" + ucidef_set_led_switch "lan" "LAN" "$boardname:green:lan" "switch0" "0x02" + ;; +glinet,gl-ar300m-nand|\ +glinet,gl-ar300m-nor) + ucidef_set_led_netdev "lan" "LAN" "gl-ar300m:green:lan" "eth1" + ;; +glinet,gl-ar300m-lite) + ucidef_set_led_netdev "lan" "LAN" "gl-ar300m-lite:green:lan" "eth0" ;; glinet,gl-x750) ucidef_set_led_netdev "wan" "WAN" "$boardname:green:wan" "eth0" @@ -99,6 +123,15 @@ tplink,archer-c6-v2) ucidef_set_led_switch "lan" "LAN" "tp-link:green:lan" "switch0" "0x3C" ucidef_set_led_switch "wan" "WAN" "tp-link:green:wan" "switch0" "0x02" ;; +tplink,cpe210-v2|\ +tplink,cpe210-v3) + ucidef_set_led_netdev "lan" "LAN" "tp-link:green:lan" "eth0" + ucidef_set_rssimon "wlan0" "200000" "1" + ucidef_set_led_rssi "rssilow" "RSSILOW" "tp-link:green:link1" "wlan0" "1" "100" + ucidef_set_led_rssi "rssimediumlow" "RSSIMEDIUMLOW" "tp-link:green:link2" "wlan0" "30" "100" + ucidef_set_led_rssi "rssimediumhigh" "RSSIMEDIUMHIGH" "tp-link:green:link3" "wlan0" "60" "100" + ucidef_set_led_rssi "rssihigh" "RSSIHIGH" "tp-link:green:link4" "wlan0" "80" "100" + ;; tplink,re450-v2) ucidef_set_led_netdev "lan_data" "LAN Data" "tp-link:green:lan_data" "eth0" "tx rx" ucidef_set_led_netdev "lan_link" "LAN Link" "tp-link:green:lan_link" "eth0" "link" @@ -119,7 +152,7 @@ tplink,tl-wr941-v4) ucidef_set_led_switch "lan3" "LAN3" "tp-link:green:lan3" "switch0" "0x08" ucidef_set_led_switch "lan4" "LAN4" "tp-link:green:lan4" "switch0" "0x10" ;; -tplink,tl-wr740nd-v4|\ +tplink,tl-wr740n-v4|\ tplink,tl-wr741nd-v4|\ tplink,tl-wr841-v8|\ tplink,tl-wr842n-v2) @@ -139,7 +172,8 @@ tplink,tl-wr841-v11) ;; ubnt,bullet-m|\ ubnt,bullet-m-xw|\ -ubnt,nano-m|\ +ubnt,nanostation-m|\ +ubnt,nanostation-m-xw|\ ubnt,rocket-m) ucidef_set_rssimon "wlan0" "200000" "1" ucidef_set_led_rssi "rssilow" "RSSILOW" "ubnt:red:link1" "wlan0" "1" "100" @@ -147,6 +181,7 @@ ubnt,rocket-m) ucidef_set_led_rssi "rssimediumhigh" "RSSIMEDIUMHIGH" "ubnt:green:link3" "wlan0" "51" "100" ucidef_set_led_rssi "rssihigh" "RSSIHIGH" "ubnt:green:link4" "wlan0" "76" "100" ;; +ubnt,nanobeam-ac|\ ubnt,nanostation-ac) ucidef_set_rssimon "wlan0" "200000" "1" ucidef_set_led_rssi "rssilow" "RSSILOW" "ubnt:blue:rssi0" "wlan0" "1" "100" @@ -161,6 +196,10 @@ wd,mynet-wifi-rangeextender) ucidef_set_led_rssi "rssimedium" "RSSIMED" "$boardname:blue:rssi-med" "wlan0" "33" "100" ucidef_set_led_rssi "rssihigh" "RSSIMAX" "$boardname:blue:rssi-max" "wlan0" "66" "100" ;; +yuncore,a770) + ucidef_set_led_netdev "wan" "WAN" "$boardname:green:wan" "eth0" + ucidef_set_led_switch "lan" "LAN" "$boardname:green:lan" "switch0" "0x10" + ;; esac board_config_flush diff --git a/target/linux/ath79/base-files/etc/board.d/02_network b/target/linux/ath79/base-files/etc/board.d/02_network index 43c875f76..2f4fb62a5 100755 --- a/target/linux/ath79/base-files/etc/board.d/02_network +++ b/target/linux/ath79/base-files/etc/board.d/02_network @@ -13,11 +13,17 @@ ath79_setup_interfaces() devolo,dvl1200i|\ devolo,dvl1750c|\ devolo,dvl1750i|\ + glinet,ar300m-lite|\ + netgear,ex6400|\ + netgear,ex7300|\ ocedo,koala|\ ocedo,raccoon|\ pcs,cap324|\ pisen,wmm003n|\ pqi,air-pen|\ + tplink,cpe210-v2|\ + tplink,cpe210-v3|\ + tplink,re350k-v1|\ tplink,re450-v2|\ tplink,tl-mr10u|\ tplink,tl-mr3020-v1|\ @@ -27,6 +33,7 @@ ath79_setup_interfaces() ubnt,bullet-m|\ ubnt,bullet-m-xw|\ ubnt,lap-120|\ + ubnt,nanobeam-ac|\ ubnt,nanostation-ac-loco|\ ubnt,rocket-m|\ ubnt,unifiac-lite|\ @@ -62,8 +69,20 @@ ath79_setup_interfaces() ucidef_add_switch "switch0" \ "0@eth0" "1:lan:1" "3:lan:4" "4:lan:3" "5:lan:2" "2:wan" ;; + comfast,cf-e5|\ + glinet,gl-ar150|\ + glinet,gl-ar300m-nand|\ + glinet,gl-ar300m-nor|\ + glinet,gl-x750|\ + tplink,tl-wr810n-v1|\ + tplink,tl-wr810n-v2|\ + ubnt,routerstation|\ + yuncore,a770) + ucidef_set_interfaces_lan_wan "eth1" "eth0" + ;; devolo,dvl1200e|\ - devolo,dvl1750e) + devolo,dvl1750e|\ + ocedo,ursus) ucidef_set_interface_lan "eth0 eth1" ;; dlink,dir-825-b1) @@ -74,6 +93,7 @@ ath79_setup_interfaces() dlink,dir-825-c1|\ dlink,dir-835-a1|\ dlink,dir-859-a1|\ + engenius,epg5000|\ tplink,archer-c2-v3|\ tplink,tl-wr1043nd-v4) ucidef_add_switch "switch0" \ @@ -94,27 +114,30 @@ ath79_setup_interfaces() etactica,eg200) ucidef_set_interface_lan "eth0" "dhcp" ;; - glinet,gl-ar150|\ - glinet,gl-ar300m-nand|\ - glinet,gl-ar300m-nor|\ - glinet,gl-x750|\ - tplink,tl-wr810n-v1|\ - tplink,tl-wr810n-v2|\ - ubnt,routerstation) - ucidef_set_interfaces_lan_wan "eth1" "eth0" - ;; glinet,gl-ar750s) ucidef_add_switch "switch0" \ "0@eth0" "2:lan:2" "3:lan:1" "1:wan" ;; iodata,etg3-r|\ iodata,wn-ac1167dgr|\ + iodata,wn-ac1600dgr|\ iodata,wn-ac1600dgr2|\ iodata,wn-ag300dgr|\ pcs,cr5000) ucidef_add_switch "switch0" \ "0@eth0" "1:lan" "2:lan" "3:lan" "4:lan" "5:wan" ;; + librerouter,librerouter-v1) + ucidef_add_switch "switch0" \ + "0@eth0" "5:wan" "6@eth1" "4:lan" + ;; + nec,wg1200cr|\ + ubnt,nanostation-ac|\ + ubnt,unifiac-mesh-pro|\ + ubnt,unifiac-pro) + ucidef_add_switch "switch0" \ + "0@eth0" "2:lan" "3:wan" + ;; nec,wg800hp) ucidef_add_switch "switch0" \ "0@eth0" "2:lan" "3:lan" "4:lan" "1:wan" @@ -131,10 +154,11 @@ ath79_setup_interfaces() ucidef_add_switch_port_attr "switch0" 5 led 2 ;; netgear,wnr612-v2|\ - on,n150r) + on,n150r|\ + tplink,tl-wr841-v7) ucidef_set_interface_wan "eth0" ucidef_add_switch "switch0" \ - "0@eth1" "1:lan" "2:lan" "3:lan:3" "4:lan:4" + "0@eth1" "1:lan" "2:lan" "3:lan" "4:lan" ;; phicomm,k2t) ucidef_add_switch "switch0" \ @@ -144,6 +168,7 @@ ath79_setup_interfaces() ucidef_add_switch "switch0" \ "0@eth0" "1:lan" "2:lan" "3:wan" ;; + tplink,archer-c5-v1|\ tplink,archer-c7-v1|\ tplink,archer-c7-v2|\ tplink,tl-wdr4900-v2) @@ -153,8 +178,6 @@ ath79_setup_interfaces() buffalo,whr-g301n|\ tplink,tl-mr3220-v1|\ tplink,tl-mr3420-v1|\ - tplink,tl-wr741nd-v4|\ - tplink,tl-wr841-v7|\ tplink,tl-wr841-v9|\ tplink,tl-wr841-v11|\ ubnt,airrouter) @@ -195,7 +218,13 @@ ath79_setup_interfaces() ucidef_add_switch "switch0" \ "0@eth1" "1:lan" "2:lan" "3:lan" "4:lan" ;; - tplink,tl-wr740nd-v4|\ + tplink,tl-wr710n-v1) + ucidef_set_interface_wan "eth0" + ucidef_add_switch "switch0" \ + "0@eth1" "3:lan" + ;; + tplink,tl-wr740n-v4|\ + tplink,tl-wr741nd-v4|\ tplink,tl-wr841-v8|\ tplink,tl-wr842n-v1|\ tplink,tl-wr842n-v2) @@ -206,16 +235,19 @@ ath79_setup_interfaces() tplink,tl-wr941-v2) ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4" "wan" ;; + ubnt,acb-isp) + ucidef_set_interface_wan "eth0" + ucidef_add_switch "switch0" \ + "0@eth1" "2:lan:1" "3:lan:3" "4:lan:2" + ;; ubnt,routerstation-pro) ucidef_set_interface_wan "eth0" ucidef_add_switch "switch0" \ "0@eth1" "2:lan:3" "3:lan:2" "4:lan:1" ;; - ubnt,nanostation-ac|\ - ubnt,unifiac-mesh-pro|\ - ubnt,unifiac-pro) + ubnt,nanostation-m-xw) ucidef_add_switch "switch0" \ - "0@eth0" "2:lan" "3:wan" + "0@eth0" "5:lan" "1:wan" ;; xiaomi,mi-router-4q) ucidef_set_interface_wan "eth0" @@ -249,7 +281,8 @@ ath79_setup_macs() lan_mac=$(mtd_get_mac_text "mac" 4) wan_mac=$(mtd_get_mac_text "mac" 24) ;; - dlink,dir-859-a1) + dlink,dir-859-a1|\ + nec,wg1200cr) lan_mac=$(mtd_get_mac_ascii devdata "lanmac") wan_mac=$(mtd_get_mac_ascii devdata "wanmac") ;; @@ -257,6 +290,14 @@ ath79_setup_macs() elecom,wrc-300ghbk2-i) wan_mac=$(macaddr_add "$(mtd_get_mac_binary ART 4098)" -2) ;; + engenius,epg5000|\ + iodata,wn-ac1167dgr|\ + iodata,wn-ac1600dgr|\ + iodata,wn-ac1600dgr2|\ + iodata,wn-ag300dgr) + lan_mac=$(mtd_get_mac_ascii u-boot-env ethaddr) + wan_mac=$(mtd_get_mac_ascii u-boot-env wanaddr) + ;; engenius,ews511ap) lan_mac=$(mtd_get_mac_text "u-boot-env" 233) eth1_mac=$(macaddr_add "$lan_mac" 1) @@ -267,11 +308,9 @@ ath79_setup_macs() lan_mac=$(mtd_get_mac_ascii u-boot-env ethaddr) wan_mac=$(macaddr_add "$lan_mac" -1) ;; - iodata,wn-ac1167dgr|\ - iodata,wn-ac1600dgr2|\ - iodata,wn-ag300dgr) - lan_mac=$(mtd_get_mac_ascii u-boot-env ethaddr) - wan_mac=$(mtd_get_mac_ascii u-boot-env wanaddr) + jjplus,ja76pf2) + wan_mac=$(fconfig -s -r -d $(find_mtd_part "RedBoot config") -n alias/ethaddr) + lan_mac=$(macaddr_add "$wan_mac" 1) ;; nec,wg800hp) lan_mac=$(mtd_get_mac_text board_data 640) @@ -290,6 +329,11 @@ ath79_setup_macs() wan_mac=$(mtd_get_mac_binary factory 0) lan_mac=$(macaddr_setbit_la "$wan_mac") ;; + tplink,archer-a7-v5|\ + tplink,archer-c7-v5) + base_mac=$(mtd_get_mac_binary info 8) + wan_mac=$(macaddr_add "$base_mac" 1) + ;; tplink,archer-c7-v4) base_mac=$(mtd_get_mac_binary config 8) wan_mac=$(macaddr_add "$base_mac" 1) diff --git a/target/linux/ath79/base-files/etc/board.d/03_gpio_switches b/target/linux/ath79/base-files/etc/board.d/03_gpio_switches index 4f08fab52..6a51a7979 100755 --- a/target/linux/ath79/base-files/etc/board.d/03_gpio_switches +++ b/target/linux/ath79/base-files/etc/board.d/03_gpio_switches @@ -10,13 +10,25 @@ board_config_update board=$(board_name) case "$board" in +comfast,cf-e5) + ucidef_add_gpio_switch "lte_power" "LTE Power" "14" "1" + ucidef_add_gpio_switch "lte_wakeup" "LTE Wakeup" "11" "1" + ucidef_add_gpio_switch "lte_poweroff" "LTE Poweroff" "1" "1" + ucidef_add_gpio_switch "lte_reset" "LTE Reset" "12" "1" + ;; dlink,dir-825-c1|\ dlink,dir-835-a1) ucidef_add_gpio_switch "wan_led_auto" "WAN LED Auto" "20" "0" ;; +librerouter,librerouter-v1) + ucidef_add_gpio_switch "poe_passthrough" "PoE Passthrough" "1" "0" + ;; ubnt,nanostation-ac) ucidef_add_gpio_switch "poe_passthrough" "PoE Passthrough" "3" ;; +ubnt,acb-isp) + ucidef_add_gpio_switch "poe_passthrough" "PoE Passthrough" "11" + ;; esac board_config_flush diff --git a/target/linux/ath79/base-files/etc/hotplug.d/firmware/10-ath9k-eeprom b/target/linux/ath79/base-files/etc/hotplug.d/firmware/10-ath9k-eeprom index 2da9250dd..90f8ca96d 100644 --- a/target/linux/ath79/base-files/etc/hotplug.d/firmware/10-ath9k-eeprom +++ b/target/linux/ath79/base-files/etc/hotplug.d/firmware/10-ath9k-eeprom @@ -20,7 +20,7 @@ ath9k_eeprom_extract() { [ -n "$mtd" ] || \ ath9k_eeprom_die "no mtd device found for partition $part" - dd if=$mtd of=/lib/firmware/$FIRMWARE bs=1 skip=$offset count=$count 2>/dev/null || \ + dd if=$mtd of=/lib/firmware/$FIRMWARE iflag=skip_bytes bs=$count skip=$offset count=1 2>/dev/null || \ ath9k_eeprom_die "failed to extract from $mtd" } @@ -81,7 +81,7 @@ ath9k_patch_fw_mac() { dd of=/lib/firmware/$FIRMWARE conv=notrunc bs=1 seek=$chksum_offset count=2 } - macaddr_2bin $mac | dd of=/lib/firmware/$FIRMWARE conv=notrunc bs=1 seek=$mac_offset count=6 + macaddr_2bin $mac | dd of=/lib/firmware/$FIRMWARE conv=notrunc oflag=seek_bytes bs=6 seek=$mac_offset count=1 } ath9k_patch_fw_mac_crc() { @@ -109,12 +109,18 @@ case "$FIRMWARE" in ath9k_eeprom_extract "art" 4096 1088 ath9k_patch_fw_mac $(mtd_get_mac_ascii devdata "wlan24mac") 2 ;; + engenius,epg5000|\ iodata,wn-ac1167dgr|\ + iodata,wn-ac1600dgr|\ iodata,wn-ac1600dgr2|\ iodata,wn-ag300dgr) ath9k_eeprom_extract "art" 4096 1088 ath9k_patch_fw_mac $(mtd_get_mac_ascii u-boot-env ethaddr) 2 ;; + nec,wg1200cr) + ath9k_eeprom_extract "art" 4096 1088 + ath9k_patch_fw_mac $(mtd_get_mac_ascii devdata wlan24mac) 2 + ;; nec,wg800hp) ath9k_eeprom_extract "art" 4096 1088 ath9k_patch_fw_mac $(mtd_get_mac_text board_data 1664) 2 diff --git a/target/linux/ath79/base-files/etc/hotplug.d/firmware/11-ath10k-caldata b/target/linux/ath79/base-files/etc/hotplug.d/firmware/11-ath10k-caldata index f4741fa3e..fc3f7142b 100644 --- a/target/linux/ath79/base-files/etc/hotplug.d/firmware/11-ath10k-caldata +++ b/target/linux/ath79/base-files/etc/hotplug.d/firmware/11-ath10k-caldata @@ -28,7 +28,7 @@ ath10kcal_from_file() { local offset=$2 local count=$3 - dd if=$source of=/lib/firmware/$FIRMWARE bs=1 skip=$offset count=$count 2>/dev/null || \ + dd if=$source of=/lib/firmware/$FIRMWARE iflag=skip_bytes bs=$count skip=$offset count=1 2>/dev/null || \ ath10kcal_die "failed to extract calibration data from $source" } @@ -42,7 +42,7 @@ ath10kcal_extract() { [ -n "$mtd" ] || \ ath10kcal_die "no mtd device found for partition $part" - dd if=$mtd of=/lib/firmware/$FIRMWARE bs=1 skip=$offset count=$count 2>/dev/null || \ + dd if=$mtd of=/lib/firmware/$FIRMWARE iflag=skip_bytes bs=$count skip=$offset count=1 2>/dev/null || \ ath10kcal_die "failed to extract calibration data from $mtd" } @@ -51,7 +51,7 @@ ath10kcal_patch_mac() { [ -z "$mac" ] && return - macaddr_2bin $mac | dd of=/lib/firmware/$FIRMWARE conv=notrunc bs=1 seek=6 count=6 + macaddr_2bin $mac | dd of=/lib/firmware/$FIRMWARE conv=notrunc oflag=seek_bytes bs=6 seek=6 count=1 } ath10kcal_patch_mac_crc() { @@ -102,6 +102,12 @@ case "$FIRMWARE" in elecom,wrc-1750ghbk2-i) ath10kcal_extract "ART" 20480 2116 ;; + engenius,epg5000|\ + iodata,wn-ac1167dgr|\ + iodata,wn-ac1600dgr2) + ath10kcal_extract "art" 20480 2116 + ath10kcal_patch_mac $(macaddr_add $(mtd_get_mac_ascii u-boot-env ethaddr) +1) + ;; engenius,ews511ap|\ glinet,gl-ar750s|\ glinet,gl-x750|\ @@ -109,16 +115,12 @@ case "$FIRMWARE" in ath10kcal_extract "art" 20480 2116 ath10kcal_patch_mac $(macaddr_add $(cat /sys/class/net/eth0/address) +1) ;; - iodata,wn-ac1167dgr|\ - iodata,wn-ac1600dgr2) - ath10kcal_extract "art" 20480 2116 - ath10kcal_patch_mac $(macaddr_add $(mtd_get_mac_ascii u-boot-env ethaddr) +1) - ;; nec,wg800hp) ath10kcal_extract "art" 20480 2116 ath10kcal_patch_mac_crc $(mtd_get_mac_text board_data 2176) ;; - ocedo,koala) + ocedo,koala|\ + ocedo,ursus) ath10kcal_extract "art" 20480 2116 ath10kcal_patch_mac $(mtd_get_mac_binary art 12) ;; @@ -130,6 +132,7 @@ case "$FIRMWARE" in ath10kcal_extract "ART" 20480 2116 ath10kcal_patch_mac $(macaddr_add $(cat /sys/class/net/eth0/address) -1) ;; + tplink,archer-c5-v1|\ tplink,archer-c7-v2) ath10kcal_extract "art" 20480 2116 ath10kcal_patch_mac $(macaddr_add $(cat /sys/class/net/eth1/address) -1) @@ -140,19 +143,38 @@ case "$FIRMWARE" in ath10kcal_extract "art" 20480 2116 ath10kcal_patch_mac $(macaddr_add $(cat /sys/class/net/eth0/address) -1) ;; + tplink,re350k-v1) + ath10kcal_extract "art" 20480 2116 + ath10kcal_patch_mac $(macaddr_add $(cat /sys/class/net/eth0/address) +2) + ;; ubnt,unifiac-lite|\ ubnt,unifiac-mesh|\ ubnt,unifiac-mesh-pro|\ ubnt,lap-120|\ + ubnt,nanobeam-ac|\ ubnt,nanostation-ac|\ ubnt,nanostation-ac-loco|\ ubnt,unifiac-pro) ath10kcal_extract "EEPROM" 20480 2116 ;; + yuncore,a770) + ath10kcal_extract "art" 20480 2116 + ;; esac ;; "ath10k/pre-cal-pci-0000:00:00.0.bin") case $board in + nec,wg1200cr) + ath10kcal_extract "art" 20480 12064 + ath10kcal_patch_mac_crc $(mtd_get_mac_ascii devdata wlan5mac) + ln -sf /lib/firmware/ath10k/pre-cal-pci-0000\:00\:00.0.bin \ + /lib/firmware/ath10k/QCA9888/hw2.0/board.bin + ;; + netgear,ex6400|\ + netgear,ex7300) + ath10kcal_extract "caldata" 20480 12064 + ath10kcal_patch_mac $(mtd_get_mac_binary caldata 12) + ;; phicomm,k2t) ath10kcal_extract "art" 20480 12064 ath10kcal_patch_mac_crc $(k2t_get_mac "5g_mac") diff --git a/target/linux/ath79/base-files/etc/hotplug.d/ieee80211/00-wmac-migration b/target/linux/ath79/base-files/etc/hotplug.d/ieee80211/00-wmac-migration new file mode 100644 index 000000000..b051daf98 --- /dev/null +++ b/target/linux/ath79/base-files/etc/hotplug.d/ieee80211/00-wmac-migration @@ -0,0 +1,36 @@ +#!/bin/sh + +WMAC_PATH_CHANGED=0 + +. /lib/functions.sh + +migrate_wmac_path() { + local section="$1" + local path + + config_get path ${section} path + case ${path} in + "platform/qca955x_wmac") + path="platform/ahb/ahb:apb/18100000.wmac" + WMAC_PATH_CHANGED=1 + ;; + "platform/ar933x_wmac") + path="platform/ahb/18100000.wmac" + WMAC_PATH_CHANGED=1 + ;; + *) + return 0 + ;; + esac + + uci set wireless.${section}.path=${path} +} + +[ "${ACTION}" = "add" ] && { + [ ! -e /etc/config/wireless ] && return 0 + + config_load wireless + config_foreach migrate_wmac_path wifi-device + + [ "${WMAC_PATH_CHANGED}" = "1" ] && uci commit wireless +} diff --git a/target/linux/ath79/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac b/target/linux/ath79/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac index 14d4f6b9d..2da2e8bfb 100644 --- a/target/linux/ath79/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac +++ b/target/linux/ath79/base-files/etc/hotplug.d/ieee80211/10_fix_wifi_mac @@ -19,6 +19,12 @@ case "$board" in [ "$PHYNBR" -eq 1 ] && \ echo $(macaddr_add "$(mtd_get_mac_ascii u-boot-env ethaddr)" 1) > /sys${DEVPATH}/macaddress ;; + iodata,wn-ac1600dgr) + # There is no eeprom data for 5 GHz wlan in "art" partition + # which would allow to patch the macaddress + [ "$PHYNBR" -eq 0 ] && \ + echo $(macaddr_add "$(mtd_get_mac_ascii u-boot-env ethaddr)" 1) > /sys${DEVPATH}/macaddress + ;; phicomm,k2t) # The K2T factory firmware does use LAN mac address as the 2.4G wifi mac address [ "$PHYNBR" -eq 1 ] && \ diff --git a/target/linux/ath79/base-files/etc/uci-defaults/04_led_migration b/target/linux/ath79/base-files/etc/uci-defaults/04_led_migration new file mode 100644 index 000000000..2ca87ccb3 --- /dev/null +++ b/target/linux/ath79/base-files/etc/uci-defaults/04_led_migration @@ -0,0 +1,16 @@ +#!/bin/sh + +. /lib/functions.sh +. /lib/functions/migrations.sh + +board=$(board_name) + +case "$board" in +engenius,epg5000) + migrate_leds ":wlan-2g=:wlan2g" ":wlan-5g=:wlan5g" + ;; +esac + +migrations_apply system + +exit 0 diff --git a/target/linux/ath79/base-files/lib/upgrade/platform.sh b/target/linux/ath79/base-files/lib/upgrade/platform.sh index a7cb455b8..c2fe08154 100644 --- a/target/linux/ath79/base-files/lib/upgrade/platform.sh +++ b/target/linux/ath79/base-files/lib/upgrade/platform.sh @@ -5,13 +5,31 @@ PART_NAME=firmware REQUIRE_IMAGE_METADATA=1 -routerstation_do_upgrade() { +redboot_fis_do_upgrade() { local append - local kern_length=0x$(dd if="$1" bs=2 skip=1 count=4 2>/dev/null) + local sysup_file="$1" + local kern_part="$2" + local magic=$(get_magic_word "$sysup_file") - [ -f "$CONF_TAR" -a "$SAVE_CONFIG" -eq 1 ] && append="-j $CONF_TAR" - dd if="$1" bs=64k skip=1 2>/dev/null | \ - mtd -r $append -Fkernel:$kern_length:0x80060000,rootfs write - kernel:rootfs + if [ "$magic" = "4349" ]; then + local kern_length=0x$(dd if="$sysup_file" bs=2 skip=1 count=4 2>/dev/null) + + [ -f "$CONF_TAR" -a "$SAVE_CONFIG" -eq 1 ] && append="-j $CONF_TAR" + dd if="$sysup_file" bs=64k skip=1 2>/dev/null | \ + mtd -r $append -F$kern_part:$kern_length:0x80060000,rootfs write - $kern_part:rootfs + + elif [ "$magic" = "7379" ]; then + local board_dir=$(tar tf $sysup_file | grep -m 1 '^sysupgrade-.*/$') + local kern_length=$(tar xf $sysup_file ${board_dir}kernel -O | wc -c) + + [ -f "$CONF_TAR" -a "$SAVE_CONFIG" -eq 1 ] && append="-j $CONF_TAR" + tar xf $sysup_file ${board_dir}kernel ${board_dir}root -O | \ + mtd -r $append -F$kern_part:$kern_length:0x80060000,rootfs write - $kern_part:rootfs + + else + echo "Unknown image, aborting!" + return 1 + fi } platform_check_image() { @@ -22,9 +40,12 @@ platform_do_upgrade() { local board=$(board_name) case "$board" in + jjplus,ja76pf2) + redboot_fis_do_upgrade "$ARGV" linux + ;; ubnt,routerstation|\ ubnt,routerstation-pro) - routerstation_do_upgrade "$ARGV" + redboot_fis_do_upgrade "$ARGV" kernel ;; *) default_do_upgrade "$ARGV" diff --git a/target/linux/ath79/config-4.19 b/target/linux/ath79/config-4.19 new file mode 100644 index 000000000..6cdbb968c --- /dev/null +++ b/target/linux/ath79/config-4.19 @@ -0,0 +1,229 @@ +CONFIG_AG71XX=y +# CONFIG_AG71XX_DEBUG is not set +CONFIG_AG71XX_DEBUG_FS=y +CONFIG_AR8216_PHY=y +CONFIG_AR8216_PHY_LEDS=y +CONFIG_ARCH_BINFMT_ELF_STATE=y +CONFIG_ARCH_CLOCKSOURCE_DATA=y +CONFIG_ARCH_DISCARD_MEMBLOCK=y +CONFIG_ARCH_HAS_ELF_RANDOMIZE=y +CONFIG_ARCH_HAS_RESET_CONTROLLER=y +CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y +CONFIG_ARCH_HIBERNATION_POSSIBLE=y +CONFIG_ARCH_MMAP_RND_BITS_MAX=15 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 +CONFIG_ARCH_SUPPORTS_UPROBES=y +CONFIG_ARCH_SUSPEND_POSSIBLE=y +CONFIG_ARCH_USE_BUILTIN_BSWAP=y +CONFIG_ARCH_USE_QUEUED_RWLOCKS=y +CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y +CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y +CONFIG_ATH79=y +CONFIG_ATH79_WDT=y +CONFIG_CEVT_R4K=y +CONFIG_CLKDEV_LOOKUP=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_CMDLINE="rootfstype=squashfs,jffs2" +CONFIG_CMDLINE_BOOL=y +# CONFIG_CMDLINE_OVERRIDE is not set +CONFIG_COMMON_CLK=y +# CONFIG_COMMON_CLK_BOSTON is not set +CONFIG_CPU_BIG_ENDIAN=y +CONFIG_CPU_GENERIC_DUMP_TLB=y +CONFIG_CPU_HAS_PREFETCH=y +CONFIG_CPU_HAS_RIXI=y +CONFIG_CPU_HAS_SYNC=y +CONFIG_CPU_MIPS32=y +CONFIG_CPU_MIPS32_R2=y +CONFIG_CPU_MIPSR2=y +CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y +CONFIG_CPU_R4K_CACHE_TLB=y +CONFIG_CPU_R4K_FPU=y +CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_HIGHMEM=y +CONFIG_CPU_SUPPORTS_MSA=y +CONFIG_CRYPTO_RNG2=y +CONFIG_CRYPTO_WORKQUEUE=y +CONFIG_CSRC_R4K=y +CONFIG_DMA_DIRECT_OPS=y +CONFIG_DMA_NONCOHERENT=y +CONFIG_DMA_NONCOHERENT_CACHE_SYNC=y +CONFIG_DMA_NONCOHERENT_MMAP=y +CONFIG_DMA_NONCOHERENT_OPS=y +CONFIG_DTC=y +CONFIG_EARLY_PRINTK=y +CONFIG_ETHERNET_PACKET_MANGLE=y +CONFIG_FIXED_PHY=y +CONFIG_GENERIC_ATOMIC64=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_IRQ_CHIP=y +CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_LIB_ASHLDI3=y +CONFIG_GENERIC_LIB_ASHRDI3=y +CONFIG_GENERIC_LIB_CMPDI2=y +CONFIG_GENERIC_LIB_LSHRDI3=y +CONFIG_GENERIC_LIB_UCMPDI2=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_PHY=y +CONFIG_GENERIC_PINCONF=y +CONFIG_GENERIC_PINCTRL_GROUPS=y +CONFIG_GENERIC_PINMUX_FUNCTIONS=y +CONFIG_GENERIC_SCHED_CLOCK=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GPIOLIB=y +CONFIG_GPIOLIB_IRQCHIP=y +CONFIG_GPIO_74X164=y +CONFIG_GPIO_ATH79=y +CONFIG_GPIO_GENERIC=y +CONFIG_GPIO_SYSFS=y +CONFIG_HANDLE_DOMAIN_IRQ=y +CONFIG_HARDWARE_WATCHPOINTS=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HAVE_ARCH_COMPILER_H=y +CONFIG_HAVE_ARCH_JUMP_LABEL=y +CONFIG_HAVE_ARCH_KGDB=y +CONFIG_HAVE_ARCH_SECCOMP_FILTER=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_CBPF_JIT=y +CONFIG_HAVE_CLK=y +CONFIG_HAVE_CLK_PREPARE=y +CONFIG_HAVE_CONTEXT_TRACKING=y +CONFIG_HAVE_COPY_THREAD_TLS=y +CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_HAVE_DEBUG_KMEMLEAK=y +CONFIG_HAVE_DEBUG_STACKOVERFLOW=y +CONFIG_HAVE_DMA_CONTIGUOUS=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_HAVE_IDE=y +CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y +CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_KVM=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y +CONFIG_HAVE_MEMBLOCK=y +CONFIG_HAVE_MEMBLOCK_NODE_MAP=y +CONFIG_HAVE_MOD_ARCH_SPECIFIC=y +CONFIG_HAVE_NET_DSA=y +CONFIG_HAVE_OPROFILE=y +CONFIG_HAVE_PERF_EVENTS=y +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_RSEQ=y +CONFIG_HAVE_SYSCALL_TRACEPOINTS=y +CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y +CONFIG_HW_HAS_PCI=y +CONFIG_HZ_PERIODIC=y +CONFIG_IMAGE_CMDLINE_HACK=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_MIPS_CPU=y +CONFIG_IRQ_WORK=y +CONFIG_LEDS_GPIO=y +# CONFIG_LEDS_RESET is not set +CONFIG_LIBFDT=y +CONFIG_LOCK_DEBUGGING_SUPPORT=y +CONFIG_MDIO_BITBANG=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_GPIO=y +CONFIG_MEMFD_CREATE=y +CONFIG_MFD_SYSCON=y +CONFIG_MIGRATION=y +CONFIG_MIPS=y +CONFIG_MIPS_ASID_BITS=8 +CONFIG_MIPS_ASID_SHIFT=0 +CONFIG_MIPS_CBPF_JIT=y +CONFIG_MIPS_CLOCK_VSYSCALL=y +# CONFIG_MIPS_CMDLINE_BUILTIN_EXTEND is not set +# CONFIG_MIPS_CMDLINE_DTB_EXTEND is not set +# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set +CONFIG_MIPS_CMDLINE_FROM_DTB=y +# CONFIG_MIPS_ELF_APPENDED_DTB is not set +CONFIG_MIPS_L1_CACHE_SHIFT=5 +# CONFIG_MIPS_NO_APPENDED_DTB is not set +CONFIG_MIPS_RAW_APPENDED_DTB=y +CONFIG_MIPS_SPRAM=y +CONFIG_MODULES_USE_ELF_REL=y +CONFIG_MTD_CFI_ADV_OPTIONS=y +CONFIG_MTD_CFI_GEOMETRY=y +# CONFIG_MTD_CFI_I2 is not set +# CONFIG_MTD_CFI_INTELEXT is not set +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_M25P80=y +# CONFIG_MTD_MAP_BANK_WIDTH_1 is not set +# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set +CONFIG_MTD_PARSER_CYBERTAN=y +CONFIG_MTD_PHYSMAP=y +CONFIG_MTD_SPI_NOR=y +CONFIG_MTD_SPLIT_LZMA_FW=y +CONFIG_MTD_SPLIT_TPLINK_FW=y +CONFIG_MTD_SPLIT_UIMAGE_FW=y +CONFIG_MTD_TPLINK_PARTS=y +CONFIG_MTD_VIRT_CONCAT=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NEED_PER_CPU_KM=y +CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y +CONFIG_NVMEM=y +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y +CONFIG_OF_MDIO=y +CONFIG_OF_NET=y +CONFIG_PCI_DRIVERS_LEGACY=y +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PGTABLE_LEVELS=2 +CONFIG_PHYLIB=y +# CONFIG_PHY_AR7100_USB is not set +# CONFIG_PHY_AR7200_USB is not set +# CONFIG_PHY_ATH79_USB is not set +CONFIG_PINCTRL=y +CONFIG_RATIONAL=y +CONFIG_REGMAP=y +CONFIG_REGMAP_MMIO=y +CONFIG_RESET_ATH79=y +CONFIG_RESET_CONTROLLER=y +CONFIG_SERIAL_8250_NR_UARTS=1 +CONFIG_SERIAL_8250_RUNTIME_UARTS=1 +CONFIG_SERIAL_AR933X=y +CONFIG_SERIAL_AR933X_CONSOLE=y +CONFIG_SERIAL_AR933X_NR_UARTS=2 +CONFIG_SERIAL_OF_PLATFORM=y +CONFIG_SPI=y +CONFIG_SPI_ATH79=y +CONFIG_SPI_BITBANG=y +CONFIG_SPI_GPIO=y +CONFIG_SPI_MASTER=y +CONFIG_SPI_MEM=y +# CONFIG_SPI_RB4XX is not set +CONFIG_SRCU=y +CONFIG_SWCONFIG=y +CONFIG_SWCONFIG_LEDS=y +CONFIG_SWPHY=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_SYS_HAS_CPU_MIPS32_R2=y +CONFIG_SYS_HAS_EARLY_PRINTK=y +CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y +CONFIG_SYS_SUPPORTS_ARBIT_HZ=y +CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y +CONFIG_SYS_SUPPORTS_MIPS16=y +CONFIG_SYS_SUPPORTS_ZBOOT=y +CONFIG_SYS_SUPPORTS_ZBOOT_UART_PROM=y +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TINY_SRCU=y +CONFIG_USB_SUPPORT=y +CONFIG_USE_OF=y diff --git a/target/linux/ath79/dts/ar7161_jjplus_ja76pf2.dts b/target/linux/ath79/dts/ar7161_jjplus_ja76pf2.dts new file mode 100644 index 000000000..76f140fa5 --- /dev/null +++ b/target/linux/ath79/dts/ar7161_jjplus_ja76pf2.dts @@ -0,0 +1,126 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/dts-v1/; + +#include +#include + +#include "ar7100.dtsi" + +/ { + model = "jjPlus JA76PF2"; + compatible = "jjplus,ja76pf2", "qca,ar7161"; + + memory@0 { + device_type = "memory"; + reg = <0x0 0x4000000>; + }; + + chosen { + bootargs = "console=ttyS0,115200n8"; + }; + + aliases { + led-boot = &d2; + led-failsafe = &d2; + led-running = &d2; + led-upgrade = &d2; + }; + + extosc: ref { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-output-names = "ref"; + clock-frequency = <40000000>; + }; + + leds { + compatible = "gpio-leds"; + + d2: d2 { + label = "ja76pf2:green:d2"; + gpios = <&gpio 5 GPIO_ACTIVE_LOW>; + }; + + d3 { + label = "ja76pf2:green:d3"; + gpios = <&gpio 4 GPIO_ACTIVE_HIGH>; + }; + + d4 { + label = "ja76pf2:green:d4"; + gpios = <&gpio 3 GPIO_ACTIVE_HIGH>; + }; + }; + + keys { + compatible = "gpio-keys-polled"; + poll-interval = <20>; + + sw1 { + label = "sw1"; + linux,code = ; + gpios = <&gpio 7 GPIO_ACTIVE_LOW>; + debounce-interval = <60>; + }; + + sw2 { + label = "sw2"; + linux,code = ; + gpios = <&gpio 8 GPIO_ACTIVE_LOW>; + debounce-interval = <60>; + }; + }; +}; + +&mdio0 { + status = "okay"; + + phy-mask = <0x1>; + + phy0: ethernet-phy@0 { + reg = <0>; + phy-mode = "rgmii"; + }; + + phy4: ethernet-phy@4 { + reg = <4>; + phy-mode = "rgmii"; + }; +}; + +ð0 { + status = "okay"; + + phy-handle = <&phy0>; +}; + +ð1 { + status = "okay"; + + phy-handle = <&phy4>; +}; + +&pcie0 { + status = "okay"; +}; + +&spi { + status = "okay"; + num-cs = <1>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <104000000>; + + partitions { + #address-cells = <1>; + #size-cells = <1>; + compatible = "ecoscentric,redboot-fis-partitions"; + }; + }; +}; + +&uart { + status = "okay"; +}; diff --git a/target/linux/ath79/dts/ar7240.dtsi b/target/linux/ath79/dts/ar7240.dtsi index d32960a49..268c8780f 100644 --- a/target/linux/ath79/dts/ar7240.dtsi +++ b/target/linux/ath79/dts/ar7240.dtsi @@ -39,11 +39,12 @@ builtin-switch; builtin_switch: switch0@1f { - compatible = "qca,ar8216-builtin"; + compatible = "qca,ar7240sw"; reg = <0x1f>; resets = <&rst 8>; reset-names = "switch"; + qca,mib-poll-interval = <500>; mdio-bus { #address-cells = <1>; diff --git a/target/linux/ath79/dts/ar7241.dtsi b/target/linux/ath79/dts/ar7241.dtsi index 2e7c26b8e..155826610 100644 --- a/target/linux/ath79/dts/ar7241.dtsi +++ b/target/linux/ath79/dts/ar7241.dtsi @@ -58,11 +58,12 @@ builtin-switch; builtin_switch: switch0@1f { - compatible = "qca,ar8216-builtin"; + compatible = "qca,ar7240sw"; reg = <0x1f>; resets = <&rst 8>; reset-names = "switch"; + qca,mib-poll-interval = <500>; mdio-bus { #address-cells = <1>; diff --git a/target/linux/ath79/dts/ar7241_tplink_tl-wr841-v7.dts b/target/linux/ath79/dts/ar7241_tplink_tl-wr841-v7.dts index 4a3fc5962..b79e3c735 100644 --- a/target/linux/ath79/dts/ar7241_tplink_tl-wr841-v7.dts +++ b/target/linux/ath79/dts/ar7241_tplink_tl-wr841-v7.dts @@ -5,7 +5,7 @@ / { compatible = "tplink,tl-wr841-v7", "qca,ar7241"; - model = "TP-LINK TL-WR841N/ND v7"; + model = "TP-Link TL-WR841N/ND v7"; ath9k-leds { compatible = "gpio-leds"; diff --git a/target/linux/ath79/dts/ar7241_ubnt_nano-m.dts b/target/linux/ath79/dts/ar7241_ubnt_nanostation-m.dts similarity index 70% rename from target/linux/ath79/dts/ar7241_ubnt_nano-m.dts rename to target/linux/ath79/dts/ar7241_ubnt_nanostation-m.dts index ebdc4306e..eebe65e53 100644 --- a/target/linux/ath79/dts/ar7241_ubnt_nano-m.dts +++ b/target/linux/ath79/dts/ar7241_ubnt_nanostation-m.dts @@ -4,6 +4,6 @@ #include "ar7241_ubnt_xm_outdoor.dtsi" / { - compatible = "ubnt,nano-m", "ubnt,xm", "qca,ar7241"; + compatible = "ubnt,nanostation-m", "ubnt,xm", "qca,ar7241"; model = "Ubiquiti Nanostation M"; }; diff --git a/target/linux/ath79/dts/ar7242.dtsi b/target/linux/ath79/dts/ar7242.dtsi index dd5417e57..44eb0edfd 100644 --- a/target/linux/ath79/dts/ar7242.dtsi +++ b/target/linux/ath79/dts/ar7242.dtsi @@ -61,12 +61,13 @@ builtin-switch; builtin_switch: switch0@1f { - compatible = "qca,ar8216-builtin"; + compatible = "qca,ar7240sw"; #address-cells = <1>; #size-cells = <0>; reg = <0x1f>; resets = <&rst 8>; reset-names = "switch"; + qca,mib-poll-interval = <500>; }; }; diff --git a/target/linux/ath79/dts/ar7242_tplink_tl-wr2543-v1.dts b/target/linux/ath79/dts/ar7242_tplink_tl-wr2543-v1.dts index 9a135df1a..c42207e6c 100644 --- a/target/linux/ath79/dts/ar7242_tplink_tl-wr2543-v1.dts +++ b/target/linux/ath79/dts/ar7242_tplink_tl-wr2543-v1.dts @@ -8,7 +8,7 @@ / { compatible = "tplink,tl-wr2543-v1", "qca,ar7242"; - model = "TP-LINK TL-WR2543N/ND"; + model = "TP-Link TL-WR2543N/ND"; aliases { led-boot = &system; diff --git a/target/linux/ath79/dts/ar9132_tplink_tl-wr1043nd-v1.dts b/target/linux/ath79/dts/ar9132_tplink_tl-wr1043nd-v1.dts index 23eba5bb3..f617d89c5 100644 --- a/target/linux/ath79/dts/ar9132_tplink_tl-wr1043nd-v1.dts +++ b/target/linux/ath79/dts/ar9132_tplink_tl-wr1043nd-v1.dts @@ -8,7 +8,7 @@ / { compatible = "tplink,tl-wr1043nd-v1", "qca,ar9132"; - model = "TP-Link TL-WR1043ND Version 1"; + model = "TP-Link TL-WR1043ND v1"; aliases { led-boot = &system; diff --git a/target/linux/ath79/dts/ar9330.dtsi b/target/linux/ath79/dts/ar9330.dtsi index 01116ff45..49c6f6985 100644 --- a/target/linux/ath79/dts/ar9330.dtsi +++ b/target/linux/ath79/dts/ar9330.dtsi @@ -173,10 +173,11 @@ builtin-switch; builtin_switch: switch0@1f { - compatible = "qca,ar8216-builtin"; + compatible = "qca,ar7240sw"; reg = <0x1f>; resets = <&rst 8>; reset-names = "switch"; + qca,mib-poll-interval = <500>; mdio-bus { #address-cells = <1>; diff --git a/target/linux/ath79/dts/ar9331_tplink_tl-wr710n-v1.dts b/target/linux/ath79/dts/ar9331_tplink_tl-wr710n-v1.dts new file mode 100644 index 000000000..056e9fa51 --- /dev/null +++ b/target/linux/ath79/dts/ar9331_tplink_tl-wr710n-v1.dts @@ -0,0 +1,130 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/dts-v1/; + +#include +#include + +#include "ar9331.dtsi" + +/ { + model = "TP-Link TL-WR710N v1"; + compatible = "tplink,tl-wr710n-v1", "qca,ar9331"; + + aliases { + serial0 = &uart; + led-boot = &led_system; + led-failsafe = &led_system; + led-running = &led_system; + led-upgrade = &led_system; + }; + + keys { + compatible = "gpio-keys-polled"; + poll-interval = <20>; + + reset { + label = "reset"; + linux,code = ; + gpios = <&gpio 11 GPIO_ACTIVE_LOW>; + debounce-interval = <60>; + }; + }; + + leds { + compatible = "gpio-leds"; + + led_system: system { + label = "tl-wr710n:green:system"; + gpios = <&gpio 27 GPIO_ACTIVE_LOW>; + }; + }; + + reg_usb_vbus: regulator { + compatible = "regulator-fixed"; + regulator-name = "usb_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&gpio 8 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + +}; + +&spi { + status = "okay"; + num-cs = <1>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <25000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + uboot: partition@0 { + reg = <0x0 0x20000>; + label = "u-boot"; + read-only; + }; + + firmware: partition@20000 { + compatible = "tplink,firmware"; + reg = <0x20000 0x7d0000>; + label = "firmware"; + }; + + art: partition@7f0000 { + reg = <0x7f0000 0x10000>; + label = "art"; + read-only; + }; + }; + }; +}; + +ð0 { + status = "okay"; + + mtd-mac-address = <&uboot 0x1fc00>; + + gmac-config { + device = <&gmac>; + + switch-phy-addr-swap = <0>; + switch-phy-swap = <0>; + }; +}; + +ð1 { + status = "okay"; + + mtd-mac-address = <&uboot 0x1fc00>; + mtd-mac-address-increment = <(-1)>; +}; + +&gpio { + status = "okay"; +}; + +&uart { + status = "okay"; +}; + +&usb { + dr_mode = "host"; + vbus-supply = <®_usb_vbus>; + status = "okay"; +}; + +&usb_phy { + status = "okay"; +}; + +&wmac { + status = "okay"; + mtd-cal-data = <&art 0x1000>; + mtd-mac-address = <&uboot 0x1fc00>; +}; diff --git a/target/linux/ath79/dts/ar9331_tplink_tl-wr740nd-v4.dts b/target/linux/ath79/dts/ar9331_tplink_tl-wr740n-v4.dts similarity index 56% rename from target/linux/ath79/dts/ar9331_tplink_tl-wr740nd-v4.dts rename to target/linux/ath79/dts/ar9331_tplink_tl-wr740n-v4.dts index 1b0283ebf..6775a7467 100644 --- a/target/linux/ath79/dts/ar9331_tplink_tl-wr740nd-v4.dts +++ b/target/linux/ath79/dts/ar9331_tplink_tl-wr740n-v4.dts @@ -4,6 +4,6 @@ #include "ar9331_tplink_tl-wr741nd-v4.dtsi" / { - model = "TP-Link TL-WR740N/ND v4"; - compatible = "tplink,tl-wr740nd-v4", "qca,ar9331"; + model = "TP-Link TL-WR740N v4"; + compatible = "tplink,tl-wr740n-v4", "qca,ar9331"; }; diff --git a/target/linux/ath79/dts/ar9342_ubnt_nanobeam-ac.dts b/target/linux/ath79/dts/ar9342_ubnt_nanobeam-ac.dts new file mode 100644 index 000000000..6e64c7faa --- /dev/null +++ b/target/linux/ath79/dts/ar9342_ubnt_nanobeam-ac.dts @@ -0,0 +1,64 @@ +// SPDX-License-Identifier: GPL-2.0 +/dts-v1/; + +#include +#include + +#include "ar9342_ubnt_wa.dtsi" + +/ { + compatible = "ubnt,nanobeam-ac", "ubnt,wa", "qca,ar9342"; + model = "Ubiquiti NanoBeam AC (WA)"; + + leds { + compatible = "gpio-leds"; + + rssi0 { + label = "ubnt:blue:rssi0"; + gpios = <&gpio 11 GPIO_ACTIVE_LOW>; + }; + + rssi1 { + label = "ubnt:blue:rssi1"; + gpios = <&gpio 16 GPIO_ACTIVE_LOW>; + }; + + rssi2 { + label = "ubnt:blue:rssi2"; + gpios = <&gpio 13 GPIO_ACTIVE_LOW>; + }; + + rssi3 { + label = "ubnt:blue:rssi3"; + gpios = <&gpio 14 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&mdio0 { + status = "okay"; + + phy-mask = <4>; + phy4: ethernet-phy@4 { + phy-mode = "rgmii"; + reg = <4>; + }; +}; + +ð0 { + status = "okay"; + + /* default for ar934x, except for 1000M and 10M */ + pll-data = <0x06000000 0x00000101 0x00001313>; + + mtd-mac-address = <&eeprom 0x0>; + + phy-mode = "rgmii"; + phy-handle = <&phy4>; + + gmac-config { + device = <&gmac>; + rxd-delay = <3>; + rxdv-delay = <3>; + }; +}; diff --git a/target/linux/ath79/dts/ar9342_ubnt_nanostation-m-xw.dts b/target/linux/ath79/dts/ar9342_ubnt_nanostation-m-xw.dts new file mode 100644 index 000000000..6ac79b0c1 --- /dev/null +++ b/target/linux/ath79/dts/ar9342_ubnt_nanostation-m-xw.dts @@ -0,0 +1,37 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/dts-v1/; + +#include +#include + +#include "ar9342_ubnt_xw.dtsi" + +/ { + compatible = "ubnt,nanostation-m-xw", "ubnt,xw", "qca,ar9342"; + model = "Ubiquiti Nanostation M (XW)"; +}; + +&mdio0 { + status = "okay"; + + phy4-mii-enable; + phy-mask = <0x23>; + + phy4: ethernet-phy@0 { + reg = <0>; + phy-mode = "mii"; + }; +}; + +ð0 { + status = "okay"; + + phy-mode = "mii"; + phy-handle = <&phy4>; + + gmac-config { + device = <&gmac>; + mii-gmac0 = <1>; + mii-gmac0-slave = <1>; + }; +}; diff --git a/target/linux/ath79/dts/ar9344_comfast_cf-e120a-v3.dts b/target/linux/ath79/dts/ar9344_comfast_cf-e120a-v3.dts new file mode 100644 index 000000000..b0fdce77a --- /dev/null +++ b/target/linux/ath79/dts/ar9344_comfast_cf-e120a-v3.dts @@ -0,0 +1,146 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/dts-v1/; + +#include +#include + +#include "ar9344.dtsi" + +/ { + compatible = "comfast,cf-e120a-v3", "qca,ar9344"; + model = "COMFAST CF-E120A v3"; + + aliases { + serial0 = &uart; + led-boot = &wan; + led-failsafe = &wan; + led-upgrade = &wan; + }; + + leds { + compatible = "gpio-leds"; + + pinctrl-names = "default"; + pinctrl-0 = <&led_rssimediumhigh_pin>; + + wan: wan { + label = "cf-e120a-v3:green:wan"; + gpios = <&gpio 3 GPIO_ACTIVE_LOW>; + }; + + lan { + label = "cf-e120a-v3:green:lan"; + gpios = <&gpio 2 GPIO_ACTIVE_LOW>; + }; + + wlan { + label = "cf-e120a-v3:green:wlan"; + gpios = <&gpio 0 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy0tpt"; + }; + + rssilow { + label = "cf-e120a-v3:red:rssilow"; + gpios = <&gpio 14 GPIO_ACTIVE_LOW>; + }; + + rssimediumlow { + label = "cf-e120a-v3:red:rssimediumlow"; + gpios = <&gpio 15 GPIO_ACTIVE_LOW>; + }; + + rssimediumhigh { + label = "cf-e120a-v3:green:rssimediumhigh"; + gpios = <&gpio 16 GPIO_ACTIVE_LOW>; + }; + + rssihigh { + label = "cf-e120a-v3:green:rssihigh"; + gpios = <&gpio 17 GPIO_ACTIVE_LOW>; + }; + }; + + keys { + compatible = "gpio-keys-polled"; + poll-interval = <20>; + + reset { + label = "reset"; + linux,code = ; + gpios = <&gpio 22 GPIO_ACTIVE_LOW>; + debounce-interval = <60>; + }; + }; +}; + +&pinmux { + led_rssimediumhigh_pin: pinmux_rssimediumhigh_pin { + pinctrl-single,bits = <0x10 0x0 0xff>; + }; +}; + +&spi { + status = "okay"; + num-cs = <1>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <25000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + uboot: partition@0 { + label = "u-boot"; + reg = <0x000000 0x010000>; + read-only; + }; + + art: partition@10000 { + label = "art"; + reg = <0x010000 0x010000>; + read-only; + }; + + firmware: partition@20000 { + compatible = "denx,uimage"; + label = "firmware"; + reg = <0x020000 0x7d0000>; + }; + + nvram: partition@7f0000 { + label = "nvram"; + reg = <0x7f0000 0x010000>; + read-only; + }; + }; + }; +}; + +&uart { + status = "okay"; +}; + +ð0 { + status = "okay"; + phy-handle = <&swphy0>; + mtd-mac-address = <&art 0x0>; + + gmac-config { + device = <&gmac>; + switch-phy-swap = <1>; + }; +}; + +ð1 { + status = "okay"; + mtd-mac-address = <&art 0x6>; +}; + +&wmac { + status = "okay"; + mtd-cal-data = <&art 0x1000>; +}; diff --git a/target/linux/ath79/dts/ar934x.dtsi b/target/linux/ath79/dts/ar934x.dtsi index 3eed4de79..691cbe13e 100644 --- a/target/linux/ath79/dts/ar934x.dtsi +++ b/target/linux/ath79/dts/ar934x.dtsi @@ -192,19 +192,16 @@ &mdio0 { compatible = "qca,ar9340-mdio"; - resets = <&rst 22>; - reset-names = "mdio"; }; ð0 { - compatible = "qca,ar9340-eth", "syscon", "simple-mfd"; + compatible = "qca,ar9340-eth", "syscon"; pll-data = <0x16000000 0x00000101 0x00001616>; pll-reg = <0x4 0x2c 17>; pll-handle = <&pll>; - - resets = <&rst 9>; - reset-names = "mac"; + resets = <&rst 9>, <&rst 22>; + reset-names = "mac", "mdio"; }; &mdio1 { @@ -216,13 +213,14 @@ builtin-switch; builtin_switch: switch0@1f { - compatible = "qca,ar8229-builtin"; + compatible = "qca,ar8229"; reg = <0x1f>; resets = <&rst 8>; reset-names = "switch"; phy-mode = "gmii"; - phy4-mii-enable; + qca,mib-poll-interval = <500>; + qca,phy4-mii-enable; mdio-bus { #address-cells = <1>; diff --git a/target/linux/ath79/dts/qca9531_comfast_cf-e5.dts b/target/linux/ath79/dts/qca9531_comfast_cf-e5.dts new file mode 100644 index 000000000..c181b32aa --- /dev/null +++ b/target/linux/ath79/dts/qca9531_comfast_cf-e5.dts @@ -0,0 +1,141 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/dts-v1/; + +#include +#include + +#include "qca953x.dtsi" + +/ { + compatible = "comfast,cf-e5", "qca,qca9531"; + model = "COMFAST CF-E5/E7"; + + keys { + compatible = "gpio-keys-polled"; + poll-interval = <20>; + + button0 { + label = "reset"; + linux,code = ; + gpios = <&gpio 17 GPIO_ACTIVE_LOW>; + }; + }; + + leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&jtag_disable_pins &led_wan_pin>; + + wan { + label = "cf-e5:blue:wan"; + gpios = <&gpio 4 GPIO_ACTIVE_LOW>; + }; + + lan { + label = "cf-e5:blue:lan"; + gpios = <&gpio 16 GPIO_ACTIVE_LOW>; + }; + + wlan { + label = "cf-e5:blue:wlan"; + gpios = <&gpio 0 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy0tpt"; + }; + + rssi0 { + label = "cf-e5:blue:rssi0"; + gpios = <&gpio 2 GPIO_ACTIVE_LOW>; + }; + + rssi1 { + label = "cf-e5:blue:rssi1"; + gpios = <&gpio 3 GPIO_ACTIVE_LOW>; + }; + + rssi2 { + label = "cf-e5:blue:rssi2"; + gpios = <&gpio 15 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&uart { + status = "okay"; +}; + +&usb0 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; + + hub_port: port@1 { + reg = <1>; + #trigger-source-cells = <0>; + }; +}; + +&usb_phy { + status = "okay"; +}; + +&spi { + status = "okay"; + num-cs = <1>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <25000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x000000 0x010000>; + read-only; + }; + + art: partition@10000 { + label = "art"; + reg = <0x010000 0x010000>; + read-only; + }; + + partition@20000 { + compatible = "denx,uimage"; + label = "firmware"; + reg = <0x020000 0xfd0000>; + }; + + partition@ff0000 { + label = "art-backup"; + reg = <0xff0000 0x010000>; + read-only; + }; + }; + }; +}; + +ð0 { + status = "okay"; + mtd-mac-address = <&art 0x0>; + phy-handle = <&swphy4>; +}; + +ð1 { + mtd-mac-address = <&art 0x6>; +}; + +&wmac { + status = "okay"; + mtd-cal-data = <&art 0x1000>; +}; + +&pinmux { + led_wan_pin: pinmux_led_wan_pin { + pinctrl-single,bits = <0x4 0x0 0xff>; + }; +}; diff --git a/target/linux/ath79/dts/qca9531_glinet_gl-ar300m-lite.dts b/target/linux/ath79/dts/qca9531_glinet_gl-ar300m-lite.dts new file mode 100644 index 000000000..fba08e429 --- /dev/null +++ b/target/linux/ath79/dts/qca9531_glinet_gl-ar300m-lite.dts @@ -0,0 +1,22 @@ +/dts-v1/; + +#include "qca9531_glinet_gl-ar300m-nor.dts" + +/ { + compatible = "glinet,gl-ar300m-lite", "qca,qca9531"; + model = "GL.iNet GL-AR300M-Lite"; +}; + +// GL-AR300M-Lite has different LED colors than the non-Lite version + +&led_status { + label = "gl-ar300m-lite:red:status"; +}; + +&led_lan { + label = "gl-ar300m-lite:green:lan"; +}; + +&led_wlan { + label = "gl-ar300m-lite:green:wlan"; +}; \ No newline at end of file diff --git a/target/linux/ath79/dts/qca9531_glinet_gl-ar300m-nand.dts b/target/linux/ath79/dts/qca9531_glinet_gl-ar300m-nand.dts index 9e78f83a7..26c30f2b7 100644 --- a/target/linux/ath79/dts/qca9531_glinet_gl-ar300m-nand.dts +++ b/target/linux/ath79/dts/qca9531_glinet_gl-ar300m-nand.dts @@ -8,42 +8,8 @@ }; &spi { - status = "okay"; num-cs = <1>; - flash@0 { - compatible = "winbond,w25q128", "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <25000000>; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "u-boot"; - reg = <0x000000 0x040000>; - read-only; - }; - - partition@1 { - label = "u-boot-env"; - reg = <0x040000 0x010000>; - }; - - partition@2 { - label = "reserved"; - reg = <0x050000 0xfa0000>; - }; - - art: partition@3 { - label = "art"; - reg = <0xff0000 0x010000>; - }; - }; - }; - flash@1 { compatible = "spinand,mt29f"; reg = <1>; diff --git a/target/linux/ath79/dts/qca9531_glinet_gl-ar300m-nor.dts b/target/linux/ath79/dts/qca9531_glinet_gl-ar300m-nor.dts index 6b77af040..02196cf9c 100644 --- a/target/linux/ath79/dts/qca9531_glinet_gl-ar300m-nor.dts +++ b/target/linux/ath79/dts/qca9531_glinet_gl-ar300m-nor.dts @@ -9,42 +9,3 @@ compatible = "glinet,gl-ar300m-nor", "qca,qca9531"; model = "GL.iNet GL-AR300M (NOR)"; }; - -&spi { - status = "okay"; - num-cs = <0>; - - flash@0 { - compatible = "winbond,w25q128", "jedec,spi-nor"; - reg = <0>; - spi-max-frequency = <25000000>; - - partitions { - compatible = "fixed-partitions"; - #address-cells = <1>; - #size-cells = <1>; - - partition@0 { - label = "u-boot"; - reg = <0x000000 0x040000>; - read-only; - }; - - partition@1 { - label = "u-boot-env"; - reg = <0x040000 0x010000>; - }; - - partition@2 { - compatible = "denx,uimage"; - label = "firmware"; - reg = <0x050000 0xfa0000>; - }; - - art: partition@3 { - label = "art"; - reg = <0xff0000 0x010000>; - }; - }; - }; -}; diff --git a/target/linux/ath79/dts/qca9531_glinet_gl-ar300m.dtsi b/target/linux/ath79/dts/qca9531_glinet_gl-ar300m.dtsi index fe986bdde..ceb2bfa0f 100644 --- a/target/linux/ath79/dts/qca9531_glinet_gl-ar300m.dtsi +++ b/target/linux/ath79/dts/qca9531_glinet_gl-ar300m.dtsi @@ -41,20 +41,22 @@ leds { compatible = "gpio-leds"; - wlan { - label = "gl-ar300m:green:wlan"; - gpios = <&gpio 14 GPIO_ACTIVE_LOW>; - linux,default-trigger = "phy0tpt"; + // Colors from non-Lite versions + + led_status: status { + label = "gl-ar300m:green:status"; + gpios = <&gpio 12 GPIO_ACTIVE_LOW>; }; - lan { + led_lan: lan { label = "gl-ar300m:green:lan"; gpios = <&gpio 13 GPIO_ACTIVE_LOW>; }; - led_status: status { - label = "gl-ar300m:red:status"; - gpios = <&gpio 12 GPIO_ACTIVE_LOW>; + led_wlan: wlan { + label = "gl-ar300m:red:wlan"; + gpios = <&gpio 14 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy0tpt"; }; }; }; @@ -63,6 +65,45 @@ status = "okay"; }; +&spi { + status = "okay"; + num-cs = <0>; + + flash@0 { + compatible = "winbond,w25q128", "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <25000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x000000 0x040000>; + read-only; + }; + + partition@1 { + label = "u-boot-env"; + reg = <0x040000 0x010000>; + }; + + partition@2 { + compatible = "denx,uimage"; + label = "firmware"; + reg = <0x050000 0xfa0000>; + }; + + art: partition@3 { + label = "art"; + reg = <0xff0000 0x010000>; + }; + }; + }; +}; + &uart { status = "okay"; }; @@ -84,7 +125,8 @@ }; ð1 { - mtd-mac-address = <&art 0x6>; + mtd-mac-address = <&art 0x0>; + mtd-mac-address-increment = <1>; }; &wmac { diff --git a/target/linux/ath79/dts/qca9531_glinet_gl-x750.dts b/target/linux/ath79/dts/qca9531_glinet_gl-x750.dts index f8a511933..79cd51673 100644 --- a/target/linux/ath79/dts/qca9531_glinet_gl-x750.dts +++ b/target/linux/ath79/dts/qca9531_glinet_gl-x750.dts @@ -126,7 +126,8 @@ }; ð1 { - mtd-mac-address = <&art 0x6>; + mtd-mac-address = <&art 0x0>; + mtd-mac-address-increment = <1>; }; &wmac { diff --git a/target/linux/ath79/dts/qca9531_yuncore_a770.dts b/target/linux/ath79/dts/qca9531_yuncore_a770.dts new file mode 100644 index 000000000..18ad6307a --- /dev/null +++ b/target/linux/ath79/dts/qca9531_yuncore_a770.dts @@ -0,0 +1,126 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/dts-v1/; + +#include +#include + +#include "qca953x.dtsi" + +/ { + model = "YunCore A770"; + compatible = "yuncore,a770", "qca,qca9533"; + + aliases { + led-boot = &status; + led-failsafe = &status; + led-running = &status; + led-upgrade = &status; + }; + + chosen { + bootargs = "console=ttyS0,115200n8"; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + linux,code = ; + gpios = <&gpio 17 GPIO_ACTIVE_LOW>; + debounce-interval = <60>; + }; + }; + + leds { + compatible = "gpio-leds"; + + lan { + label = "a770:green:lan"; + gpios = <&gpio 16 GPIO_ACTIVE_LOW>; + }; + + status: status { + label = "a770:green:status"; + gpios = <&gpio 12 GPIO_ACTIVE_LOW>; + default-state = "keep"; + }; + + wan { + label = "a770:green:wan"; + gpios = <&gpio 4 GPIO_ACTIVE_LOW>; + }; + + wlan2g { + label = "a770:red:wlan2g"; + gpios = <&gpio 13 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy1tpt"; + }; + }; +}; + +ð0 { + status = "okay"; + + phy-handle = <&swphy4>; + mtd-mac-address = <&art 0x0>; +}; + +ð1 { + mtd-mac-address = <&art 0x6>; +}; + +&pcie0 { + status = "okay"; +}; + +&spi { + status = "okay"; + + num-cs = <1>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <25000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x000000 0x040000>; + read-only; + }; + + partition@40000 { + label = "u-boot-env"; + reg = <0x040000 0x010000>; + }; + + partition@50000 { + compatible = "denx,uimage"; + label = "firmware"; + reg = <0x050000 0xfa0000>; + }; + + art: partition@ff0000 { + label = "art"; + reg = <0xff0000 0x010000>; + read-only; + }; + }; + }; +}; + +&uart { + status = "okay"; +}; + +&wmac { + status = "okay"; + + mtd-cal-data = <&art 0x1000>; +}; diff --git a/target/linux/ath79/dts/qca9533_tplink_cpe210-v2.dts b/target/linux/ath79/dts/qca9533_tplink_cpe210-v2.dts new file mode 100644 index 000000000..e8273ba24 --- /dev/null +++ b/target/linux/ath79/dts/qca9533_tplink_cpe210-v2.dts @@ -0,0 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/dts-v1/; + +#include "qca9533_tplink_cpe210.dtsi" + +/ { + compatible = "tplink,cpe210-v2", "qca,qca9533"; + model = "TP-LINK CPE210 v2"; +}; diff --git a/target/linux/ath79/dts/qca9533_tplink_cpe210-v3.dts b/target/linux/ath79/dts/qca9533_tplink_cpe210-v3.dts new file mode 100644 index 000000000..cf1f728d0 --- /dev/null +++ b/target/linux/ath79/dts/qca9533_tplink_cpe210-v3.dts @@ -0,0 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/dts-v1/; + +#include "qca9533_tplink_cpe210.dtsi" + +/ { + compatible = "tplink,cpe210-v3", "qca,qca9533"; + model = "TP-LINK CPE210 v3"; +}; diff --git a/target/linux/ath79/dts/qca9533_tplink_cpe210.dtsi b/target/linux/ath79/dts/qca9533_tplink_cpe210.dtsi new file mode 100644 index 000000000..ee1f90449 --- /dev/null +++ b/target/linux/ath79/dts/qca9533_tplink_cpe210.dtsi @@ -0,0 +1,125 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/dts-v1/; + +#include +#include + +#include "qca953x.dtsi" + +/ { + chosen { + bootargs = "console=ttyS0,115200n8"; + }; + + aliases { + led-boot = &system; + led-failsafe = &system; + led-running = &system; + led-upgrade = &system; + }; + + leds { + compatible = "gpio-leds"; + + lan { + label = "tp-link:green:lan"; + gpios = <&gpio 11 GPIO_ACTIVE_LOW>; + }; + + link1 { + label = "tp-link:green:link1"; + gpios = <&gpio 13 GPIO_ACTIVE_LOW>; + }; + + link2 { + label = "tp-link:green:link2"; + gpios = <&gpio 14 GPIO_ACTIVE_LOW>; + }; + + link3 { + label = "tp-link:green:link3"; + gpios = <&gpio 15 GPIO_ACTIVE_LOW>; + }; + + system: link4 { + label = "tp-link:green:link4"; + gpios = <&gpio 16 GPIO_ACTIVE_LOW>; + }; + }; + +}; + +&uart { + status = "okay"; +}; + +&spi { + status = "okay"; + num-cs = <1>; + + flash@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <25000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + uboot: partition@0 { + label = "u-boot"; + reg = <0x000000 0x020000>; + read-only; + }; + + partition@20000 { + label = "partition-table"; + reg = <0x020000 0x10000>; + read-only; + }; + + info: partition@30000 { + label = "product-info"; + reg = <0x030000 0x10000>; + read-only; + }; + + partition@40000 { + label = "firmware"; + reg = <0x040000 0x780000>; + compatible = "tplink,firmware"; + }; + + config: partition@7c0000 { + label = "config"; + reg = <0x7c0000 0x30000>; + read-only; + }; + + ART: partition@7f0000 { + label = "ART"; + reg = <0x7f0000 0x10000>; + read-only; + }; + }; + }; +}; + +ð0 { + status = "okay"; + phy-handle = <&swphy4>; + mtd-mac-address = <&info 0x8>; +}; + +ð1 { + compatible = "syscon", "simple-mfd"; +}; + +&wmac { + status = "okay"; + mtd-cal-data = <&ART 0x1000>; + mtd-mac-address = <&info 0x8>; +}; diff --git a/target/linux/ath79/dts/qca9533_tplink_tl-wr841-v11.dts b/target/linux/ath79/dts/qca9533_tplink_tl-wr841-v11.dts index e451b7d67..29fca8b3a 100644 --- a/target/linux/ath79/dts/qca9533_tplink_tl-wr841-v11.dts +++ b/target/linux/ath79/dts/qca9533_tplink_tl-wr841-v11.dts @@ -8,7 +8,7 @@ / { compatible = "tplink,tl-wr841-v11", "qca,qca9533"; - model = "TP-Link TL-WR841N/ND Version 11"; + model = "TP-Link TL-WR841N/ND v11"; aliases { led-boot = &system_led; diff --git a/target/linux/ath79/dts/qca9533_tplink_tl-wr841-v9.dts b/target/linux/ath79/dts/qca9533_tplink_tl-wr841-v9.dts index ac069eed2..a3284226a 100644 --- a/target/linux/ath79/dts/qca9533_tplink_tl-wr841-v9.dts +++ b/target/linux/ath79/dts/qca9533_tplink_tl-wr841-v9.dts @@ -8,7 +8,7 @@ / { compatible = "tplink,tl-wr841-v9", "qca,qca9533"; - model = "TP-Link TL-WR841N/ND Version 9"; + model = "TP-Link TL-WR841N/ND v9"; aliases { led-boot = &qss_led; diff --git a/target/linux/ath79/dts/qca9533_ubnt_acb-isp.dts b/target/linux/ath79/dts/qca9533_ubnt_acb-isp.dts new file mode 100644 index 000000000..3bdaa8ba9 --- /dev/null +++ b/target/linux/ath79/dts/qca9533_ubnt_acb-isp.dts @@ -0,0 +1,95 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/dts-v1/; + +#include +#include + +#include "qca953x.dtsi" + +/ { + compatible = "ubnt,acb-isp", "qca,qca9533"; + model = "Ubiquiti airCube ISP"; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + linux,code = ; + gpios = <&gpio 17 GPIO_ACTIVE_LOW>; + debounce-interval = <60>; + }; + }; +}; + +&spi { + status = "okay"; + num-cs = <1>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <25000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x000000 0x040000>; + read-only; + }; + + partition@40000 { + label = "u-boot-env"; + reg = <0x040000 0x010000>; + read-only; + }; + + partition@50000 { + compatible = "denx,uimage"; + label = "firmware"; + reg = <0x050000 0xf60000>; + }; + + partition@fb0000 { + label = "cfg"; + reg = <0xfb0000 0x040000>; + read-only; + }; + + eeprom: partition@ff0000 { + label = "EEPROM"; + reg = <0xff0000 0x010000>; + read-only; + }; + }; + }; +}; + +&uart { + status = "okay"; +}; + +ð0 { + status = "okay"; + mtd-mac-address = <&eeprom 0x0>; + phy-handle = <&swphy4>; +}; + +ð1 { + status = "okay"; + mtd-mac-address = <&eeprom 0x6>; + + gmac-config { + device = <&gmac>; + }; +}; + +&wmac { + status = "okay"; + mtd-cal-data = <&eeprom 0x1000>; + mtd-mac-address = <&eeprom 0x1002>; +}; diff --git a/target/linux/ath79/dts/qca953x.dtsi b/target/linux/ath79/dts/qca953x.dtsi index 4ce5bfe0a..44f05a5f4 100644 --- a/target/linux/ath79/dts/qca953x.dtsi +++ b/target/linux/ath79/dts/qca953x.dtsi @@ -173,7 +173,7 @@ wmac: wmac@18100000 { compatible = "qca,qca9530-wmac"; - reg = <0x18100000 0x230000>; + reg = <0x18100000 0x20000>; interrupt-parent = <&intc2>; interrupts = <0>; @@ -245,13 +245,14 @@ builtin-switch; builtin_switch: switch0@1f { - compatible = "qca,ar8229-builtin"; + compatible = "qca,ar8229"; reg = <0x1f>; resets = <&rst 8>; reset-names = "switch"; phy-mode = "gmii"; - phy4-mii-enable; + qca,phy4-mii-enable; + qca,mib-poll-interval = <500>; mdio-bus { #address-cells = <1>; diff --git a/target/linux/ath79/dts/qca9557.dtsi b/target/linux/ath79/dts/qca9557.dtsi index bfc2545b2..fefb91c39 100644 --- a/target/linux/ath79/dts/qca9557.dtsi +++ b/target/linux/ath79/dts/qca9557.dtsi @@ -186,7 +186,7 @@ <0x180f0000 0x100>, /* CTRL */ <0x14000000 0x1000>; /* CFG */ reg-names = "crp_base", "ctrl_base", "cfg_base"; - ranges = <0x2000000 0 0x10000000 0x10000000 0 0x04000000 /* pci memory */ + ranges = <0x2000000 0 0x10000000 0x10000000 0 0x02000000 /* pci memory */ 0x1000000 0 0x00000000 0x0000000 0 0x000001>; /* io space */ interrupt-parent = <&intc2>; interrupts = <1>; @@ -209,7 +209,7 @@ <0x16000000 0x1000>; /* CFG */ reg-names = "crp_base", "ctrl_base", "cfg_base"; ranges = <0x2000000 0 0x12000000 0x12000000 0 0x02000000 /* pci memory */ - 0x1000000 0 0x00000000 0x0000000 0 0x000001>; /* io space */ + 0x1000000 0 0x00000000 0x0000001 0 0x000001>; /* io space */ interrupt-parent = <&intc3>; interrupts = <0>; @@ -289,12 +289,11 @@ }; &mdio0 { - resets = <&rst 22>; - reset-names = "mdio"; + compatible = "qca,ar9340-mdio"; }; ð0 { - compatible = "qca,qca9550-eth", "syscon", "simple-mfd"; + compatible = "qca,qca9550-eth", "syscon"; pll-reg = <0 0x28 0>; pll-handle = <&pll>; @@ -302,17 +301,16 @@ pll-data = <0x16000000 0x00000101 0x00001616>; phy-mode = "rgmii"; - resets = <&rst 9>; - reset-names = "mac"; + resets = <&rst 9>, <&rst 22>; + reset-names = "mac", "mdio"; }; &mdio1 { - resets = <&rst 23>; - reset-names = "mdio"; + compatible = "qca,ar9340-mdio"; }; ð1 { - compatible = "qca,qca9550-eth", "syscon", "simple-mfd"; + compatible = "qca,qca9550-eth", "syscon"; pll-reg = <0 0x48 0>; pll-handle = <&pll>; @@ -320,6 +318,6 @@ pll-data = <0x16000000 0x00000101 0x00001616>; phy-mode = "sgmii"; - resets = <&rst 13>; - reset-names = "mac"; + resets = <&rst 13>, <&rst 23>; + reset-names = "mac", "mdio"; }; diff --git a/target/linux/ath79/dts/qca9557_iodata_wn-ac-dgr.dtsi b/target/linux/ath79/dts/qca9557_iodata_wn-ac-dgr.dtsi index 22a23f97a..86b97437e 100644 --- a/target/linux/ath79/dts/qca9557_iodata_wn-ac-dgr.dtsi +++ b/target/linux/ath79/dts/qca9557_iodata_wn-ac-dgr.dtsi @@ -18,7 +18,7 @@ bootargs = "console=ttyS0,115200n8"; }; - leds { + leds: leds { compatible = "gpio-leds"; power: power { @@ -27,11 +27,6 @@ default-state = "on"; }; - copy { - label = "iodata:green:copy"; - gpios = <&gpio 2 GPIO_ACTIVE_LOW>; - }; - eco { label = "iodata:green:eco"; gpios = <&gpio 3 GPIO_ACTIVE_LOW>; @@ -55,11 +50,11 @@ }; }; - keys { + keys: keys { compatible = "gpio-keys-polled"; poll-interval = <20>; - button_eco { + eco { label = "eco"; gpios = <&gpio 0 GPIO_ACTIVE_LOW>; linux,code = ; @@ -74,13 +69,6 @@ debounce-interval = <60>; }; - button_copy { - label = "copy"; - gpios = <&gpio 15 GPIO_ACTIVE_LOW>; - linux,code = ; - debounce-interval = <60>; - }; - wps { label = "wps"; gpios = <&gpio 16 GPIO_ACTIVE_LOW>; @@ -190,7 +178,6 @@ wifi@0,0 { compatible = "pci168c,003c"; reg = <0x0000 0 0 0 0>; - qca,no-eeprom; }; }; diff --git a/target/linux/ath79/dts/qca9557_iodata_wn-ac1167dgr.dts b/target/linux/ath79/dts/qca9557_iodata_wn-ac1167dgr.dts index 7990d9cd5..c2fc7abcb 100644 --- a/target/linux/ath79/dts/qca9557_iodata_wn-ac1167dgr.dts +++ b/target/linux/ath79/dts/qca9557_iodata_wn-ac1167dgr.dts @@ -10,3 +10,19 @@ compatible = "iodata,wn-ac1167dgr", "qca,qca9557"; model = "I-O DATA WN-AC1167DGR"; }; + +&leds { + copy { + label = "iodata:green:copy"; + gpios = <&gpio 2 GPIO_ACTIVE_LOW>; + }; +}; + +&keys { + copy { + label = "copy"; + gpios = <&gpio 15 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + }; +}; diff --git a/target/linux/ath79/dts/qca9557_iodata_wn-ac1600dgr.dts b/target/linux/ath79/dts/qca9557_iodata_wn-ac1600dgr.dts new file mode 100644 index 000000000..ef47e1e41 --- /dev/null +++ b/target/linux/ath79/dts/qca9557_iodata_wn-ac1600dgr.dts @@ -0,0 +1,28 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/dts-v1/; + +#include +#include + +#include "qca9557_iodata_wn-ac-dgr.dtsi" + +/ { + compatible = "iodata,wn-ac1600dgr", "qca,qca9557"; + model = "I-O DATA WN-AC1600DGR"; +}; + +&leds { + function { + label = "iodata:green:function"; + gpios = <&gpio 2 GPIO_ACTIVE_LOW>; + }; +}; + +&keys { + function { + label = "function"; + gpios = <&gpio 15 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + }; +}; diff --git a/target/linux/ath79/dts/qca9557_iodata_wn-ac1600dgr2.dts b/target/linux/ath79/dts/qca9557_iodata_wn-ac1600dgr2.dts index 3eedec72e..37ae8fe01 100644 --- a/target/linux/ath79/dts/qca9557_iodata_wn-ac1600dgr2.dts +++ b/target/linux/ath79/dts/qca9557_iodata_wn-ac1600dgr2.dts @@ -10,3 +10,19 @@ compatible = "iodata,wn-ac1600dgr2", "qca,qca9557"; model = "I-O DATA WN-AC1600DGR2"; }; + +&leds { + copy { + label = "iodata:green:copy"; + gpios = <&gpio 2 GPIO_ACTIVE_LOW>; + }; +}; + +&keys { + copy { + label = "copy"; + gpios = <&gpio 15 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + }; +}; diff --git a/target/linux/ath79/dts/qca9558_engenius_epg5000.dts b/target/linux/ath79/dts/qca9558_engenius_epg5000.dts new file mode 100644 index 000000000..6179150fd --- /dev/null +++ b/target/linux/ath79/dts/qca9558_engenius_epg5000.dts @@ -0,0 +1,180 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/dts-v1/; + +#include +#include + +#include "qca9557.dtsi" + +/ { + model = "EnGenius EPG5000"; + compatible = "engenius,epg5000", "qca,qca9557"; + + chosen { + bootargs = "console=ttyS0,115200n8"; + }; + + aliases { + led-boot = &power; + led-failsafe = &power; + led-running = &power; + led-upgrade = &power; + }; + + leds { + compatible = "gpio-leds"; + + power: power { + label = "epg5000:amber:power"; + gpios = <&gpio 2 GPIO_ACTIVE_LOW>; + default-state = "on"; + }; + + wlan2g { + label = "epg5000:blue:wlan2g"; + gpios = <&gpio 13 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy1tpt"; + }; + + wlan5g { + label = "epg5000:blue:wlan5g"; + gpios = <&gpio 23 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy0tpt"; + }; + + wps_amber { + label = "epg5000:amber:wps"; + gpios = <&gpio 22 GPIO_ACTIVE_LOW>; + }; + + wps_blue { + label = "epg5000:blue:wps"; + gpios = <&gpio 19 GPIO_ACTIVE_LOW>; + }; + }; + + keys { + compatible = "gpio-keys-polled"; + poll-interval = <20>; + + reset { + label = "reset"; + linux,code = ; + gpios = <&gpio 17 GPIO_ACTIVE_LOW>; + debounce-interval = <60>; + }; + + wps { + label = "wps"; + linux,code = ; + gpios = <&gpio 16 GPIO_ACTIVE_LOW>; + debounce-interval = <60>; + }; + }; +}; + +ð0 { + status = "okay"; + + phy-handle = <&phy0>; + pll-data = <0xa6000000 0x00000101 0x00001616>; +}; + +&mdio0 { + status = "okay"; + + phy0: ethernet-phy@0 { + reg = <0>; + + qca,ar8327-initvals = < + 0x04 0x87600000 /* PORT0 PAD MODE CTRL */ + 0x7c 0x0000007e /* PORT0_STATUS */ + >; + }; +}; + +&pcie0 { + status = "okay"; + + wifi@0,0 { + compatible = "pci168c,003c"; + reg = <0x0000 0 0 0 0>; + }; +}; + +&spi { + status = "okay"; + + num-cs = <1>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <25000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x000000 0x030000>; + read-only; + }; + + partition@30000 { + label = "u-boot-env"; + reg = <0x030000 0x010000>; + }; + + partition@40000 { + compatible = "denx,uimage"; + label = "firmware"; + reg = <0x040000 0xe50000>; + }; + + partition@790000 { + label = "manufacture"; + reg = <0xe90000 0x100000>; + read-only; + }; + + partition@ed0000 { + label = "backup"; + reg = <0xf90000 0x010000>; + read-only; + }; + + partition@fe0000 { + label = "storage"; + reg = <0xfa0000 0x050000>; + read-only; + }; + + partition@ff0000 { + label = "art"; + reg = <0xff0000 0x010000>; + read-only; + }; + }; + }; +}; + +&uart { + status = "okay"; +}; + +&usb_phy1 { + status = "okay"; +}; + +&usb1 { + status = "okay"; +}; + +&wmac { + status = "okay"; + + qca,no-eeprom; +}; diff --git a/target/linux/ath79/dts/qca9558_librerouter_librerouter-v1.dts b/target/linux/ath79/dts/qca9558_librerouter_librerouter-v1.dts new file mode 100644 index 000000000..9e2f67977 --- /dev/null +++ b/target/linux/ath79/dts/qca9558_librerouter_librerouter-v1.dts @@ -0,0 +1,211 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/dts-v1/; + +#include +#include + +#include "qca9557.dtsi" + +/ { + compatible = "librerouter,librerouter-v1", "qca,qca9558"; + model = "LibreRouter v1"; + + chosen { + bootargs = "console=ttyS0,115200n8"; + }; + + aliases { + led-boot = &system; + led-failsafe = &system; + led-running = &system; + led-upgrade = &system; + }; + + leds { + compatible = "gpio-leds"; + + system: system { + label = "librerouter-v1:green:system"; + gpios = <&gpio 23 GPIO_ACTIVE_HIGH>; + default-state = "on"; + }; + + wifi_green { + label = "librerouter-v1:green:wlan2g"; + gpios = <&gpio 22 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy0tpt"; + }; + + status_blue { + label = "librerouter-v1:blue:status"; + gpios = <&gpio 20 GPIO_ACTIVE_LOW>; + }; + + }; + + button { + compatible = "gpio-keys"; + + reset { + label = "Reset"; + linux,code = ; + gpios = <&gpio 17 GPIO_ACTIVE_LOW>; + debounce-interval = <60>; + }; + + }; + + watchdog { + compatible = "linux,wdt-gpio"; + gpios = <&gpio 2 GPIO_ACTIVE_LOW>; + hw_algo = "toggle"; + hw_margin_ms = <1000>; + always-running; + }; + +}; + +&pcie0 { + status = "okay"; + + wifi@0,0 { + compatible = "pci168c,0033"; + reg = <0x0000 0 0 0 0>; + }; +}; + +&pcie1 { + status = "okay"; + + wifi@0,0 { + compatible = "pci168c,0033"; + reg = <0x0000 0 0 0 0>; + }; +}; + +&uart { + status = "okay"; +}; + +&gpio { + status = "okay"; +}; + +&usb_phy0 { + status = "okay"; +}; + +&usb0 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; +}; + +&usb_phy1 { + status = "okay"; +}; + +&usb1 { + #address-cells = <1>; + #size-cells = <0>; + status = "okay"; +}; + +&spi { + status = "okay"; + num-cs = <1>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <25000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x000000 0x040000>; + read-only; + }; + + partition@40000 { + label = "u-boot-env"; + reg = <0x040000 0x010000>; + }; + + partition@50000 { + compatible = "denx,uimage"; + label = "firmware"; + reg = <0x050000 0x7c0000>; + }; + + partition@810000 { + label = "fw2"; + reg = <0x810000 0x7d0000>; + }; + + partition@fd0000 { + label = "res"; + reg = <0xfd0000 0x20000>; + }; + + ART: partition@ff0000 { + label = "ART"; + reg = <0xff0000 0x010000>; + read-only; + }; + }; + }; +}; + +&mdio0 { + status = "okay"; + + phy0: ethernet-phy@0 { + reg = <0>; + qca,ar8327-initvals = < + 0x04 0x87600000 /* PORT0: RGMII, MAC0/6 exchage, tx_delay 01, rx_delay 10 */ + 0x0c 0x00000080 /* PORT6: SGMII */ + 0x10 0x81000080 /* POWER_ON_STRAP: LED open drain, SerDes auto-neg disabled */ + 0x50 0xcf37cf37 /* LED_CTRL0 */ + 0x54 0xcf37cf37 /* LED_CTRL1 */ + 0x58 0xcf37cf37 /* LED_CTRL2 */ + 0x5c 0x0 /* LED_CTRL3 */ + 0x7c 0x0000007e /* PORT0_STATUS */ + 0x94 0x0000007e /* PORT6 STATUS */ + >; + }; +}; + +ð0 { + status = "okay"; + + pll-data = <0xa6000000 0x00000101 0x00001616>; + mtd-mac-address = <&ART 0x0>; + + phy-handle = <&phy0>; + +}; + +ð1 { + status = "okay"; + + phy-mode = "sgmii"; + pll-data = <0x03000101 0x00000101 0x00001616>; + mtd-mac-address = <&ART 0x6>; + + fixed-link { + speed = <1000>; + full-duplex; + }; +}; + +&wmac { + status = "okay"; + + mtd-cal-data = <&ART 0x1000>; + mtd-mac-address = <&ART 0xc>; +}; diff --git a/target/linux/ath79/dts/qca9558_netgear_ex6400.dts b/target/linux/ath79/dts/qca9558_netgear_ex6400.dts new file mode 100644 index 000000000..8b61331f9 --- /dev/null +++ b/target/linux/ath79/dts/qca9558_netgear_ex6400.dts @@ -0,0 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/dts-v1/; + +#include "qca9558_netgear_ex7300.dtsi" + +/ { + model = "Netgear EX6400"; + compatible = "netgear,ex6400", "qca,qca9558"; +}; diff --git a/target/linux/ath79/dts/qca9558_netgear_ex7300.dts b/target/linux/ath79/dts/qca9558_netgear_ex7300.dts new file mode 100644 index 000000000..23102bf93 --- /dev/null +++ b/target/linux/ath79/dts/qca9558_netgear_ex7300.dts @@ -0,0 +1,9 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/dts-v1/; + +#include "qca9558_netgear_ex7300.dtsi" + +/ { + model = "Netgear EX7300"; + compatible = "netgear,ex7300", "qca,qca9558"; +}; diff --git a/target/linux/ath79/dts/qca9558_netgear_ex7300.dtsi b/target/linux/ath79/dts/qca9558_netgear_ex7300.dtsi new file mode 100644 index 000000000..21c25a571 --- /dev/null +++ b/target/linux/ath79/dts/qca9558_netgear_ex7300.dtsi @@ -0,0 +1,222 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/dts-v1/; + +#include +#include + +#include "qca9557.dtsi" + +/ { + chosen { + bootargs = "console=ttyS0,115200n8"; + }; + + aliases { + led-boot = &power_green; + led-failsafe = &power_amber; + led-running = &power_green; + led-upgrade = &power_amber; + }; + + led_spi { + compatible = "spi-gpio"; + #address-cells = <1>; + #size-cells = <0>; + + gpio-sck = <&gpio 18 GPIO_ACTIVE_HIGH>; + gpio-mosi = <&gpio 15 GPIO_ACTIVE_HIGH>; + num-chipselects = <0>; + + led_gpio: led_gpio@0 { + compatible = "nxp,74lvc594"; + reg = <0>; + gpio-controller; + #gpio-cells = <2>; + registers-number = <1>; + lines-initial-states = /bits/ 8 <0xff>; + spi-max-frequency = <500000>; + + gpio_latch_bit { + gpio-hog; + gpios = <4 GPIO_ACTIVE_HIGH>; + output-high; + line-name = "gpio-latch-bit"; + }; + }; + }; + + leds { + compatible = "gpio-leds"; + + power_green: power_green { + label = "netgear:green:power"; + gpios = <&gpio 19 GPIO_ACTIVE_LOW>; + }; + + power_amber: power_amber { + label = "netgear:amber:power"; + gpios = <&gpio 20 GPIO_ACTIVE_LOW>; + }; + + left_blue { + label = "netgear:blue:left"; + gpios = <&led_gpio 7 GPIO_ACTIVE_LOW>; + }; + + right_blue { + label = "netgear:blue:right"; + gpios = <&led_gpio 6 GPIO_ACTIVE_LOW>; + }; + + wps_green { + label = "netgear:green:wps"; + gpios = <&led_gpio 5 GPIO_ACTIVE_LOW>; + }; + + client_red { + label = "netgear:red:client"; + gpios = <&led_gpio 3 GPIO_ACTIVE_LOW>; + }; + + client_green { + label = "netgear:green:client"; + gpios = <&led_gpio 2 GPIO_ACTIVE_LOW>; + }; + + router_red { + label = "netgear:red:router"; + gpios = <&led_gpio 1 GPIO_ACTIVE_LOW>; + }; + + router_green { + label = "netgear:green:router"; + gpios = <&led_gpio 0 GPIO_ACTIVE_LOW>; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "Reset button"; + linux,code = ; + gpios = <&gpio 11 GPIO_ACTIVE_LOW>; + debounce-interval = <60>; + }; + + wps { + label = "WPS button"; + linux,code = ; + gpios = <&gpio 22 GPIO_ACTIVE_LOW>; + debounce-interval = <60>; + }; + + extender_apmode { + label = "EXTENDER/APMODE switch"; + gpios = <&gpio 23 GPIO_ACTIVE_LOW>; + linux,code = ; + linux,input-type = ; + debounce-interval = <60>; + }; + }; +}; + +&pcie0 { + status = "okay"; +}; + +&uart { + status = "okay"; +}; + +&pll { + clocks = <&extosc>; +}; + +&spi { + status = "okay"; + num-cs = <1>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <25000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + uboot: partition@0 { + label = "u-boot"; + reg = <0x000000 0x040000>; + read-only; + }; + + partition@40000 { + label = "u-boot-env"; + reg = <0x040000 0x010000>; + }; + + caldata: partition@50000 { + label = "caldata"; + reg = <0x050000 0x010000>; + read-only; + }; + + partition@60000 { + label = "caldata-backup"; + reg = <0x060000 0x010000>; + read-only; + }; + + partition@70000 { + label = "config"; + reg = <0x070000 0x010000>; + }; + + partition@80000 { + label = "pot"; + reg = <0x080000 0x010000>; + }; + + partition@90000 { + label = "firmware"; + reg = <0x090000 0xf30000>; + compatible = "denx,uimage"; + }; + + partition@fc0000 { + label = "language"; + reg = <0xfc0000 0x040000>; + }; + }; + }; +}; + +&wmac { + status = "okay"; + + mtd-cal-data = <&caldata 0x1000>; + mtd-mac-address = <&caldata 0x06>; +}; + +&mdio0 { + status = "okay"; + + phy4: ethernet-phy@4 { + reg = <4>; + phy-mode = "rgmii"; + }; +}; + +ð0 { + status = "okay"; + + mtd-mac-address = <&caldata 0x00>; + + phy-handle = <&phy4>; + phy-mode = "rgmii"; + + pll-data = <0x83000000 0x80000101 0x80001313>; +}; diff --git a/target/linux/ath79/dts/qca9558_ocedo_ursus.dts b/target/linux/ath79/dts/qca9558_ocedo_ursus.dts new file mode 100644 index 000000000..1a92da394 --- /dev/null +++ b/target/linux/ath79/dts/qca9558_ocedo_ursus.dts @@ -0,0 +1,147 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/dts-v1/; + +#include +#include + +#include "qca9557.dtsi" + +/ { + compatible = "ocedo,ursus", "qca,qca9558"; + model = "OCEDO Ursus"; + + chosen { + bootargs = "console=ttyS0,115200n8"; + }; + + leds { + compatible = "gpio-leds"; + + wifi2 { + label = "ursus:green:wlan2g"; + gpios = <&gpio 14 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy1tpt"; + }; + + wifi5 { + label = "ursus:green:wlan5g"; + gpios = <&gpio 15 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy0tpt"; + }; + + }; + +}; + +&pcie1 { + status = "okay"; +}; + +&uart { + status = "okay"; +}; + +&pll { + clocks = <&extosc>; +}; + +&spi { + status = "okay"; + num-cs = <1>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <25000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + uboot: partition@0 { + label = "u-boot"; + reg = <0x000000 0x040000>; + read-only; + }; + + partition@40000 { + label = "u-boot-env"; + reg = <0x040000 0x010000>; + }; + + partition@50000 { + compatible = "denx,uimage"; + label = "firmware"; + reg = <0x050000 0x740000>; + }; + + partition@790000 { + label = "vendor"; + reg = <0x790000 0x740000>; + read-only; + }; + + partition@ed0000 { + label = "data"; + reg = <0xed0000 0x110000>; + read-only; + }; + + partition@fe0000 { + label = "id"; + reg = <0xfe0000 0x010000>; + read-only; + }; + + art: partition@ff0000 { + label = "art"; + reg = <0xff0000 0x010000>; + read-only; + }; + }; + }; +}; + +&wmac { + status = "okay"; + + mtd-cal-data = <&art 0x1000>; + mtd-mac-address = <&art 0x06>; +}; + +&mdio0 { + status = "okay"; + + phy1: ethernet-phy@1 { + reg = <1>; + }; + + phy2: ethernet-phy@2 { + reg = <2>; + }; +}; + +ð0 { + status = "okay"; + mtd-mac-address = <&art 0x00>; + phy-handle = <&phy1>; + pll-data = <0xa6000000 0x80000101 0x80001313>; + + gmac_config: gmac-config { + device = <&gmac>; + + rxdv-delay = <3>; + rxd-delay = <3>; + txen-delay = <0>; + txd-delay = <0>; + rgmii-enabled = <1>; + }; +}; + +ð1 { + status = "okay"; + mtd-mac-address = <&art 0x12>; + phy-handle = <&phy2>; + pll-data = <0x3000101 0x101 0x1313>; +}; diff --git a/target/linux/ath79/dts/qca9558_tplink_archer-c5-v1.dts b/target/linux/ath79/dts/qca9558_tplink_archer-c5-v1.dts new file mode 100644 index 000000000..05368bd7d --- /dev/null +++ b/target/linux/ath79/dts/qca9558_tplink_archer-c5-v1.dts @@ -0,0 +1,46 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/dts-v1/; + +#include +#include + +#include "qca9558_tplink_archer-c7.dtsi" + +/ { + compatible = "tplink,archer-c5-v1", "qca,qca9558"; + model = "TP-Link Archer C5 v1"; +}; + +&gpio_keys { + rfkill { + gpios = <&gpio 23 GPIO_ACTIVE_LOW>; + linux,code = ; + linux,input-type = ; + debounce-interval = <60>; + }; +}; + +&gpio_leds { + wlan5g { + label = "tp-link:green:wlan5g"; + gpios = <&gpio 17 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy0tpt"; + }; +}; + +&mtdparts { + uboot: u-boot@0 { + reg = <0x000000 0x020000>; + read-only; + }; + + firmware@20000 { + reg = <0x020000 0xfd0000>; + compatible = "tplink,firmware"; + }; + + art: art@ff0000 { + reg = <0xff0000 0x010000>; + read-only; + }; +}; diff --git a/target/linux/ath79/dts/qca9558_tplink_archer-c7-v1.dts b/target/linux/ath79/dts/qca9558_tplink_archer-c7-v1.dts index 7334a6e7e..c26695d24 100644 --- a/target/linux/ath79/dts/qca9558_tplink_archer-c7-v1.dts +++ b/target/linux/ath79/dts/qca9558_tplink_archer-c7-v1.dts @@ -8,7 +8,7 @@ / { compatible = "tplink,archer-c7-v1", "qca,qca9558"; - model = "TP-Link Archer C7 Version 1"; + model = "TP-Link Archer C7 v1"; }; &gpio_keys { diff --git a/target/linux/ath79/dts/qca9558_tplink_archer-c7-v2.dts b/target/linux/ath79/dts/qca9558_tplink_archer-c7-v2.dts index f168a1779..afc1b14b8 100644 --- a/target/linux/ath79/dts/qca9558_tplink_archer-c7-v2.dts +++ b/target/linux/ath79/dts/qca9558_tplink_archer-c7-v2.dts @@ -8,7 +8,7 @@ / { compatible = "tplink,archer-c7-v2", "qca,qca9558"; - model = "TP-Link Archer C7 Version 2"; + model = "TP-Link Archer C7 v2"; }; &gpio_keys { diff --git a/target/linux/ath79/dts/qca9558_tplink_re350k-v1.dts b/target/linux/ath79/dts/qca9558_tplink_re350k-v1.dts new file mode 100644 index 000000000..056b513d7 --- /dev/null +++ b/target/linux/ath79/dts/qca9558_tplink_re350k-v1.dts @@ -0,0 +1,173 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/dts-v1/; + +#include +#include + +#include "qca9557.dtsi" + +/ { + model = "TP-Link RE350K v1"; + compatible = "tplink,re350k-v1", "qca,qca9558"; + + aliases { + led-boot = &power; + led-failsafe = &power; + led-running = &power; + led-upgrade = &power; + mdio-gpio0 = &mdio2; + }; + + chosen { + bootargs = "console=ttyS0,115200n8"; + }; + + keys { + compatible = "gpio-keys"; + + app-config { + label = "app-config"; + linux,code = ; + gpios = <&gpio 20 GPIO_ACTIVE_LOW>; + debounce-interval = <60>; + }; + + led { + label = "led"; + linux,code = ; + gpios = <&gpio 19 GPIO_ACTIVE_LOW>; + debounce-interval = <60>; + }; + + reset { + label = "reset"; + linux,code = ; + gpios = <&gpio 17 GPIO_ACTIVE_LOW>; + debounce-interval = <60>; + }; + }; + + leds { + compatible = "gpio-leds"; + + power: power { + label = "tp-link:green:power"; + gpios = <&gpio 12 GPIO_ACTIVE_LOW>; + default-state = "on"; + }; + + wlan2g-green { + label = "tp-link:green:wlan2g"; + gpios = <&gpio 16 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy1tpt"; + }; + + wlan2g-red { + label = "tp-link:red:wlan2g"; + gpios = <&gpio 21 GPIO_ACTIVE_LOW>; + }; + + wlan5g-green { + label = "tp-link:green:wlan5g"; + gpios = <&gpio 14 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy0tpt"; + }; + + wlan5g-red { + label = "tp-link:red:wlan5g"; + gpios = <&gpio 22 GPIO_ACTIVE_LOW>; + }; + }; + + mdio2: mdio { + compatible = "virtual,mdio-gpio"; + + #address-cells = <1>; + #size-cells = <0>; + + gpios = <&gpio 23 GPIO_ACTIVE_HIGH>, + <&gpio 18 GPIO_ACTIVE_HIGH>; + + phy0: ethernet-phy@4 { + reg = <4>; + + phy-mode = "rgmii-rxid"; + at803x-disable-smarteee; + }; + }; +}; + +ð0 { + status = "okay"; + + mtd-mac-address = <&config 0x10008>; + pll-data = <0x9e000000 0x80000101 0x80001313>; + phy-handle = <&phy0>; + + gmac-config { + device = <&gmac>; + + rxdv-delay = <2>; + rxd-delay = <2>; + txen-delay = <0>; + txd-delay = <0>; + rgmii-enabled = <1>; + }; +}; + +&pcie0 { + status = "okay"; +}; + +&spi { + status = "okay"; + + num-cs = <1>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <25000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x000000 0x020000>; + read-only; + }; + + partition@20000 { + compatible = "tplink,firmware"; + label = "firmware"; + reg = <0x020000 0xd70000>; + }; + + config: partition@d90000 { + label = "config"; + reg = <0xd90000 0x260000>; + read-only; + }; + + art: partition@ff0000 { + label = "art"; + reg = <0xff0000 0x010000>; + read-only; + }; + }; + }; +}; + +&uart { + status = "okay"; +}; + +&wmac { + status = "okay"; + + mtd-cal-data = <&art 0x1000>; + mtd-mac-address = <&config 0x10008>; +}; diff --git a/target/linux/ath79/dts/qca9558_tplink_tl-wr1043nd-v2.dts b/target/linux/ath79/dts/qca9558_tplink_tl-wr1043nd-v2.dts index a2992c10f..f49f143d1 100644 --- a/target/linux/ath79/dts/qca9558_tplink_tl-wr1043nd-v2.dts +++ b/target/linux/ath79/dts/qca9558_tplink_tl-wr1043nd-v2.dts @@ -8,5 +8,5 @@ / { compatible = "tplink,tl-wr1043nd-v2", "qca,qca9557"; - model = "TP-Link TL-WR1043ND Version 2"; + model = "TP-Link TL-WR1043ND v2"; }; diff --git a/target/linux/ath79/dts/qca9558_tplink_tl-wr1043nd-v3.dts b/target/linux/ath79/dts/qca9558_tplink_tl-wr1043nd-v3.dts index a473cf42e..5efa41721 100644 --- a/target/linux/ath79/dts/qca9558_tplink_tl-wr1043nd-v3.dts +++ b/target/linux/ath79/dts/qca9558_tplink_tl-wr1043nd-v3.dts @@ -8,5 +8,5 @@ / { compatible = "tplink,tl-wr1043nd-v3", "qca,qca9557"; - model = "TP-Link TL-WR1043ND Version 3"; + model = "TP-Link TL-WR1043ND v3"; }; diff --git a/target/linux/ath79/dts/qca9561_tplink_archer-c58-v1.dts b/target/linux/ath79/dts/qca9561_tplink_archer-c58-v1.dts index 59a81e497..fdc5713fa 100644 --- a/target/linux/ath79/dts/qca9561_tplink_archer-c58-v1.dts +++ b/target/linux/ath79/dts/qca9561_tplink_archer-c58-v1.dts @@ -8,7 +8,7 @@ / { compatible = "tplink,archer-c58-v1", "qca,qca9560"; - model = "TP-LINK Archer C58 v1"; + model = "TP-Link Archer C58 v1"; aliases { led-boot = &power; diff --git a/target/linux/ath79/dts/qca9561_tplink_archer-c59-v1.dts b/target/linux/ath79/dts/qca9561_tplink_archer-c59-v1.dts index 5470d9e49..6ac5f3811 100644 --- a/target/linux/ath79/dts/qca9561_tplink_archer-c59-v1.dts +++ b/target/linux/ath79/dts/qca9561_tplink_archer-c59-v1.dts @@ -8,7 +8,7 @@ / { compatible = "tplink,archer-c59-v1", "qca,qca9560"; - model = "TP-LINK Archer C59 v1"; + model = "TP-Link Archer C59 v1"; aliases { led-boot = &power; diff --git a/target/linux/ath79/dts/qca9563_nec_wg1200cr.dts b/target/linux/ath79/dts/qca9563_nec_wg1200cr.dts new file mode 100644 index 000000000..8c356bd75 --- /dev/null +++ b/target/linux/ath79/dts/qca9563_nec_wg1200cr.dts @@ -0,0 +1,176 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/dts-v1/; + +#include +#include + +#include "qca956x.dtsi" + +/ { + model = "NEC Aterm WG1200CR"; + compatible = "nec,wg1200cr", "qca,qca9563"; + + chosen { + bootargs = "console=ttyS0,115200n8"; + }; + + aliases { + led-boot = &power_green; + led-failsafe = &power_red; + led-running = &power_green; + led-upgrade = &power_green; + }; + + leds { + compatible = "gpio-leds"; + /* other LEDs are connected to ath10k (QCA9888) gpiochip */ + + power_green: power_green { + label = "wg1200cr:green:power"; + gpios = <&gpio 5 GPIO_ACTIVE_LOW>; + default-state = "on"; + }; + + power_red: power_red { + label = "wg1200cr:red:power"; + gpios = <&gpio 6 GPIO_ACTIVE_LOW>; + }; + }; + + keys { + compatible = "gpio-keys"; + + reset { + label = "reset"; + gpios = <&gpio 1 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + }; + + wps { + label = "wps"; + gpios = <&gpio 2 GPIO_ACTIVE_LOW>; + linux,code = ; + debounce-interval = <60>; + }; + + bridge { + label = "br"; + gpios = <&gpio 7 GPIO_ACTIVE_LOW>; + linux,code = ; + linux,input-type = ; + debounce-interval = <60>; + }; + + converter { + label = "cnv"; + gpios = <&gpio 8 GPIO_ACTIVE_LOW>; + linux,code = ; + linux,input-type = ; + debounce-interval = <60>; + }; + }; +}; + +&spi { + status = "okay"; + num-cs = <1>; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <25000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + + partition@0 { + label = "u-boot"; + reg = <0x000000 0x040000>; + read-only; + }; + + partition@40000 { + label = "devdata"; + reg = <0x040000 0x010000>; + read-only; + }; + + partition@50000 { + label = "devconf"; + reg = <0x050000 0x010000>; + read-only; + }; + + partition@60000 { + label = "misc"; + reg = <0x060000 0x010000>; + read-only; + }; + + partition@70000 { + label = "wifimngdata"; + reg = <0x070000 0x010000>; + read-only; + }; + + partition@80000 { + compatible = "seama"; + label = "firmware"; + reg = <0x080000 0x770000>; + }; + + partition@7f0000 { + label = "art"; + reg = <0x7f0000 0x010000>; + read-only; + }; + }; + }; +}; + +&mdio0 { + status = "okay"; + + phy0: ethernet-phy@0 { + reg = <0>; + + qca,ar8327-initvals = < + 0x04 0x00000080 /* PORT0 PAD MODE CTRL */ + 0x50 0xcc35cc35 /* LED_CTRL0 */ + 0x54 0xca35ca35 /* LED_CTRL1 */ + 0x58 0xc935c935 /* LED_CTRL2 */ + 0x5c 0x03ffff00 /* LED_CTRL3 */ + 0x7c 0x0000007e /* PORT0_STATUS */ + >; + }; +}; + +ð0 { + status = "okay"; + + pll-data = <0x03000101 0x00000101 0x00001919>; + + phy-mode = "sgmii"; + phy-handle = <&phy0>; +}; + +&pcie { + status = "okay"; + + wifi@0,0 { + compatible = "pci168c,0056"; + reg = <0x0000 0 0 0 0>; + }; +}; + +&uart { + status = "okay"; +}; + +&wmac { + status = "okay"; + qca,no-eeprom; +}; diff --git a/target/linux/ath79/dts/qca9563_tplink_archer-a7-v5.dts b/target/linux/ath79/dts/qca9563_tplink_archer-a7-v5.dts index 8cf86c0bc..a9174df4f 100644 --- a/target/linux/ath79/dts/qca9563_tplink_archer-a7-v5.dts +++ b/target/linux/ath79/dts/qca9563_tplink_archer-a7-v5.dts @@ -8,6 +8,15 @@ model = "TP-Link Archer A7 v5"; }; +&gpio_keys { + reset { + label = "Reset button"; + linux,code = ; + gpios = <&gpio 11 GPIO_ACTIVE_LOW>; + debounce-interval = <60>; + }; +}; + &mtdparts { factory-uboot@0 { label = "factory-uboot"; diff --git a/target/linux/ath79/dts/qca9563_tplink_archer-c2-v3.dts b/target/linux/ath79/dts/qca9563_tplink_archer-c2-v3.dts index 9686290e7..c106a63eb 100644 --- a/target/linux/ath79/dts/qca9563_tplink_archer-c2-v3.dts +++ b/target/linux/ath79/dts/qca9563_tplink_archer-c2-v3.dts @@ -8,7 +8,7 @@ / { compatible = "tplink,archer-c2-v3", "qca,qca9563"; - model = "TP-Link Archer C2 Version 3"; + model = "TP-Link Archer C2 v3"; chosen { bootargs = "console=ttyS0,115200n8"; diff --git a/target/linux/ath79/dts/qca9563_tplink_archer-c7-v4.dts b/target/linux/ath79/dts/qca9563_tplink_archer-c7-v4.dts index 5a25ce3f1..db8869cf1 100644 --- a/target/linux/ath79/dts/qca9563_tplink_archer-c7-v4.dts +++ b/target/linux/ath79/dts/qca9563_tplink_archer-c7-v4.dts @@ -68,15 +68,15 @@ usb1 { label = "tp-link:green:usb1"; - gpios = <&gpio 7 GPIO_ACTIVE_LOW>; - trigger-sources = <&hub_port0>; + gpios = <&gpio 8 GPIO_ACTIVE_LOW>; + trigger-sources = <&hub_port1>; linux,default-trigger = "usbport"; }; usb2 { label = "tp-link:green:usb2"; - gpios = <&gpio 8 GPIO_ACTIVE_LOW>; - trigger-sources = <&hub_port1>; + gpios = <&gpio 7 GPIO_ACTIVE_LOW>; + trigger-sources = <&hub_port0>; linux,default-trigger = "usbport"; }; diff --git a/target/linux/ath79/dts/qca9563_tplink_archer-c7-v5.dts b/target/linux/ath79/dts/qca9563_tplink_archer-c7-v5.dts index 026d6c65e..c51ae20d2 100644 --- a/target/linux/ath79/dts/qca9563_tplink_archer-c7-v5.dts +++ b/target/linux/ath79/dts/qca9563_tplink_archer-c7-v5.dts @@ -8,6 +8,22 @@ model = "TP-Link Archer C7 v5"; }; +&gpio_keys { + reset { + label = "Reset button"; + linux,code = ; + gpios = <&gpio 5 GPIO_ACTIVE_LOW>; + debounce-interval = <60>; + }; + + wps { + label = "WPS button"; + linux,code = ; + gpios = <&gpio 2 GPIO_ACTIVE_LOW>; + debounce-interval = <60>; + }; +}; + &mtdparts { partition@0 { label = "factory-uboot"; diff --git a/target/linux/ath79/dts/qca9563_tplink_archer-x7-v5.dtsi b/target/linux/ath79/dts/qca9563_tplink_archer-x7-v5.dtsi index afb33d647..ba75cfc4d 100644 --- a/target/linux/ath79/dts/qca9563_tplink_archer-x7-v5.dtsi +++ b/target/linux/ath79/dts/qca9563_tplink_archer-x7-v5.dtsi @@ -12,7 +12,10 @@ }; aliases { - led-status = &system; + led-boot = &system; + led-failsafe = &system; + led-running = &system; + led-upgrade = &system; }; gpio_leds: leds { @@ -24,30 +27,64 @@ default-state = "on"; }; - led_wlan2g: wlan2g { - label = "tp-link:green:wlan2g"; - gpios = <&gpio 14 GPIO_ACTIVE_LOW>; - linux,default-trigger = "phy1tpt"; - }; - usb { label = "tp-link:green:usb"; gpios = <&gpio 7 GPIO_ACTIVE_LOW>; trigger-sources = <&hub_port0>; linux,default-trigger = "usbport"; }; + + wlan5g { + label = "tp-link:green:wlan5g"; + gpios = <&gpio 9 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy0tpt"; + }; + + led_wlan2g: wlan2g { + label = "tp-link:green:wlan2g"; + gpios = <&gpio 14 GPIO_ACTIVE_LOW>; + linux,default-trigger = "phy1tpt"; + }; + + wan { + label = "tp-link:green:wan"; + gpios = <&gpio 21 GPIO_ACTIVE_LOW>; + }; + + wan_fail { + label = "tp-link:orange:wan"; + gpios = <&gpio 20 GPIO_ACTIVE_LOW>; + }; + + lan1 { + label = "tp-link:green:lan1"; + gpios = <&gpio 8 GPIO_ACTIVE_LOW>; + }; + + lan2 { + label = "tp-link:green:lan2"; + gpios = <&gpio 17 GPIO_ACTIVE_LOW>; + }; + + lan3 { + label = "tp-link:green:lan3"; + gpios = <&gpio 16 GPIO_ACTIVE_LOW>; + }; + + lan4 { + label = "tp-link:green:lan4"; + gpios = <&gpio 15 GPIO_ACTIVE_LOW>; + }; + + wps { + label = "tp-link:green:wps"; + gpios = <&gpio 1 GPIO_ACTIVE_LOW>; + }; }; gpio_keys: keys { compatible = "gpio-keys"; - reset { - label = "Reset button"; - linux,code = ; - gpios = <&gpio 11 GPIO_ACTIVE_LOW>; - debounce-interval = <60>; - }; - wps { label = "WPS button"; linux,code = ; @@ -94,49 +131,6 @@ }; }; -&gpio_leds { - wlan5g { - label = "tp-link:green:wlan5g"; - gpios = <&gpio 9 GPIO_ACTIVE_LOW>; - linux,default-trigger = "phy0tpt"; - }; - - wan { - label = "tp-link:green:wan"; - gpios = <&gpio 21 GPIO_ACTIVE_LOW>; - }; - - wan_fail { - label = "tp-link:orange:wan"; - gpios = <&gpio 20 GPIO_ACTIVE_LOW>; - }; - - lan1 { - label = "tp-link:green:lan1"; - gpios = <&gpio 8 GPIO_ACTIVE_LOW>; - }; - - lan2 { - label = "tp-link:green:lan2"; - gpios = <&gpio 17 GPIO_ACTIVE_LOW>; - }; - - lan3 { - label = "tp-link:green:lan3"; - gpios = <&gpio 16 GPIO_ACTIVE_LOW>; - }; - - lan4 { - label = "tp-link:green:lan4"; - gpios = <&gpio 15 GPIO_ACTIVE_LOW>; - }; - - wps { - label = "tp-link:green:wps"; - gpios = <&gpio 1 GPIO_ACTIVE_LOW>; - }; -}; - &spi { status = "okay"; num-cs = <1>; diff --git a/target/linux/ath79/dts/qca9563_tplink_tl-wr1043nd-v4.dts b/target/linux/ath79/dts/qca9563_tplink_tl-wr1043nd-v4.dts index 5a4c4e588..e51bb7f83 100644 --- a/target/linux/ath79/dts/qca9563_tplink_tl-wr1043nd-v4.dts +++ b/target/linux/ath79/dts/qca9563_tplink_tl-wr1043nd-v4.dts @@ -8,7 +8,7 @@ / { compatible = "tplink,tl-wr1043nd-v4", "qca,qca9563"; - model = "TP-Link TL-WR1043ND Version 4"; + model = "TP-Link TL-WR1043ND v4"; }; &gpio_leds { diff --git a/target/linux/ath79/dts/qca956x.dtsi b/target/linux/ath79/dts/qca956x.dtsi index b6f7dcaff..a9437fce0 100644 --- a/target/linux/ath79/dts/qca956x.dtsi +++ b/target/linux/ath79/dts/qca956x.dtsi @@ -274,12 +274,13 @@ builtin-switch; builtin_switch: switch0@1f { - compatible = "qca,ar8229-builtin"; + compatible = "qca,ar8229"; reg = <0x1f>; resets = <&rst 8>; reset-names = "switch"; phy-mode = "gmii"; - phy4-mii-enable; + qca,phy4-mii-enable; + qca,mib-poll-interval = <500>; mdio-bus { #address-cells = <1>; diff --git a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/Makefile b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/Makefile index 480dbb62c..87add0d20 100644 --- a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/Makefile +++ b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/Makefile @@ -9,6 +9,5 @@ ag71xx-y += ag71xx_phy.o ag71xx-$(CONFIG_AG71XX_DEBUG_FS) += ag71xx_debugfs.o -obj-$(CONFIG_AG71XX) += ag71xx_ar7240.o obj-$(CONFIG_AG71XX) += ag71xx_mdio.o obj-$(CONFIG_AG71XX) += ag71xx.o diff --git a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h index 9aac1998a..fde9db374 100644 --- a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h +++ b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx.h @@ -188,6 +188,7 @@ struct ag71xx { struct timer_list oom_timer; struct reset_control *mac_reset; + struct reset_control *mdio_reset; u32 fifodata[3]; u32 plldata[3]; diff --git a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar7240.c b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar7240.c deleted file mode 100644 index 77f7670c2..000000000 --- a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_ar7240.c +++ /dev/null @@ -1,1344 +0,0 @@ -/* - * Driver for the built-in ethernet switch of the Atheros AR7240 SoC - * Copyright (c) 2010 Gabor Juhos - * Copyright (c) 2010 Felix Fietkau - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License version 2 as published - * by the Free Software Foundation. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include "ag71xx.h" - -#define BITM(_count) (BIT(_count) - 1) -#define BITS(_shift, _count) (BITM(_count) << _shift) - -#define AR7240_REG_MASK_CTRL 0x00 -#define AR7240_MASK_CTRL_REVISION_M BITM(8) -#define AR7240_MASK_CTRL_VERSION_M BITM(8) -#define AR7240_MASK_CTRL_VERSION_S 8 -#define AR7240_MASK_CTRL_VERSION_AR7240 0x01 -#define AR7240_MASK_CTRL_VERSION_AR934X 0x02 -#define AR7240_MASK_CTRL_SOFT_RESET BIT(31) - -#define AR7240_REG_MAC_ADDR0 0x20 -#define AR7240_REG_MAC_ADDR1 0x24 - -#define AR7240_REG_FLOOD_MASK 0x2c -#define AR7240_FLOOD_MASK_BROAD_TO_CPU BIT(26) - -#define AR7240_REG_GLOBAL_CTRL 0x30 -#define AR7240_GLOBAL_CTRL_MTU_M BITM(11) -#define AR9340_GLOBAL_CTRL_MTU_M BITM(14) - -#define AR7240_REG_VTU 0x0040 -#define AR7240_VTU_OP BITM(3) -#define AR7240_VTU_OP_NOOP 0x0 -#define AR7240_VTU_OP_FLUSH 0x1 -#define AR7240_VTU_OP_LOAD 0x2 -#define AR7240_VTU_OP_PURGE 0x3 -#define AR7240_VTU_OP_REMOVE_PORT 0x4 -#define AR7240_VTU_ACTIVE BIT(3) -#define AR7240_VTU_FULL BIT(4) -#define AR7240_VTU_PORT BITS(8, 4) -#define AR7240_VTU_PORT_S 8 -#define AR7240_VTU_VID BITS(16, 12) -#define AR7240_VTU_VID_S 16 -#define AR7240_VTU_PRIO BITS(28, 3) -#define AR7240_VTU_PRIO_S 28 -#define AR7240_VTU_PRIO_EN BIT(31) - -#define AR7240_REG_VTU_DATA 0x0044 -#define AR7240_VTUDATA_MEMBER BITS(0, 10) -#define AR7240_VTUDATA_VALID BIT(11) - -#define AR7240_REG_ATU 0x50 -#define AR7240_ATU_FLUSH_ALL 0x1 - -#define AR7240_REG_AT_CTRL 0x5c -#define AR7240_AT_CTRL_AGE_TIME BITS(0, 15) -#define AR7240_AT_CTRL_AGE_EN BIT(17) -#define AR7240_AT_CTRL_LEARN_CHANGE BIT(18) -#define AR7240_AT_CTRL_RESERVED BIT(19) -#define AR7240_AT_CTRL_ARP_EN BIT(20) - -#define AR7240_REG_TAG_PRIORITY 0x70 - -#define AR7240_REG_SERVICE_TAG 0x74 -#define AR7240_SERVICE_TAG_M BITM(16) - -#define AR7240_REG_CPU_PORT 0x78 -#define AR7240_MIRROR_PORT_S 4 -#define AR7240_MIRROR_PORT_M BITM(4) -#define AR7240_CPU_PORT_EN BIT(8) - -#define AR7240_REG_MIB_FUNCTION0 0x80 -#define AR7240_MIB_TIMER_M BITM(16) -#define AR7240_MIB_AT_HALF_EN BIT(16) -#define AR7240_MIB_BUSY BIT(17) -#define AR7240_MIB_FUNC_S 24 -#define AR7240_MIB_FUNC_M BITM(3) -#define AR7240_MIB_FUNC_NO_OP 0x0 -#define AR7240_MIB_FUNC_FLUSH 0x1 -#define AR7240_MIB_FUNC_CAPTURE 0x3 - -#define AR7240_REG_MDIO_CTRL 0x98 -#define AR7240_MDIO_CTRL_DATA_M BITM(16) -#define AR7240_MDIO_CTRL_REG_ADDR_S 16 -#define AR7240_MDIO_CTRL_PHY_ADDR_S 21 -#define AR7240_MDIO_CTRL_CMD_WRITE 0 -#define AR7240_MDIO_CTRL_CMD_READ BIT(27) -#define AR7240_MDIO_CTRL_MASTER_EN BIT(30) -#define AR7240_MDIO_CTRL_BUSY BIT(31) - -#define AR7240_REG_PORT_BASE(_port) (0x100 + (_port) * 0x100) - -#define AR7240_REG_PORT_STATUS(_port) (AR7240_REG_PORT_BASE((_port)) + 0x00) -#define AR7240_PORT_STATUS_SPEED_S 0 -#define AR7240_PORT_STATUS_SPEED_M BITM(2) -#define AR7240_PORT_STATUS_SPEED_10 0 -#define AR7240_PORT_STATUS_SPEED_100 1 -#define AR7240_PORT_STATUS_SPEED_1000 2 -#define AR7240_PORT_STATUS_TXMAC BIT(2) -#define AR7240_PORT_STATUS_RXMAC BIT(3) -#define AR7240_PORT_STATUS_TXFLOW BIT(4) -#define AR7240_PORT_STATUS_RXFLOW BIT(5) -#define AR7240_PORT_STATUS_DUPLEX BIT(6) -#define AR7240_PORT_STATUS_LINK_UP BIT(8) -#define AR7240_PORT_STATUS_LINK_AUTO BIT(9) -#define AR7240_PORT_STATUS_LINK_PAUSE BIT(10) - -#define AR7240_REG_PORT_CTRL(_port) (AR7240_REG_PORT_BASE((_port)) + 0x04) -#define AR7240_PORT_CTRL_STATE_M BITM(3) -#define AR7240_PORT_CTRL_STATE_DISABLED 0 -#define AR7240_PORT_CTRL_STATE_BLOCK 1 -#define AR7240_PORT_CTRL_STATE_LISTEN 2 -#define AR7240_PORT_CTRL_STATE_LEARN 3 -#define AR7240_PORT_CTRL_STATE_FORWARD 4 -#define AR7240_PORT_CTRL_LEARN_LOCK BIT(7) -#define AR7240_PORT_CTRL_VLAN_MODE_S 8 -#define AR7240_PORT_CTRL_VLAN_MODE_KEEP 0 -#define AR7240_PORT_CTRL_VLAN_MODE_STRIP 1 -#define AR7240_PORT_CTRL_VLAN_MODE_ADD 2 -#define AR7240_PORT_CTRL_VLAN_MODE_DOUBLE_TAG 3 -#define AR7240_PORT_CTRL_IGMP_SNOOP BIT(10) -#define AR7240_PORT_CTRL_HEADER BIT(11) -#define AR7240_PORT_CTRL_MAC_LOOP BIT(12) -#define AR7240_PORT_CTRL_SINGLE_VLAN BIT(13) -#define AR7240_PORT_CTRL_LEARN BIT(14) -#define AR7240_PORT_CTRL_DOUBLE_TAG BIT(15) -#define AR7240_PORT_CTRL_MIRROR_TX BIT(16) -#define AR7240_PORT_CTRL_MIRROR_RX BIT(17) - -#define AR7240_REG_PORT_VLAN(_port) (AR7240_REG_PORT_BASE((_port)) + 0x08) - -#define AR7240_PORT_VLAN_DEFAULT_ID_S 0 -#define AR7240_PORT_VLAN_DEST_PORTS_S 16 -#define AR7240_PORT_VLAN_MODE_S 30 -#define AR7240_PORT_VLAN_MODE_PORT_ONLY 0 -#define AR7240_PORT_VLAN_MODE_PORT_FALLBACK 1 -#define AR7240_PORT_VLAN_MODE_VLAN_ONLY 2 -#define AR7240_PORT_VLAN_MODE_SECURE 3 - - -#define AR7240_REG_STATS_BASE(_port) (0x20000 + (_port) * 0x100) - -#define AR7240_STATS_RXBROAD 0x00 -#define AR7240_STATS_RXPAUSE 0x04 -#define AR7240_STATS_RXMULTI 0x08 -#define AR7240_STATS_RXFCSERR 0x0c -#define AR7240_STATS_RXALIGNERR 0x10 -#define AR7240_STATS_RXRUNT 0x14 -#define AR7240_STATS_RXFRAGMENT 0x18 -#define AR7240_STATS_RX64BYTE 0x1c -#define AR7240_STATS_RX128BYTE 0x20 -#define AR7240_STATS_RX256BYTE 0x24 -#define AR7240_STATS_RX512BYTE 0x28 -#define AR7240_STATS_RX1024BYTE 0x2c -#define AR7240_STATS_RX1518BYTE 0x30 -#define AR7240_STATS_RXMAXBYTE 0x34 -#define AR7240_STATS_RXTOOLONG 0x38 -#define AR7240_STATS_RXGOODBYTE 0x3c -#define AR7240_STATS_RXBADBYTE 0x44 -#define AR7240_STATS_RXOVERFLOW 0x4c -#define AR7240_STATS_FILTERED 0x50 -#define AR7240_STATS_TXBROAD 0x54 -#define AR7240_STATS_TXPAUSE 0x58 -#define AR7240_STATS_TXMULTI 0x5c -#define AR7240_STATS_TXUNDERRUN 0x60 -#define AR7240_STATS_TX64BYTE 0x64 -#define AR7240_STATS_TX128BYTE 0x68 -#define AR7240_STATS_TX256BYTE 0x6c -#define AR7240_STATS_TX512BYTE 0x70 -#define AR7240_STATS_TX1024BYTE 0x74 -#define AR7240_STATS_TX1518BYTE 0x78 -#define AR7240_STATS_TXMAXBYTE 0x7c -#define AR7240_STATS_TXOVERSIZE 0x80 -#define AR7240_STATS_TXBYTE 0x84 -#define AR7240_STATS_TXCOLLISION 0x8c -#define AR7240_STATS_TXABORTCOL 0x90 -#define AR7240_STATS_TXMULTICOL 0x94 -#define AR7240_STATS_TXSINGLECOL 0x98 -#define AR7240_STATS_TXEXCDEFER 0x9c -#define AR7240_STATS_TXDEFER 0xa0 -#define AR7240_STATS_TXLATECOL 0xa4 - -#define AR7240_PORT_CPU 0 -#define AR7240_NUM_PORTS 6 -#define AR7240_NUM_PHYS 5 - -#define AR7240_PHY_ID1 0x004d -#define AR7240_PHY_ID2 0xd041 - -#define AR934X_PHY_ID1 0x004d -#define AR934X_PHY_ID2 0xd042 - -#define AR7240_MAX_VLANS 16 - -#define AR934X_REG_OPER_MODE0 0x04 -#define AR934X_OPER_MODE0_MAC_GMII_EN BIT(6) -#define AR934X_OPER_MODE0_PHY_MII_EN BIT(10) - -#define AR934X_REG_OPER_MODE1 0x08 -#define AR934X_REG_OPER_MODE1_PHY4_MII_EN BIT(28) - -#define AR934X_REG_FLOOD_MASK 0x2c -#define AR934X_FLOOD_MASK_MC_DP(_p) BIT(16 + (_p)) -#define AR934X_FLOOD_MASK_BC_DP(_p) BIT(25 + (_p)) - -#define AR934X_REG_QM_CTRL 0x3c -#define AR934X_QM_CTRL_ARP_EN BIT(15) - -#define AR934X_REG_AT_CTRL 0x5c -#define AR934X_AT_CTRL_AGE_TIME BITS(0, 15) -#define AR934X_AT_CTRL_AGE_EN BIT(17) -#define AR934X_AT_CTRL_LEARN_CHANGE BIT(18) - -#define AR934X_MIB_ENABLE BIT(30) - -#define AR934X_REG_PORT_BASE(_port) (0x100 + (_port) * 0x100) - -#define AR934X_REG_PORT_VLAN1(_port) (AR934X_REG_PORT_BASE((_port)) + 0x08) -#define AR934X_PORT_VLAN1_DEFAULT_SVID_S 0 -#define AR934X_PORT_VLAN1_FORCE_DEFAULT_VID_EN BIT(12) -#define AR934X_PORT_VLAN1_PORT_TLS_MODE BIT(13) -#define AR934X_PORT_VLAN1_PORT_VLAN_PROP_EN BIT(14) -#define AR934X_PORT_VLAN1_PORT_CLONE_EN BIT(15) -#define AR934X_PORT_VLAN1_DEFAULT_CVID_S 16 -#define AR934X_PORT_VLAN1_FORCE_PORT_VLAN_EN BIT(28) -#define AR934X_PORT_VLAN1_ING_PORT_PRI_S 29 - -#define AR934X_REG_PORT_VLAN2(_port) (AR934X_REG_PORT_BASE((_port)) + 0x0c) -#define AR934X_PORT_VLAN2_PORT_VID_MEM_S 16 -#define AR934X_PORT_VLAN2_8021Q_MODE_S 30 -#define AR934X_PORT_VLAN2_8021Q_MODE_PORT_ONLY 0 -#define AR934X_PORT_VLAN2_8021Q_MODE_PORT_FALLBACK 1 -#define AR934X_PORT_VLAN2_8021Q_MODE_VLAN_ONLY 2 -#define AR934X_PORT_VLAN2_8021Q_MODE_SECURE 3 - -#define sw_to_ar7240(_dev) container_of(_dev, struct ar7240sw, swdev) - -struct ar7240sw_port_stat { - unsigned long rx_broadcast; - unsigned long rx_pause; - unsigned long rx_multicast; - unsigned long rx_fcs_error; - unsigned long rx_align_error; - unsigned long rx_runt; - unsigned long rx_fragments; - unsigned long rx_64byte; - unsigned long rx_128byte; - unsigned long rx_256byte; - unsigned long rx_512byte; - unsigned long rx_1024byte; - unsigned long rx_1518byte; - unsigned long rx_maxbyte; - unsigned long rx_toolong; - unsigned long rx_good_byte; - unsigned long rx_bad_byte; - unsigned long rx_overflow; - unsigned long filtered; - - unsigned long tx_broadcast; - unsigned long tx_pause; - unsigned long tx_multicast; - unsigned long tx_underrun; - unsigned long tx_64byte; - unsigned long tx_128byte; - unsigned long tx_256byte; - unsigned long tx_512byte; - unsigned long tx_1024byte; - unsigned long tx_1518byte; - unsigned long tx_maxbyte; - unsigned long tx_oversize; - unsigned long tx_byte; - unsigned long tx_collision; - unsigned long tx_abortcol; - unsigned long tx_multicol; - unsigned long tx_singlecol; - unsigned long tx_excdefer; - unsigned long tx_defer; - unsigned long tx_xlatecol; -}; - -struct ar7240sw { - struct mii_bus *mii_bus; - struct mii_bus *switch_mii_bus; - struct device_node *of_node; - struct device_node *mdio_node; - struct switch_dev swdev; - int num_ports; - u8 ver; - bool vlan; - u16 vlan_id[AR7240_MAX_VLANS]; - u8 vlan_table[AR7240_MAX_VLANS]; - u8 vlan_tagged; - u16 pvid[AR7240_NUM_PORTS]; - char buf[80]; - - rwlock_t stats_lock; - struct ar7240sw_port_stat port_stats[AR7240_NUM_PORTS]; -}; - -struct ar7240sw_hw_stat { - char string[ETH_GSTRING_LEN]; - int sizeof_stat; - int reg; -}; - -static DEFINE_MUTEX(reg_mutex); - -static inline int sw_is_ar7240(struct ar7240sw *as) -{ - return as->ver == AR7240_MASK_CTRL_VERSION_AR7240; -} - -static inline int sw_is_ar934x(struct ar7240sw *as) -{ - return as->ver == AR7240_MASK_CTRL_VERSION_AR934X; -} - -static inline u32 ar7240sw_port_mask(struct ar7240sw *as, int port) -{ - return BIT(port); -} - -static inline u32 ar7240sw_port_mask_all(struct ar7240sw *as) -{ - return BIT(as->swdev.ports) - 1; -} - -static inline u32 ar7240sw_port_mask_but(struct ar7240sw *as, int port) -{ - return ar7240sw_port_mask_all(as) & ~BIT(port); -} - -static inline u16 mk_phy_addr(u32 reg) -{ - return 0x17 & ((reg >> 4) | 0x10); -} - -static inline u16 mk_phy_reg(u32 reg) -{ - return (reg << 1) & 0x1e; -} - -static inline u16 mk_high_addr(u32 reg) -{ - return (reg >> 7) & 0x1ff; -} - -static u32 __ar7240sw_reg_read(struct mii_bus *mii, u32 reg) -{ - unsigned long flags; - u16 phy_addr; - u16 phy_reg; - u32 hi, lo; - - reg = (reg & 0xfffffffc) >> 2; - phy_addr = mk_phy_addr(reg); - phy_reg = mk_phy_reg(reg); - - local_irq_save(flags); - mutex_lock(&mii->mdio_lock); - mii->write(mii, 0x1f, 0x10, mk_high_addr(reg)); - lo = (u32) mii->read(mii, phy_addr, phy_reg); - hi = (u32) mii->read(mii, phy_addr, phy_reg + 1); - mutex_unlock(&mii->mdio_lock); - local_irq_restore(flags); - - return (hi << 16) | lo; -} - -static void __ar7240sw_reg_write(struct mii_bus *mii, u32 reg, u32 val) -{ - unsigned long flags; - u16 phy_addr; - u16 phy_reg; - - reg = (reg & 0xfffffffc) >> 2; - phy_addr = mk_phy_addr(reg); - phy_reg = mk_phy_reg(reg); - - local_irq_save(flags); - mutex_lock(&mii->mdio_lock); - mii->write(mii, 0x1f, 0x10, mk_high_addr(reg)); - mii->write(mii, phy_addr, phy_reg + 1, (val >> 16)); - mii->write(mii, phy_addr, phy_reg, (val & 0xffff)); - mutex_unlock(&mii->mdio_lock); - local_irq_restore(flags); -} - -static u32 ar7240sw_reg_read(struct mii_bus *mii, u32 reg_addr) -{ - u32 ret; - - mutex_lock(®_mutex); - ret = __ar7240sw_reg_read(mii, reg_addr); - mutex_unlock(®_mutex); - - return ret; -} - -static void ar7240sw_reg_write(struct mii_bus *mii, u32 reg_addr, u32 reg_val) -{ - mutex_lock(®_mutex); - __ar7240sw_reg_write(mii, reg_addr, reg_val); - mutex_unlock(®_mutex); -} - -static u32 ar7240sw_reg_rmw(struct mii_bus *mii, u32 reg, u32 mask, u32 val) -{ - u32 t; - - mutex_lock(®_mutex); - t = __ar7240sw_reg_read(mii, reg); - t &= ~mask; - t |= val; - __ar7240sw_reg_write(mii, reg, t); - mutex_unlock(®_mutex); - - return t; -} - -static void ar7240sw_reg_set(struct mii_bus *mii, u32 reg, u32 val) -{ - u32 t; - - mutex_lock(®_mutex); - t = __ar7240sw_reg_read(mii, reg); - t |= val; - __ar7240sw_reg_write(mii, reg, t); - mutex_unlock(®_mutex); -} - -static int __ar7240sw_reg_wait(struct mii_bus *mii, u32 reg, u32 mask, u32 val, - unsigned timeout) -{ - int i; - - for (i = 0; i < timeout; i++) { - u32 t; - - t = __ar7240sw_reg_read(mii, reg); - if ((t & mask) == val) - return 0; - - usleep_range(1000, 2000); - } - - return -ETIMEDOUT; -} - -static int ar7240sw_reg_wait(struct mii_bus *mii, u32 reg, u32 mask, u32 val, - unsigned timeout) -{ - int ret; - - mutex_lock(®_mutex); - ret = __ar7240sw_reg_wait(mii, reg, mask, val, timeout); - mutex_unlock(®_mutex); - return ret; -} - -int ar7240sw_phy_read(struct mii_bus *bus, int phy_addr, int reg_addr) -{ - u32 t, val = 0xffff; - int err; - struct ar7240sw *as = bus->priv; - struct mii_bus *mii = as->mii_bus; - - if (phy_addr >= AR7240_NUM_PHYS) - return 0xffff; - - mutex_lock(®_mutex); - t = (reg_addr << AR7240_MDIO_CTRL_REG_ADDR_S) | - (phy_addr << AR7240_MDIO_CTRL_PHY_ADDR_S) | - AR7240_MDIO_CTRL_MASTER_EN | - AR7240_MDIO_CTRL_BUSY | - AR7240_MDIO_CTRL_CMD_READ; - - __ar7240sw_reg_write(mii, AR7240_REG_MDIO_CTRL, t); - err = __ar7240sw_reg_wait(mii, AR7240_REG_MDIO_CTRL, - AR7240_MDIO_CTRL_BUSY, 0, 5); - if (!err) - val = __ar7240sw_reg_read(mii, AR7240_REG_MDIO_CTRL); - mutex_unlock(®_mutex); - - return val & AR7240_MDIO_CTRL_DATA_M; -} - -int ar7240sw_phy_write(struct mii_bus *bus, int phy_addr, int reg_addr, - u16 reg_val) -{ - u32 t; - int ret; - struct ar7240sw *as = bus->priv; - struct mii_bus *mii = as->mii_bus; - - if (phy_addr >= AR7240_NUM_PHYS) - return -EINVAL; - - mutex_lock(®_mutex); - t = (phy_addr << AR7240_MDIO_CTRL_PHY_ADDR_S) | - (reg_addr << AR7240_MDIO_CTRL_REG_ADDR_S) | - AR7240_MDIO_CTRL_MASTER_EN | - AR7240_MDIO_CTRL_BUSY | - AR7240_MDIO_CTRL_CMD_WRITE | - reg_val; - - __ar7240sw_reg_write(mii, AR7240_REG_MDIO_CTRL, t); - ret = __ar7240sw_reg_wait(mii, AR7240_REG_MDIO_CTRL, - AR7240_MDIO_CTRL_BUSY, 0, 5); - mutex_unlock(®_mutex); - - return ret; -} - -static int ar7240sw_capture_stats(struct ar7240sw *as) -{ - struct mii_bus *mii = as->mii_bus; - int port; - int ret; - - write_lock(&as->stats_lock); - - /* Capture the hardware statistics for all ports */ - ar7240sw_reg_rmw(mii, AR7240_REG_MIB_FUNCTION0, - (AR7240_MIB_FUNC_M << AR7240_MIB_FUNC_S), - (AR7240_MIB_FUNC_CAPTURE << AR7240_MIB_FUNC_S)); - - /* Wait for the capturing to complete. */ - ret = ar7240sw_reg_wait(mii, AR7240_REG_MIB_FUNCTION0, - AR7240_MIB_BUSY, 0, 10); - - if (ret) - goto unlock; - - for (port = 0; port < AR7240_NUM_PORTS; port++) { - unsigned int base; - struct ar7240sw_port_stat *stats; - - base = AR7240_REG_STATS_BASE(port); - stats = &as->port_stats[port]; - -#define READ_STAT(_r) ar7240sw_reg_read(mii, base + AR7240_STATS_ ## _r) - - stats->rx_good_byte += READ_STAT(RXGOODBYTE); - stats->tx_byte += READ_STAT(TXBYTE); - -#undef READ_STAT - } - - ret = 0; - -unlock: - write_unlock(&as->stats_lock); - return ret; -} - -static void ar7240sw_disable_port(struct ar7240sw *as, unsigned port) -{ - ar7240sw_reg_write(as->mii_bus, AR7240_REG_PORT_CTRL(port), - AR7240_PORT_CTRL_STATE_DISABLED); -} - -static void ar7240sw_setup(struct ar7240sw *as) -{ - struct mii_bus *mii = as->mii_bus; - - /* Enable CPU port, and disable mirror port */ - ar7240sw_reg_write(mii, AR7240_REG_CPU_PORT, - AR7240_CPU_PORT_EN | - (15 << AR7240_MIRROR_PORT_S)); - - /* Setup TAG priority mapping */ - ar7240sw_reg_write(mii, AR7240_REG_TAG_PRIORITY, 0xfa50); - - if (sw_is_ar934x(as)) { - /* Enable aging, MAC replacing */ - ar7240sw_reg_write(mii, AR934X_REG_AT_CTRL, - 0x2b /* 5 min age time */ | - AR934X_AT_CTRL_AGE_EN | - AR934X_AT_CTRL_LEARN_CHANGE); - /* Enable ARP frame acknowledge */ - ar7240sw_reg_set(mii, AR934X_REG_QM_CTRL, - AR934X_QM_CTRL_ARP_EN); - /* Enable Broadcast/Multicast frames transmitted to the CPU */ - ar7240sw_reg_set(mii, AR934X_REG_FLOOD_MASK, - AR934X_FLOOD_MASK_BC_DP(0) | - AR934X_FLOOD_MASK_MC_DP(0)); - - /* setup MTU */ - ar7240sw_reg_rmw(mii, AR7240_REG_GLOBAL_CTRL, - AR9340_GLOBAL_CTRL_MTU_M, - AR9340_GLOBAL_CTRL_MTU_M); - - /* Enable MIB counters */ - ar7240sw_reg_set(mii, AR7240_REG_MIB_FUNCTION0, - AR934X_MIB_ENABLE); - - } else { - /* Enable ARP frame acknowledge, aging, MAC replacing */ - ar7240sw_reg_write(mii, AR7240_REG_AT_CTRL, - AR7240_AT_CTRL_RESERVED | - 0x2b /* 5 min age time */ | - AR7240_AT_CTRL_AGE_EN | - AR7240_AT_CTRL_ARP_EN | - AR7240_AT_CTRL_LEARN_CHANGE); - /* Enable Broadcast frames transmitted to the CPU */ - ar7240sw_reg_set(mii, AR7240_REG_FLOOD_MASK, - AR7240_FLOOD_MASK_BROAD_TO_CPU); - - /* setup MTU */ - ar7240sw_reg_rmw(mii, AR7240_REG_GLOBAL_CTRL, - AR7240_GLOBAL_CTRL_MTU_M, - AR7240_GLOBAL_CTRL_MTU_M); - } - - /* setup Service TAG */ - ar7240sw_reg_rmw(mii, AR7240_REG_SERVICE_TAG, AR7240_SERVICE_TAG_M, 0); -} - -/* inspired by phy_poll_reset in drivers/net/phy/phy_device.c */ -static int -ar7240sw_phy_poll_reset(struct mii_bus *bus) -{ - const unsigned int sleep_msecs = 20; - int ret, elapsed, i; - - for (elapsed = sleep_msecs; elapsed <= 600; - elapsed += sleep_msecs) { - msleep(sleep_msecs); - for (i = 0; i < AR7240_NUM_PHYS; i++) { - ret = ar7240sw_phy_read(bus, i, MII_BMCR); - if (ret < 0) - return ret; - if (ret & BMCR_RESET) - break; - if (i == AR7240_NUM_PHYS - 1) { - usleep_range(1000, 2000); - return 0; - } - } - } - return -ETIMEDOUT; -} - -static int ar7240sw_reset(struct ar7240sw *as) -{ - struct mii_bus *mii = as->mii_bus; - struct mii_bus *swmii = as->switch_mii_bus; - int ret; - int i; - - /* Set all ports to disabled state. */ - for (i = 0; i < AR7240_NUM_PORTS; i++) - ar7240sw_disable_port(as, i); - - /* Wait for transmit queues to drain. */ - usleep_range(2000, 3000); - - /* Reset the switch. */ - ar7240sw_reg_write(mii, AR7240_REG_MASK_CTRL, - AR7240_MASK_CTRL_SOFT_RESET); - - ret = ar7240sw_reg_wait(mii, AR7240_REG_MASK_CTRL, - AR7240_MASK_CTRL_SOFT_RESET, 0, 1000); - - /* setup PHYs */ - for (i = 0; i < AR7240_NUM_PHYS; i++) { - ar7240sw_phy_write(swmii, i, MII_ADVERTISE, - ADVERTISE_ALL | ADVERTISE_PAUSE_CAP | - ADVERTISE_PAUSE_ASYM); - ar7240sw_phy_write(swmii, i, MII_BMCR, - BMCR_RESET | BMCR_ANENABLE); - } - ret = ar7240sw_phy_poll_reset(swmii); - if (ret) - return ret; - - ar7240sw_setup(as); - return ret; -} - -static void ar7240sw_setup_port(struct ar7240sw *as, unsigned port, u8 portmask) -{ - struct mii_bus *mii = as->mii_bus; - u32 ctrl; - u32 vid, mode; - - ctrl = AR7240_PORT_CTRL_STATE_FORWARD | AR7240_PORT_CTRL_LEARN | - AR7240_PORT_CTRL_SINGLE_VLAN; - - if (port == AR7240_PORT_CPU) { - ar7240sw_reg_write(mii, AR7240_REG_PORT_STATUS(port), - AR7240_PORT_STATUS_SPEED_1000 | - AR7240_PORT_STATUS_TXFLOW | - AR7240_PORT_STATUS_RXFLOW | - AR7240_PORT_STATUS_TXMAC | - AR7240_PORT_STATUS_RXMAC | - AR7240_PORT_STATUS_DUPLEX); - } else { - ar7240sw_reg_write(mii, AR7240_REG_PORT_STATUS(port), - AR7240_PORT_STATUS_LINK_AUTO); - } - - /* Set the default VID for this port */ - if (as->vlan) { - vid = as->vlan_id[as->pvid[port]]; - mode = AR7240_PORT_VLAN_MODE_SECURE; - } else { - vid = port; - mode = AR7240_PORT_VLAN_MODE_PORT_ONLY; - } - - if (as->vlan) { - if (as->vlan_tagged & BIT(port)) - ctrl |= AR7240_PORT_CTRL_VLAN_MODE_ADD << - AR7240_PORT_CTRL_VLAN_MODE_S; - else - ctrl |= AR7240_PORT_CTRL_VLAN_MODE_STRIP << - AR7240_PORT_CTRL_VLAN_MODE_S; - } else { - ctrl |= AR7240_PORT_CTRL_VLAN_MODE_KEEP << - AR7240_PORT_CTRL_VLAN_MODE_S; - } - - if (!portmask) { - if (port == AR7240_PORT_CPU) - portmask = ar7240sw_port_mask_but(as, AR7240_PORT_CPU); - else - portmask = ar7240sw_port_mask(as, AR7240_PORT_CPU); - } - - /* preserve mirror rx&tx flags */ - ctrl |= ar7240sw_reg_read(mii, AR7240_REG_PORT_CTRL(port)) & - (AR7240_PORT_CTRL_MIRROR_RX | AR7240_PORT_CTRL_MIRROR_TX); - - /* allow the port to talk to all other ports, but exclude its - * own ID to prevent frames from being reflected back to the - * port that they came from */ - portmask &= ar7240sw_port_mask_but(as, port); - - ar7240sw_reg_write(mii, AR7240_REG_PORT_CTRL(port), ctrl); - if (sw_is_ar934x(as)) { - u32 vlan1, vlan2; - - vlan1 = (vid << AR934X_PORT_VLAN1_DEFAULT_CVID_S); - vlan2 = (portmask << AR934X_PORT_VLAN2_PORT_VID_MEM_S) | - (mode << AR934X_PORT_VLAN2_8021Q_MODE_S); - ar7240sw_reg_write(mii, AR934X_REG_PORT_VLAN1(port), vlan1); - ar7240sw_reg_write(mii, AR934X_REG_PORT_VLAN2(port), vlan2); - } else { - u32 vlan; - - vlan = vid | (mode << AR7240_PORT_VLAN_MODE_S) | - (portmask << AR7240_PORT_VLAN_DEST_PORTS_S); - - ar7240sw_reg_write(mii, AR7240_REG_PORT_VLAN(port), vlan); - } -} - -static int -ar7240_set_vid(struct switch_dev *dev, const struct switch_attr *attr, - struct switch_val *val) -{ - struct ar7240sw *as = sw_to_ar7240(dev); - as->vlan_id[val->port_vlan] = val->value.i; - return 0; -} - -static int -ar7240_get_vid(struct switch_dev *dev, const struct switch_attr *attr, - struct switch_val *val) -{ - struct ar7240sw *as = sw_to_ar7240(dev); - val->value.i = as->vlan_id[val->port_vlan]; - return 0; -} - -static int -ar7240_set_pvid(struct switch_dev *dev, int port, int vlan) -{ - struct ar7240sw *as = sw_to_ar7240(dev); - - /* make sure no invalid PVIDs get set */ - - if (vlan >= dev->vlans) - return -EINVAL; - - as->pvid[port] = vlan; - return 0; -} - -static int -ar7240_get_pvid(struct switch_dev *dev, int port, int *vlan) -{ - struct ar7240sw *as = sw_to_ar7240(dev); - *vlan = as->pvid[port]; - return 0; -} - -static int -ar7240_get_ports(struct switch_dev *dev, struct switch_val *val) -{ - struct ar7240sw *as = sw_to_ar7240(dev); - u8 ports = as->vlan_table[val->port_vlan]; - int i; - - val->len = 0; - for (i = 0; i < as->swdev.ports; i++) { - struct switch_port *p; - - if (!(ports & (1 << i))) - continue; - - p = &val->value.ports[val->len++]; - p->id = i; - if (as->vlan_tagged & (1 << i)) - p->flags = (1 << SWITCH_PORT_FLAG_TAGGED); - else - p->flags = 0; - } - return 0; -} - -static int -ar7240_set_ports(struct switch_dev *dev, struct switch_val *val) -{ - struct ar7240sw *as = sw_to_ar7240(dev); - u8 *vt = &as->vlan_table[val->port_vlan]; - int i, j; - - *vt = 0; - for (i = 0; i < val->len; i++) { - struct switch_port *p = &val->value.ports[i]; - - if (p->flags & (1 << SWITCH_PORT_FLAG_TAGGED)) - as->vlan_tagged |= (1 << p->id); - else { - as->vlan_tagged &= ~(1 << p->id); - as->pvid[p->id] = val->port_vlan; - - /* make sure that an untagged port does not - * appear in other vlans */ - for (j = 0; j < AR7240_MAX_VLANS; j++) { - if (j == val->port_vlan) - continue; - as->vlan_table[j] &= ~(1 << p->id); - } - } - - *vt |= 1 << p->id; - } - return 0; -} - -static int -ar7240_set_vlan(struct switch_dev *dev, const struct switch_attr *attr, - struct switch_val *val) -{ - struct ar7240sw *as = sw_to_ar7240(dev); - as->vlan = !!val->value.i; - return 0; -} - -static int -ar7240_get_vlan(struct switch_dev *dev, const struct switch_attr *attr, - struct switch_val *val) -{ - struct ar7240sw *as = sw_to_ar7240(dev); - val->value.i = as->vlan; - return 0; -} - -static void -ar7240_vtu_op(struct ar7240sw *as, u32 op, u32 val) -{ - struct mii_bus *mii = as->mii_bus; - - if (ar7240sw_reg_wait(mii, AR7240_REG_VTU, AR7240_VTU_ACTIVE, 0, 5)) - return; - - if ((op & AR7240_VTU_OP) == AR7240_VTU_OP_LOAD) { - val &= AR7240_VTUDATA_MEMBER; - val |= AR7240_VTUDATA_VALID; - ar7240sw_reg_write(mii, AR7240_REG_VTU_DATA, val); - } - op |= AR7240_VTU_ACTIVE; - ar7240sw_reg_write(mii, AR7240_REG_VTU, op); -} - -static int -ar7240_hw_apply(struct switch_dev *dev) -{ - struct ar7240sw *as = sw_to_ar7240(dev); - u8 portmask[AR7240_NUM_PORTS]; - int i, j; - - /* flush all vlan translation unit entries */ - ar7240_vtu_op(as, AR7240_VTU_OP_FLUSH, 0); - - memset(portmask, 0, sizeof(portmask)); - if (as->vlan) { - /* calculate the port destination masks and load vlans - * into the vlan translation unit */ - for (j = 0; j < AR7240_MAX_VLANS; j++) { - u8 vp = as->vlan_table[j]; - - if (!vp) - continue; - - for (i = 0; i < as->swdev.ports; i++) { - u8 mask = (1 << i); - if (vp & mask) - portmask[i] |= vp & ~mask; - } - - ar7240_vtu_op(as, - AR7240_VTU_OP_LOAD | - (as->vlan_id[j] << AR7240_VTU_VID_S), - as->vlan_table[j]); - } - } else { - /* vlan disabled: - * isolate all ports, but connect them to the cpu port */ - for (i = 0; i < as->swdev.ports; i++) { - if (i == AR7240_PORT_CPU) - continue; - - portmask[i] = 1 << AR7240_PORT_CPU; - portmask[AR7240_PORT_CPU] |= (1 << i); - } - } - - /* update the port destination mask registers and tag settings */ - for (i = 0; i < as->swdev.ports; i++) - ar7240sw_setup_port(as, i, portmask[i]); - - return 0; -} - -static int -ar7240_reset_switch(struct switch_dev *dev) -{ - struct ar7240sw *as = sw_to_ar7240(dev); - ar7240sw_reset(as); - return 0; -} - -static int -ar7240_get_port_link(struct switch_dev *dev, int port, - struct switch_port_link *link) -{ - struct ar7240sw *as = sw_to_ar7240(dev); - struct mii_bus *mii = as->mii_bus; - u32 status; - - if (port >= AR7240_NUM_PORTS) - return -EINVAL; - - status = ar7240sw_reg_read(mii, AR7240_REG_PORT_STATUS(port)); - link->aneg = !!(status & AR7240_PORT_STATUS_LINK_AUTO); - if (link->aneg) { - link->link = !!(status & AR7240_PORT_STATUS_LINK_UP); - if (!link->link) - return 0; - } else { - link->link = true; - } - - link->duplex = !!(status & AR7240_PORT_STATUS_DUPLEX); - link->tx_flow = !!(status & AR7240_PORT_STATUS_TXFLOW); - link->rx_flow = !!(status & AR7240_PORT_STATUS_RXFLOW); - switch (status & AR7240_PORT_STATUS_SPEED_M) { - case AR7240_PORT_STATUS_SPEED_10: - link->speed = SWITCH_PORT_SPEED_10; - break; - case AR7240_PORT_STATUS_SPEED_100: - link->speed = SWITCH_PORT_SPEED_100; - break; - case AR7240_PORT_STATUS_SPEED_1000: - link->speed = SWITCH_PORT_SPEED_1000; - break; - } - - return 0; -} - -static int -ar7240_get_port_stats(struct switch_dev *dev, int port, - struct switch_port_stats *stats) -{ - struct ar7240sw *as = sw_to_ar7240(dev); - - if (port >= AR7240_NUM_PORTS) - return -EINVAL; - - ar7240sw_capture_stats(as); - - read_lock(&as->stats_lock); - stats->rx_bytes = as->port_stats[port].rx_good_byte; - stats->tx_bytes = as->port_stats[port].tx_byte; - read_unlock(&as->stats_lock); - - return 0; -} - -static int -ar7240_set_mirror_monitor_port(struct switch_dev *dev, - const struct switch_attr *attr, - struct switch_val *val) -{ - struct ar7240sw *as = sw_to_ar7240(dev); - struct mii_bus *mii = as->mii_bus; - - int port = val->value.i; - - if (port > 15) - return -EINVAL; - - ar7240sw_reg_rmw(mii, AR7240_REG_CPU_PORT, - AR7240_MIRROR_PORT_M << AR7240_MIRROR_PORT_S, - port << AR7240_MIRROR_PORT_S); - - return 0; -} - -static int -ar7240_get_mirror_monitor_port(struct switch_dev *dev, - const struct switch_attr *attr, - struct switch_val *val) -{ - struct ar7240sw *as = sw_to_ar7240(dev); - struct mii_bus *mii = as->mii_bus; - - u32 ret; - - ret = ar7240sw_reg_read(mii, AR7240_REG_CPU_PORT); - val->value.i = (ret >> AR7240_MIRROR_PORT_S) & AR7240_MIRROR_PORT_M; - - return 0; -} - -static int -ar7240_set_mirror_rx(struct switch_dev *dev, const struct switch_attr *attr, - struct switch_val *val) -{ - struct ar7240sw *as = sw_to_ar7240(dev); - struct mii_bus *mii = as->mii_bus; - - int port = val->port_vlan; - - if (port >= dev->ports) - return -EINVAL; - - if (val && val->value.i == 1) - ar7240sw_reg_set(mii, AR7240_REG_PORT_CTRL(port), - AR7240_PORT_CTRL_MIRROR_RX); - else - ar7240sw_reg_rmw(mii, AR7240_REG_PORT_CTRL(port), - AR7240_PORT_CTRL_MIRROR_RX, 0); - - return 0; -} - -static int -ar7240_get_mirror_rx(struct switch_dev *dev, const struct switch_attr *attr, - struct switch_val *val) -{ - struct ar7240sw *as = sw_to_ar7240(dev); - struct mii_bus *mii = as->mii_bus; - - u32 ctrl; - - int port = val->port_vlan; - - if (port >= dev->ports) - return -EINVAL; - - ctrl = ar7240sw_reg_read(mii, AR7240_REG_PORT_CTRL(port)); - - if ((ctrl & AR7240_PORT_CTRL_MIRROR_RX) == AR7240_PORT_CTRL_MIRROR_RX) - val->value.i = 1; - else - val->value.i = 0; - - return 0; -} - -static int -ar7240_set_mirror_tx(struct switch_dev *dev, const struct switch_attr *attr, - struct switch_val *val) -{ - struct ar7240sw *as = sw_to_ar7240(dev); - struct mii_bus *mii = as->mii_bus; - - int port = val->port_vlan; - - if (port >= dev->ports) - return -EINVAL; - - if (val && val->value.i == 1) - ar7240sw_reg_set(mii, AR7240_REG_PORT_CTRL(port), - AR7240_PORT_CTRL_MIRROR_TX); - else - ar7240sw_reg_rmw(mii, AR7240_REG_PORT_CTRL(port), - AR7240_PORT_CTRL_MIRROR_TX, 0); - - return 0; -} - -static int -ar7240_get_mirror_tx(struct switch_dev *dev, const struct switch_attr *attr, - struct switch_val *val) -{ - struct ar7240sw *as = sw_to_ar7240(dev); - struct mii_bus *mii = as->mii_bus; - - u32 ctrl; - - int port = val->port_vlan; - - if (port >= dev->ports) - return -EINVAL; - - ctrl = ar7240sw_reg_read(mii, AR7240_REG_PORT_CTRL(port)); - - if ((ctrl & AR7240_PORT_CTRL_MIRROR_TX) == AR7240_PORT_CTRL_MIRROR_TX) - val->value.i = 1; - else - val->value.i = 0; - - return 0; -} - -static struct switch_attr ar7240_globals[] = { - { - .type = SWITCH_TYPE_INT, - .name = "enable_vlan", - .description = "Enable VLAN mode", - .set = ar7240_set_vlan, - .get = ar7240_get_vlan, - .max = 1 - }, - { - .type = SWITCH_TYPE_INT, - .name = "mirror_monitor_port", - .description = "Mirror monitor port", - .set = ar7240_set_mirror_monitor_port, - .get = ar7240_get_mirror_monitor_port, - .max = 15 - }, -}; - -static struct switch_attr ar7240_port[] = { - { - .type = SWITCH_TYPE_INT, - .name = "enable_mirror_rx", - .description = "Enable mirroring of RX packets", - .set = ar7240_set_mirror_rx, - .get = ar7240_get_mirror_rx, - .max = 1 - }, - { - .type = SWITCH_TYPE_INT, - .name = "enable_mirror_tx", - .description = "Enable mirroring of TX packets", - .set = ar7240_set_mirror_tx, - .get = ar7240_get_mirror_tx, - .max = 1 - }, -}; - -static struct switch_attr ar7240_vlan[] = { - { - .type = SWITCH_TYPE_INT, - .name = "vid", - .description = "VLAN ID", - .set = ar7240_set_vid, - .get = ar7240_get_vid, - .max = 4094, - }, -}; - -static const struct switch_dev_ops ar7240_ops = { - .attr_global = { - .attr = ar7240_globals, - .n_attr = ARRAY_SIZE(ar7240_globals), - }, - .attr_port = { - .attr = ar7240_port, - .n_attr = ARRAY_SIZE(ar7240_port), - }, - .attr_vlan = { - .attr = ar7240_vlan, - .n_attr = ARRAY_SIZE(ar7240_vlan), - }, - .get_port_pvid = ar7240_get_pvid, - .set_port_pvid = ar7240_set_pvid, - .get_vlan_ports = ar7240_get_ports, - .set_vlan_ports = ar7240_set_ports, - .apply_config = ar7240_hw_apply, - .reset_switch = ar7240_reset_switch, - .get_port_link = ar7240_get_port_link, - .get_port_stats = ar7240_get_port_stats, -}; - -static int -ag71xx_ar7240_probe(struct mdio_device *mdiodev) -{ - struct mii_bus *mii = mdiodev->bus; - struct ar7240sw *as; - struct switch_dev *swdev; - struct reset_control *switch_reset; - u32 ctrl; - int phy_if_mode, err, i; - - as = devm_kzalloc(&mdiodev->dev, sizeof(*as), GFP_KERNEL); - if (!as) - return -ENOMEM; - - as->mii_bus = mii; - as->of_node = mdiodev->dev.of_node; - as->mdio_node = of_get_child_by_name(as->of_node, "mdio-bus"); - - swdev = &as->swdev; - - switch_reset = devm_reset_control_get_optional(&mdiodev->dev, "switch"); - if (switch_reset) { - reset_control_assert(switch_reset); - msleep(50); - reset_control_deassert(switch_reset); - msleep(200); - } - - ctrl = ar7240sw_reg_read(mii, AR7240_REG_MASK_CTRL); - as->ver = (ctrl >> AR7240_MASK_CTRL_VERSION_S) & - AR7240_MASK_CTRL_VERSION_M; - - if (sw_is_ar7240(as)) { - swdev->name = "AR7240/AR9330 built-in switch"; - swdev->ports = AR7240_NUM_PORTS - 1; - } else if (sw_is_ar934x(as)) { - swdev->name = "AR934X built-in switch"; - phy_if_mode = of_get_phy_mode(as->of_node); - - if (phy_if_mode == PHY_INTERFACE_MODE_GMII) { - ar7240sw_reg_set(mii, AR934X_REG_OPER_MODE0, - AR934X_OPER_MODE0_MAC_GMII_EN); - } else if (phy_if_mode == PHY_INTERFACE_MODE_MII) { - ar7240sw_reg_set(mii, AR934X_REG_OPER_MODE0, - AR934X_OPER_MODE0_PHY_MII_EN); - } else { - pr_err("%s: invalid PHY interface mode\n", - dev_name(&mdiodev->dev)); - return -EINVAL; - } - - if (of_property_read_bool(as->of_node, "phy4-mii-enable")) { - ar7240sw_reg_set(mii, AR934X_REG_OPER_MODE1, - AR934X_REG_OPER_MODE1_PHY4_MII_EN); - swdev->ports = AR7240_NUM_PORTS - 1; - } else { - swdev->ports = AR7240_NUM_PORTS; - } - } else { - pr_err("%s: unsupported chip, ctrl=%08x\n", - dev_name(&mdiodev->dev), ctrl); - return -EINVAL; - } - - swdev->cpu_port = AR7240_PORT_CPU; - swdev->vlans = AR7240_MAX_VLANS; - swdev->ops = &ar7240_ops; - swdev->alias = dev_name(&mdiodev->dev); - - if ((err = register_switch(&as->swdev, NULL)) < 0) - return err; - - pr_info("%s: Found an %s\n", dev_name(&mdiodev->dev), swdev->name); - - as->switch_mii_bus = devm_mdiobus_alloc(&mdiodev->dev); - as->switch_mii_bus->name = "ar7240sw_mdio"; - as->switch_mii_bus->read = ar7240sw_phy_read; - as->switch_mii_bus->write = ar7240sw_phy_write; - as->switch_mii_bus->priv = as; - as->switch_mii_bus->parent = &mdiodev->dev; - snprintf(as->switch_mii_bus->id, MII_BUS_ID_SIZE, "%s", dev_name(&mdiodev->dev)); - - if(as->mdio_node) { - err = of_mdiobus_register(as->switch_mii_bus, as->mdio_node); - if (err) - return err; - } - - /* initialize defaults */ - for (i = 0; i < AR7240_MAX_VLANS; i++) - as->vlan_id[i] = i; - - as->vlan_table[0] = ar7240sw_port_mask_all(as); - ar7240sw_reset(as); - ar7240_hw_apply(&as->swdev); - rwlock_init(&as->stats_lock); - dev_set_drvdata(&mdiodev->dev, as); - return 0; -} - -static void -ag71xx_ar7240_remove(struct mdio_device *mdiodev) -{ - struct ar7240sw *as = dev_get_drvdata(&mdiodev->dev); - if(as->mdio_node) - mdiobus_unregister(as->switch_mii_bus); - unregister_switch(&as->swdev); -} - -static const struct of_device_id ag71xx_sw_of_match[] = { - { .compatible = "qca,ar8216-builtin" }, - { .compatible = "qca,ar8229-builtin" }, - { /* sentinel */ }, -}; - -static struct mdio_driver ag71xx_sw_driver = { - .probe = ag71xx_ar7240_probe, - .remove = ag71xx_ar7240_remove, - .mdiodrv.driver = { - .name = "ag71xx-switch", - .of_match_table = ag71xx_sw_of_match, - }, -}; - -mdio_module_driver(ag71xx_sw_driver); -MODULE_LICENSE("GPL"); diff --git a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_gmac.c b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_gmac.c index e69abb643..cc0a15d3a 100644 --- a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_gmac.c +++ b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_gmac.c @@ -53,6 +53,7 @@ static void ag71xx_setup_gmac_934x(struct device_node *np, void __iomem *base) ag71xx_of_bit(np, "rgmii-gmac0", &val, AR934X_ETH_CFG_RGMII_GMAC0); ag71xx_of_bit(np, "mii-gmac0", &val, AR934X_ETH_CFG_MII_GMAC0); + ag71xx_of_bit(np, "mii-gmac0-slave", &val, AR934X_ETH_CFG_MII_GMAC0_SLAVE); ag71xx_of_bit(np, "gmii-gmac0", &val, AR934X_ETH_CFG_GMII_GMAC0); ag71xx_of_bit(np, "switch-phy-swap", &val, AR934X_ETH_CFG_SW_PHY_SWAP); ag71xx_of_bit(np, "switch-only-mode", &val, diff --git a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c index d809bbee8..8cff56a11 100644 --- a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c +++ b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_main.c @@ -162,7 +162,7 @@ static void ag71xx_ring_rx_clean(struct ag71xx *ag) for (i = 0; i < ring_size; i++) if (ring->buf[i].rx_buf) { - dma_unmap_single(&ag->dev->dev, ring->buf[i].dma_addr, + dma_unmap_single(&ag->pdev->dev, ring->buf[i].dma_addr, ag->rx_buf_size, DMA_FROM_DEVICE); skb_free_frag(ring->buf[i].rx_buf); } @@ -187,7 +187,7 @@ static bool ag71xx_fill_rx_buf(struct ag71xx *ag, struct ag71xx_buf *buf, return false; buf->rx_buf = data; - buf->dma_addr = dma_map_single(&ag->dev->dev, data, ag->rx_buf_size, + buf->dma_addr = dma_map_single(&ag->pdev->dev, data, ag->rx_buf_size, DMA_FROM_DEVICE); desc->data = (u32) buf->dma_addr + offset; return true; @@ -276,7 +276,7 @@ static int ag71xx_rings_init(struct ag71xx *ag) if (!tx->buf) return -ENOMEM; - tx->descs_cpu = dma_alloc_coherent(NULL, ring_size * AG71XX_DESC_SIZE, + tx->descs_cpu = dma_alloc_coherent(&ag->pdev->dev, ring_size * AG71XX_DESC_SIZE, &tx->descs_dma, GFP_ATOMIC); if (!tx->descs_cpu) { kfree(tx->buf); @@ -299,7 +299,7 @@ static void ag71xx_rings_free(struct ag71xx *ag) int ring_size = BIT(tx->order) + BIT(rx->order); if (tx->descs_cpu) - dma_free_coherent(NULL, ring_size * AG71XX_DESC_SIZE, + dma_free_coherent(&ag->pdev->dev, ring_size * AG71XX_DESC_SIZE, tx->descs_cpu, tx->descs_dma); kfree(tx->buf); @@ -453,8 +453,12 @@ static void ag71xx_hw_init(struct ag71xx *ag) udelay(20); reset_control_assert(ag->mac_reset); + if (ag->mdio_reset) + reset_control_assert(ag->mdio_reset); msleep(100); reset_control_deassert(ag->mac_reset); + if (ag->mdio_reset) + reset_control_deassert(ag->mdio_reset); msleep(200); ag71xx_hw_setup(ag); @@ -888,7 +892,7 @@ static netdev_tx_t ag71xx_hard_start_xmit(struct sk_buff *skb, goto err_drop; } - dma_addr = dma_map_single(&dev->dev, skb->data, skb->len, + dma_addr = dma_map_single(&ag->pdev->dev, skb->data, skb->len, DMA_TO_DEVICE); i = ring->curr & ring_mask; @@ -930,7 +934,7 @@ static netdev_tx_t ag71xx_hard_start_xmit(struct sk_buff *skb, return NETDEV_TX_OK; err_drop_unmap: - dma_unmap_single(&dev->dev, dma_addr, skb->len, DMA_TO_DEVICE); + dma_unmap_single(&ag->pdev->dev, dma_addr, skb->len, DMA_TO_DEVICE); err_drop: dev->stats.tx_dropped++; @@ -981,10 +985,16 @@ static int ag71xx_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) return -EOPNOTSUPP; } +#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,15,0)) static void ag71xx_oom_timer_handler(unsigned long data) { struct net_device *dev = (struct net_device *) data; struct ag71xx *ag = netdev_priv(dev); +#else +static void ag71xx_oom_timer_handler(struct timer_list *t) +{ + struct ag71xx *ag = from_timer(ag, t, oom_timer); +#endif napi_schedule(&ag->napi); } @@ -1137,7 +1147,7 @@ static int ag71xx_rx_packets(struct ag71xx *ag, int limit) pktlen = desc->ctrl & pktlen_mask; pktlen -= ETH_FCS_LEN; - dma_unmap_single(&dev->dev, ring->buf[i].dma_addr, + dma_unmap_single(&ag->pdev->dev, ring->buf[i].dma_addr, ag->rx_buf_size, DMA_FROM_DEVICE); dev->stats.rx_packets++; @@ -1279,20 +1289,6 @@ static irqreturn_t ag71xx_interrupt(int irq, void *dev_id) return IRQ_HANDLED; } -#ifdef CONFIG_NET_POLL_CONTROLLER -/* - * Polling 'interrupt' - used by things like netconsole to send skbs - * without having to re-enable interrupts. It's not called while - * the interrupt routine is executing. - */ -static void ag71xx_netpoll(struct net_device *dev) -{ - disable_irq(dev->irq); - ag71xx_interrupt(dev->irq, dev); - enable_irq(dev->irq); -} -#endif - static int ag71xx_change_mtu(struct net_device *dev, int new_mtu) { struct ag71xx *ag = netdev_priv(dev); @@ -1313,35 +1309,11 @@ static const struct net_device_ops ag71xx_netdev_ops = { .ndo_change_mtu = ag71xx_change_mtu, .ndo_set_mac_address = eth_mac_addr, .ndo_validate_addr = eth_validate_addr, -#ifdef CONFIG_NET_POLL_CONTROLLER - .ndo_poll_controller = ag71xx_netpoll, -#endif }; -static const char *ag71xx_get_phy_if_mode_name(phy_interface_t mode) -{ - switch (mode) { - case PHY_INTERFACE_MODE_MII: - return "MII"; - case PHY_INTERFACE_MODE_GMII: - return "GMII"; - case PHY_INTERFACE_MODE_RMII: - return "RMII"; - case PHY_INTERFACE_MODE_RGMII: - return "RGMII"; - case PHY_INTERFACE_MODE_SGMII: - return "SGMII"; - default: - break; - } - - return "unknown"; -} - static int ag71xx_probe(struct platform_device *pdev) { struct device_node *np = pdev->dev.of_node; - struct device_node *mdio_node; struct net_device *dev; struct resource *res; struct ag71xx *ag; @@ -1352,7 +1324,7 @@ static int ag71xx_probe(struct platform_device *pdev) if (!np) return -ENODEV; - dev = alloc_etherdev(sizeof(*ag)); + dev = devm_alloc_etherdev(&pdev->dev, sizeof(*ag)); if (!dev) return -ENOMEM; @@ -1373,13 +1345,14 @@ static int ag71xx_probe(struct platform_device *pdev) AG71XX_DEFAULT_MSG_ENABLE); spin_lock_init(&ag->lock); - ag->mac_reset = devm_reset_control_get(&pdev->dev, "mac"); + ag->mac_reset = devm_reset_control_get_exclusive(&pdev->dev, "mac"); if (IS_ERR(ag->mac_reset)) { dev_err(&pdev->dev, "missing mac reset\n"); - err = PTR_ERR(ag->mac_reset); - goto err_free; + return PTR_ERR(ag->mac_reset); } + ag->mdio_reset = devm_reset_control_get_optional_exclusive(&pdev->dev, "mdio"); + if (of_property_read_u32_array(np, "fifo-data", ag->fifodata, 3)) { if (of_device_is_compatible(np, "qca,ar9130-eth") || of_device_is_compatible(np, "qca,ar7100-eth")) { @@ -1410,18 +1383,15 @@ static int ag71xx_probe(struct platform_device *pdev) ag->mac_base = devm_ioremap_nocache(&pdev->dev, res->start, res->end - res->start + 1); - if (!ag->mac_base) { - err = -ENOMEM; - goto err_free; - } + if (!ag->mac_base) + return -ENOMEM; + res = platform_get_resource(pdev, IORESOURCE_MEM, 1); if (res) { ag->mii_base = devm_ioremap_nocache(&pdev->dev, res->start, res->end - res->start + 1); - if (!ag->mii_base) { - err = -ENOMEM; - goto err_free; - } + if (!ag->mii_base) + return -ENOMEM; } dev->irq = platform_get_irq(pdev, 0); @@ -1429,7 +1399,7 @@ static int ag71xx_probe(struct platform_device *pdev) 0x0, dev_name(&pdev->dev), dev); if (err) { dev_err(&pdev->dev, "unable to request IRQ %d\n", dev->irq); - goto err_free; + return err; } dev->netdev_ops = &ag71xx_netdev_ops; @@ -1437,9 +1407,13 @@ static int ag71xx_probe(struct platform_device *pdev) INIT_DELAYED_WORK(&ag->restart_work, ag71xx_restart_work_func); +#if (LINUX_VERSION_CODE < KERNEL_VERSION(4,15,0)) init_timer(&ag->oom_timer); ag->oom_timer.data = (unsigned long) dev; ag->oom_timer.function = ag71xx_oom_timer_handler; +#else + timer_setup(&ag->oom_timer, ag71xx_oom_timer_handler, 0); +#endif tx_size = AG71XX_TX_RING_SIZE_DEFAULT; ag->rx_ring.order = ag71xx_ring_size_order(AG71XX_RX_RING_SIZE_DEFAULT); @@ -1462,7 +1436,14 @@ static int ag71xx_probe(struct platform_device *pdev) dev->min_mtu = 68; dev->max_mtu = max_frame_len - ag71xx_max_frame_len(0); - if (of_device_is_compatible(np, "qca,ar7240-eth")) + if (of_device_is_compatible(np, "qca,ar7240-eth") || + of_device_is_compatible(np, "qca,ar7241-eth") || + of_device_is_compatible(np, "qca,ar7242-eth") || + of_device_is_compatible(np, "qca,ar9330-eth") || + of_device_is_compatible(np, "qca,ar9340-eth") || + of_device_is_compatible(np, "qca,qca9530-eth") || + of_device_is_compatible(np, "qca,qca9550-eth") || + of_device_is_compatible(np, "qca,qca9560-eth")) ag->tx_hang_workaround = 1; ag->rx_buf_offset = NET_SKB_PAD; @@ -1480,7 +1461,7 @@ static int ag71xx_probe(struct platform_device *pdev) sizeof(struct ag71xx_desc), &ag->stop_desc_dma, GFP_KERNEL); if (!ag->stop_desc) - goto err_free; + return -ENOMEM; ag->stop_desc->data = 0; ag->stop_desc->ctrl = 0; @@ -1497,8 +1478,7 @@ static int ag71xx_probe(struct platform_device *pdev) ag->phy_if_mode = of_get_phy_mode(np); if (ag->phy_if_mode < 0) { dev_err(&pdev->dev, "missing phy-mode property in DT\n"); - err = ag->phy_if_mode; - goto err_free; + return ag->phy_if_mode; } if (of_property_read_u32(np, "qca,mac-idx", &ag->mac_idx)) @@ -1525,15 +1505,23 @@ static int ag71xx_probe(struct platform_device *pdev) ag71xx_dump_regs(ag); - if (!of_device_is_compatible(np, "simple-mfd")) { - mdio_node = of_get_child_by_name(np, "mdio-bus"); - if (!IS_ERR(mdio_node)) - of_platform_device_create(mdio_node, NULL, NULL); + /* + * populate current node to register mdio-bus as a subdevice. + * the mdio bus works independently on ar7241 and later chips + * and we need to load mdio1 before gmac0, which can be done + * by adding a "simple-mfd" compatible to gmac node. The + * following code checks OF_POPULATED_BUS flag before populating + * to avoid duplicated population. + */ + if (!of_node_check_flag(np, OF_POPULATED_BUS)) { + err = of_platform_populate(np, NULL, NULL, &pdev->dev); + if (err) + return err; } err = ag71xx_phy_connect(ag); if (err) - goto err_free; + return err; err = ag71xx_debugfs_init(ag); if (err) @@ -1549,16 +1537,14 @@ static int ag71xx_probe(struct platform_device *pdev) goto err_phy_disconnect; } - pr_info("%s: Atheros AG71xx at 0x%08lx, irq %d, mode:%s\n", + pr_info("%s: Atheros AG71xx at 0x%08lx, irq %d, mode: %s\n", dev->name, (unsigned long) ag->mac_base, dev->irq, - ag71xx_get_phy_if_mode_name(ag->phy_if_mode)); + phy_modes(ag->phy_if_mode)); return 0; err_phy_disconnect: ag71xx_phy_disconnect(ag); -err_free: - free_netdev(dev); return err; } @@ -1574,11 +1560,7 @@ static int ag71xx_remove(struct platform_device *pdev) ag71xx_debugfs_exit(ag); ag71xx_phy_disconnect(ag); unregister_netdev(dev); - free_irq(dev->irq, dev); - iounmap(ag->mac_base); - kfree(dev); platform_set_drvdata(pdev, NULL); - return 0; } diff --git a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_mdio.c b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_mdio.c index 58aef7487..a58ee3346 100644 --- a/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_mdio.c +++ b/target/linux/ath79/files/drivers/net/ethernet/atheros/ag71xx/ag71xx_mdio.c @@ -190,7 +190,7 @@ static int ag71xx_mdio_probe(struct platform_device *pdev) if (!mii_bus) return -ENOMEM; - am->mdio_reset = of_reset_control_get_exclusive(np, "mdio"); + am->mdio_reset = devm_reset_control_get_exclusive(amdev, "mdio"); builtin_switch = of_property_read_bool(np, "builtin-switch"); mii_bus->name = "ag71xx_mdio"; diff --git a/target/linux/ath79/generic/config-default b/target/linux/ath79/generic/config-default index fddcb1d70..313ab8604 100644 --- a/target/linux/ath79/generic/config-default +++ b/target/linux/ath79/generic/config-default @@ -8,6 +8,7 @@ CONFIG_LEDS_RESET=y CONFIG_MARVELL_PHY=y CONFIG_MICREL_PHY=y CONFIG_MTD_REDBOOT_PARTS=y +CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-2 CONFIG_MTD_SPLIT_EVA_FW=y CONFIG_OF_ADDRESS_PCI=y CONFIG_OF_PCI=y diff --git a/target/linux/ath79/image/common-netgear.mk b/target/linux/ath79/image/common-netgear.mk index 5dfcd38a9..9b7993629 100644 --- a/target/linux/ath79/image/common-netgear.mk +++ b/target/linux/ath79/image/common-netgear.mk @@ -19,6 +19,23 @@ define Build/netgear-squashfs rm -rf $@.squashfs $@.fs endef +define Build/netgear-rootfs + mkimage \ + -A mips -O linux -T filesystem -C none \ + -M $(NETGEAR_KERNEL_MAGIC) \ + -n '$(VERSION_DIST) filesystem' \ + -d $(IMAGE_ROOTFS) $@.fs + cat $@.fs >> $@ + rm -rf $@.fs +endef + define Build/netgear-uImage $(call Build/uImage,$(1) -M $(NETGEAR_KERNEL_MAGIC)) endef + +define Device/netgear_ath79 + KERNEL := kernel-bin | append-dtb | lzma -d20 | netgear-uImage lzma + IMAGES += factory.img + IMAGE/sysupgrade.bin := $$(IMAGE/default) | append-metadata | check-size $$$$(IMAGE_SIZE) + IMAGE/factory.img := $$(IMAGE/default) | netgear-dni | check-size $$$$(IMAGE_SIZE) +endef diff --git a/target/linux/ath79/image/common-tp-link.mk b/target/linux/ath79/image/common-tp-link.mk index 720202de2..6efff6322 100644 --- a/target/linux/ath79/image/common-tp-link.mk +++ b/target/linux/ath79/image/common-tp-link.mk @@ -86,7 +86,7 @@ define Device/tplink-8m endef define Device/tplink-8mlzma -$(Device/tplink) + $(Device/tplink) TPLINK_FLASHLAYOUT := 8Mlzma IMAGE_SIZE := 7936k endef @@ -99,8 +99,9 @@ endef define Device/tplink-safeloader $(Device/tplink) - KERNEL := kernel-bin | append-dtb | lzma | tplink-v1-header - IMAGE/sysupgrade.bin := append-rootfs | tplink-safeloader sysupgrade | append-metadata + KERNEL := kernel-bin | append-dtb | lzma | tplink-v1-header -O + IMAGE/sysupgrade.bin := append-rootfs | tplink-safeloader sysupgrade | \ + append-metadata | check-size $$$$(IMAGE_SIZE) IMAGE/factory.bin := append-rootfs | tplink-safeloader factory endef diff --git a/target/linux/ath79/image/generic-tp-link.mk b/target/linux/ath79/image/generic-tp-link.mk index 420887821..ecc34b88e 100644 --- a/target/linux/ath79/image/generic-tp-link.mk +++ b/target/linux/ath79/image/generic-tp-link.mk @@ -4,7 +4,7 @@ define Device/tplink_archer-a7-v5 $(Device/tplink-safeloader-uimage) ATH_SOC := qca9563 IMAGE_SIZE := 15104k - DEVICE_TITLE := TP-LINK Archer A7 v5 + DEVICE_TITLE := TP-Link Archer A7 v5 DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-ledtrig-usbport kmod-ath10k-ct ath10k-firmware-qca988x-ct TPLINK_BOARD_ID := ARCHER-A7-V5 BOARDNAME := ARCHER-A7-V5 @@ -16,7 +16,7 @@ define Device/tplink_archer-c2-v3 $(Device/tplink-safeloader-uimage) ATH_SOC := qca9563 IMAGE_SIZE := 7808k - DEVICE_TITLE := TP-LINK Archer C2 v3 + DEVICE_TITLE := TP-Link Archer C2 v3 DEVICE_PACKAGES := kmod-ath10k-ct ath10k-firmware-qca9887-ct TPLINK_BOARD_ID := ARCHER-C2-V3 endef @@ -26,7 +26,7 @@ define Device/tplink_archer-c58-v1 $(Device/tplink-safeloader-uimage) ATH_SOC := qca9561 IMAGE_SIZE := 7936k - DEVICE_TITLE := TP-LINK Archer C58 v1 + DEVICE_TITLE := TP-Link Archer C58 v1 TPLINK_BOARD_ID := ARCHER-C58-V1 DEVICE_PACKAGES := kmod-ath10k-ct ath10k-firmware-qca9888-ct SUPPORTED_DEVICES += archer-c58-v1 @@ -37,7 +37,7 @@ define Device/tplink_archer-c59-v1 $(Device/tplink-safeloader-uimage) ATH_SOC := qca9561 IMAGE_SIZE := 14528k - DEVICE_TITLE := TP-LINK Archer C59 v1 + DEVICE_TITLE := TP-Link Archer C59 v1 TPLINK_BOARD_ID := ARCHER-C59-V1 DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-ledtrig-usbport kmod-ath10k-ct ath10k-firmware-qca9888-ct SUPPORTED_DEVICES += archer-c59-v1 @@ -48,16 +48,26 @@ define Device/tplink_archer-c6-v2 $(Device/tplink-safeloader-uimage) ATH_SOC := qca9563 IMAGE_SIZE := 7808k - DEVICE_TITLE := TP-LINK Archer C6 v2 + DEVICE_TITLE := TP-Link Archer C6 v2 TPLINK_BOARD_ID := ARCHER-C6-V2 DEVICE_PACKAGES := kmod-ath10k-ct ath10k-firmware-qca9888-ct endef TARGET_DEVICES += tplink_archer-c6-v2 +define Device/tplink_archer-c5-v1 + $(Device/tplink-16mlzma) + ATH_SOC := qca9558 + DEVICE_TITLE := TP-Link Archer C5 v1 + DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-ledtrig-usbport kmod-ath10k-ct ath10k-firmware-qca988x-ct + TPLINK_HWID := 0xc5000001 + SUPPORTED_DEVICES += archer-c5 +endef +TARGET_DEVICES += tplink_archer-c5-v1 + define Device/tplink_archer-c7-v1 $(Device/tplink-8mlzma) ATH_SOC := qca9558 - DEVICE_TITLE := TP-LINK Archer C7 v1 + DEVICE_TITLE := TP-Link Archer C7 v1 DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-ledtrig-usbport kmod-ath10k-ct ath10k-firmware-qca988x-ct TPLINK_HWID := 0x75000001 endef @@ -66,7 +76,7 @@ TARGET_DEVICES += tplink_archer-c7-v1 define Device/tplink_archer-c7-v2 $(Device/tplink-16mlzma) ATH_SOC := qca9558 - DEVICE_TITLE := TP-LINK Archer C7 v2 + DEVICE_TITLE := TP-Link Archer C7 v2 DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-ledtrig-usbport kmod-ath10k-ct ath10k-firmware-qca988x-ct TPLINK_HWID := 0xc7000002 IMAGES += factory-us.bin factory-eu.bin @@ -79,7 +89,7 @@ define Device/tplink_archer-c7-v4 $(Device/tplink-safeloader-uimage) ATH_SOC := qca9563 IMAGE_SIZE := 15104k - DEVICE_TITLE := TP-LINK Archer C7 v4 + DEVICE_TITLE := TP-Link Archer C7 v4 DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-ledtrig-usbport kmod-ath10k-ct ath10k-firmware-qca988x-ct TPLINK_BOARD_ID := ARCHER-C7-V4 BOARDNAME := ARCHER-C7-V4 @@ -91,7 +101,7 @@ define Device/tplink_archer-c7-v5 $(Device/tplink-safeloader-uimage) ATH_SOC := qca9563 IMAGE_SIZE := 15360k - DEVICE_TITLE := TP-LINK Archer C7 v5 + DEVICE_TITLE := TP-Link Archer C7 v5 DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-ledtrig-usbport kmod-ath10k-ct ath10k-firmware-qca988x-ct TPLINK_BOARD_ID := ARCHER-C7-V5 BOARDNAME := ARCHER-C7-V5 @@ -99,37 +109,69 @@ define Device/tplink_archer-c7-v5 endef TARGET_DEVICES += tplink_archer-c7-v5 +define Device/tplink_cpe210-v2 + $(Device/tplink-safeloader) + ATH_SOC := qca9533 + IMAGE_SIZE := 7680k + DEVICE_TITLE := TP-Link CPE210 v2 + TPLINK_BOARD_ID := CPE210V2 + DEVICE_PACKAGES := rssileds + LOADER_TYPE := elf + SUPPORTED_DEVICES += cpe210-v2 +endef +TARGET_DEVICES += tplink_cpe210-v2 + +define Device/tplink_cpe210-v3 + $(Device/tplink-safeloader) + ATH_SOC := qca9533 + IMAGE_SIZE := 7680k + DEVICE_TITLE := TP-Link CPE210 v3 + DEVICE_PACKAGES := rssileds + TPLINK_BOARD_ID := CPE210V3 + LOADER_TYPE := elf + SUPPORTED_DEVICES += cpe210-v3 +endef +TARGET_DEVICES += tplink_cpe210-v3 + +define Device/tplink_re350k-v1 + $(Device/tplink-safeloader) + ATH_SOC := qca9558 + IMAGE_SIZE := 13760k + DEVICE_TITLE := TP-Link RE350K v1 + DEVICE_PACKAGES := kmod-ath10k-ct ath10k-firmware-qca988x-ct + TPLINK_BOARD_ID := RE350K-V1 + TPLINK_HWID := 0x0 + TPLINK_HWREV := 0 +endef +TARGET_DEVICES += tplink_re350k-v1 + define Device/tplink_re450-v2 - $(Device/tplink) + $(Device/tplink-safeloader) ATH_SOC := qca9563 IMAGE_SIZE := 6016k - DEVICE_TITLE := TP-LINK RE450 v2 + DEVICE_TITLE := TP-Link RE450 v2 DEVICE_PACKAGES := kmod-ath10k-ct ath10k-firmware-qca988x-ct TPLINK_HWID := 0x0 TPLINK_HWREV := 0 TPLINK_BOARD_ID := RE450-V2 LOADER_TYPE := elf - KERNEL := kernel-bin | append-dtb | lzma | tplink-v1-header -O - IMAGE/sysupgrade.bin := append-rootfs | tplink-safeloader sysupgrade | \ - append-metadata | check-size $$$$(IMAGE_SIZE) - IMAGE/factory.bin := append-rootfs | tplink-safeloader factory endef TARGET_DEVICES += tplink_re450-v2 define Device/tplink_tl-wdr3600 $(Device/tplink-8mlzma) ATH_SOC := ar9344 - DEVICE_TITLE := TP-LINK TL-WDR3600 + DEVICE_TITLE := TP-Link TL-WDR3600 DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-ledtrig-usbport TPLINK_HWID := 0x36000001 - SUPPORTED_DEVICES += tl-wdr3600 + SUPPORTED_DEVICES += tl-wdr4300 endef TARGET_DEVICES += tplink_tl-wdr3600 define Device/tplink_tl-wdr4300 $(Device/tplink-8mlzma) ATH_SOC := ar9344 - DEVICE_TITLE := TP-LINK TL-WDR4300 + DEVICE_TITLE := TP-Link TL-WDR4300 DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-ledtrig-usbport TPLINK_HWID := 0x43000001 SUPPORTED_DEVICES += tl-wdr4300 @@ -139,7 +181,7 @@ TARGET_DEVICES += tplink_tl-wdr4300 define Device/tplink_tl-wdr4900-v2 $(Device/tplink-8mlzma) ATH_SOC := qca9558 - DEVICE_TITLE := TP-LINK TL-WDR4900 v2 + DEVICE_TITLE := TP-Link TL-WDR4900 v2 DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-ledtrig-usbport TPLINK_HWID := 0x49000002 endef @@ -148,7 +190,7 @@ TARGET_DEVICES += tplink_tl-wdr4900-v2 define Device/tplink_tl-wr1043nd-v1 $(Device/tplink-8m) ATH_SOC := ar9132 - DEVICE_TITLE := TP-LINK TL-WR1043N/ND v1 + DEVICE_TITLE := TP-Link TL-WR1043N/ND v1 DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-ledtrig-usbport TPLINK_HWID := 0x10430001 SUPPORTED_DEVICES += tl-wr1043nd @@ -158,7 +200,7 @@ TARGET_DEVICES += tplink_tl-wr1043nd-v1 define Device/tplink_tl-wr810n-v1 $(Device/tplink-8mlzma) ATH_SOC := qca9531 - DEVICE_TITLE := TP-LINK TL-WR810N v1 + DEVICE_TITLE := TP-Link TL-WR810N v1 TPLINK_HWID := 0x8100001 DEVICE_PACKAGES := kmod-usb2 kmod-usb-ledtrig-usbport endef @@ -167,15 +209,25 @@ TARGET_DEVICES += tplink_tl-wr810n-v1 define Device/tplink_tl-wr810n-v2 $(Device/tplink-8mlzma) ATH_SOC := qca9533 - DEVICE_TITLE := TP-LINK TL-WR810N v2 + DEVICE_TITLE := TP-Link TL-WR810N v2 TPLINK_HWID := 0x8100002 endef TARGET_DEVICES += tplink_tl-wr810n-v2 +define Device/tplink_tl-wr710n-v1 + $(Device/tplink-8mlzma) + ATH_SOC := ar9331 + DEVICE_TITLE := TP-Link TL-WR710N v1 + DEVICE_PACKAGES := kmod-usb-core kmod-usb-chipidea2 kmod-usb-ledtrig-usbport + TPLINK_HWID := 0x07100001 + SUPPORTED_DEVICES += tl-wr710n +endef +TARGET_DEVICES += tplink_tl-wr710n-v1 + define Device/tplink_tl-wr842n-v1 $(Device/tplink-8m) ATH_SOC := ar7241 - DEVICE_TITLE := TP-LINK TL-WR842N/ND v1 + DEVICE_TITLE := TP-Link TL-WR842N/ND v1 DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-ledtrig-usbport TPLINK_HWID := 0x8420001 endef @@ -184,7 +236,7 @@ TARGET_DEVICES += tplink_tl-wr842n-v1 define Device/tplink_tl-wr842n-v2 $(Device/tplink-8mlzma) ATH_SOC := ar9341 - DEVICE_TITLE := TP-LINK TL-WR842N/ND v2 + DEVICE_TITLE := TP-Link TL-WR842N/ND v2 DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-ledtrig-usbport TPLINK_HWID := 0x8420002 SUPPORTED_DEVICES += tl-wr842n-v2 @@ -194,7 +246,7 @@ TARGET_DEVICES += tplink_tl-wr842n-v2 define Device/tplink_tl-wr1043nd-v2 $(Device/tplink-8mlzma) ATH_SOC := qca9558 - DEVICE_TITLE := TP-LINK TL-WR1043N/ND v2 + DEVICE_TITLE := TP-Link TL-WR1043N/ND v2 DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-ledtrig-usbport TPLINK_HWID := 0x10430002 SUPPORTED_DEVICES += tl-wr1043nd-v2 @@ -204,7 +256,7 @@ TARGET_DEVICES += tplink_tl-wr1043nd-v2 define Device/tplink_tl-wr1043nd-v3 $(Device/tplink-8mlzma) ATH_SOC := qca9558 - DEVICE_TITLE := TP-LINK TL-WR1043N/ND v3 + DEVICE_TITLE := TP-Link TL-WR1043N/ND v3 DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-ledtrig-usbport TPLINK_HWID := 0x10430003 SUPPORTED_DEVICES += tl-wr1043nd-v3 @@ -212,17 +264,13 @@ endef TARGET_DEVICES += tplink_tl-wr1043nd-v3 define Device/tplink_tl-wr1043nd-v4 - $(Device/tplink) + $(Device/tplink-safeloader) ATH_SOC := qca9563 IMAGE_SIZE := 15552k - DEVICE_TITLE := TP-LINK TL-WR1043N/ND v4 + DEVICE_TITLE := TP-Link TL-WR1043N/ND v4 DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-ledtrig-usbport TPLINK_HWID := 0x10430004 TPLINK_BOARD_ID := TLWR1043NDV4 - KERNEL := kernel-bin | append-dtb | lzma | tplink-v1-header -O - IMAGE/sysupgrade.bin := append-rootfs | tplink-safeloader sysupgrade | \ - append-metadata | check-size $$$$(IMAGE_SIZE) - IMAGE/factory.bin := append-rootfs | tplink-safeloader factory SUPPORTED_DEVICES += tl-wr1043nd-v4 endef TARGET_DEVICES += tplink_tl-wr1043nd-v4 @@ -230,7 +278,7 @@ TARGET_DEVICES += tplink_tl-wr1043nd-v4 define Device/tplink_tl-wr2543-v1 $(Device/tplink-8mlzma) ATH_SOC := ar7242 - DEVICE_TITLE := TP-LINK TL-WR2543N/ND v1 + DEVICE_TITLE := TP-Link TL-WR2543N/ND v1 DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-usb-ledtrig-usbport TPLINK_HWID := 0x25430001 IMAGE/sysupgrade.bin := append-rootfs | mktplinkfw sysupgrade -v 3.13.99 | \ diff --git a/target/linux/ath79/image/generic-ubnt.mk b/target/linux/ath79/image/generic-ubnt.mk index 681c14dfb..b189d6677 100644 --- a/target/linux/ath79/image/generic-ubnt.mk +++ b/target/linux/ath79/image/generic-ubnt.mk @@ -106,12 +106,19 @@ define Device/ubnt_rocket-m endef TARGET_DEVICES += ubnt_rocket-m -define Device/ubnt_nano-m +define Device/ubnt_nanostation-m $(Device/ubnt-xm) - DEVICE_TITLE := Ubiquiti Nano-M + DEVICE_TITLE := Ubiquiti Nanostation M SUPPORTED_DEVICES += nano-m endef -TARGET_DEVICES += ubnt_nano-m +TARGET_DEVICES += ubnt_nanostation-m + +define Device/ubnt_nanostation-m-xw + $(Device/ubnt-xw) + DEVICE_TITLE := Ubiquiti Nanostation M (XW) + SUPPORTED_DEVICES += nano-m-xw +endef +TARGET_DEVICES += ubnt_nanostation-m-xw define Device/ubnt_lap-120 $(Device/ubnt-wa) @@ -122,6 +129,15 @@ define Device/ubnt_lap-120 endef TARGET_DEVICES += ubnt_lap-120 +define Device/ubnt_nanobeam-ac + $(Device/ubnt-wa) + DEVICE_TITLE := Ubiquiti NanoBeam AC + DEVICE_PACKAGES += kmod-ath10k-ct ath10k-firmware-qca988x-ct + IMAGE_SIZE := 15744k + IMAGE/factory.bin := $$(IMAGE/sysupgrade.bin) | mkubntimage-split +endef +TARGET_DEVICES += ubnt_nanobeam-ac + define Device/ubnt_nanostation-ac $(Device/ubnt-wa) DEVICE_TITLE := Ubiquiti Nanostation AC @@ -189,7 +205,8 @@ define Device/ubnt_routerstation_common IMAGE_SIZE := 16128k IMAGES += factory.bin IMAGE/factory.bin := append-rootfs | pad-rootfs | mkubntimage | check-size $$$$(IMAGE_SIZE) - IMAGE/sysupgrade.bin := append-rootfs | pad-rootfs | combined-image | check-size $$$$(IMAGE_SIZE) | append-metadata + IMAGE/sysupgrade.bin := append-rootfs | pad-rootfs | combined-image | check-size $$$$(IMAGE_SIZE) +# IMAGE/sysupgrade.bin := append-rootfs | pad-rootfs | check-size $$$$(IMAGE_SIZE) | sysupgrade-tar rootfs=$$$$@ | append-metadata KERNEL := kernel-bin | append-dtb | lzma | pad-to $$(BLOCKSIZE) KERNEL_INITRAMFS := kernel-bin | append-dtb endef @@ -212,3 +229,15 @@ define Device/ubnt_routerstation-pro UBNT_CHIP := ar7100pro endef TARGET_DEVICES += ubnt_routerstation-pro + +define Device/ubnt_acb-isp + $(Device/ubnt) + ATH_SOC := qca9533 + IMAGE_SIZE := 15744k + DEVICE_TITLE := Ubiquiti airCube ISP + UBNT_BOARD := ACB-ISP + UBNT_TYPE := ACB + UBNT_CHIP := qca9533 + IMAGES := sysupgrade.bin +endef +TARGET_DEVICES += ubnt_acb-isp diff --git a/target/linux/ath79/image/generic.mk b/target/linux/ath79/image/generic.mk index 94dfe3d4d..241c1e258 100644 --- a/target/linux/ath79/image/generic.mk +++ b/target/linux/ath79/image/generic.mk @@ -42,6 +42,12 @@ define Build/add-elecom-factory-initramfs fi endef +define Build/nec-enc + $(STAGING_DIR_HOST)/bin/nec-enc \ + -i $@ -o $@.new -k $(1) + mv $@.new $@ +endef + define Build/nec-fw ( stat -c%s $@ | tr -d "\n" | dd bs=16 count=1 conv=sync; ) >> $@ ( \ @@ -92,6 +98,7 @@ define Device/avm_fritz4020 append-squashfs-fakeroot-be | pad-to 256 | \ append-rootfs | pad-rootfs | append-metadata | check-size $$$$(IMAGE_SIZE) DEVICE_PACKAGES := fritz-tffs + SUPPORTED_DEVICES += fritz4020 endef TARGET_DEVICES += avm_fritz4020 @@ -162,6 +169,23 @@ define Device/comfast_cf-e110n-v2 endef TARGET_DEVICES += comfast_cf-e110n-v2 +define Device/comfast_cf-e120a-v3 + ATH_SOC := ar9344 + DEVICE_TITLE := COMFAST CF-E120A v3 + DEVICE_PACKAGES := rssileds kmod-leds-gpio -uboot-envtools + IMAGE_SIZE := 8000k +endef +TARGET_DEVICES += comfast_cf-e120a-v3 + +define Device/comfast_cf-e5 + ATH_SOC := qca9531 + DEVICE_TITLE := COMFAST CF-E5/E7 + DEVICE_PACKAGES := rssileds kmod-leds-gpio kmod-usb-core kmod-usb2 kmod-usb-net \ + kmod-usb-net-qmi-wwan -swconfig -uboot-envtools + IMAGE_SIZE := 16192k +endef +TARGET_DEVICES += comfast_cf-e5 + define Device/devolo_dvl1200e ATH_SOC := qca9558 DEVICE_TITLE := devolo WiFi pro 1200e @@ -278,6 +302,19 @@ define Device/embeddedwireless_dorin endef TARGET_DEVICES += embeddedwireless_dorin +define Device/engenius_epg5000 + ATH_SOC := qca9558 + DEVICE_TITLE := EnGenius EPG5000 + DEVICE_PACKAGES := ath10k-firmware-qca988x-ct kmod-ath10k-ct kmod-usb2 + IMAGE_SIZE := 14656k + IMAGES += factory.dlf + IMAGE/factory.dlf := append-kernel | pad-to $$$$(BLOCKSIZE) | \ + append-rootfs | pad-rootfs | check-size $$$$(IMAGE_SIZE) | \ + senao-header -r 0x101 -p 0x71 -t 2 + SUPPORTED_DEVICES += epg5000 +endef +TARGET_DEVICES += engenius_epg5000 + define Device/engenius_ews511ap ATH_SOC := qca9531 DEVICE_TITLE := EnGenius EWS511AP @@ -304,13 +341,23 @@ define Device/glinet_gl-ar150 endef TARGET_DEVICES += glinet_gl-ar150 -define Device/glinet_gl-ar300m-nor +define Device/glinet_gl-ar300m-common-nor ATH_SOC := qca9531 - DEVICE_TITLE := GL.iNet GL-AR300M DEVICE_PACKAGES := kmod-usb-core kmod-usb2 IMAGE_SIZE := 16000k SUPPORTED_DEVICES += gl-ar300m endef + +define Device/glinet_gl-ar300m-lite + $(Device/glinet_gl-ar300m-common-nor) + DEVICE_TITLE := GL.iNet GL-AR300M-Lite +endef +TARGET_DEVICES += glinet_gl-ar300m-lite + +define Device/glinet_gl-ar300m-nor + $(Device/glinet_gl-ar300m-common-nor) + DEVICE_TITLE := GL.iNet GL-AR300M +endef TARGET_DEVICES += glinet_gl-ar300m-nor define Device/glinet_gl-ar750s @@ -349,6 +396,18 @@ define Device/iodata_wn-ac1167dgr endef TARGET_DEVICES += iodata_wn-ac1167dgr +define Device/iodata_wn-ac1600dgr + ATH_SOC := qca9557 + DEVICE_TITLE := I-O DATA WN-AC1600DGR + IMAGE_SIZE := 14656k + IMAGES += factory.bin + IMAGE/factory.bin := append-kernel | pad-to $$$$(BLOCKSIZE) | \ + append-rootfs | pad-rootfs | check-size $$$$(IMAGE_SIZE) | \ + senao-header -r 0x30a -p 0x60 -t 2 -v 200 + DEVICE_PACKAGES := kmod-usb-core kmod-usb2 kmod-ath10k-ct ath10k-firmware-qca988x-ct +endef +TARGET_DEVICES += iodata_wn-ac1600dgr + define Device/iodata_wn-ac1600dgr2 ATH_SOC := qca9557 DEVICE_TITLE := I-O DATA WN-AC1600DGR2 @@ -373,6 +432,44 @@ define Device/iodata_wn-ag300dgr endef TARGET_DEVICES += iodata_wn-ag300dgr +define Device/jjplus_ja76pf2 + ATH_SOC := ar7161 + DEVICE_TITLE := jjPlus JA76PF2 + DEVICE_PACKAGES += -kmod-ath9k -swconfig -wpad-mini -uboot-envtools fconfig + IMAGE/sysupgrade.bin := append-rootfs | pad-rootfs | combined-image | check-size $$$$(IMAGE_SIZE) +# IMAGE/sysupgrade.bin := append-rootfs | pad-rootfs | check-size $$$$(IMAGE_SIZE) | sysupgrade-tar rootfs=$$$$@ | append-metadata + KERNEL := kernel-bin | append-dtb | lzma | pad-to $$(BLOCKSIZE) + KERNEL_INITRAMFS := kernel-bin | append-dtb + IMAGE_SIZE := 16000k +endef +TARGET_DEVICES += jjplus_ja76pf2 + +define Device/librerouter_librerouter-v1 + ATH_SOC := qca9558 + DEVICE_TITLE := LibreRouter v1 + IMAGE_SIZE := 7936k + DEVICE_PACKAGES := kmod-usb-core kmod-usb2 +endef +TARGET_DEVICES += librerouter_librerouter-v1 + +define Device/nec_wg1200cr + ATH_SOC := qca9563 + DEVICE_TITLE := NEC Aterm WG1200CR + IMAGE_SIZE := 7616k + SEAMA_MTDBLOCK := 6 + SEAMA_SIGNATURE := wrgac72_necpf.2016gui_wg1200cr + IMAGES += factory.bin + IMAGE/default := \ + append-kernel | pad-offset $$$$(BLOCKSIZE) 64 | append-rootfs + IMAGE/sysupgrade.bin := \ + $$(IMAGE/default) | seama | pad-rootfs | append-metadata | check-size $$$$(IMAGE_SIZE) + IMAGE/factory.bin := \ + $$(IMAGE/default) | pad-rootfs -x 64 | seama | seama-seal | nec-enc 9gsiy9nzep452pad | \ + check-size $$$$(IMAGE_SIZE) + DEVICE_PACKAGES := kmod-ath10k-ct ath10k-firmware-qca9888-ct +endef +TARGET_DEVICES += nec_wg1200cr + define Device/nec_wg800hp ATH_SOC := qca9563 DEVICE_TITLE := NEC Aterm WG800HP @@ -404,6 +501,15 @@ define Device/ocedo_raccoon endef TARGET_DEVICES += ocedo_raccoon +define Device/ocedo_ursus + ATH_SOC := qca9558 + DEVICE_TITLE := OCEDO Ursus + DEVICE_PACKAGES := kmod-ath10k-ct ath10k-firmware-qca988x-ct + IMAGE_SIZE := 7424k + IMAGE/sysupgrade.bin := append-kernel | append-rootfs | pad-rootfs | append-metadata | check-size $$$$(IMAGE_SIZE) +endef +TARGET_DEVICES += ocedo_ursus + define Device/openmesh_om5p-ac-v2 ATH_SOC := qca9558 DEVICE_TITLE := OpenMesh OM5P-AC v2 @@ -440,14 +546,34 @@ TARGET_DEVICES += pcs_cr5000 define Device/netgear_wndr3x00 ATH_SOC := ar7161 - KERNEL := kernel-bin | append-dtb | lzma -d20 | netgear-uImage lzma - IMAGES += factory.img IMAGE/default := append-kernel | pad-to $$$$(BLOCKSIZE) | netgear-squashfs | append-rootfs | pad-rootfs - IMAGE/sysupgrade.bin := $$(IMAGE/default) | append-metadata | check-size $$$$(IMAGE_SIZE) - IMAGE/factory.img := $$(IMAGE/default) | netgear-dni | check-size $$$$(IMAGE_SIZE) DEVICE_PACKAGES := kmod-usb-core kmod-usb-ohci kmod-usb2 kmod-usb-ledtrig-usbport kmod-leds-reset kmod-owl-loader + $(Device/netgear_ath79) endef +define Device/netgear_ex7300_ex6400 + ATH_SOC := qca9558 + NETGEAR_KERNEL_MAGIC := 0x27051956 + NETGEAR_BOARD_ID := EX7300series + NETGEAR_HW_ID := 29765104+16+0+128 + IMAGE_SIZE := 15552k + IMAGE/default := append-kernel | pad-offset $$$$(BLOCKSIZE) 64 | netgear-rootfs | pad-rootfs + DEVICE_PACKAGES := kmod-ath10k-ct ath10k-firmware-qca99x0-ct + $(Device/netgear_ath79) +endef + +define Device/netgear_ex6400 + $(Device/netgear_ex7300_ex6400) + DEVICE_TITLE := NETGEAR EX6400 +endef +TARGET_DEVICES += netgear_ex6400 + +define Device/netgear_ex7300 + $(Device/netgear_ex7300_ex6400) + DEVICE_TITLE := NETGEAR EX7300 +endef +TARGET_DEVICES += netgear_ex7300 + define Device/netgear_wndr3700 $(Device/netgear_wndr3x00) DEVICE_TITLE := NETGEAR WNDR3700 @@ -535,3 +661,11 @@ define Device/xiaomi_mi-router-4q IMAGE_SIZE := 14336k endef TARGET_DEVICES += xiaomi_mi-router-4q + +define Device/yuncore_a770 + ATH_SOC := qca9531 + DEVICE_TITLE := YunCore A770 + DEVICE_PACKAGES := kmod-ath10k-ct ath10k-firmware-qca9887-ct + IMAGE_SIZE := 16000k +endef +TARGET_DEVICES += yuncore_a770 diff --git a/target/linux/ath79/image/tiny-netgear.mk b/target/linux/ath79/image/tiny-netgear.mk index 8d0de15a1..42d6cab8b 100644 --- a/target/linux/ath79/image/tiny-netgear.mk +++ b/target/linux/ath79/image/tiny-netgear.mk @@ -1,35 +1,27 @@ include ./common-netgear.mk +define Device/netgear_ar7240 + ATH_SOC := ar7240 + NETGEAR_KERNEL_MAGIC := 0x32303631 + KERNEL_INITRAMFS := kernel-bin | append-dtb | lzma -d20 | netgear-uImage lzma + IMAGE_SIZE := 3904k + IMAGE/default := append-kernel | pad-to $$$$(BLOCKSIZE) | netgear-squashfs | append-rootfs | pad-rootfs + $(Device/netgear_ath79) +endef define Device/netgear_wnr612-v2 - ATH_SOC := ar7240 + $(Device/netgear_ar7240) DEVICE_TITLE := Netgear WNR612v2 DEVICE_DTS := ar7240_netgear_wnr612-v2 - NETGEAR_KERNEL_MAGIC := 0x32303631 - KERNEL := kernel-bin | append-dtb | lzma -d20 | netgear-uImage lzma - KERNEL_INITRAMFS := kernel-bin | append-dtb | lzma -d20 | netgear-uImage lzma NETGEAR_BOARD_ID := REALWNR612V2 - IMAGE_SIZE := 3904k - IMAGES += factory.img - IMAGE/default := append-kernel | pad-to $$$$(BLOCKSIZE) | netgear-squashfs | append-rootfs | pad-rootfs - IMAGE/sysupgrade.bin := $$(IMAGE/default) | append-metadata | check-size $$$$(IMAGE_SIZE) - IMAGE/factory.img := $$(IMAGE/default) | netgear-dni | check-size $$$$(IMAGE_SIZE) SUPPORTED_DEVICES += wnr612-v2 endef TARGET_DEVICES += netgear_wnr612-v2 define Device/on_n150r - ATH_SOC := ar7240 + $(Device/netgear_ar7240) DEVICE_TITLE := ON Network N150R - NETGEAR_KERNEL_MAGIC := 0x32303631 - KERNEL := kernel-bin | append-dtb | lzma -d20 | netgear-uImage lzma - KERNEL_INITRAMFS := kernel-bin | append-dtb | lzma -d20 | netgear-uImage lzma NETGEAR_BOARD_ID := N150R - IMAGE_SIZE := 3904k - IMAGES += factory.img - IMAGE/default := append-kernel | pad-to $$$$(BLOCKSIZE) | netgear-squashfs | append-rootfs | pad-rootfs - IMAGE/sysupgrade.bin := $$(IMAGE/default) | append-metadata | check-size $$$$(IMAGE_SIZE) - IMAGE/factory.img := $$(IMAGE/default) | netgear-dni | check-size $$$$(IMAGE_SIZE) SUPPORTED_DEVICES += n150r endef TARGET_DEVICES += on_n150r diff --git a/target/linux/ath79/image/tiny-tp-link.mk b/target/linux/ath79/image/tiny-tp-link.mk index 1ad2a45a6..fb8ab75cb 100644 --- a/target/linux/ath79/image/tiny-tp-link.mk +++ b/target/linux/ath79/image/tiny-tp-link.mk @@ -14,7 +14,7 @@ TARGET_DEVICES += tplink_tl-mr10u define Device/tplink_tl-mr3020-v1 $(Device/tplink-4mlzma) ATH_SOC := ar9331 - DEVICE_TITLE := TP-LINK TL-MR3020 v1 + DEVICE_TITLE := TP-Link TL-MR3020 v1 DEVICE_PACKAGES := kmod-usb-core kmod-usb-chipidea2 kmod-usb-ledtrig-usbport TPLINK_HWID := 0x30200001 SUPPORTED_DEVICES += tl-mr3020 @@ -24,7 +24,7 @@ TARGET_DEVICES += tplink_tl-mr3020-v1 define Device/tplink_tl-mr3040-v2 $(Device/tplink-4mlzma) ATH_SOC := ar9331 - DEVICE_TITLE := TP-LINK TL-MR3040 v2 + DEVICE_TITLE := TP-Link TL-MR3040 v2 DEVICE_PACKAGES := kmod-usb-core kmod-usb-chipidea2 kmod-usb-ledtrig-usbport TPLINK_HWID := 0x30400002 SUPPORTED_DEVICES += tl-mr3040-v2 @@ -85,14 +85,14 @@ define Device/tplink_tl-wr740n-v3 endef TARGET_DEVICES += tplink_tl-wr740n-v3 -define Device/tplink_tl-wr740nd-v4 +define Device/tplink_tl-wr740n-v4 $(Device/tplink-4mlzma) ATH_SOC := ar9331 - DEVICE_TITLE := TP-LINK TL-WR740N/ND v4 + DEVICE_TITLE := TP-Link TL-WR740N v4 TPLINK_HWID := 0x07400004 SUPPORTED_DEVICES += tl-wr740n-v4 endef -TARGET_DEVICES += tplink_tl-wr740nd-v4 +TARGET_DEVICES += tplink_tl-wr740n-v4 define Device/tplink_tl-wr741-v1 $(Device/tplink-4m) @@ -105,7 +105,7 @@ TARGET_DEVICES += tplink_tl-wr741-v1 define Device/tplink_tl-wr741nd-v4 $(Device/tplink-4mlzma) ATH_SOC := ar9331 - DEVICE_TITLE := TP-LINK TL-WR741N/ND v4 + DEVICE_TITLE := TP-Link TL-WR741N/ND v4 TPLINK_HWID := 0x07410004 SUPPORTED_DEVICES += tl-wr741n-v4 endef @@ -130,7 +130,7 @@ TARGET_DEVICES += tplink_tl-wr841-v5 define Device/tplink_tl-wr841-v7 $(Device/tplink-4m) ATH_SOC := ar7241 - DEVICE_TITLE := TP-LINK TL-WR841N/ND v7 + DEVICE_TITLE := TP-Link TL-WR841N/ND v7 TPLINK_HWID := 0x08410007 SUPPORTED_DEVICES += tl-wr841-v7 endef @@ -139,7 +139,7 @@ TARGET_DEVICES += tplink_tl-wr841-v7 define Device/tplink_tl-wr841-v8 $(Device/tplink-4mlzma) ATH_SOC := ar9341 - DEVICE_TITLE := TP-LINK TL-WR841N/ND v8 + DEVICE_TITLE := TP-Link TL-WR841N/ND v8 TPLINK_HWID := 0x08410008 SUPPORTED_DEVICES += tl-wr841n-v8 endef @@ -148,7 +148,7 @@ TARGET_DEVICES += tplink_tl-wr841-v8 define Device/tplink_tl-wr841-v9 $(Device/tplink-4mlzma) ATH_SOC := qca9533 - DEVICE_TITLE := TP-LINK TL-WR841N/ND v9 + DEVICE_TITLE := TP-Link TL-WR841N/ND v9 TPLINK_HWID := 0x08410009 endef TARGET_DEVICES += tplink_tl-wr841-v9 @@ -156,7 +156,7 @@ TARGET_DEVICES += tplink_tl-wr841-v9 define Device/tplink_tl-wr841-v11 $(Device/tplink-4mlzma) ATH_SOC := qca9533 - DEVICE_TITLE := TP-LINK TL-WR841N/ND v11 + DEVICE_TITLE := TP-Link TL-WR841N/ND v11 TPLINK_HWID := 0x08410011 IMAGES += factory-us.bin factory-eu.bin IMAGE/factory-us.bin := append-rootfs | mktplinkfw factory -C US diff --git a/target/linux/ath79/patches-4.14/408-mtd-redboot_partition_scan.patch b/target/linux/ath79/patches-4.14/408-mtd-redboot_partition_scan.patch new file mode 100644 index 000000000..cd41e7ceb --- /dev/null +++ b/target/linux/ath79/patches-4.14/408-mtd-redboot_partition_scan.patch @@ -0,0 +1,44 @@ +--- a/drivers/mtd/redboot.c ++++ b/drivers/mtd/redboot.c +@@ -76,12 +76,18 @@ static int parse_redboot_partitions(stru + static char nullstring[] = "unallocated"; + #endif + ++ buf = vmalloc(master->erasesize); ++ if (!buf) ++ return -ENOMEM; ++ ++ restart: + if ( directory < 0 ) { + offset = master->size + directory * master->erasesize; + while (mtd_block_isbad(master, offset)) { + if (!offset) { + nogood: + printk(KERN_NOTICE "Failed to find a non-bad block to check for RedBoot partition table\n"); ++ vfree(buf); + return -EIO; + } + offset -= master->erasesize; +@@ -94,10 +100,6 @@ static int parse_redboot_partitions(stru + goto nogood; + } + } +- buf = vmalloc(master->erasesize); +- +- if (!buf) +- return -ENOMEM; + + printk(KERN_NOTICE "Searching for RedBoot partition table in %s at offset 0x%lx\n", + master->name, offset); +@@ -170,6 +172,11 @@ static int parse_redboot_partitions(stru + } + if (i == numslots) { + /* Didn't find it */ ++ if (offset + master->erasesize < master->size) { ++ /* not at the end of the flash yet, maybe next block :) */ ++ directory++; ++ goto restart; ++ } + printk(KERN_NOTICE "No RedBoot partition table detected in %s\n", + master->name); + ret = 0; diff --git a/target/linux/ath79/patches-4.19/0002-watchdog-ath79-fix-maximum-timeout.patch b/target/linux/ath79/patches-4.19/0002-watchdog-ath79-fix-maximum-timeout.patch new file mode 100644 index 000000000..36234d8d8 --- /dev/null +++ b/target/linux/ath79/patches-4.19/0002-watchdog-ath79-fix-maximum-timeout.patch @@ -0,0 +1,32 @@ +From 5f5c9858af167f842ee8df053920b98387a71af1 Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Mon, 5 Mar 2018 11:41:25 +0100 +Subject: [PATCH 02/27] watchdog: ath79: fix maximum timeout + +If the userland tries to set a timeout higher than the max_timeout, +then we should fallback to max_timeout. + +Signed-off-by: John Crispin +--- + drivers/watchdog/ath79_wdt.c | 8 ++++++-- + 1 file changed, 6 insertions(+), 2 deletions(-) + +--- a/drivers/watchdog/ath79_wdt.c ++++ b/drivers/watchdog/ath79_wdt.c +@@ -115,10 +115,14 @@ static inline void ath79_wdt_disable(voi + + static int ath79_wdt_set_timeout(int val) + { +- if (val < 1 || val > max_timeout) ++ if (val < 1) + return -EINVAL; + +- timeout = val; ++ if (val > max_timeout) ++ timeout = max_timeout; ++ else ++ timeout = val; ++ + ath79_wdt_keepalive(); + + return 0; diff --git a/target/linux/ath79/patches-4.19/0003-leds-add-reset-controller-based-driver.patch b/target/linux/ath79/patches-4.19/0003-leds-add-reset-controller-based-driver.patch new file mode 100644 index 000000000..b909d57fc --- /dev/null +++ b/target/linux/ath79/patches-4.19/0003-leds-add-reset-controller-based-driver.patch @@ -0,0 +1,186 @@ +From ecbd9c87f073f097d9fe56390353e64e963e866a Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Tue, 6 Mar 2018 10:03:03 +0100 +Subject: [PATCH 03/27] leds: add reset-controller based driver + +Signed-off-by: John Crispin +--- + drivers/leds/Kconfig | 11 ++++ + drivers/leds/Makefile | 1 + + drivers/leds/leds-reset.c | 137 ++++++++++++++++++++++++++++++++++++++++++++++ + 3 files changed, 149 insertions(+) + create mode 100644 drivers/leds/leds-reset.c + +--- a/drivers/leds/Kconfig ++++ b/drivers/leds/Kconfig +@@ -756,6 +756,17 @@ config LEDS_NIC78BX + To compile this driver as a module, choose M here: the module + will be called leds-nic78bx. + ++config LEDS_RESET ++ tristate "LED support for reset-controller API" ++ depends on LEDS_CLASS ++ depends on RESET_CONTROLLER ++ help ++ This option enables support for LEDs connected to pins driven by reset ++ controllers. Yes, DNI actual built HW like that. ++ ++ To compile this driver as a module, choose M here: the module ++ will be called leds-reset. ++ + comment "LED Triggers" + source "drivers/leds/trigger/Kconfig" + +--- /dev/null ++++ b/drivers/leds/leds-reset.c +@@ -0,0 +1,140 @@ ++/* ++ * Copyright (C) 2018 John Crispin ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 2 as ++ * published by the Free Software Foundation. ++ * ++ */ ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++#include ++ ++struct reset_led_data { ++ struct led_classdev cdev; ++ struct reset_control *rst; ++}; ++ ++static inline struct reset_led_data * ++ cdev_to_reset_led_data(struct led_classdev *led_cdev) ++{ ++ return container_of(led_cdev, struct reset_led_data, cdev); ++} ++ ++static void reset_led_set(struct led_classdev *led_cdev, ++ enum led_brightness value) ++{ ++ struct reset_led_data *led_dat = cdev_to_reset_led_data(led_cdev); ++ ++ if (value == LED_OFF) ++ reset_control_assert(led_dat->rst); ++ else ++ reset_control_deassert(led_dat->rst); ++} ++ ++struct reset_leds_priv { ++ int num_leds; ++ struct reset_led_data leds[]; ++}; ++ ++static inline int sizeof_reset_leds_priv(int num_leds) ++{ ++ return sizeof(struct reset_leds_priv) + ++ (sizeof(struct reset_led_data) * num_leds); ++} ++ ++static struct reset_leds_priv *reset_leds_create(struct platform_device *pdev) ++{ ++ struct device *dev = &pdev->dev; ++ struct fwnode_handle *child; ++ struct reset_leds_priv *priv; ++ int count, ret; ++ ++ count = device_get_child_node_count(dev); ++ if (!count) ++ return ERR_PTR(-ENODEV); ++ ++ priv = devm_kzalloc(dev, sizeof_reset_leds_priv(count), GFP_KERNEL); ++ if (!priv) ++ return ERR_PTR(-ENOMEM); ++ ++ device_for_each_child_node(dev, child) { ++ struct reset_led_data *led = &priv->leds[priv->num_leds]; ++ struct device_node *np = to_of_node(child); ++ ++ ret = fwnode_property_read_string(child, "label", &led->cdev.name); ++ if (!led->cdev.name) { ++ fwnode_handle_put(child); ++ return ERR_PTR(-EINVAL); ++ } ++ led->rst = __of_reset_control_get(np, NULL, 0, 0, 0); ++ if (IS_ERR(led->rst)) ++ return ERR_PTR(-EINVAL); ++ ++ fwnode_property_read_string(child, "linux,default-trigger", ++ &led->cdev.default_trigger); ++ ++ led->cdev.brightness_set = reset_led_set; ++ ret = devm_of_led_classdev_register(&pdev->dev, np, &led->cdev); ++ if (ret < 0) ++ return ERR_PTR(ret); ++ led->cdev.dev->of_node = np; ++ priv->num_leds++; ++ } ++ ++ return priv; ++} ++ ++static const struct of_device_id of_reset_leds_match[] = { ++ { .compatible = "reset-leds", }, ++ {}, ++}; ++ ++MODULE_DEVICE_TABLE(of, of_reset_leds_match); ++ ++static int reset_led_probe(struct platform_device *pdev) ++{ ++ struct reset_leds_priv *priv; ++ ++ priv = reset_leds_create(pdev); ++ if (IS_ERR(priv)) ++ return PTR_ERR(priv); ++ ++ platform_set_drvdata(pdev, priv); ++ ++ return 0; ++} ++ ++static void reset_led_shutdown(struct platform_device *pdev) ++{ ++ struct reset_leds_priv *priv = platform_get_drvdata(pdev); ++ int i; ++ ++ for (i = 0; i < priv->num_leds; i++) { ++ struct reset_led_data *led = &priv->leds[i]; ++ ++ if (!(led->cdev.flags & LED_RETAIN_AT_SHUTDOWN)) ++ reset_led_set(&led->cdev, LED_OFF); ++ } ++} ++ ++static struct platform_driver reset_led_driver = { ++ .probe = reset_led_probe, ++ .shutdown = reset_led_shutdown, ++ .driver = { ++ .name = "leds-reset", ++ .of_match_table = of_reset_leds_match, ++ }, ++}; ++ ++module_platform_driver(reset_led_driver); ++ ++MODULE_AUTHOR("John Crispin "); ++MODULE_DESCRIPTION("reset controller LED driver"); ++MODULE_LICENSE("GPL"); ++MODULE_ALIAS("platform:leds-reset"); +--- a/drivers/leds/Makefile ++++ b/drivers/leds/Makefile +@@ -78,6 +78,7 @@ obj-$(CONFIG_LEDS_MT6323) += leds-mt632 + obj-$(CONFIG_LEDS_LM3692X) += leds-lm3692x.o + obj-$(CONFIG_LEDS_SC27XX_BLTC) += leds-sc27xx-bltc.o + obj-$(CONFIG_LEDS_LM3601X) += leds-lm3601x.o ++obj-$(CONFIG_LEDS_RESET) += leds-reset.o + + # LED SPI Drivers + obj-$(CONFIG_LEDS_CR0014114) += leds-cr0014114.o diff --git a/target/linux/ath79/patches-4.19/0004-phy-add-ath79-usb-phys.patch b/target/linux/ath79/patches-4.19/0004-phy-add-ath79-usb-phys.patch new file mode 100644 index 000000000..6280baf91 --- /dev/null +++ b/target/linux/ath79/patches-4.19/0004-phy-add-ath79-usb-phys.patch @@ -0,0 +1,320 @@ +From 08c9d6ceef01893678a5d2e8a15517c745417f21 Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Tue, 6 Mar 2018 10:04:05 +0100 +Subject: [PATCH 04/27] phy: add ath79 usb phys + +Signed-off-by: John Crispin +--- + drivers/phy/Kconfig | 16 ++++++ + drivers/phy/Makefile | 2 + + drivers/phy/phy-ar7100-usb.c | 124 +++++++++++++++++++++++++++++++++++++++++++ + drivers/phy/phy-ar7200-usb.c | 108 +++++++++++++++++++++++++++++++++++++ + 4 files changed, 250 insertions(+) + create mode 100644 drivers/phy/phy-ar7100-usb.c + create mode 100644 drivers/phy/phy-ar7200-usb.c + +--- a/drivers/phy/Kconfig ++++ b/drivers/phy/Kconfig +@@ -15,6 +15,22 @@ config GENERIC_PHY + phy users can obtain reference to the PHY. All the users of this + framework should select this config. + ++config PHY_AR7100_USB ++ tristate "Atheros AR7100 USB PHY driver" ++ depends on ATH79 || COMPILE_TEST ++ default y if USB_EHCI_HCD_PLATFORM ++ select PHY_SIMPLE ++ help ++ Enable this to support the USB PHY on Atheros AR7100 SoCs. ++ ++config PHY_AR7200_USB ++ tristate "Atheros AR7200 USB PHY driver" ++ depends on ATH79 || COMPILE_TEST ++ default y if USB_EHCI_HCD_PLATFORM ++ select PHY_SIMPLE ++ help ++ Enable this to support the USB PHY on Atheros AR7200 SoCs. ++ + config PHY_LPC18XX_USB_OTG + tristate "NXP LPC18xx/43xx SoC USB OTG PHY driver" + depends on OF && (ARCH_LPC18XX || COMPILE_TEST) +--- a/drivers/phy/Makefile ++++ b/drivers/phy/Makefile +@@ -4,6 +4,8 @@ + # + + obj-$(CONFIG_GENERIC_PHY) += phy-core.o ++obj-$(CONFIG_PHY_AR7100_USB) += phy-ar7100-usb.o ++obj-$(CONFIG_PHY_AR7200_USB) += phy-ar7200-usb.o + obj-$(CONFIG_PHY_LPC18XX_USB_OTG) += phy-lpc18xx-usb-otg.o + obj-$(CONFIG_PHY_XGENE) += phy-xgene.o + obj-$(CONFIG_PHY_PISTACHIO_USB) += phy-pistachio-usb.o +--- /dev/null ++++ b/drivers/phy/phy-ar7100-usb.c +@@ -0,0 +1,140 @@ ++/* ++ * Copyright (C) 2018 John Crispin ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++ ++struct ar7100_usb_phy { ++ struct reset_control *rst_phy; ++ struct reset_control *rst_host; ++ struct reset_control *rst_ohci_dll; ++ void __iomem *io_base; ++ struct phy *phy; ++ int gpio; ++}; ++ ++static int ar7100_usb_phy_power_off(struct phy *phy) ++{ ++ struct ar7100_usb_phy *priv = phy_get_drvdata(phy); ++ int err = 0; ++ ++ err |= reset_control_assert(priv->rst_host); ++ err |= reset_control_assert(priv->rst_phy); ++ err |= reset_control_assert(priv->rst_ohci_dll); ++ ++ return err; ++} ++ ++static int ar7100_usb_phy_power_on(struct phy *phy) ++{ ++ struct ar7100_usb_phy *priv = phy_get_drvdata(phy); ++ int err = 0; ++ ++ err |= ar7100_usb_phy_power_off(phy); ++ mdelay(100); ++ err |= reset_control_deassert(priv->rst_ohci_dll); ++ err |= reset_control_deassert(priv->rst_phy); ++ err |= reset_control_deassert(priv->rst_host); ++ mdelay(500); ++ iowrite32(0xf0000, priv->io_base + AR71XX_USB_CTRL_REG_CONFIG); ++ iowrite32(0x20c00, priv->io_base + AR71XX_USB_CTRL_REG_FLADJ); ++ ++ return err; ++} ++ ++static const struct phy_ops ar7100_usb_phy_ops = { ++ .power_on = ar7100_usb_phy_power_on, ++ .power_off = ar7100_usb_phy_power_off, ++ .owner = THIS_MODULE, ++}; ++ ++static int ar7100_usb_phy_probe(struct platform_device *pdev) ++{ ++ struct phy_provider *phy_provider; ++ struct resource *res; ++ struct ar7100_usb_phy *priv; ++ ++ priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); ++ if (!priv) ++ return -ENOMEM; ++ ++ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); ++ priv->io_base = devm_ioremap_resource(&pdev->dev, res); ++ if (IS_ERR(priv->io_base)) ++ return PTR_ERR(priv->io_base); ++ ++ priv->rst_phy = devm_reset_control_get(&pdev->dev, "usb-phy"); ++ if (IS_ERR(priv->rst_phy)) { ++ dev_err(&pdev->dev, "phy reset is missing\n"); ++ return PTR_ERR(priv->rst_phy); ++ } ++ ++ priv->rst_host = devm_reset_control_get(&pdev->dev, "usb-host"); ++ if (IS_ERR(priv->rst_host)) { ++ dev_err(&pdev->dev, "host reset is missing\n"); ++ return PTR_ERR(priv->rst_host); ++ } ++ ++ priv->rst_ohci_dll = devm_reset_control_get(&pdev->dev, "usb-ohci-dll"); ++ if (IS_ERR(priv->rst_ohci_dll)) { ++ dev_err(&pdev->dev, "ohci-dll reset is missing\n"); ++ return PTR_ERR(priv->rst_host); ++ } ++ ++ priv->phy = devm_phy_create(&pdev->dev, NULL, &ar7100_usb_phy_ops); ++ if (IS_ERR(priv->phy)) { ++ dev_err(&pdev->dev, "failed to create PHY\n"); ++ return PTR_ERR(priv->phy); ++ } ++ ++ priv->gpio = of_get_gpio(pdev->dev.of_node, 0); ++ if (priv->gpio >= 0) { ++ int ret = devm_gpio_request(&pdev->dev, priv->gpio, dev_name(&pdev->dev)); ++ ++ if (ret) { ++ dev_err(&pdev->dev, "failed to request gpio\n"); ++ return ret; ++ } ++ gpio_export_with_name(priv->gpio, 0, dev_name(&pdev->dev)); ++ gpio_set_value(priv->gpio, 1); ++ } ++ ++ phy_set_drvdata(priv->phy, priv); ++ ++ phy_provider = devm_of_phy_provider_register(&pdev->dev, of_phy_simple_xlate); ++ ++ ++ return PTR_ERR_OR_ZERO(phy_provider); ++} ++ ++static const struct of_device_id ar7100_usb_phy_of_match[] = { ++ { .compatible = "qca,ar7100-usb-phy" }, ++ {} ++}; ++MODULE_DEVICE_TABLE(of, ar7100_usb_phy_of_match); ++ ++static struct platform_driver ar7100_usb_phy_driver = { ++ .probe = ar7100_usb_phy_probe, ++ .driver = { ++ .of_match_table = ar7100_usb_phy_of_match, ++ .name = "ar7100-usb-phy", ++ } ++}; ++module_platform_driver(ar7100_usb_phy_driver); ++ ++MODULE_DESCRIPTION("ATH79 USB PHY driver"); ++MODULE_AUTHOR("Alban Bedel "); ++MODULE_LICENSE("GPL"); +--- /dev/null ++++ b/drivers/phy/phy-ar7200-usb.c +@@ -0,0 +1,123 @@ ++/* ++ * Copyright (C) 2015 Alban Bedel ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++ ++struct ar7200_usb_phy { ++ struct reset_control *rst_phy; ++ struct reset_control *suspend_override; ++ struct phy *phy; ++ int gpio; ++}; ++ ++static int ar7200_usb_phy_power_on(struct phy *phy) ++{ ++ struct ar7200_usb_phy *priv = phy_get_drvdata(phy); ++ int err = 0; ++ ++ if (priv->rst_phy) ++ err = reset_control_deassert(priv->rst_phy); ++ if (!err && priv->suspend_override) ++ err = reset_control_assert(priv->suspend_override); ++ if (err && priv->rst_phy) ++ err = reset_control_assert(priv->rst_phy); ++ ++ return err; ++} ++ ++static int ar7200_usb_phy_power_off(struct phy *phy) ++{ ++ struct ar7200_usb_phy *priv = phy_get_drvdata(phy); ++ int err = 0; ++ ++ if (priv->suspend_override) ++ err = reset_control_deassert(priv->suspend_override); ++ if (priv->rst_phy) ++ err |= reset_control_assert(priv->rst_phy); ++ ++ return err; ++} ++ ++static const struct phy_ops ar7200_usb_phy_ops = { ++ .power_on = ar7200_usb_phy_power_on, ++ .power_off = ar7200_usb_phy_power_off, ++ .owner = THIS_MODULE, ++}; ++ ++static int ar7200_usb_phy_probe(struct platform_device *pdev) ++{ ++ struct phy_provider *phy_provider; ++ struct ar7200_usb_phy *priv; ++ ++ priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); ++ if (!priv) ++ return -ENOMEM; ++ ++ priv->rst_phy = devm_reset_control_get(&pdev->dev, "usb-phy"); ++ if (IS_ERR(priv->rst_phy)) { ++ dev_err(&pdev->dev, "phy reset is missing\n"); ++ return PTR_ERR(priv->rst_phy); ++ } ++ ++ priv->suspend_override = devm_reset_control_get_optional( ++ &pdev->dev, "usb-suspend-override"); ++ if (IS_ERR(priv->suspend_override)) { ++ if (PTR_ERR(priv->suspend_override) == -ENOENT) ++ priv->suspend_override = NULL; ++ else ++ return PTR_ERR(priv->suspend_override); ++ } ++ ++ priv->phy = devm_phy_create(&pdev->dev, NULL, &ar7200_usb_phy_ops); ++ if (IS_ERR(priv->phy)) { ++ dev_err(&pdev->dev, "failed to create PHY\n"); ++ return PTR_ERR(priv->phy); ++ } ++ ++ priv->gpio = of_get_gpio(pdev->dev.of_node, 0); ++ if (priv->gpio >= 0) { ++ int ret = devm_gpio_request(&pdev->dev, priv->gpio, dev_name(&pdev->dev)); ++ ++ if (ret) { ++ dev_err(&pdev->dev, "failed to request gpio\n"); ++ return ret; ++ } ++ gpio_export_with_name(priv->gpio, 0, dev_name(&pdev->dev)); ++ gpio_set_value(priv->gpio, 1); ++ } ++ ++ phy_set_drvdata(priv->phy, priv); ++ ++ phy_provider = devm_of_phy_provider_register(&pdev->dev, of_phy_simple_xlate); ++ ++ return PTR_ERR_OR_ZERO(phy_provider); ++} ++ ++static const struct of_device_id ar7200_usb_phy_of_match[] = { ++ { .compatible = "qca,ar7200-usb-phy" }, ++ {} ++}; ++MODULE_DEVICE_TABLE(of, ar7200_usb_phy_of_match); ++ ++static struct platform_driver ar7200_usb_phy_driver = { ++ .probe = ar7200_usb_phy_probe, ++ .driver = { ++ .of_match_table = ar7200_usb_phy_of_match, ++ .name = "ar7200-usb-phy", ++ } ++}; ++module_platform_driver(ar7200_usb_phy_driver); ++ ++MODULE_DESCRIPTION("ATH79 USB PHY driver"); ++MODULE_AUTHOR("Alban Bedel "); ++MODULE_LICENSE("GPL"); diff --git a/target/linux/ath79/patches-4.19/0005-usb-add-more-OF-quirk-properties.patch b/target/linux/ath79/patches-4.19/0005-usb-add-more-OF-quirk-properties.patch new file mode 100644 index 000000000..52d77c805 --- /dev/null +++ b/target/linux/ath79/patches-4.19/0005-usb-add-more-OF-quirk-properties.patch @@ -0,0 +1,24 @@ +From 2201818e5bd33f389beceb3943fdfcf5a698fc5b Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Tue, 6 Mar 2018 10:01:43 +0100 +Subject: [PATCH 05/27] usb: add more OF/quirk properties + +Signed-off-by: John Crispin +--- + drivers/usb/host/ehci-platform.c | 5 +++++ + 1 file changed, 5 insertions(+) + +--- a/drivers/usb/host/ehci-platform.c ++++ b/drivers/usb/host/ehci-platform.c +@@ -161,6 +161,11 @@ static int ehci_platform_probe(struct pl + ehci = hcd_to_ehci(hcd); + + if (pdata == &ehci_platform_defaults && dev->dev.of_node) { ++ of_property_read_u32(dev->dev.of_node, "caps-offset", &pdata->caps_offset); ++ ++ if (of_property_read_bool(dev->dev.of_node, "has-synopsys-hc-bug")) ++ pdata->has_synopsys_hc_bug = 1; ++ + if (of_property_read_bool(dev->dev.of_node, "big-endian-regs")) + ehci->big_endian_mmio = 1; + diff --git a/target/linux/ath79/patches-4.19/0007-irqchip-irq-ath79-intc-add-irq-cascade-driver-for-QC.patch b/target/linux/ath79/patches-4.19/0007-irqchip-irq-ath79-intc-add-irq-cascade-driver-for-QC.patch new file mode 100644 index 000000000..bd26107af --- /dev/null +++ b/target/linux/ath79/patches-4.19/0007-irqchip-irq-ath79-intc-add-irq-cascade-driver-for-QC.patch @@ -0,0 +1,168 @@ +From f3eacff2310a60348a755c50a8da6fc251fc8587 Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Tue, 6 Mar 2018 09:55:13 +0100 +Subject: [PATCH 07/33] irqchip/irq-ath79-intc: add irq cascade driver for + QCA9556 SoCs + +Signed-off-by: John Crispin +--- + drivers/irqchip/Makefile | 1 + + drivers/irqchip/irq-ath79-intc.c | 142 +++++++++++++++++++++++++++++++++++++++ + 2 files changed, 143 insertions(+) + create mode 100644 drivers/irqchip/irq-ath79-intc.c + +--- a/drivers/irqchip/Makefile ++++ b/drivers/irqchip/Makefile +@@ -3,6 +3,7 @@ obj-$(CONFIG_IRQCHIP) += irqchip.o + + obj-$(CONFIG_ALPINE_MSI) += irq-alpine-msi.o + obj-$(CONFIG_ATH79) += irq-ath79-cpu.o ++obj-$(CONFIG_ATH79) += irq-ath79-intc.o + obj-$(CONFIG_ATH79) += irq-ath79-misc.o + obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2835.o + obj-$(CONFIG_ARCH_BCM2835) += irq-bcm2836.o +--- /dev/null ++++ b/drivers/irqchip/irq-ath79-intc.c +@@ -0,0 +1,142 @@ ++/* ++ * Atheros AR71xx/AR724x/AR913x specific interrupt handling ++ * ++ * Copyright (C) 2018 John Crispin ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++ ++#define ATH79_MAX_INTC_CASCADE 3 ++ ++struct ath79_intc { ++ struct irq_chip chip; ++ u32 irq; ++ u32 pending_mask; ++ u32 int_status; ++ u32 irq_mask[ATH79_MAX_INTC_CASCADE]; ++ u32 irq_wb_chan[ATH79_MAX_INTC_CASCADE]; ++}; ++ ++static void ath79_intc_irq_handler(struct irq_desc *desc) ++{ ++ struct irq_domain *domain = irq_desc_get_handler_data(desc); ++ struct ath79_intc *intc = domain->host_data; ++ u32 pending; ++ ++ pending = ath79_reset_rr(intc->int_status); ++ pending &= intc->pending_mask; ++ ++ if (pending) { ++ int i; ++ ++ for (i = 0; i < domain->hwirq_max; i++) ++ if (pending & intc->irq_mask[i]) { ++ if (intc->irq_wb_chan[i] != 0xffffffff) ++ ath79_ddr_wb_flush(intc->irq_wb_chan[i]); ++ generic_handle_irq(irq_find_mapping(domain, i)); ++ } ++ } else { ++ spurious_interrupt(); ++ } ++} ++ ++static void ath79_intc_irq_enable(struct irq_data *d) ++{ ++ struct ath79_intc *intc = d->domain->host_data; ++ enable_irq(intc->irq); ++} ++ ++static void ath79_intc_irq_disable(struct irq_data *d) ++{ ++ struct ath79_intc *intc = d->domain->host_data; ++ disable_irq(intc->irq); ++} ++ ++static int ath79_intc_map(struct irq_domain *d, unsigned int irq, irq_hw_number_t hw) ++{ ++ struct ath79_intc *intc = d->host_data; ++ ++ irq_set_chip_and_handler(irq, &intc->chip, handle_level_irq); ++ ++ return 0; ++} ++ ++static const struct irq_domain_ops ath79_irq_domain_ops = { ++ .xlate = irq_domain_xlate_onecell, ++ .map = ath79_intc_map, ++}; ++ ++static int __init ath79_intc_of_init( ++ struct device_node *node, struct device_node *parent) ++{ ++ struct irq_domain *domain; ++ struct ath79_intc *intc; ++ int cnt, cntwb, i, err; ++ ++ cnt = of_property_count_u32_elems(node, "qca,pending-bits"); ++ if (cnt > ATH79_MAX_INTC_CASCADE) ++ panic("Too many INTC pending bits\n"); ++ ++ intc = kzalloc(sizeof(*intc), GFP_KERNEL); ++ if (!intc) ++ panic("Failed to allocate INTC memory\n"); ++ intc->chip = dummy_irq_chip; ++ intc->chip.name = "INTC"; ++ intc->chip.irq_disable = ath79_intc_irq_disable; ++ intc->chip.irq_enable = ath79_intc_irq_enable; ++ ++ if (of_property_read_u32(node, "qca,int-status-addr", &intc->int_status) < 0) { ++ panic("Missing address of interrupt status register\n"); ++ } ++ ++ of_property_read_u32_array(node, "qca,pending-bits", intc->irq_mask, cnt); ++ for (i = 0; i < cnt; i++) { ++ intc->pending_mask |= intc->irq_mask[i]; ++ intc->irq_wb_chan[i] = 0xffffffff; ++ } ++ ++ cntwb = of_count_phandle_with_args( ++ node, "qca,ddr-wb-channels", "#qca,ddr-wb-channel-cells"); ++ ++ for (i = 0; i < cntwb; i++) { ++ struct of_phandle_args args; ++ u32 irq = i; ++ ++ of_property_read_u32_index( ++ node, "qca,ddr-wb-channel-interrupts", i, &irq); ++ if (irq >= ATH79_MAX_INTC_CASCADE) ++ continue; ++ ++ err = of_parse_phandle_with_args( ++ node, "qca,ddr-wb-channels", ++ "#qca,ddr-wb-channel-cells", ++ i, &args); ++ if (err) ++ return err; ++ ++ intc->irq_wb_chan[irq] = args.args[0]; ++ } ++ ++ intc->irq = irq_of_parse_and_map(node, 0); ++ if (!intc->irq) ++ panic("Failed to get INTC IRQ"); ++ ++ domain = irq_domain_add_linear(node, cnt, &ath79_irq_domain_ops, intc); ++ irq_set_chained_handler_and_data(intc->irq, ath79_intc_irq_handler, domain); ++ ++ return 0; ++} ++IRQCHIP_DECLARE(ath79_intc, "qca,ar9340-intc", ++ ath79_intc_of_init); diff --git a/target/linux/ath79/patches-4.19/0008-irqchip-irq-ath79-cpu-drop-OF-init-helper.patch b/target/linux/ath79/patches-4.19/0008-irqchip-irq-ath79-cpu-drop-OF-init-helper.patch new file mode 100644 index 000000000..b5ad731d0 --- /dev/null +++ b/target/linux/ath79/patches-4.19/0008-irqchip-irq-ath79-cpu-drop-OF-init-helper.patch @@ -0,0 +1,23 @@ +From e029f998594f151008ecbfa024e2957edd2a5189 Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Tue, 6 Mar 2018 09:58:19 +0100 +Subject: [PATCH 08/33] irqchip/irq-ath79-cpu: drop !OF init helper + +Signed-off-by: John Crispin +--- + drivers/irqchip/irq-ath79-cpu.c | 7 ------- + 1 file changed, 7 deletions(-) + +--- a/drivers/irqchip/irq-ath79-cpu.c ++++ b/drivers/irqchip/irq-ath79-cpu.c +@@ -88,10 +88,3 @@ static int __init ar79_cpu_intc_of_init( + } + IRQCHIP_DECLARE(ar79_cpu_intc, "qca,ar7100-cpu-intc", + ar79_cpu_intc_of_init); +- +-void __init ath79_cpu_irq_init(unsigned irq_wb_chan2, unsigned irq_wb_chan3) +-{ +- irq_wb_chan[2] = irq_wb_chan2; +- irq_wb_chan[3] = irq_wb_chan3; +- mips_cpu_irq_init(); +-} diff --git a/target/linux/ath79/patches-4.19/0011-MIPS-ath79-select-the-PINCTRL-subsystem.patch b/target/linux/ath79/patches-4.19/0011-MIPS-ath79-select-the-PINCTRL-subsystem.patch new file mode 100644 index 000000000..05db5060b --- /dev/null +++ b/target/linux/ath79/patches-4.19/0011-MIPS-ath79-select-the-PINCTRL-subsystem.patch @@ -0,0 +1,24 @@ +From 0c8856211d26f84277f7fcb0b9595e5c646bc464 Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Tue, 6 Mar 2018 10:00:55 +0100 +Subject: [PATCH 11/33] MIPS: ath79: select the PINCTRL subsystem + +The pinmux on QCA SoCs is controlled by a single register. The +"pinctrl-single" driver can be used but requires the target +to select PINCTRL. + +Signed-off-by: John Crispin +--- + arch/mips/Kconfig | 1 + + 1 file changed, 1 insertion(+) + +--- a/arch/mips/Kconfig ++++ b/arch/mips/Kconfig +@@ -288,6 +288,7 @@ config BCM63XX + select SYS_HAS_EARLY_PRINTK + select SWAP_IO_SPACE + select GPIOLIB ++ select PINCTRL + select HAVE_CLK + select MIPS_L1_CACHE_SHIFT_4 + select CLKDEV_LOOKUP diff --git a/target/linux/ath79/patches-4.19/0017-dt-bindings-PCI-qcom-ar7100-adds-binding-doc.patch b/target/linux/ath79/patches-4.19/0017-dt-bindings-PCI-qcom-ar7100-adds-binding-doc.patch new file mode 100644 index 000000000..bf7eb691a --- /dev/null +++ b/target/linux/ath79/patches-4.19/0017-dt-bindings-PCI-qcom-ar7100-adds-binding-doc.patch @@ -0,0 +1,57 @@ +From 4a4f869ec58ed8910b9b2e68d0eee50957e9bb20 Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Mon, 25 Jun 2018 15:52:10 +0200 +Subject: [PATCH 17/33] dt-bindings: PCI: qcom,ar7100: adds binding doc + +With the driver being converted from platform_data to pure OF, we need to +also add some docs. + +Cc: Rob Herring +Cc: devicetree@vger.kernel.org +Signed-off-by: John Crispin +--- + .../devicetree/bindings/pci/qcom,ar7100-pci.txt | 38 ++++++++++++++++++++++ + 1 file changed, 38 insertions(+) + create mode 100644 Documentation/devicetree/bindings/pci/qcom,ar7100-pci.txt + +--- /dev/null ++++ b/Documentation/devicetree/bindings/pci/qcom,ar7100-pci.txt +@@ -0,0 +1,38 @@ ++* Qualcomm Atheros AR7100 PCI express root complex ++ ++Required properties: ++- compatible: should contain "qcom,ar7100-pci" to identify the core. ++- reg: Should contain the register ranges as listed in the reg-names property. ++- reg-names: Definition: Must include the following entries ++ - "cfg_base" IO Memory ++- #address-cells: set to <3> ++- #size-cells: set to <2> ++- ranges: ranges for the PCI memory and I/O regions ++- interrupt-map-mask and interrupt-map: standard PCI ++ properties to define the mapping of the PCIe interface to interrupt ++ numbers. ++- #interrupt-cells: set to <1> ++- interrupt-controller: define to enable the builtin IRQ cascade. ++ ++Optional properties: ++- interrupt-parent: phandle to the MIPS IRQ controller ++ ++* Example for ar7100 ++ pcie-controller@180c0000 { ++ compatible = "qca,ar7100-pci"; ++ #address-cells = <3>; ++ #size-cells = <2>; ++ bus-range = <0x0 0x0>; ++ reg = <0x17010000 0x100>; ++ reg-names = "cfg_base"; ++ ranges = <0x2000000 0 0x10000000 0x10000000 0 0x07000000 ++ 0x1000000 0 0x00000000 0x00000000 0 0x00000001>; ++ interrupt-parent = <&cpuintc>; ++ interrupts = <2>; ++ ++ interrupt-controller; ++ #interrupt-cells = <1>; ++ ++ interrupt-map-mask = <0 0 0 1>; ++ interrupt-map = <0 0 0 0 &pcie0 0>; ++ }; diff --git a/target/linux/ath79/patches-4.19/0018-MIPS-pci-ar71xx-convert-to-OF.patch b/target/linux/ath79/patches-4.19/0018-MIPS-pci-ar71xx-convert-to-OF.patch new file mode 100644 index 000000000..91796a12f --- /dev/null +++ b/target/linux/ath79/patches-4.19/0018-MIPS-pci-ar71xx-convert-to-OF.patch @@ -0,0 +1,202 @@ +From 1855ab6b1d27f5b38a648baf57ff6a534afec26d Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Sat, 23 Jun 2018 15:07:23 +0200 +Subject: [PATCH 18/33] MIPS: pci-ar71xx: convert to OF + +With the ath79 target getting converted to pure OF, we can drop all the +platform data code and add the missing OF bits to the driver. We also add +a irq domain for the PCI/e controllers cascade, thus making it usable from +dts files. + +Signed-off-by: John Crispin +--- + arch/mips/pci/pci-ar71xx.c | 82 +++++++++++++++++++++++----------------------- + 1 file changed, 41 insertions(+), 41 deletions(-) + +--- a/arch/mips/pci/pci-ar71xx.c ++++ b/arch/mips/pci/pci-ar71xx.c +@@ -18,8 +18,11 @@ + #include + #include + #include ++#include + #include + #include ++#include ++#include + + #include + #include +@@ -49,12 +52,13 @@ + #define AR71XX_PCI_IRQ_COUNT 5 + + struct ar71xx_pci_controller { ++ struct device_node *np; + void __iomem *cfg_base; + int irq; +- int irq_base; + struct pci_controller pci_ctrl; + struct resource io_res; + struct resource mem_res; ++ struct irq_domain *domain; + }; + + /* Byte lane enable bits */ +@@ -228,29 +232,30 @@ static struct pci_ops ar71xx_pci_ops = { + + static void ar71xx_pci_irq_handler(struct irq_desc *desc) + { +- struct ar71xx_pci_controller *apc; + void __iomem *base = ath79_reset_base; ++ struct irq_chip *chip = irq_desc_get_chip(desc); ++ struct ar71xx_pci_controller *apc = irq_desc_get_handler_data(desc); + u32 pending; + +- apc = irq_desc_get_handler_data(desc); +- ++ chained_irq_enter(chip, desc); + pending = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_STATUS) & + __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); + + if (pending & AR71XX_PCI_INT_DEV0) +- generic_handle_irq(apc->irq_base + 0); ++ generic_handle_irq(irq_linear_revmap(apc->domain, 1)); + + else if (pending & AR71XX_PCI_INT_DEV1) +- generic_handle_irq(apc->irq_base + 1); ++ generic_handle_irq(irq_linear_revmap(apc->domain, 2)); + + else if (pending & AR71XX_PCI_INT_DEV2) +- generic_handle_irq(apc->irq_base + 2); ++ generic_handle_irq(irq_linear_revmap(apc->domain, 3)); + + else if (pending & AR71XX_PCI_INT_CORE) +- generic_handle_irq(apc->irq_base + 4); ++ generic_handle_irq(irq_linear_revmap(apc->domain, 4)); + + else + spurious_interrupt(); ++ chained_irq_exit(chip, desc); + } + + static void ar71xx_pci_irq_unmask(struct irq_data *d) +@@ -261,7 +266,7 @@ static void ar71xx_pci_irq_unmask(struct + u32 t; + + apc = irq_data_get_irq_chip_data(d); +- irq = d->irq - apc->irq_base; ++ irq = irq_linear_revmap(apc->domain, d->irq); + + t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); + __raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE); +@@ -278,7 +283,7 @@ static void ar71xx_pci_irq_mask(struct i + u32 t; + + apc = irq_data_get_irq_chip_data(d); +- irq = d->irq - apc->irq_base; ++ irq = irq_linear_revmap(apc->domain, d->irq); + + t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); + __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE); +@@ -294,24 +299,31 @@ static struct irq_chip ar71xx_pci_irq_ch + .irq_mask_ack = ar71xx_pci_irq_mask, + }; + ++static int ar71xx_pci_irq_map(struct irq_domain *d, ++ unsigned int irq, irq_hw_number_t hw) ++{ ++ struct ar71xx_pci_controller *apc = d->host_data; ++ ++ irq_set_chip_and_handler(irq, &ar71xx_pci_irq_chip, handle_level_irq); ++ irq_set_chip_data(irq, apc); ++ ++ return 0; ++} ++ ++static const struct irq_domain_ops ar71xx_pci_domain_ops = { ++ .xlate = irq_domain_xlate_onecell, ++ .map = ar71xx_pci_irq_map, ++}; ++ + static void ar71xx_pci_irq_init(struct ar71xx_pci_controller *apc) + { + void __iomem *base = ath79_reset_base; +- int i; + + __raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_ENABLE); + __raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_STATUS); + +- BUILD_BUG_ON(ATH79_PCI_IRQ_COUNT < AR71XX_PCI_IRQ_COUNT); +- +- apc->irq_base = ATH79_PCI_IRQ_BASE; +- for (i = apc->irq_base; +- i < apc->irq_base + AR71XX_PCI_IRQ_COUNT; i++) { +- irq_set_chip_and_handler(i, &ar71xx_pci_irq_chip, +- handle_level_irq); +- irq_set_chip_data(i, apc); +- } +- ++ apc->domain = irq_domain_add_linear(apc->np, AR71XX_PCI_IRQ_COUNT, ++ &ar71xx_pci_domain_ops, apc); + irq_set_chained_handler_and_data(apc->irq, ar71xx_pci_irq_handler, + apc); + } +@@ -328,6 +340,11 @@ static void ar71xx_pci_reset(void) + mdelay(100); + } + ++static const struct of_device_id ar71xx_pci_ids[] = { ++ { .compatible = "qca,ar7100-pci" }, ++ {}, ++}; ++ + static int ar71xx_pci_probe(struct platform_device *pdev) + { + struct ar71xx_pci_controller *apc; +@@ -348,26 +365,6 @@ static int ar71xx_pci_probe(struct platf + if (apc->irq < 0) + return -EINVAL; + +- res = platform_get_resource_byname(pdev, IORESOURCE_IO, "io_base"); +- if (!res) +- return -EINVAL; +- +- apc->io_res.parent = res; +- apc->io_res.name = "PCI IO space"; +- apc->io_res.start = res->start; +- apc->io_res.end = res->end; +- apc->io_res.flags = IORESOURCE_IO; +- +- res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mem_base"); +- if (!res) +- return -EINVAL; +- +- apc->mem_res.parent = res; +- apc->mem_res.name = "PCI memory space"; +- apc->mem_res.start = res->start; +- apc->mem_res.end = res->end; +- apc->mem_res.flags = IORESOURCE_MEM; +- + ar71xx_pci_reset(); + + /* setup COMMAND register */ +@@ -380,9 +377,11 @@ static int ar71xx_pci_probe(struct platf + + ar71xx_pci_irq_init(apc); + ++ apc->np = pdev->dev.of_node; + apc->pci_ctrl.pci_ops = &ar71xx_pci_ops; + apc->pci_ctrl.mem_resource = &apc->mem_res; + apc->pci_ctrl.io_resource = &apc->io_res; ++ pci_load_of_ranges(&apc->pci_ctrl, pdev->dev.of_node); + + register_pci_controller(&apc->pci_ctrl); + +@@ -393,6 +392,7 @@ static struct platform_driver ar71xx_pci + .probe = ar71xx_pci_probe, + .driver = { + .name = "ar71xx-pci", ++ .of_match_table = of_match_ptr(ar71xx_pci_ids), + }, + }; + diff --git a/target/linux/ath79/patches-4.19/0019-dt-bindings-PCI-qcom-ar7240-adds-binding-doc.patch b/target/linux/ath79/patches-4.19/0019-dt-bindings-PCI-qcom-ar7240-adds-binding-doc.patch new file mode 100644 index 000000000..a0af79cb4 --- /dev/null +++ b/target/linux/ath79/patches-4.19/0019-dt-bindings-PCI-qcom-ar7240-adds-binding-doc.patch @@ -0,0 +1,61 @@ +From ea27764bc3ef2a05decf3ae05edffc289cd0d93c Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Mon, 25 Jun 2018 15:52:02 +0200 +Subject: [PATCH 19/33] dt-bindings: PCI: qcom,ar7240: adds binding doc + +With the driver being converted from platform_data to pure OF, we need to +also add some docs. + +Cc: Rob Herring +Cc: devicetree@vger.kernel.org +Signed-off-by: John Crispin +--- + .../devicetree/bindings/pci/qcom,ar7240-pci.txt | 42 ++++++++++++++++++++++ + 1 file changed, 42 insertions(+) + create mode 100644 Documentation/devicetree/bindings/pci/qcom,ar7240-pci.txt + +--- /dev/null ++++ b/Documentation/devicetree/bindings/pci/qcom,ar7240-pci.txt +@@ -0,0 +1,42 @@ ++* Qualcomm Atheros AR724X PCI express root complex ++ ++Required properties: ++- compatible: should contain "qcom,ar7240-pci" to identify the core. ++- reg: Should contain the register ranges as listed in the reg-names property. ++- reg-names: Definition: Must include the following entries ++ - "crp_base" Configuration registers ++ - "ctrl_base" Control registers ++ - "cfg_base" IO Memory ++- #address-cells: set to <3> ++- #size-cells: set to <2> ++- ranges: ranges for the PCI memory and I/O regions ++- interrupt-map-mask and interrupt-map: standard PCI ++ properties to define the mapping of the PCIe interface to interrupt ++ numbers. ++- #interrupt-cells: set to <1> ++- interrupt-parent: phandle to the MIPS IRQ controller ++ ++Optional properties: ++- interrupt-controller: define to enable the builtin IRQ cascade. ++ ++* Example for qca9557 ++ pcie-controller@180c0000 { ++ compatible = "qcom,ar7240-pci"; ++ #address-cells = <3>; ++ #size-cells = <2>; ++ bus-range = <0x0 0x0>; ++ reg = <0x180c0000 0x1000>, ++ <0x180f0000 0x100>, ++ <0x14000000 0x1000>; ++ reg-names = "crp_base", "ctrl_base", "cfg_base"; ++ ranges = <0x2000000 0 0x10000000 0x10000000 0 0x04000000 ++ 0x1000000 0 0x00000000 0x00000000 0 0x00000001>; ++ interrupt-parent = <&intc2>; ++ interrupts = <1>; ++ ++ interrupt-controller; ++ #interrupt-cells = <1>; ++ ++ interrupt-map-mask = <0 0 0 1>; ++ interrupt-map = <0 0 0 0 &pcie0 0>; ++ }; diff --git a/target/linux/ath79/patches-4.19/0020-MIPS-pci-ar724x-convert-to-OF.patch b/target/linux/ath79/patches-4.19/0020-MIPS-pci-ar724x-convert-to-OF.patch new file mode 100644 index 000000000..936bfd481 --- /dev/null +++ b/target/linux/ath79/patches-4.19/0020-MIPS-pci-ar724x-convert-to-OF.patch @@ -0,0 +1,205 @@ +From a522ee0199d5d3ea114ca2e211f6ac398d3e8e0b Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Sat, 23 Jun 2018 15:07:37 +0200 +Subject: [PATCH 20/33] MIPS: pci-ar724x: convert to OF + +With the ath79 target getting converted to pure OF, we can drop all the +platform data code and add the missing OF bits to the driver. We also add +a irq domain for the PCI/e controllers cascade, thus making it usable from +dts files. + +Signed-off-by: John Crispin +--- + arch/mips/pci/pci-ar724x.c | 88 ++++++++++++++++++++++------------------------ + 1 file changed, 42 insertions(+), 46 deletions(-) + +--- a/arch/mips/pci/pci-ar724x.c ++++ b/arch/mips/pci/pci-ar724x.c +@@ -14,8 +14,11 @@ + #include + #include + #include ++#include + #include + #include ++#include ++#include + + #define AR724X_PCI_REG_APP 0x00 + #define AR724X_PCI_REG_RESET 0x18 +@@ -45,17 +48,20 @@ struct ar724x_pci_controller { + void __iomem *crp_base; + + int irq; +- int irq_base; + + bool link_up; + bool bar0_is_cached; + u32 bar0_value; + ++ struct device_node *np; + struct pci_controller pci_controller; ++ struct irq_domain *domain; + struct resource io_res; + struct resource mem_res; + }; + ++static struct irq_chip ar724x_pci_irq_chip; ++ + static inline bool ar724x_pci_check_link(struct ar724x_pci_controller *apc) + { + u32 reset; +@@ -231,35 +237,31 @@ static struct pci_ops ar724x_pci_ops = { + + static void ar724x_pci_irq_handler(struct irq_desc *desc) + { +- struct ar724x_pci_controller *apc; +- void __iomem *base; ++ struct irq_chip *chip = irq_desc_get_chip(desc); ++ struct ar724x_pci_controller *apc = irq_desc_get_handler_data(desc); + u32 pending; + +- apc = irq_desc_get_handler_data(desc); +- base = apc->ctrl_base; +- +- pending = __raw_readl(base + AR724X_PCI_REG_INT_STATUS) & +- __raw_readl(base + AR724X_PCI_REG_INT_MASK); ++ chained_irq_enter(chip, desc); ++ pending = __raw_readl(apc->ctrl_base + AR724X_PCI_REG_INT_STATUS) & ++ __raw_readl(apc->ctrl_base + AR724X_PCI_REG_INT_MASK); + + if (pending & AR724X_PCI_INT_DEV0) +- generic_handle_irq(apc->irq_base + 0); +- ++ generic_handle_irq(irq_linear_revmap(apc->domain, 1)); + else + spurious_interrupt(); ++ chained_irq_exit(chip, desc); + } + + static void ar724x_pci_irq_unmask(struct irq_data *d) + { + struct ar724x_pci_controller *apc; + void __iomem *base; +- int offset; + u32 t; + + apc = irq_data_get_irq_chip_data(d); + base = apc->ctrl_base; +- offset = apc->irq_base - d->irq; + +- switch (offset) { ++ switch (irq_linear_revmap(apc->domain, d->irq)) { + case 0: + t = __raw_readl(base + AR724X_PCI_REG_INT_MASK); + __raw_writel(t | AR724X_PCI_INT_DEV0, +@@ -273,14 +275,12 @@ static void ar724x_pci_irq_mask(struct i + { + struct ar724x_pci_controller *apc; + void __iomem *base; +- int offset; + u32 t; + + apc = irq_data_get_irq_chip_data(d); + base = apc->ctrl_base; +- offset = apc->irq_base - d->irq; + +- switch (offset) { ++ switch (irq_linear_revmap(apc->domain, d->irq)) { + case 0: + t = __raw_readl(base + AR724X_PCI_REG_INT_MASK); + __raw_writel(t & ~AR724X_PCI_INT_DEV0, +@@ -305,26 +305,34 @@ static struct irq_chip ar724x_pci_irq_ch + .irq_mask_ack = ar724x_pci_irq_mask, + }; + ++static int ar724x_pci_irq_map(struct irq_domain *d, ++ unsigned int irq, irq_hw_number_t hw) ++{ ++ struct ar724x_pci_controller *apc = d->host_data; ++ ++ irq_set_chip_and_handler(irq, &ar724x_pci_irq_chip, handle_level_irq); ++ irq_set_chip_data(irq, apc); ++ ++ return 0; ++} ++ ++static const struct irq_domain_ops ar724x_pci_domain_ops = { ++ .xlate = irq_domain_xlate_onecell, ++ .map = ar724x_pci_irq_map, ++}; ++ + static void ar724x_pci_irq_init(struct ar724x_pci_controller *apc, + int id) + { + void __iomem *base; +- int i; + + base = apc->ctrl_base; + + __raw_writel(0, base + AR724X_PCI_REG_INT_MASK); + __raw_writel(0, base + AR724X_PCI_REG_INT_STATUS); + +- apc->irq_base = ATH79_PCI_IRQ_BASE + (id * AR724X_PCI_IRQ_COUNT); +- +- for (i = apc->irq_base; +- i < apc->irq_base + AR724X_PCI_IRQ_COUNT; i++) { +- irq_set_chip_and_handler(i, &ar724x_pci_irq_chip, +- handle_level_irq); +- irq_set_chip_data(i, apc); +- } +- ++ apc->domain = irq_domain_add_linear(apc->np, 2, ++ &ar724x_pci_domain_ops, apc); + irq_set_chained_handler_and_data(apc->irq, ar724x_pci_irq_handler, + apc); + } +@@ -394,29 +402,11 @@ static int ar724x_pci_probe(struct platf + if (apc->irq < 0) + return -EINVAL; + +- res = platform_get_resource_byname(pdev, IORESOURCE_IO, "io_base"); +- if (!res) +- return -EINVAL; +- +- apc->io_res.parent = res; +- apc->io_res.name = "PCI IO space"; +- apc->io_res.start = res->start; +- apc->io_res.end = res->end; +- apc->io_res.flags = IORESOURCE_IO; +- +- res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mem_base"); +- if (!res) +- return -EINVAL; +- +- apc->mem_res.parent = res; +- apc->mem_res.name = "PCI memory space"; +- apc->mem_res.start = res->start; +- apc->mem_res.end = res->end; +- apc->mem_res.flags = IORESOURCE_MEM; +- ++ apc->np = pdev->dev.of_node; + apc->pci_controller.pci_ops = &ar724x_pci_ops; + apc->pci_controller.io_resource = &apc->io_res; + apc->pci_controller.mem_resource = &apc->mem_res; ++ pci_load_of_ranges(&apc->pci_controller, pdev->dev.of_node); + + /* + * Do the full PCIE Root Complex Initialization Sequence if the PCIe +@@ -438,10 +428,16 @@ static int ar724x_pci_probe(struct platf + return 0; + } + ++static const struct of_device_id ar724x_pci_ids[] = { ++ { .compatible = "qcom,ar7240-pci" }, ++ {}, ++}; ++ + static struct platform_driver ar724x_pci_driver = { + .probe = ar724x_pci_probe, + .driver = { + .name = "ar724x-pci", ++ .of_match_table = of_match_ptr(ar724x_pci_ids), + }, + }; + diff --git a/target/linux/ath79/patches-4.19/0021-MIPS-ath79-add-helpers-for-setting-clocks-and-expose.patch b/target/linux/ath79/patches-4.19/0021-MIPS-ath79-add-helpers-for-setting-clocks-and-expose.patch new file mode 100644 index 000000000..c273140df --- /dev/null +++ b/target/linux/ath79/patches-4.19/0021-MIPS-ath79-add-helpers-for-setting-clocks-and-expose.patch @@ -0,0 +1,243 @@ +From 288a8eb0d41f09fda242e05f8a7bd1f5b3489477 Mon Sep 17 00:00:00 2001 +From: Felix Fietkau +Date: Tue, 6 Mar 2018 13:19:26 +0100 +Subject: [PATCH 21/33] MIPS: ath79: add helpers for setting clocks and expose + the ref clock + +Preparation for transitioning the legacy clock setup code over +to OF. + +Signed-off-by: Felix Fietkau +Signed-off-by: John Crispin +--- + arch/mips/ath79/clock.c | 128 ++++++++++++++++++---------------- + include/dt-bindings/clock/ath79-clk.h | 3 +- + 2 files changed, 68 insertions(+), 63 deletions(-) + +--- a/arch/mips/ath79/clock.c ++++ b/arch/mips/ath79/clock.c +@@ -37,20 +37,46 @@ static struct clk_onecell_data clk_data + .clk_num = ARRAY_SIZE(clks), + }; + +-static struct clk *__init ath79_add_sys_clkdev( +- const char *id, unsigned long rate) ++static const char * const clk_names[ATH79_CLK_END] = { ++ [ATH79_CLK_CPU] = "cpu", ++ [ATH79_CLK_DDR] = "ddr", ++ [ATH79_CLK_AHB] = "ahb", ++ [ATH79_CLK_REF] = "ref", ++}; ++ ++static const char * __init ath79_clk_name(int type) + { +- struct clk *clk; +- int err; ++ BUG_ON(type >= ARRAY_SIZE(clk_names) || !clk_names[type]); ++ return clk_names[type]; ++} + +- clk = clk_register_fixed_rate(NULL, id, NULL, 0, rate); ++static void __init __ath79_set_clk(int type, const char *name, struct clk *clk) ++{ + if (IS_ERR(clk)) +- panic("failed to allocate %s clock structure", id); ++ panic("failed to allocate %s clock structure", clk_names[type]); + +- err = clk_register_clkdev(clk, id, NULL); +- if (err) +- panic("unable to register %s clock device", id); ++ clks[type] = clk; ++ clk_register_clkdev(clk, name, NULL); ++} + ++static struct clk * __init ath79_set_clk(int type, unsigned long rate) ++{ ++ const char *name = ath79_clk_name(type); ++ struct clk *clk; ++ ++ clk = clk_register_fixed_rate(NULL, name, NULL, 0, rate); ++ __ath79_set_clk(type, name, clk); ++ return clk; ++} ++ ++static struct clk * __init ath79_set_ff_clk(int type, const char *parent, ++ unsigned int mult, unsigned int div) ++{ ++ const char *name = ath79_clk_name(type); ++ struct clk *clk; ++ ++ clk = clk_register_fixed_factor(NULL, name, parent, 0, mult, div); ++ __ath79_set_clk(type, name, clk); + return clk; + } + +@@ -80,27 +106,15 @@ static void __init ar71xx_clocks_init(vo + div = (((pll >> AR71XX_AHB_DIV_SHIFT) & AR71XX_AHB_DIV_MASK) + 1) * 2; + ahb_rate = cpu_rate / div; + +- ath79_add_sys_clkdev("ref", ref_rate); +- clks[ATH79_CLK_CPU] = ath79_add_sys_clkdev("cpu", cpu_rate); +- clks[ATH79_CLK_DDR] = ath79_add_sys_clkdev("ddr", ddr_rate); +- clks[ATH79_CLK_AHB] = ath79_add_sys_clkdev("ahb", ahb_rate); ++ ath79_set_clk(ATH79_CLK_REF, ref_rate); ++ ath79_set_clk(ATH79_CLK_CPU, cpu_rate); ++ ath79_set_clk(ATH79_CLK_DDR, ddr_rate); ++ ath79_set_clk(ATH79_CLK_AHB, ahb_rate); + + clk_add_alias("wdt", NULL, "ahb", NULL); + clk_add_alias("uart", NULL, "ahb", NULL); + } + +-static struct clk * __init ath79_reg_ffclk(const char *name, +- const char *parent_name, unsigned int mult, unsigned int div) +-{ +- struct clk *clk; +- +- clk = clk_register_fixed_factor(NULL, name, parent_name, 0, mult, div); +- if (IS_ERR(clk)) +- panic("failed to allocate %s clock structure", name); +- +- return clk; +-} +- + static void __init ar724x_clk_init(struct clk *ref_clk, void __iomem *pll_base) + { + u32 pll; +@@ -114,24 +128,19 @@ static void __init ar724x_clk_init(struc + ddr_div = ((pll >> AR724X_DDR_DIV_SHIFT) & AR724X_DDR_DIV_MASK) + 1; + ahb_div = (((pll >> AR724X_AHB_DIV_SHIFT) & AR724X_AHB_DIV_MASK) + 1) * 2; + +- clks[ATH79_CLK_CPU] = ath79_reg_ffclk("cpu", "ref", mult, div); +- clks[ATH79_CLK_DDR] = ath79_reg_ffclk("ddr", "ref", mult, div * ddr_div); +- clks[ATH79_CLK_AHB] = ath79_reg_ffclk("ahb", "ref", mult, div * ahb_div); ++ ath79_set_ff_clk(ATH79_CLK_CPU, "ref", mult, div); ++ ath79_set_ff_clk(ATH79_CLK_DDR, "ref", mult, div * ddr_div); ++ ath79_set_ff_clk(ATH79_CLK_AHB, "ref", mult, div * ahb_div); + } + + static void __init ar724x_clocks_init(void) + { + struct clk *ref_clk; + +- ref_clk = ath79_add_sys_clkdev("ref", AR724X_BASE_FREQ); ++ ref_clk = ath79_set_clk(ATH79_CLK_REF, AR724X_BASE_FREQ); + + ar724x_clk_init(ref_clk, ath79_pll_base); + +- /* just make happy plat_time_init() from arch/mips/ath79/setup.c */ +- clk_register_clkdev(clks[ATH79_CLK_CPU], "cpu", NULL); +- clk_register_clkdev(clks[ATH79_CLK_DDR], "ddr", NULL); +- clk_register_clkdev(clks[ATH79_CLK_AHB], "ahb", NULL); +- + clk_add_alias("wdt", NULL, "ahb", NULL); + clk_add_alias("uart", NULL, "ahb", NULL); + } +@@ -186,12 +195,12 @@ static void __init ar9330_clk_init(struc + AR933X_PLL_CLOCK_CTRL_AHB_DIV_MASK) + 1; + } + +- clks[ATH79_CLK_CPU] = ath79_reg_ffclk("cpu", "ref", +- ninit_mul, ref_div * out_div * cpu_div); +- clks[ATH79_CLK_DDR] = ath79_reg_ffclk("ddr", "ref", +- ninit_mul, ref_div * out_div * ddr_div); +- clks[ATH79_CLK_AHB] = ath79_reg_ffclk("ahb", "ref", +- ninit_mul, ref_div * out_div * ahb_div); ++ ath79_set_ff_clk(ATH79_CLK_CPU, "ref", ninit_mul, ++ ref_div * out_div * cpu_div); ++ ath79_set_ff_clk(ATH79_CLK_DDR, "ref", ninit_mul, ++ ref_div * out_div * ddr_div); ++ ath79_set_ff_clk(ATH79_CLK_AHB, "ref", ninit_mul, ++ ref_div * out_div * ahb_div); + } + + static void __init ar933x_clocks_init(void) +@@ -206,15 +215,10 @@ static void __init ar933x_clocks_init(vo + else + ref_rate = (25 * 1000 * 1000); + +- ref_clk = ath79_add_sys_clkdev("ref", ref_rate); ++ ref_clk = ath79_set_clk(ATH79_CLK_REF, ref_rate); + + ar9330_clk_init(ref_clk, ath79_pll_base); + +- /* just make happy plat_time_init() from arch/mips/ath79/setup.c */ +- clk_register_clkdev(clks[ATH79_CLK_CPU], "cpu", NULL); +- clk_register_clkdev(clks[ATH79_CLK_DDR], "ddr", NULL); +- clk_register_clkdev(clks[ATH79_CLK_AHB], "ahb", NULL); +- + clk_add_alias("wdt", NULL, "ahb", NULL); + clk_add_alias("uart", NULL, "ref", NULL); + } +@@ -344,10 +348,10 @@ static void __init ar934x_clocks_init(vo + else + ahb_rate = cpu_pll / (postdiv + 1); + +- ath79_add_sys_clkdev("ref", ref_rate); +- clks[ATH79_CLK_CPU] = ath79_add_sys_clkdev("cpu", cpu_rate); +- clks[ATH79_CLK_DDR] = ath79_add_sys_clkdev("ddr", ddr_rate); +- clks[ATH79_CLK_AHB] = ath79_add_sys_clkdev("ahb", ahb_rate); ++ ath79_set_clk(ATH79_CLK_REF, ref_rate); ++ ath79_set_clk(ATH79_CLK_CPU, cpu_rate); ++ ath79_set_clk(ATH79_CLK_DDR, ddr_rate); ++ ath79_set_clk(ATH79_CLK_AHB, ahb_rate); + + clk_add_alias("wdt", NULL, "ref", NULL); + clk_add_alias("uart", NULL, "ref", NULL); +@@ -431,10 +435,10 @@ static void __init qca953x_clocks_init(v + else + ahb_rate = cpu_pll / (postdiv + 1); + +- ath79_add_sys_clkdev("ref", ref_rate); +- ath79_add_sys_clkdev("cpu", cpu_rate); +- ath79_add_sys_clkdev("ddr", ddr_rate); +- ath79_add_sys_clkdev("ahb", ahb_rate); ++ ath79_set_clk(ATH79_CLK_REF, ref_rate); ++ ath79_set_clk(ATH79_CLK_CPU, cpu_rate); ++ ath79_set_clk(ATH79_CLK_DDR, ddr_rate); ++ ath79_set_clk(ATH79_CLK_AHB, ahb_rate); + + clk_add_alias("wdt", NULL, "ref", NULL); + clk_add_alias("uart", NULL, "ref", NULL); +@@ -516,10 +520,10 @@ static void __init qca955x_clocks_init(v + else + ahb_rate = cpu_pll / (postdiv + 1); + +- ath79_add_sys_clkdev("ref", ref_rate); +- clks[ATH79_CLK_CPU] = ath79_add_sys_clkdev("cpu", cpu_rate); +- clks[ATH79_CLK_DDR] = ath79_add_sys_clkdev("ddr", ddr_rate); +- clks[ATH79_CLK_AHB] = ath79_add_sys_clkdev("ahb", ahb_rate); ++ ath79_set_clk(ATH79_CLK_REF, ref_rate); ++ ath79_set_clk(ATH79_CLK_CPU, cpu_rate); ++ ath79_set_clk(ATH79_CLK_DDR, ddr_rate); ++ ath79_set_clk(ATH79_CLK_AHB, ahb_rate); + + clk_add_alias("wdt", NULL, "ref", NULL); + clk_add_alias("uart", NULL, "ref", NULL); +@@ -620,10 +624,10 @@ static void __init qca956x_clocks_init(v + else + ahb_rate = cpu_pll / (postdiv + 1); + +- ath79_add_sys_clkdev("ref", ref_rate); +- ath79_add_sys_clkdev("cpu", cpu_rate); +- ath79_add_sys_clkdev("ddr", ddr_rate); +- ath79_add_sys_clkdev("ahb", ahb_rate); ++ ath79_set_clk(ATH79_CLK_REF, ref_rate); ++ ath79_set_clk(ATH79_CLK_CPU, cpu_rate); ++ ath79_set_clk(ATH79_CLK_DDR, ddr_rate); ++ ath79_set_clk(ATH79_CLK_AHB, ahb_rate); + + clk_add_alias("wdt", NULL, "ref", NULL); + clk_add_alias("uart", NULL, "ref", NULL); +--- a/include/dt-bindings/clock/ath79-clk.h ++++ b/include/dt-bindings/clock/ath79-clk.h +@@ -13,7 +13,8 @@ + #define ATH79_CLK_CPU 0 + #define ATH79_CLK_DDR 1 + #define ATH79_CLK_AHB 2 ++#define ATH79_CLK_REF 3 + +-#define ATH79_CLK_END 3 ++#define ATH79_CLK_END 4 + + #endif /* __DT_BINDINGS_ATH79_CLK_H */ diff --git a/target/linux/ath79/patches-4.19/0022-MIPS-ath79-move-legacy-wdt-and-uart-clock-aliases-ou.patch b/target/linux/ath79/patches-4.19/0022-MIPS-ath79-move-legacy-wdt-and-uart-clock-aliases-ou.patch new file mode 100644 index 000000000..389edc45a --- /dev/null +++ b/target/linux/ath79/patches-4.19/0022-MIPS-ath79-move-legacy-wdt-and-uart-clock-aliases-ou.patch @@ -0,0 +1,114 @@ +From 339c191a95e978353c9ba3aafab0261e14de109b Mon Sep 17 00:00:00 2001 +From: Felix Fietkau +Date: Tue, 6 Mar 2018 13:22:43 +0100 +Subject: [PATCH 22/33] MIPS: ath79: move legacy "wdt" and "uart" clock aliases + out of soc init + +Preparation for reusing functions for DT + +Signed-off-by: Felix Fietkau +Signed-off-by: John Crispin +--- + arch/mips/ath79/clock.c | 38 +++++++++++++++++--------------------- + 1 file changed, 17 insertions(+), 21 deletions(-) + +--- a/arch/mips/ath79/clock.c ++++ b/arch/mips/ath79/clock.c +@@ -110,9 +110,6 @@ static void __init ar71xx_clocks_init(vo + ath79_set_clk(ATH79_CLK_CPU, cpu_rate); + ath79_set_clk(ATH79_CLK_DDR, ddr_rate); + ath79_set_clk(ATH79_CLK_AHB, ahb_rate); +- +- clk_add_alias("wdt", NULL, "ahb", NULL); +- clk_add_alias("uart", NULL, "ahb", NULL); + } + + static void __init ar724x_clk_init(struct clk *ref_clk, void __iomem *pll_base) +@@ -140,9 +137,6 @@ static void __init ar724x_clocks_init(vo + ref_clk = ath79_set_clk(ATH79_CLK_REF, AR724X_BASE_FREQ); + + ar724x_clk_init(ref_clk, ath79_pll_base); +- +- clk_add_alias("wdt", NULL, "ahb", NULL); +- clk_add_alias("uart", NULL, "ahb", NULL); + } + + static void __init ar9330_clk_init(struct clk *ref_clk, void __iomem *pll_base) +@@ -218,9 +212,6 @@ static void __init ar933x_clocks_init(vo + ref_clk = ath79_set_clk(ATH79_CLK_REF, ref_rate); + + ar9330_clk_init(ref_clk, ath79_pll_base); +- +- clk_add_alias("wdt", NULL, "ahb", NULL); +- clk_add_alias("uart", NULL, "ref", NULL); + } + + static u32 __init ar934x_get_pll_freq(u32 ref, u32 ref_div, u32 nint, u32 nfrac, +@@ -353,9 +344,6 @@ static void __init ar934x_clocks_init(vo + ath79_set_clk(ATH79_CLK_DDR, ddr_rate); + ath79_set_clk(ATH79_CLK_AHB, ahb_rate); + +- clk_add_alias("wdt", NULL, "ref", NULL); +- clk_add_alias("uart", NULL, "ref", NULL); +- + iounmap(dpll_base); + } + +@@ -439,9 +427,6 @@ static void __init qca953x_clocks_init(v + ath79_set_clk(ATH79_CLK_CPU, cpu_rate); + ath79_set_clk(ATH79_CLK_DDR, ddr_rate); + ath79_set_clk(ATH79_CLK_AHB, ahb_rate); +- +- clk_add_alias("wdt", NULL, "ref", NULL); +- clk_add_alias("uart", NULL, "ref", NULL); + } + + static void __init qca955x_clocks_init(void) +@@ -524,9 +509,6 @@ static void __init qca955x_clocks_init(v + ath79_set_clk(ATH79_CLK_CPU, cpu_rate); + ath79_set_clk(ATH79_CLK_DDR, ddr_rate); + ath79_set_clk(ATH79_CLK_AHB, ahb_rate); +- +- clk_add_alias("wdt", NULL, "ref", NULL); +- clk_add_alias("uart", NULL, "ref", NULL); + } + + static void __init qca956x_clocks_init(void) +@@ -628,13 +610,13 @@ static void __init qca956x_clocks_init(v + ath79_set_clk(ATH79_CLK_CPU, cpu_rate); + ath79_set_clk(ATH79_CLK_DDR, ddr_rate); + ath79_set_clk(ATH79_CLK_AHB, ahb_rate); +- +- clk_add_alias("wdt", NULL, "ref", NULL); +- clk_add_alias("uart", NULL, "ref", NULL); + } + + void __init ath79_clocks_init(void) + { ++ const char *wdt; ++ const char *uart; ++ + if (soc_is_ar71xx()) + ar71xx_clocks_init(); + else if (soc_is_ar724x() || soc_is_ar913x()) +@@ -651,6 +633,20 @@ void __init ath79_clocks_init(void) + qca956x_clocks_init(); + else + BUG(); ++ ++ if (soc_is_ar71xx() || soc_is_ar724x() || soc_is_ar913x()) { ++ wdt = "ahb"; ++ uart = "ahb"; ++ } else if (soc_is_ar933x()) { ++ wdt = "ahb"; ++ uart = "ref"; ++ } else { ++ wdt = "ref"; ++ uart = "ref"; ++ } ++ ++ clk_add_alias("wdt", NULL, wdt, NULL); ++ clk_add_alias("uart", NULL, uart, NULL); + } + + unsigned long __init diff --git a/target/linux/ath79/patches-4.19/0023-MIPS-ath79-pass-PLL-base-to-clock-init-functions.patch b/target/linux/ath79/patches-4.19/0023-MIPS-ath79-pass-PLL-base-to-clock-init-functions.patch new file mode 100644 index 000000000..6c0f2ad54 --- /dev/null +++ b/target/linux/ath79/patches-4.19/0023-MIPS-ath79-pass-PLL-base-to-clock-init-functions.patch @@ -0,0 +1,242 @@ +From 6350b2c36c522fecbc91a80b63f49319dafd2a72 Mon Sep 17 00:00:00 2001 +From: Felix Fietkau +Date: Tue, 6 Mar 2018 13:23:20 +0100 +Subject: [PATCH 23/33] MIPS: ath79: pass PLL base to clock init functions + +Preparation for passing the mapped base via DT + +Signed-off-by: Felix Fietkau +Signed-off-by: John Crispin +--- + arch/mips/ath79/clock.c | 60 ++++++++++++++++++++++++------------------------- + 1 file changed, 30 insertions(+), 30 deletions(-) + +--- a/arch/mips/ath79/clock.c ++++ b/arch/mips/ath79/clock.c +@@ -80,7 +80,7 @@ static struct clk * __init ath79_set_ff_ + return clk; + } + +-static void __init ar71xx_clocks_init(void) ++static void __init ar71xx_clocks_init(void __iomem *pll_base) + { + unsigned long ref_rate; + unsigned long cpu_rate; +@@ -92,7 +92,7 @@ static void __init ar71xx_clocks_init(vo + + ref_rate = AR71XX_BASE_FREQ; + +- pll = ath79_pll_rr(AR71XX_PLL_REG_CPU_CONFIG); ++ pll = __raw_readl(pll_base + AR71XX_PLL_REG_CPU_CONFIG); + + div = ((pll >> AR71XX_PLL_FB_SHIFT) & AR71XX_PLL_FB_MASK) + 1; + freq = div * ref_rate; +@@ -130,13 +130,13 @@ static void __init ar724x_clk_init(struc + ath79_set_ff_clk(ATH79_CLK_AHB, "ref", mult, div * ahb_div); + } + +-static void __init ar724x_clocks_init(void) ++static void __init ar724x_clocks_init(void __iomem *pll_base) + { + struct clk *ref_clk; + + ref_clk = ath79_set_clk(ATH79_CLK_REF, AR724X_BASE_FREQ); + +- ar724x_clk_init(ref_clk, ath79_pll_base); ++ ar724x_clk_init(ref_clk, pll_base); + } + + static void __init ar9330_clk_init(struct clk *ref_clk, void __iomem *pll_base) +@@ -197,7 +197,7 @@ static void __init ar9330_clk_init(struc + ref_div * out_div * ahb_div); + } + +-static void __init ar933x_clocks_init(void) ++static void __init ar933x_clocks_init(void __iomem *pll_base) + { + struct clk *ref_clk; + unsigned long ref_rate; +@@ -234,7 +234,7 @@ static u32 __init ar934x_get_pll_freq(u3 + return ret; + } + +-static void __init ar934x_clocks_init(void) ++static void __init ar934x_clocks_init(void __iomem *pll_base) + { + unsigned long ref_rate; + unsigned long cpu_rate; +@@ -265,7 +265,7 @@ static void __init ar934x_clocks_init(vo + AR934X_SRIF_DPLL1_REFDIV_MASK; + frac = 1 << 18; + } else { +- pll = ath79_pll_rr(AR934X_PLL_CPU_CONFIG_REG); ++ pll = __raw_readl(pll_base + AR934X_PLL_CPU_CONFIG_REG); + out_div = (pll >> AR934X_PLL_CPU_CONFIG_OUTDIV_SHIFT) & + AR934X_PLL_CPU_CONFIG_OUTDIV_MASK; + ref_div = (pll >> AR934X_PLL_CPU_CONFIG_REFDIV_SHIFT) & +@@ -292,7 +292,7 @@ static void __init ar934x_clocks_init(vo + AR934X_SRIF_DPLL1_REFDIV_MASK; + frac = 1 << 18; + } else { +- pll = ath79_pll_rr(AR934X_PLL_DDR_CONFIG_REG); ++ pll = __raw_readl(pll_base + AR934X_PLL_DDR_CONFIG_REG); + out_div = (pll >> AR934X_PLL_DDR_CONFIG_OUTDIV_SHIFT) & + AR934X_PLL_DDR_CONFIG_OUTDIV_MASK; + ref_div = (pll >> AR934X_PLL_DDR_CONFIG_REFDIV_SHIFT) & +@@ -307,7 +307,7 @@ static void __init ar934x_clocks_init(vo + ddr_pll = ar934x_get_pll_freq(ref_rate, ref_div, nint, + nfrac, frac, out_div); + +- clk_ctrl = ath79_pll_rr(AR934X_PLL_CPU_DDR_CLK_CTRL_REG); ++ clk_ctrl = __raw_readl(pll_base + AR934X_PLL_CPU_DDR_CLK_CTRL_REG); + + postdiv = (clk_ctrl >> AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_POST_DIV_SHIFT) & + AR934X_PLL_CPU_DDR_CLK_CTRL_CPU_POST_DIV_MASK; +@@ -347,7 +347,7 @@ static void __init ar934x_clocks_init(vo + iounmap(dpll_base); + } + +-static void __init qca953x_clocks_init(void) ++static void __init qca953x_clocks_init(void __iomem *pll_base) + { + unsigned long ref_rate; + unsigned long cpu_rate; +@@ -363,7 +363,7 @@ static void __init qca953x_clocks_init(v + else + ref_rate = 25 * 1000 * 1000; + +- pll = ath79_pll_rr(QCA953X_PLL_CPU_CONFIG_REG); ++ pll = __raw_readl(pll_base + QCA953X_PLL_CPU_CONFIG_REG); + out_div = (pll >> QCA953X_PLL_CPU_CONFIG_OUTDIV_SHIFT) & + QCA953X_PLL_CPU_CONFIG_OUTDIV_MASK; + ref_div = (pll >> QCA953X_PLL_CPU_CONFIG_REFDIV_SHIFT) & +@@ -377,7 +377,7 @@ static void __init qca953x_clocks_init(v + cpu_pll += frac * (ref_rate >> 6) / ref_div; + cpu_pll /= (1 << out_div); + +- pll = ath79_pll_rr(QCA953X_PLL_DDR_CONFIG_REG); ++ pll = __raw_readl(pll_base + QCA953X_PLL_DDR_CONFIG_REG); + out_div = (pll >> QCA953X_PLL_DDR_CONFIG_OUTDIV_SHIFT) & + QCA953X_PLL_DDR_CONFIG_OUTDIV_MASK; + ref_div = (pll >> QCA953X_PLL_DDR_CONFIG_REFDIV_SHIFT) & +@@ -391,7 +391,7 @@ static void __init qca953x_clocks_init(v + ddr_pll += frac * (ref_rate >> 6) / (ref_div << 4); + ddr_pll /= (1 << out_div); + +- clk_ctrl = ath79_pll_rr(QCA953X_PLL_CLK_CTRL_REG); ++ clk_ctrl = __raw_readl(pll_base + QCA953X_PLL_CLK_CTRL_REG); + + postdiv = (clk_ctrl >> QCA953X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT) & + QCA953X_PLL_CLK_CTRL_CPU_POST_DIV_MASK; +@@ -429,7 +429,7 @@ static void __init qca953x_clocks_init(v + ath79_set_clk(ATH79_CLK_AHB, ahb_rate); + } + +-static void __init qca955x_clocks_init(void) ++static void __init qca955x_clocks_init(void __iomem *pll_base) + { + unsigned long ref_rate; + unsigned long cpu_rate; +@@ -445,7 +445,7 @@ static void __init qca955x_clocks_init(v + else + ref_rate = 25 * 1000 * 1000; + +- pll = ath79_pll_rr(QCA955X_PLL_CPU_CONFIG_REG); ++ pll = __raw_readl(pll_base + QCA955X_PLL_CPU_CONFIG_REG); + out_div = (pll >> QCA955X_PLL_CPU_CONFIG_OUTDIV_SHIFT) & + QCA955X_PLL_CPU_CONFIG_OUTDIV_MASK; + ref_div = (pll >> QCA955X_PLL_CPU_CONFIG_REFDIV_SHIFT) & +@@ -459,7 +459,7 @@ static void __init qca955x_clocks_init(v + cpu_pll += frac * ref_rate / (ref_div * (1 << 6)); + cpu_pll /= (1 << out_div); + +- pll = ath79_pll_rr(QCA955X_PLL_DDR_CONFIG_REG); ++ pll = __raw_readl(pll_base + QCA955X_PLL_DDR_CONFIG_REG); + out_div = (pll >> QCA955X_PLL_DDR_CONFIG_OUTDIV_SHIFT) & + QCA955X_PLL_DDR_CONFIG_OUTDIV_MASK; + ref_div = (pll >> QCA955X_PLL_DDR_CONFIG_REFDIV_SHIFT) & +@@ -473,7 +473,7 @@ static void __init qca955x_clocks_init(v + ddr_pll += frac * ref_rate / (ref_div * (1 << 10)); + ddr_pll /= (1 << out_div); + +- clk_ctrl = ath79_pll_rr(QCA955X_PLL_CLK_CTRL_REG); ++ clk_ctrl = __raw_readl(pll_base + QCA955X_PLL_CLK_CTRL_REG); + + postdiv = (clk_ctrl >> QCA955X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT) & + QCA955X_PLL_CLK_CTRL_CPU_POST_DIV_MASK; +@@ -511,7 +511,7 @@ static void __init qca955x_clocks_init(v + ath79_set_clk(ATH79_CLK_AHB, ahb_rate); + } + +-static void __init qca956x_clocks_init(void) ++static void __init qca956x_clocks_init(void __iomem *pll_base) + { + unsigned long ref_rate; + unsigned long cpu_rate; +@@ -537,13 +537,13 @@ static void __init qca956x_clocks_init(v + else + ref_rate = 25 * 1000 * 1000; + +- pll = ath79_pll_rr(QCA956X_PLL_CPU_CONFIG_REG); ++ pll = __raw_readl(pll_base + QCA956X_PLL_CPU_CONFIG_REG); + out_div = (pll >> QCA956X_PLL_CPU_CONFIG_OUTDIV_SHIFT) & + QCA956X_PLL_CPU_CONFIG_OUTDIV_MASK; + ref_div = (pll >> QCA956X_PLL_CPU_CONFIG_REFDIV_SHIFT) & + QCA956X_PLL_CPU_CONFIG_REFDIV_MASK; + +- pll = ath79_pll_rr(QCA956X_PLL_CPU_CONFIG1_REG); ++ pll = __raw_readl(pll_base + QCA956X_PLL_CPU_CONFIG1_REG); + nint = (pll >> QCA956X_PLL_CPU_CONFIG1_NINT_SHIFT) & + QCA956X_PLL_CPU_CONFIG1_NINT_MASK; + hfrac = (pll >> QCA956X_PLL_CPU_CONFIG1_NFRAC_H_SHIFT) & +@@ -556,12 +556,12 @@ static void __init qca956x_clocks_init(v + cpu_pll += (hfrac >> 13) * ref_rate / ref_div; + cpu_pll /= (1 << out_div); + +- pll = ath79_pll_rr(QCA956X_PLL_DDR_CONFIG_REG); ++ pll = __raw_readl(pll_base + QCA956X_PLL_DDR_CONFIG_REG); + out_div = (pll >> QCA956X_PLL_DDR_CONFIG_OUTDIV_SHIFT) & + QCA956X_PLL_DDR_CONFIG_OUTDIV_MASK; + ref_div = (pll >> QCA956X_PLL_DDR_CONFIG_REFDIV_SHIFT) & + QCA956X_PLL_DDR_CONFIG_REFDIV_MASK; +- pll = ath79_pll_rr(QCA956X_PLL_DDR_CONFIG1_REG); ++ pll = __raw_readl(pll_base + QCA956X_PLL_DDR_CONFIG1_REG); + nint = (pll >> QCA956X_PLL_DDR_CONFIG1_NINT_SHIFT) & + QCA956X_PLL_DDR_CONFIG1_NINT_MASK; + hfrac = (pll >> QCA956X_PLL_DDR_CONFIG1_NFRAC_H_SHIFT) & +@@ -574,7 +574,7 @@ static void __init qca956x_clocks_init(v + ddr_pll += (hfrac >> 13) * ref_rate / ref_div; + ddr_pll /= (1 << out_div); + +- clk_ctrl = ath79_pll_rr(QCA956X_PLL_CLK_CTRL_REG); ++ clk_ctrl = __raw_readl(pll_base + QCA956X_PLL_CLK_CTRL_REG); + + postdiv = (clk_ctrl >> QCA956X_PLL_CLK_CTRL_CPU_POST_DIV_SHIFT) & + QCA956X_PLL_CLK_CTRL_CPU_POST_DIV_MASK; +@@ -618,19 +618,19 @@ void __init ath79_clocks_init(void) + const char *uart; + + if (soc_is_ar71xx()) +- ar71xx_clocks_init(); ++ ar71xx_clocks_init(ath79_pll_base); + else if (soc_is_ar724x() || soc_is_ar913x()) +- ar724x_clocks_init(); ++ ar724x_clocks_init(ath79_pll_base); + else if (soc_is_ar933x()) +- ar933x_clocks_init(); ++ ar933x_clocks_init(ath79_pll_base); + else if (soc_is_ar934x()) +- ar934x_clocks_init(); ++ ar934x_clocks_init(ath79_pll_base); + else if (soc_is_qca953x()) +- qca953x_clocks_init(); ++ qca953x_clocks_init(ath79_pll_base); + else if (soc_is_qca955x()) +- qca955x_clocks_init(); ++ qca955x_clocks_init(ath79_pll_base); + else if (soc_is_qca956x() || soc_is_tp9343()) +- qca956x_clocks_init(); ++ qca956x_clocks_init(ath79_pll_base); + else + BUG(); + diff --git a/target/linux/ath79/patches-4.19/0024-MIPS-ath79-make-specifying-the-reference-clock-in-DT.patch b/target/linux/ath79/patches-4.19/0024-MIPS-ath79-make-specifying-the-reference-clock-in-DT.patch new file mode 100644 index 000000000..9ceb64380 --- /dev/null +++ b/target/linux/ath79/patches-4.19/0024-MIPS-ath79-make-specifying-the-reference-clock-in-DT.patch @@ -0,0 +1,229 @@ +From 5fadb2544ed0bb72ddddd846aa303bb9ed2d211c Mon Sep 17 00:00:00 2001 +From: Felix Fietkau +Date: Tue, 6 Mar 2018 13:24:07 +0100 +Subject: [PATCH 24/33] MIPS: ath79: make specifying the reference clock in DT + optional + +It can be autodetected for many SoCs using the strapping options. +If the clock is specified in DT, the autodetected value is ignored + +Signed-off-by: Felix Fietkau +Signed-off-by: John Crispin +--- + arch/mips/ath79/clock.c | 84 +++++++++++++++++++++++-------------------------- + 1 file changed, 40 insertions(+), 44 deletions(-) + +--- a/arch/mips/ath79/clock.c ++++ b/arch/mips/ath79/clock.c +@@ -80,6 +80,18 @@ static struct clk * __init ath79_set_ff_ + return clk; + } + ++static unsigned long __init ath79_setup_ref_clk(unsigned long rate) ++{ ++ struct clk *clk = clks[ATH79_CLK_REF]; ++ ++ if (clk) ++ rate = clk_get_rate(clk); ++ else ++ clk = ath79_set_clk(ATH79_CLK_REF, rate); ++ ++ return rate; ++} ++ + static void __init ar71xx_clocks_init(void __iomem *pll_base) + { + unsigned long ref_rate; +@@ -90,7 +102,7 @@ static void __init ar71xx_clocks_init(vo + u32 freq; + u32 div; + +- ref_rate = AR71XX_BASE_FREQ; ++ ref_rate = ath79_setup_ref_clk(AR71XX_BASE_FREQ); + + pll = __raw_readl(pll_base + AR71XX_PLL_REG_CPU_CONFIG); + +@@ -106,16 +118,17 @@ static void __init ar71xx_clocks_init(vo + div = (((pll >> AR71XX_AHB_DIV_SHIFT) & AR71XX_AHB_DIV_MASK) + 1) * 2; + ahb_rate = cpu_rate / div; + +- ath79_set_clk(ATH79_CLK_REF, ref_rate); + ath79_set_clk(ATH79_CLK_CPU, cpu_rate); + ath79_set_clk(ATH79_CLK_DDR, ddr_rate); + ath79_set_clk(ATH79_CLK_AHB, ahb_rate); + } + +-static void __init ar724x_clk_init(struct clk *ref_clk, void __iomem *pll_base) ++static void __init ar724x_clocks_init(void __iomem *pll_base) + { +- u32 pll; + u32 mult, div, ddr_div, ahb_div; ++ u32 pll; ++ ++ ath79_setup_ref_clk(AR71XX_BASE_FREQ); + + pll = __raw_readl(pll_base + AR724X_PLL_REG_CPU_CONFIG); + +@@ -130,17 +143,9 @@ static void __init ar724x_clk_init(struc + ath79_set_ff_clk(ATH79_CLK_AHB, "ref", mult, div * ahb_div); + } + +-static void __init ar724x_clocks_init(void __iomem *pll_base) +-{ +- struct clk *ref_clk; +- +- ref_clk = ath79_set_clk(ATH79_CLK_REF, AR724X_BASE_FREQ); +- +- ar724x_clk_init(ref_clk, pll_base); +-} +- +-static void __init ar9330_clk_init(struct clk *ref_clk, void __iomem *pll_base) ++static void __init ar933x_clocks_init(void __iomem *pll_base) + { ++ unsigned long ref_rate; + u32 clock_ctrl; + u32 ref_div; + u32 ninit_mul; +@@ -149,6 +154,15 @@ static void __init ar9330_clk_init(struc + u32 cpu_div; + u32 ddr_div; + u32 ahb_div; ++ u32 t; ++ ++ t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP); ++ if (t & AR933X_BOOTSTRAP_REF_CLK_40) ++ ref_rate = (40 * 1000 * 1000); ++ else ++ ref_rate = (25 * 1000 * 1000); ++ ++ ath79_setup_ref_clk(ref_rate); + + clock_ctrl = __raw_readl(pll_base + AR933X_PLL_CLOCK_CTRL_REG); + if (clock_ctrl & AR933X_PLL_CLOCK_CTRL_BYPASS) { +@@ -197,23 +211,6 @@ static void __init ar9330_clk_init(struc + ref_div * out_div * ahb_div); + } + +-static void __init ar933x_clocks_init(void __iomem *pll_base) +-{ +- struct clk *ref_clk; +- unsigned long ref_rate; +- u32 t; +- +- t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP); +- if (t & AR933X_BOOTSTRAP_REF_CLK_40) +- ref_rate = (40 * 1000 * 1000); +- else +- ref_rate = (25 * 1000 * 1000); +- +- ref_clk = ath79_set_clk(ATH79_CLK_REF, ref_rate); +- +- ar9330_clk_init(ref_clk, ath79_pll_base); +-} +- + static u32 __init ar934x_get_pll_freq(u32 ref, u32 ref_div, u32 nint, u32 nfrac, + u32 frac, u32 out_div) + { +@@ -253,6 +250,8 @@ static void __init ar934x_clocks_init(vo + else + ref_rate = 25 * 1000 * 1000; + ++ ref_rate = ath79_setup_ref_clk(ref_rate); ++ + pll = __raw_readl(dpll_base + AR934X_SRIF_CPU_DPLL2_REG); + if (pll & AR934X_SRIF_DPLL2_LOCAL_PLL) { + out_div = (pll >> AR934X_SRIF_DPLL2_OUTDIV_SHIFT) & +@@ -339,7 +338,6 @@ static void __init ar934x_clocks_init(vo + else + ahb_rate = cpu_pll / (postdiv + 1); + +- ath79_set_clk(ATH79_CLK_REF, ref_rate); + ath79_set_clk(ATH79_CLK_CPU, cpu_rate); + ath79_set_clk(ATH79_CLK_DDR, ddr_rate); + ath79_set_clk(ATH79_CLK_AHB, ahb_rate); +@@ -363,6 +361,8 @@ static void __init qca953x_clocks_init(v + else + ref_rate = 25 * 1000 * 1000; + ++ ref_rate = ath79_setup_ref_clk(ref_rate); ++ + pll = __raw_readl(pll_base + QCA953X_PLL_CPU_CONFIG_REG); + out_div = (pll >> QCA953X_PLL_CPU_CONFIG_OUTDIV_SHIFT) & + QCA953X_PLL_CPU_CONFIG_OUTDIV_MASK; +@@ -423,7 +423,6 @@ static void __init qca953x_clocks_init(v + else + ahb_rate = cpu_pll / (postdiv + 1); + +- ath79_set_clk(ATH79_CLK_REF, ref_rate); + ath79_set_clk(ATH79_CLK_CPU, cpu_rate); + ath79_set_clk(ATH79_CLK_DDR, ddr_rate); + ath79_set_clk(ATH79_CLK_AHB, ahb_rate); +@@ -445,6 +444,8 @@ static void __init qca955x_clocks_init(v + else + ref_rate = 25 * 1000 * 1000; + ++ ref_rate = ath79_setup_ref_clk(ref_rate); ++ + pll = __raw_readl(pll_base + QCA955X_PLL_CPU_CONFIG_REG); + out_div = (pll >> QCA955X_PLL_CPU_CONFIG_OUTDIV_SHIFT) & + QCA955X_PLL_CPU_CONFIG_OUTDIV_MASK; +@@ -505,7 +506,6 @@ static void __init qca955x_clocks_init(v + else + ahb_rate = cpu_pll / (postdiv + 1); + +- ath79_set_clk(ATH79_CLK_REF, ref_rate); + ath79_set_clk(ATH79_CLK_CPU, cpu_rate); + ath79_set_clk(ATH79_CLK_DDR, ddr_rate); + ath79_set_clk(ATH79_CLK_AHB, ahb_rate); +@@ -537,6 +537,8 @@ static void __init qca956x_clocks_init(v + else + ref_rate = 25 * 1000 * 1000; + ++ ref_rate = ath79_setup_ref_clk(ref_rate); ++ + pll = __raw_readl(pll_base + QCA956X_PLL_CPU_CONFIG_REG); + out_div = (pll >> QCA956X_PLL_CPU_CONFIG_OUTDIV_SHIFT) & + QCA956X_PLL_CPU_CONFIG_OUTDIV_MASK; +@@ -606,7 +608,6 @@ static void __init qca956x_clocks_init(v + else + ahb_rate = cpu_pll / (postdiv + 1); + +- ath79_set_clk(ATH79_CLK_REF, ref_rate); + ath79_set_clk(ATH79_CLK_CPU, cpu_rate); + ath79_set_clk(ATH79_CLK_DDR, ddr_rate); + ath79_set_clk(ATH79_CLK_AHB, ahb_rate); +@@ -682,10 +683,8 @@ static void __init ath79_clocks_init_dt_ + void __iomem *pll_base; + + ref_clk = of_clk_get(np, 0); +- if (IS_ERR(ref_clk)) { +- pr_err("%pOF: of_clk_get failed\n", np); +- goto err; +- } ++ if (!IS_ERR(ref_clk)) ++ clks[ATH79_CLK_REF] = ref_clk; + + pll_base = of_iomap(np, 0); + if (!pll_base) { +@@ -694,9 +693,9 @@ static void __init ath79_clocks_init_dt_ + } + + if (of_device_is_compatible(np, "qca,ar9130-pll")) +- ar724x_clk_init(ref_clk, pll_base); ++ ar724x_clocks_init(pll_base); + else if (of_device_is_compatible(np, "qca,ar9330-pll")) +- ar9330_clk_init(ref_clk, pll_base); ++ ar933x_clocks_init(pll_base); + else { + pr_err("%pOF: could not find any appropriate clk_init()\n", np); + goto err_iounmap; +@@ -714,9 +713,6 @@ err_iounmap: + + err_clk: + clk_put(ref_clk); +- +-err: +- return; + } + CLK_OF_DECLARE(ar9130_clk, "qca,ar9130-pll", ath79_clocks_init_dt_ng); + CLK_OF_DECLARE(ar9330_clk, "qca,ar9330-pll", ath79_clocks_init_dt_ng); diff --git a/target/linux/ath79/patches-4.19/0025-MIPS-ath79-support-setting-up-clock-via-DT-on-all-So.patch b/target/linux/ath79/patches-4.19/0025-MIPS-ath79-support-setting-up-clock-via-DT-on-all-So.patch new file mode 100644 index 000000000..13f46a914 --- /dev/null +++ b/target/linux/ath79/patches-4.19/0025-MIPS-ath79-support-setting-up-clock-via-DT-on-all-So.patch @@ -0,0 +1,77 @@ +From 6325626de001df98aebe51f3008b1aca05798d19 Mon Sep 17 00:00:00 2001 +From: Felix Fietkau +Date: Tue, 6 Mar 2018 13:26:27 +0100 +Subject: [PATCH 25/33] MIPS: ath79: support setting up clock via DT on all SoC + types + +Use the same functions as the legacy code + +Signed-off-by: Felix Fietkau +Signed-off-by: John Crispin +--- + arch/mips/ath79/clock.c | 39 ++++++++++++++++++++++----------------- + 1 file changed, 22 insertions(+), 17 deletions(-) + +--- a/arch/mips/ath79/clock.c ++++ b/arch/mips/ath79/clock.c +@@ -669,16 +669,6 @@ ath79_get_sys_clk_rate(const char *id) + #ifdef CONFIG_OF + static void __init ath79_clocks_init_dt(struct device_node *np) + { +- of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data); +-} +- +-CLK_OF_DECLARE(ar7100, "qca,ar7100-pll", ath79_clocks_init_dt); +-CLK_OF_DECLARE(ar7240, "qca,ar7240-pll", ath79_clocks_init_dt); +-CLK_OF_DECLARE(ar9340, "qca,ar9340-pll", ath79_clocks_init_dt); +-CLK_OF_DECLARE(ar9550, "qca,qca9550-pll", ath79_clocks_init_dt); +- +-static void __init ath79_clocks_init_dt_ng(struct device_node *np) +-{ + struct clk *ref_clk; + void __iomem *pll_base; + +@@ -692,14 +682,21 @@ static void __init ath79_clocks_init_dt_ + goto err_clk; + } + +- if (of_device_is_compatible(np, "qca,ar9130-pll")) ++ if (of_device_is_compatible(np, "qca,ar7100-pll")) ++ ar71xx_clocks_init(pll_base); ++ else if (of_device_is_compatible(np, "qca,ar7240-pll") || ++ of_device_is_compatible(np, "qca,ar9130-pll")) + ar724x_clocks_init(pll_base); + else if (of_device_is_compatible(np, "qca,ar9330-pll")) + ar933x_clocks_init(pll_base); +- else { +- pr_err("%pOF: could not find any appropriate clk_init()\n", np); +- goto err_iounmap; +- } ++ else if (of_device_is_compatible(np, "qca,ar9340-pll")) ++ ar934x_clocks_init(pll_base); ++ else if (of_device_is_compatible(np, "qca,qca9530-pll")) ++ qca953x_clocks_init(pll_base); ++ else if (of_device_is_compatible(np, "qca,qca9550-pll")) ++ qca955x_clocks_init(pll_base); ++ else if (of_device_is_compatible(np, "qca,qca9560-pll")) ++ qca956x_clocks_init(pll_base); + + if (of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data)) { + pr_err("%pOF: could not register clk provider\n", np); +@@ -714,6 +711,14 @@ err_iounmap: + err_clk: + clk_put(ref_clk); + } +-CLK_OF_DECLARE(ar9130_clk, "qca,ar9130-pll", ath79_clocks_init_dt_ng); +-CLK_OF_DECLARE(ar9330_clk, "qca,ar9330-pll", ath79_clocks_init_dt_ng); ++ ++CLK_OF_DECLARE(ar7100_clk, "qca,ar7100-pll", ath79_clocks_init_dt); ++CLK_OF_DECLARE(ar7240_clk, "qca,ar7240-pll", ath79_clocks_init_dt); ++CLK_OF_DECLARE(ar9130_clk, "qca,ar9130-pll", ath79_clocks_init_dt); ++CLK_OF_DECLARE(ar9330_clk, "qca,ar9330-pll", ath79_clocks_init_dt); ++CLK_OF_DECLARE(ar9340_clk, "qca,ar9340-pll", ath79_clocks_init_dt); ++CLK_OF_DECLARE(ar9530_clk, "qca,qca9530-pll", ath79_clocks_init_dt); ++CLK_OF_DECLARE(ar9550_clk, "qca,qca9550-pll", ath79_clocks_init_dt); ++CLK_OF_DECLARE(ar9560_clk, "qca,qca9560-pll", ath79_clocks_init_dt); ++ + #endif diff --git a/target/linux/ath79/patches-4.19/0026-MIPS-ath79-export-switch-MDIO-reference-clock.patch b/target/linux/ath79/patches-4.19/0026-MIPS-ath79-export-switch-MDIO-reference-clock.patch new file mode 100644 index 000000000..27adb56f5 --- /dev/null +++ b/target/linux/ath79/patches-4.19/0026-MIPS-ath79-export-switch-MDIO-reference-clock.patch @@ -0,0 +1,59 @@ +From 78538d673801902108797f2c813e70cfbce280c9 Mon Sep 17 00:00:00 2001 +From: Felix Fietkau +Date: Tue, 6 Mar 2018 13:27:28 +0100 +Subject: [PATCH 26/33] MIPS: ath79: export switch MDIO reference clock + +On AR934x, the MDIO reference clock can be configured to a fixed 100 MHz +clock. If that feature is not used, it defaults to the main reference +clock, like on all other SoC. + +Signed-off-by: Felix Fietkau +Signed-off-by: John Crispin +--- + arch/mips/ath79/clock.c | 8 ++++++++ + include/dt-bindings/clock/ath79-clk.h | 3 ++- + 2 files changed, 10 insertions(+), 1 deletion(-) + +--- a/arch/mips/ath79/clock.c ++++ b/arch/mips/ath79/clock.c +@@ -42,6 +42,7 @@ static const char * const clk_names[ATH7 + [ATH79_CLK_DDR] = "ddr", + [ATH79_CLK_AHB] = "ahb", + [ATH79_CLK_REF] = "ref", ++ [ATH79_CLK_MDIO] = "mdio", + }; + + static const char * __init ath79_clk_name(int type) +@@ -342,6 +343,10 @@ static void __init ar934x_clocks_init(vo + ath79_set_clk(ATH79_CLK_DDR, ddr_rate); + ath79_set_clk(ATH79_CLK_AHB, ahb_rate); + ++ clk_ctrl = __raw_readl(pll_base + AR934X_PLL_SWITCH_CLOCK_CONTROL_REG); ++ if (clk_ctrl & AR934X_PLL_SWITCH_CLOCK_CONTROL_MDIO_CLK_SEL) ++ ath79_set_clk(ATH79_CLK_MDIO, 100 * 1000 * 1000); ++ + iounmap(dpll_base); + } + +@@ -698,6 +703,9 @@ static void __init ath79_clocks_init_dt( + else if (of_device_is_compatible(np, "qca,qca9560-pll")) + qca956x_clocks_init(pll_base); + ++ if (!clks[ATH79_CLK_MDIO]) ++ clks[ATH79_CLK_MDIO] = clks[ATH79_CLK_REF]; ++ + if (of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data)) { + pr_err("%pOF: could not register clk provider\n", np); + goto err_iounmap; +--- a/include/dt-bindings/clock/ath79-clk.h ++++ b/include/dt-bindings/clock/ath79-clk.h +@@ -14,7 +14,8 @@ + #define ATH79_CLK_DDR 1 + #define ATH79_CLK_AHB 2 + #define ATH79_CLK_REF 3 ++#define ATH79_CLK_MDIO 4 + +-#define ATH79_CLK_END 4 ++#define ATH79_CLK_END 5 + + #endif /* __DT_BINDINGS_ATH79_CLK_H */ diff --git a/target/linux/ath79/patches-4.19/0027-MIPS-ath79-drop-legacy-IRQ-code.patch b/target/linux/ath79/patches-4.19/0027-MIPS-ath79-drop-legacy-IRQ-code.patch new file mode 100644 index 000000000..79f003d2e --- /dev/null +++ b/target/linux/ath79/patches-4.19/0027-MIPS-ath79-drop-legacy-IRQ-code.patch @@ -0,0 +1,233 @@ +From 3765b1f79593a0a9098ed15e48074c95403a53ee Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Sat, 23 Jun 2018 15:05:08 +0200 +Subject: [PATCH 27/33] MIPS: ath79: drop legacy IRQ code + +With the target now being fully OF based, we can drop the legacy IRQ code. +All IRQs are now handled via the new irqchip drivers. + +Signed-off-by: John Crispin +--- + arch/mips/ath79/Makefile | 2 +- + arch/mips/ath79/irq.c | 169 ------------------------------- + arch/mips/ath79/setup.c | 6 ++ + arch/mips/include/asm/mach-ath79/ath79.h | 4 - + 4 files changed, 7 insertions(+), 174 deletions(-) + delete mode 100644 arch/mips/ath79/irq.c + +--- a/arch/mips/ath79/Makefile ++++ b/arch/mips/ath79/Makefile +@@ -8,7 +8,7 @@ + # under the terms of the GNU General Public License version 2 as published + # by the Free Software Foundation. + +-obj-y := prom.o setup.o irq.o common.o clock.o ++obj-y := prom.o setup.o common.o clock.o + + obj-$(CONFIG_EARLY_PRINTK) += early_printk.o + obj-$(CONFIG_PCI) += pci.o +--- a/arch/mips/ath79/irq.c ++++ /dev/null +@@ -1,169 +0,0 @@ +-/* +- * Atheros AR71xx/AR724x/AR913x specific interrupt handling +- * +- * Copyright (C) 2010-2011 Jaiganesh Narayanan +- * Copyright (C) 2008-2011 Gabor Juhos +- * Copyright (C) 2008 Imre Kaloz +- * +- * Parts of this file are based on Atheros' 2.6.15/2.6.31 BSP +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of the GNU General Public License version 2 as published +- * by the Free Software Foundation. +- */ +- +-#include +-#include +-#include +-#include +-#include +- +-#include +-#include +- +-#include +-#include +-#include "common.h" +-#include "machtypes.h" +- +- +-static void ar934x_ip2_irq_dispatch(struct irq_desc *desc) +-{ +- u32 status; +- +- status = ath79_reset_rr(AR934X_RESET_REG_PCIE_WMAC_INT_STATUS); +- +- if (status & AR934X_PCIE_WMAC_INT_PCIE_ALL) { +- ath79_ddr_wb_flush(3); +- generic_handle_irq(ATH79_IP2_IRQ(0)); +- } else if (status & AR934X_PCIE_WMAC_INT_WMAC_ALL) { +- ath79_ddr_wb_flush(4); +- generic_handle_irq(ATH79_IP2_IRQ(1)); +- } else { +- spurious_interrupt(); +- } +-} +- +-static void ar934x_ip2_irq_init(void) +-{ +- int i; +- +- for (i = ATH79_IP2_IRQ_BASE; +- i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++) +- irq_set_chip_and_handler(i, &dummy_irq_chip, +- handle_level_irq); +- +- irq_set_chained_handler(ATH79_CPU_IRQ(2), ar934x_ip2_irq_dispatch); +-} +- +-static void qca955x_ip2_irq_dispatch(struct irq_desc *desc) +-{ +- u32 status; +- +- status = ath79_reset_rr(QCA955X_RESET_REG_EXT_INT_STATUS); +- status &= QCA955X_EXT_INT_PCIE_RC1_ALL | QCA955X_EXT_INT_WMAC_ALL; +- +- if (status == 0) { +- spurious_interrupt(); +- return; +- } +- +- if (status & QCA955X_EXT_INT_PCIE_RC1_ALL) { +- /* TODO: flush DDR? */ +- generic_handle_irq(ATH79_IP2_IRQ(0)); +- } +- +- if (status & QCA955X_EXT_INT_WMAC_ALL) { +- /* TODO: flush DDR? */ +- generic_handle_irq(ATH79_IP2_IRQ(1)); +- } +-} +- +-static void qca955x_ip3_irq_dispatch(struct irq_desc *desc) +-{ +- u32 status; +- +- status = ath79_reset_rr(QCA955X_RESET_REG_EXT_INT_STATUS); +- status &= QCA955X_EXT_INT_PCIE_RC2_ALL | +- QCA955X_EXT_INT_USB1 | +- QCA955X_EXT_INT_USB2; +- +- if (status == 0) { +- spurious_interrupt(); +- return; +- } +- +- if (status & QCA955X_EXT_INT_USB1) { +- /* TODO: flush DDR? */ +- generic_handle_irq(ATH79_IP3_IRQ(0)); +- } +- +- if (status & QCA955X_EXT_INT_USB2) { +- /* TODO: flush DDR? */ +- generic_handle_irq(ATH79_IP3_IRQ(1)); +- } +- +- if (status & QCA955X_EXT_INT_PCIE_RC2_ALL) { +- /* TODO: flush DDR? */ +- generic_handle_irq(ATH79_IP3_IRQ(2)); +- } +-} +- +-static void qca955x_irq_init(void) +-{ +- int i; +- +- for (i = ATH79_IP2_IRQ_BASE; +- i < ATH79_IP2_IRQ_BASE + ATH79_IP2_IRQ_COUNT; i++) +- irq_set_chip_and_handler(i, &dummy_irq_chip, +- handle_level_irq); +- +- irq_set_chained_handler(ATH79_CPU_IRQ(2), qca955x_ip2_irq_dispatch); +- +- for (i = ATH79_IP3_IRQ_BASE; +- i < ATH79_IP3_IRQ_BASE + ATH79_IP3_IRQ_COUNT; i++) +- irq_set_chip_and_handler(i, &dummy_irq_chip, +- handle_level_irq); +- +- irq_set_chained_handler(ATH79_CPU_IRQ(3), qca955x_ip3_irq_dispatch); +-} +- +-void __init arch_init_irq(void) +-{ +- unsigned irq_wb_chan2 = -1; +- unsigned irq_wb_chan3 = -1; +- bool misc_is_ar71xx; +- +- if (mips_machtype == ATH79_MACH_GENERIC_OF) { +- irqchip_init(); +- return; +- } +- +- if (soc_is_ar71xx() || soc_is_ar724x() || +- soc_is_ar913x() || soc_is_ar933x()) { +- irq_wb_chan2 = 3; +- irq_wb_chan3 = 2; +- } else if (soc_is_ar934x()) { +- irq_wb_chan3 = 2; +- } +- +- ath79_cpu_irq_init(irq_wb_chan2, irq_wb_chan3); +- +- if (soc_is_ar71xx() || soc_is_ar913x()) +- misc_is_ar71xx = true; +- else if (soc_is_ar724x() || +- soc_is_ar933x() || +- soc_is_ar934x() || +- soc_is_qca955x()) +- misc_is_ar71xx = false; +- else +- BUG(); +- ath79_misc_irq_init( +- ath79_reset_base + AR71XX_RESET_REG_MISC_INT_STATUS, +- ATH79_CPU_IRQ(6), ATH79_MISC_IRQ_BASE, misc_is_ar71xx); +- +- if (soc_is_ar934x()) +- ar934x_ip2_irq_init(); +- else if (soc_is_qca955x()) +- qca955x_irq_init(); +-} +--- a/arch/mips/ath79/setup.c ++++ b/arch/mips/ath79/setup.c +@@ -19,6 +19,7 @@ + #include + #include + #include ++#include + + #include + #include +@@ -311,6 +312,11 @@ void __init plat_time_init(void) + mips_hpt_frequency = cpu_clk_rate / 2; + } + ++void __init arch_init_irq(void) ++{ ++ irqchip_init(); ++} ++ + static int __init ath79_setup(void) + { + if (mips_machtype == ATH79_MACH_GENERIC_OF) +--- a/arch/mips/include/asm/mach-ath79/ath79.h ++++ b/arch/mips/include/asm/mach-ath79/ath79.h +@@ -178,8 +178,4 @@ static inline u32 ath79_reset_rr(unsigne + void ath79_device_reset_set(u32 mask); + void ath79_device_reset_clear(u32 mask); + +-void ath79_cpu_irq_init(unsigned irq_wb_chan2, unsigned irq_wb_chan3); +-void ath79_misc_irq_init(void __iomem *regs, int irq, +- int irq_base, bool is_ar71xx); +- + #endif /* __ASM_MACH_ATH79_H */ diff --git a/target/linux/ath79/patches-4.19/0028-MIPS-ath79-drop-machfiles.patch b/target/linux/ath79/patches-4.19/0028-MIPS-ath79-drop-machfiles.patch new file mode 100644 index 000000000..0515b206b --- /dev/null +++ b/target/linux/ath79/patches-4.19/0028-MIPS-ath79-drop-machfiles.patch @@ -0,0 +1,1048 @@ +From badf28957b6dc400dff27bd23ba2ae75d9514be5 Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Sat, 23 Jun 2018 15:04:09 +0200 +Subject: [PATCH 28/33] MIPS: ath79: drop machfiles + +With the target now being fully OF based, we can drop the legacy mach +files. Boards can now boot fully of devicetree files. + +Signed-off-by: John Crispin +--- + arch/mips/Kconfig | 1 - + arch/mips/ath79/Kconfig | 73 ------------------- + arch/mips/ath79/Makefile | 10 --- + arch/mips/ath79/clock.c | 1 - + arch/mips/ath79/mach-ap121.c | 92 ------------------------ + arch/mips/ath79/mach-ap136.c | 156 ----------------------------------------- + arch/mips/ath79/mach-ap81.c | 100 -------------------------- + arch/mips/ath79/mach-db120.c | 136 ----------------------------------- + arch/mips/ath79/mach-pb44.c | 128 --------------------------------- + arch/mips/ath79/mach-ubnt-xm.c | 126 --------------------------------- + arch/mips/ath79/machtypes.h | 28 -------- + arch/mips/ath79/setup.c | 77 +++----------------- + 12 files changed, 9 insertions(+), 919 deletions(-) + delete mode 100644 arch/mips/ath79/mach-ap121.c + delete mode 100644 arch/mips/ath79/mach-ap136.c + delete mode 100644 arch/mips/ath79/mach-ap81.c + delete mode 100644 arch/mips/ath79/mach-db120.c + delete mode 100644 arch/mips/ath79/mach-pb44.c + delete mode 100644 arch/mips/ath79/mach-ubnt-xm.c + delete mode 100644 arch/mips/ath79/machtypes.h + +--- a/arch/mips/Kconfig ++++ b/arch/mips/Kconfig +@@ -202,7 +202,6 @@ config ATH79 + select COMMON_CLK + select CLKDEV_LOOKUP + select IRQ_MIPS_CPU +- select MIPS_MACHINE + select SYS_HAS_CPU_MIPS32_R2 + select SYS_HAS_EARLY_PRINTK + select SYS_SUPPORTS_32BIT_KERNEL +--- a/arch/mips/ath79/Kconfig ++++ b/arch/mips/ath79/Kconfig +@@ -1,79 +1,6 @@ + # SPDX-License-Identifier: GPL-2.0 + if ATH79 + +-menu "Atheros AR71XX/AR724X/AR913X machine selection" +- +-config ATH79_MACH_AP121 +- bool "Atheros AP121 reference board" +- select SOC_AR933X +- select ATH79_DEV_GPIO_BUTTONS +- select ATH79_DEV_LEDS_GPIO +- select ATH79_DEV_SPI +- select ATH79_DEV_USB +- select ATH79_DEV_WMAC +- help +- Say 'Y' here if you want your kernel to support the +- Atheros AP121 reference board. +- +-config ATH79_MACH_AP136 +- bool "Atheros AP136 reference board" +- select SOC_QCA955X +- select ATH79_DEV_GPIO_BUTTONS +- select ATH79_DEV_LEDS_GPIO +- select ATH79_DEV_SPI +- select ATH79_DEV_USB +- select ATH79_DEV_WMAC +- help +- Say 'Y' here if you want your kernel to support the +- Atheros AP136 reference board. +- +-config ATH79_MACH_AP81 +- bool "Atheros AP81 reference board" +- select SOC_AR913X +- select ATH79_DEV_GPIO_BUTTONS +- select ATH79_DEV_LEDS_GPIO +- select ATH79_DEV_SPI +- select ATH79_DEV_USB +- select ATH79_DEV_WMAC +- help +- Say 'Y' here if you want your kernel to support the +- Atheros AP81 reference board. +- +-config ATH79_MACH_DB120 +- bool "Atheros DB120 reference board" +- select SOC_AR934X +- select ATH79_DEV_GPIO_BUTTONS +- select ATH79_DEV_LEDS_GPIO +- select ATH79_DEV_SPI +- select ATH79_DEV_USB +- select ATH79_DEV_WMAC +- help +- Say 'Y' here if you want your kernel to support the +- Atheros DB120 reference board. +- +-config ATH79_MACH_PB44 +- bool "Atheros PB44 reference board" +- select SOC_AR71XX +- select ATH79_DEV_GPIO_BUTTONS +- select ATH79_DEV_LEDS_GPIO +- select ATH79_DEV_SPI +- select ATH79_DEV_USB +- help +- Say 'Y' here if you want your kernel to support the +- Atheros PB44 reference board. +- +-config ATH79_MACH_UBNT_XM +- bool "Ubiquiti Networks XM (rev 1.0) board" +- select SOC_AR724X +- select ATH79_DEV_GPIO_BUTTONS +- select ATH79_DEV_LEDS_GPIO +- select ATH79_DEV_SPI +- help +- Say 'Y' here if you want your kernel to support the +- Ubiquiti Networks XM (rev 1.0) board. +- +-endmenu +- + config SOC_AR71XX + select HW_HAS_PCI + def_bool n +--- a/arch/mips/ath79/Makefile ++++ b/arch/mips/ath79/Makefile +@@ -22,13 +22,3 @@ obj-$(CONFIG_ATH79_DEV_LEDS_GPIO) += dev + obj-$(CONFIG_ATH79_DEV_SPI) += dev-spi.o + obj-$(CONFIG_ATH79_DEV_USB) += dev-usb.o + obj-$(CONFIG_ATH79_DEV_WMAC) += dev-wmac.o +- +-# +-# Machines +-# +-obj-$(CONFIG_ATH79_MACH_AP121) += mach-ap121.o +-obj-$(CONFIG_ATH79_MACH_AP136) += mach-ap136.o +-obj-$(CONFIG_ATH79_MACH_AP81) += mach-ap81.o +-obj-$(CONFIG_ATH79_MACH_DB120) += mach-db120.o +-obj-$(CONFIG_ATH79_MACH_PB44) += mach-pb44.o +-obj-$(CONFIG_ATH79_MACH_UBNT_XM) += mach-ubnt-xm.o +--- a/arch/mips/ath79/clock.c ++++ b/arch/mips/ath79/clock.c +@@ -26,7 +26,6 @@ + #include + #include + #include "common.h" +-#include "machtypes.h" + + #define AR71XX_BASE_FREQ 40000000 + #define AR724X_BASE_FREQ 40000000 +--- a/arch/mips/ath79/mach-ap121.c ++++ /dev/null +@@ -1,92 +0,0 @@ +-/* +- * Atheros AP121 board support +- * +- * Copyright (C) 2011 Gabor Juhos +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of the GNU General Public License version 2 as published +- * by the Free Software Foundation. +- */ +- +-#include "machtypes.h" +-#include "dev-gpio-buttons.h" +-#include "dev-leds-gpio.h" +-#include "dev-spi.h" +-#include "dev-usb.h" +-#include "dev-wmac.h" +- +-#define AP121_GPIO_LED_WLAN 0 +-#define AP121_GPIO_LED_USB 1 +- +-#define AP121_GPIO_BTN_JUMPSTART 11 +-#define AP121_GPIO_BTN_RESET 12 +- +-#define AP121_KEYS_POLL_INTERVAL 20 /* msecs */ +-#define AP121_KEYS_DEBOUNCE_INTERVAL (3 * AP121_KEYS_POLL_INTERVAL) +- +-#define AP121_CAL_DATA_ADDR 0x1fff1000 +- +-static struct gpio_led ap121_leds_gpio[] __initdata = { +- { +- .name = "ap121:green:usb", +- .gpio = AP121_GPIO_LED_USB, +- .active_low = 0, +- }, +- { +- .name = "ap121:green:wlan", +- .gpio = AP121_GPIO_LED_WLAN, +- .active_low = 0, +- }, +-}; +- +-static struct gpio_keys_button ap121_gpio_keys[] __initdata = { +- { +- .desc = "jumpstart button", +- .type = EV_KEY, +- .code = KEY_WPS_BUTTON, +- .debounce_interval = AP121_KEYS_DEBOUNCE_INTERVAL, +- .gpio = AP121_GPIO_BTN_JUMPSTART, +- .active_low = 1, +- }, +- { +- .desc = "reset button", +- .type = EV_KEY, +- .code = KEY_RESTART, +- .debounce_interval = AP121_KEYS_DEBOUNCE_INTERVAL, +- .gpio = AP121_GPIO_BTN_RESET, +- .active_low = 1, +- } +-}; +- +-static struct spi_board_info ap121_spi_info[] = { +- { +- .bus_num = 0, +- .chip_select = 0, +- .max_speed_hz = 25000000, +- .modalias = "mx25l1606e", +- } +-}; +- +-static struct ath79_spi_platform_data ap121_spi_data = { +- .bus_num = 0, +- .num_chipselect = 1, +-}; +- +-static void __init ap121_setup(void) +-{ +- u8 *cal_data = (u8 *) KSEG1ADDR(AP121_CAL_DATA_ADDR); +- +- ath79_register_leds_gpio(-1, ARRAY_SIZE(ap121_leds_gpio), +- ap121_leds_gpio); +- ath79_register_gpio_keys_polled(-1, AP121_KEYS_POLL_INTERVAL, +- ARRAY_SIZE(ap121_gpio_keys), +- ap121_gpio_keys); +- +- ath79_register_spi(&ap121_spi_data, ap121_spi_info, +- ARRAY_SIZE(ap121_spi_info)); +- ath79_register_usb(); +- ath79_register_wmac(cal_data); +-} +- +-MIPS_MACHINE(ATH79_MACH_AP121, "AP121", "Atheros AP121 reference board", +- ap121_setup); +--- a/arch/mips/ath79/mach-ap136.c ++++ /dev/null +@@ -1,156 +0,0 @@ +-/* +- * Qualcomm Atheros AP136 reference board support +- * +- * Copyright (c) 2012 Qualcomm Atheros +- * Copyright (c) 2012-2013 Gabor Juhos +- * +- * Permission to use, copy, modify, and/or distribute this software for any +- * purpose with or without fee is hereby granted, provided that the above +- * copyright notice and this permission notice appear in all copies. +- * +- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES +- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF +- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR +- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN +- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF +- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. +- * +- */ +- +-#include +-#include +- +-#include "machtypes.h" +-#include "dev-gpio-buttons.h" +-#include "dev-leds-gpio.h" +-#include "dev-spi.h" +-#include "dev-usb.h" +-#include "dev-wmac.h" +-#include "pci.h" +- +-#define AP136_GPIO_LED_STATUS_RED 14 +-#define AP136_GPIO_LED_STATUS_GREEN 19 +-#define AP136_GPIO_LED_USB 4 +-#define AP136_GPIO_LED_WLAN_2G 13 +-#define AP136_GPIO_LED_WLAN_5G 12 +-#define AP136_GPIO_LED_WPS_RED 15 +-#define AP136_GPIO_LED_WPS_GREEN 20 +- +-#define AP136_GPIO_BTN_WPS 16 +-#define AP136_GPIO_BTN_RFKILL 21 +- +-#define AP136_KEYS_POLL_INTERVAL 20 /* msecs */ +-#define AP136_KEYS_DEBOUNCE_INTERVAL (3 * AP136_KEYS_POLL_INTERVAL) +- +-#define AP136_WMAC_CALDATA_OFFSET 0x1000 +-#define AP136_PCIE_CALDATA_OFFSET 0x5000 +- +-static struct gpio_led ap136_leds_gpio[] __initdata = { +- { +- .name = "qca:green:status", +- .gpio = AP136_GPIO_LED_STATUS_GREEN, +- .active_low = 1, +- }, +- { +- .name = "qca:red:status", +- .gpio = AP136_GPIO_LED_STATUS_RED, +- .active_low = 1, +- }, +- { +- .name = "qca:green:wps", +- .gpio = AP136_GPIO_LED_WPS_GREEN, +- .active_low = 1, +- }, +- { +- .name = "qca:red:wps", +- .gpio = AP136_GPIO_LED_WPS_RED, +- .active_low = 1, +- }, +- { +- .name = "qca:red:wlan-2g", +- .gpio = AP136_GPIO_LED_WLAN_2G, +- .active_low = 1, +- }, +- { +- .name = "qca:red:usb", +- .gpio = AP136_GPIO_LED_USB, +- .active_low = 1, +- } +-}; +- +-static struct gpio_keys_button ap136_gpio_keys[] __initdata = { +- { +- .desc = "WPS button", +- .type = EV_KEY, +- .code = KEY_WPS_BUTTON, +- .debounce_interval = AP136_KEYS_DEBOUNCE_INTERVAL, +- .gpio = AP136_GPIO_BTN_WPS, +- .active_low = 1, +- }, +- { +- .desc = "RFKILL button", +- .type = EV_KEY, +- .code = KEY_RFKILL, +- .debounce_interval = AP136_KEYS_DEBOUNCE_INTERVAL, +- .gpio = AP136_GPIO_BTN_RFKILL, +- .active_low = 1, +- }, +-}; +- +-static struct spi_board_info ap136_spi_info[] = { +- { +- .bus_num = 0, +- .chip_select = 0, +- .max_speed_hz = 25000000, +- .modalias = "mx25l6405d", +- } +-}; +- +-static struct ath79_spi_platform_data ap136_spi_data = { +- .bus_num = 0, +- .num_chipselect = 1, +-}; +- +-#ifdef CONFIG_PCI +-static struct ath9k_platform_data ap136_ath9k_data; +- +-static int ap136_pci_plat_dev_init(struct pci_dev *dev) +-{ +- if (dev->bus->number == 1 && (PCI_SLOT(dev->devfn)) == 0) +- dev->dev.platform_data = &ap136_ath9k_data; +- +- return 0; +-} +- +-static void __init ap136_pci_init(u8 *eeprom) +-{ +- memcpy(ap136_ath9k_data.eeprom_data, eeprom, +- sizeof(ap136_ath9k_data.eeprom_data)); +- +- ath79_pci_set_plat_dev_init(ap136_pci_plat_dev_init); +- ath79_register_pci(); +-} +-#else +-static inline void ap136_pci_init(u8 *eeprom) {} +-#endif /* CONFIG_PCI */ +- +-static void __init ap136_setup(void) +-{ +- u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); +- +- ath79_register_leds_gpio(-1, ARRAY_SIZE(ap136_leds_gpio), +- ap136_leds_gpio); +- ath79_register_gpio_keys_polled(-1, AP136_KEYS_POLL_INTERVAL, +- ARRAY_SIZE(ap136_gpio_keys), +- ap136_gpio_keys); +- ath79_register_spi(&ap136_spi_data, ap136_spi_info, +- ARRAY_SIZE(ap136_spi_info)); +- ath79_register_usb(); +- ath79_register_wmac(art + AP136_WMAC_CALDATA_OFFSET); +- ap136_pci_init(art + AP136_PCIE_CALDATA_OFFSET); +-} +- +-MIPS_MACHINE(ATH79_MACH_AP136_010, "AP136-010", +- "Atheros AP136-010 reference board", +- ap136_setup); +--- a/arch/mips/ath79/mach-ap81.c ++++ /dev/null +@@ -1,100 +0,0 @@ +-/* +- * Atheros AP81 board support +- * +- * Copyright (C) 2009-2010 Gabor Juhos +- * Copyright (C) 2009 Imre Kaloz +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of the GNU General Public License version 2 as published +- * by the Free Software Foundation. +- */ +- +-#include "machtypes.h" +-#include "dev-wmac.h" +-#include "dev-gpio-buttons.h" +-#include "dev-leds-gpio.h" +-#include "dev-spi.h" +-#include "dev-usb.h" +- +-#define AP81_GPIO_LED_STATUS 1 +-#define AP81_GPIO_LED_AOSS 3 +-#define AP81_GPIO_LED_WLAN 6 +-#define AP81_GPIO_LED_POWER 14 +- +-#define AP81_GPIO_BTN_SW4 12 +-#define AP81_GPIO_BTN_SW1 21 +- +-#define AP81_KEYS_POLL_INTERVAL 20 /* msecs */ +-#define AP81_KEYS_DEBOUNCE_INTERVAL (3 * AP81_KEYS_POLL_INTERVAL) +- +-#define AP81_CAL_DATA_ADDR 0x1fff1000 +- +-static struct gpio_led ap81_leds_gpio[] __initdata = { +- { +- .name = "ap81:green:status", +- .gpio = AP81_GPIO_LED_STATUS, +- .active_low = 1, +- }, { +- .name = "ap81:amber:aoss", +- .gpio = AP81_GPIO_LED_AOSS, +- .active_low = 1, +- }, { +- .name = "ap81:green:wlan", +- .gpio = AP81_GPIO_LED_WLAN, +- .active_low = 1, +- }, { +- .name = "ap81:green:power", +- .gpio = AP81_GPIO_LED_POWER, +- .active_low = 1, +- } +-}; +- +-static struct gpio_keys_button ap81_gpio_keys[] __initdata = { +- { +- .desc = "sw1", +- .type = EV_KEY, +- .code = BTN_0, +- .debounce_interval = AP81_KEYS_DEBOUNCE_INTERVAL, +- .gpio = AP81_GPIO_BTN_SW1, +- .active_low = 1, +- } , { +- .desc = "sw4", +- .type = EV_KEY, +- .code = BTN_1, +- .debounce_interval = AP81_KEYS_DEBOUNCE_INTERVAL, +- .gpio = AP81_GPIO_BTN_SW4, +- .active_low = 1, +- } +-}; +- +-static struct spi_board_info ap81_spi_info[] = { +- { +- .bus_num = 0, +- .chip_select = 0, +- .max_speed_hz = 25000000, +- .modalias = "m25p64", +- } +-}; +- +-static struct ath79_spi_platform_data ap81_spi_data = { +- .bus_num = 0, +- .num_chipselect = 1, +-}; +- +-static void __init ap81_setup(void) +-{ +- u8 *cal_data = (u8 *) KSEG1ADDR(AP81_CAL_DATA_ADDR); +- +- ath79_register_leds_gpio(-1, ARRAY_SIZE(ap81_leds_gpio), +- ap81_leds_gpio); +- ath79_register_gpio_keys_polled(-1, AP81_KEYS_POLL_INTERVAL, +- ARRAY_SIZE(ap81_gpio_keys), +- ap81_gpio_keys); +- ath79_register_spi(&ap81_spi_data, ap81_spi_info, +- ARRAY_SIZE(ap81_spi_info)); +- ath79_register_wmac(cal_data); +- ath79_register_usb(); +-} +- +-MIPS_MACHINE(ATH79_MACH_AP81, "AP81", "Atheros AP81 reference board", +- ap81_setup); +--- a/arch/mips/ath79/mach-db120.c ++++ /dev/null +@@ -1,136 +0,0 @@ +-/* +- * Atheros DB120 reference board support +- * +- * Copyright (c) 2011 Qualcomm Atheros +- * Copyright (c) 2011 Gabor Juhos +- * +- * Permission to use, copy, modify, and/or distribute this software for any +- * purpose with or without fee is hereby granted, provided that the above +- * copyright notice and this permission notice appear in all copies. +- * +- * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES +- * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF +- * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR +- * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES +- * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN +- * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF +- * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. +- * +- */ +- +-#include +-#include +- +-#include "machtypes.h" +-#include "dev-gpio-buttons.h" +-#include "dev-leds-gpio.h" +-#include "dev-spi.h" +-#include "dev-usb.h" +-#include "dev-wmac.h" +-#include "pci.h" +- +-#define DB120_GPIO_LED_WLAN_5G 12 +-#define DB120_GPIO_LED_WLAN_2G 13 +-#define DB120_GPIO_LED_STATUS 14 +-#define DB120_GPIO_LED_WPS 15 +- +-#define DB120_GPIO_BTN_WPS 16 +- +-#define DB120_KEYS_POLL_INTERVAL 20 /* msecs */ +-#define DB120_KEYS_DEBOUNCE_INTERVAL (3 * DB120_KEYS_POLL_INTERVAL) +- +-#define DB120_WMAC_CALDATA_OFFSET 0x1000 +-#define DB120_PCIE_CALDATA_OFFSET 0x5000 +- +-static struct gpio_led db120_leds_gpio[] __initdata = { +- { +- .name = "db120:green:status", +- .gpio = DB120_GPIO_LED_STATUS, +- .active_low = 1, +- }, +- { +- .name = "db120:green:wps", +- .gpio = DB120_GPIO_LED_WPS, +- .active_low = 1, +- }, +- { +- .name = "db120:green:wlan-5g", +- .gpio = DB120_GPIO_LED_WLAN_5G, +- .active_low = 1, +- }, +- { +- .name = "db120:green:wlan-2g", +- .gpio = DB120_GPIO_LED_WLAN_2G, +- .active_low = 1, +- }, +-}; +- +-static struct gpio_keys_button db120_gpio_keys[] __initdata = { +- { +- .desc = "WPS button", +- .type = EV_KEY, +- .code = KEY_WPS_BUTTON, +- .debounce_interval = DB120_KEYS_DEBOUNCE_INTERVAL, +- .gpio = DB120_GPIO_BTN_WPS, +- .active_low = 1, +- }, +-}; +- +-static struct spi_board_info db120_spi_info[] = { +- { +- .bus_num = 0, +- .chip_select = 0, +- .max_speed_hz = 25000000, +- .modalias = "s25sl064a", +- } +-}; +- +-static struct ath79_spi_platform_data db120_spi_data = { +- .bus_num = 0, +- .num_chipselect = 1, +-}; +- +-#ifdef CONFIG_PCI +-static struct ath9k_platform_data db120_ath9k_data; +- +-static int db120_pci_plat_dev_init(struct pci_dev *dev) +-{ +- switch (PCI_SLOT(dev->devfn)) { +- case 0: +- dev->dev.platform_data = &db120_ath9k_data; +- break; +- } +- +- return 0; +-} +- +-static void __init db120_pci_init(u8 *eeprom) +-{ +- memcpy(db120_ath9k_data.eeprom_data, eeprom, +- sizeof(db120_ath9k_data.eeprom_data)); +- +- ath79_pci_set_plat_dev_init(db120_pci_plat_dev_init); +- ath79_register_pci(); +-} +-#else +-static inline void db120_pci_init(u8 *eeprom) {} +-#endif /* CONFIG_PCI */ +- +-static void __init db120_setup(void) +-{ +- u8 *art = (u8 *) KSEG1ADDR(0x1fff0000); +- +- ath79_register_leds_gpio(-1, ARRAY_SIZE(db120_leds_gpio), +- db120_leds_gpio); +- ath79_register_gpio_keys_polled(-1, DB120_KEYS_POLL_INTERVAL, +- ARRAY_SIZE(db120_gpio_keys), +- db120_gpio_keys); +- ath79_register_spi(&db120_spi_data, db120_spi_info, +- ARRAY_SIZE(db120_spi_info)); +- ath79_register_usb(); +- ath79_register_wmac(art + DB120_WMAC_CALDATA_OFFSET); +- db120_pci_init(art + DB120_PCIE_CALDATA_OFFSET); +-} +- +-MIPS_MACHINE(ATH79_MACH_DB120, "DB120", "Atheros DB120 reference board", +- db120_setup); +--- a/arch/mips/ath79/mach-pb44.c ++++ /dev/null +@@ -1,128 +0,0 @@ +-/* +- * Atheros PB44 reference board support +- * +- * Copyright (C) 2009-2010 Gabor Juhos +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of the GNU General Public License version 2 as published +- * by the Free Software Foundation. +- */ +- +-#include +-#include +-#include +-#include +-#include +- +-#include "machtypes.h" +-#include "dev-gpio-buttons.h" +-#include "dev-leds-gpio.h" +-#include "dev-spi.h" +-#include "dev-usb.h" +-#include "pci.h" +- +-#define PB44_GPIO_I2C_SCL 0 +-#define PB44_GPIO_I2C_SDA 1 +- +-#define PB44_GPIO_EXP_BASE 16 +-#define PB44_GPIO_SW_RESET (PB44_GPIO_EXP_BASE + 6) +-#define PB44_GPIO_SW_JUMP (PB44_GPIO_EXP_BASE + 8) +-#define PB44_GPIO_LED_JUMP1 (PB44_GPIO_EXP_BASE + 9) +-#define PB44_GPIO_LED_JUMP2 (PB44_GPIO_EXP_BASE + 10) +- +-#define PB44_KEYS_POLL_INTERVAL 20 /* msecs */ +-#define PB44_KEYS_DEBOUNCE_INTERVAL (3 * PB44_KEYS_POLL_INTERVAL) +- +-static struct gpiod_lookup_table pb44_i2c_gpiod_table = { +- .dev_id = "i2c-gpio.0", +- .table = { +- GPIO_LOOKUP_IDX("ath79-gpio", PB44_GPIO_I2C_SDA, +- NULL, 0, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN), +- GPIO_LOOKUP_IDX("ath79-gpio", PB44_GPIO_I2C_SCL, +- NULL, 1, GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN), +- }, +-}; +- +-static struct platform_device pb44_i2c_gpio_device = { +- .name = "i2c-gpio", +- .id = 0, +- .dev = { +- .platform_data = NULL, +- } +-}; +- +-static struct pcf857x_platform_data pb44_pcf857x_data = { +- .gpio_base = PB44_GPIO_EXP_BASE, +-}; +- +-static struct i2c_board_info pb44_i2c_board_info[] __initdata = { +- { +- I2C_BOARD_INFO("pcf8575", 0x20), +- .platform_data = &pb44_pcf857x_data, +- }, +-}; +- +-static struct gpio_led pb44_leds_gpio[] __initdata = { +- { +- .name = "pb44:amber:jump1", +- .gpio = PB44_GPIO_LED_JUMP1, +- .active_low = 1, +- }, { +- .name = "pb44:green:jump2", +- .gpio = PB44_GPIO_LED_JUMP2, +- .active_low = 1, +- }, +-}; +- +-static struct gpio_keys_button pb44_gpio_keys[] __initdata = { +- { +- .desc = "soft_reset", +- .type = EV_KEY, +- .code = KEY_RESTART, +- .debounce_interval = PB44_KEYS_DEBOUNCE_INTERVAL, +- .gpio = PB44_GPIO_SW_RESET, +- .active_low = 1, +- } , { +- .desc = "jumpstart", +- .type = EV_KEY, +- .code = KEY_WPS_BUTTON, +- .debounce_interval = PB44_KEYS_DEBOUNCE_INTERVAL, +- .gpio = PB44_GPIO_SW_JUMP, +- .active_low = 1, +- } +-}; +- +-static struct spi_board_info pb44_spi_info[] = { +- { +- .bus_num = 0, +- .chip_select = 0, +- .max_speed_hz = 25000000, +- .modalias = "m25p64", +- }, +-}; +- +-static struct ath79_spi_platform_data pb44_spi_data = { +- .bus_num = 0, +- .num_chipselect = 1, +-}; +- +-static void __init pb44_init(void) +-{ +- gpiod_add_lookup_table(&pb44_i2c_gpiod_table); +- i2c_register_board_info(0, pb44_i2c_board_info, +- ARRAY_SIZE(pb44_i2c_board_info)); +- platform_device_register(&pb44_i2c_gpio_device); +- +- ath79_register_leds_gpio(-1, ARRAY_SIZE(pb44_leds_gpio), +- pb44_leds_gpio); +- ath79_register_gpio_keys_polled(-1, PB44_KEYS_POLL_INTERVAL, +- ARRAY_SIZE(pb44_gpio_keys), +- pb44_gpio_keys); +- ath79_register_spi(&pb44_spi_data, pb44_spi_info, +- ARRAY_SIZE(pb44_spi_info)); +- ath79_register_usb(); +- ath79_register_pci(); +-} +- +-MIPS_MACHINE(ATH79_MACH_PB44, "PB44", "Atheros PB44 reference board", +- pb44_init); +--- a/arch/mips/ath79/mach-ubnt-xm.c ++++ /dev/null +@@ -1,126 +0,0 @@ +-/* +- * Ubiquiti Networks XM (rev 1.0) board support +- * +- * Copyright (C) 2011 René Bolldorf +- * +- * Derived from: mach-pb44.c +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of the GNU General Public License version 2 as published +- * by the Free Software Foundation. +- */ +- +-#include +-#include +-#include +- +-#include +- +-#include "machtypes.h" +-#include "dev-gpio-buttons.h" +-#include "dev-leds-gpio.h" +-#include "dev-spi.h" +-#include "pci.h" +- +-#define UBNT_XM_GPIO_LED_L1 0 +-#define UBNT_XM_GPIO_LED_L2 1 +-#define UBNT_XM_GPIO_LED_L3 11 +-#define UBNT_XM_GPIO_LED_L4 7 +- +-#define UBNT_XM_GPIO_BTN_RESET 12 +- +-#define UBNT_XM_KEYS_POLL_INTERVAL 20 +-#define UBNT_XM_KEYS_DEBOUNCE_INTERVAL (3 * UBNT_XM_KEYS_POLL_INTERVAL) +- +-#define UBNT_XM_EEPROM_ADDR (u8 *) KSEG1ADDR(0x1fff1000) +- +-static struct gpio_led ubnt_xm_leds_gpio[] __initdata = { +- { +- .name = "ubnt-xm:red:link1", +- .gpio = UBNT_XM_GPIO_LED_L1, +- .active_low = 0, +- }, { +- .name = "ubnt-xm:orange:link2", +- .gpio = UBNT_XM_GPIO_LED_L2, +- .active_low = 0, +- }, { +- .name = "ubnt-xm:green:link3", +- .gpio = UBNT_XM_GPIO_LED_L3, +- .active_low = 0, +- }, { +- .name = "ubnt-xm:green:link4", +- .gpio = UBNT_XM_GPIO_LED_L4, +- .active_low = 0, +- }, +-}; +- +-static struct gpio_keys_button ubnt_xm_gpio_keys[] __initdata = { +- { +- .desc = "reset", +- .type = EV_KEY, +- .code = KEY_RESTART, +- .debounce_interval = UBNT_XM_KEYS_DEBOUNCE_INTERVAL, +- .gpio = UBNT_XM_GPIO_BTN_RESET, +- .active_low = 1, +- } +-}; +- +-static struct spi_board_info ubnt_xm_spi_info[] = { +- { +- .bus_num = 0, +- .chip_select = 0, +- .max_speed_hz = 25000000, +- .modalias = "mx25l6405d", +- } +-}; +- +-static struct ath79_spi_platform_data ubnt_xm_spi_data = { +- .bus_num = 0, +- .num_chipselect = 1, +-}; +- +-#ifdef CONFIG_PCI +-static struct ath9k_platform_data ubnt_xm_eeprom_data; +- +-static int ubnt_xm_pci_plat_dev_init(struct pci_dev *dev) +-{ +- switch (PCI_SLOT(dev->devfn)) { +- case 0: +- dev->dev.platform_data = &ubnt_xm_eeprom_data; +- break; +- } +- +- return 0; +-} +- +-static void __init ubnt_xm_pci_init(void) +-{ +- memcpy(ubnt_xm_eeprom_data.eeprom_data, UBNT_XM_EEPROM_ADDR, +- sizeof(ubnt_xm_eeprom_data.eeprom_data)); +- +- ath79_pci_set_plat_dev_init(ubnt_xm_pci_plat_dev_init); +- ath79_register_pci(); +-} +-#else +-static inline void ubnt_xm_pci_init(void) {} +-#endif /* CONFIG_PCI */ +- +-static void __init ubnt_xm_init(void) +-{ +- ath79_register_leds_gpio(-1, ARRAY_SIZE(ubnt_xm_leds_gpio), +- ubnt_xm_leds_gpio); +- +- ath79_register_gpio_keys_polled(-1, UBNT_XM_KEYS_POLL_INTERVAL, +- ARRAY_SIZE(ubnt_xm_gpio_keys), +- ubnt_xm_gpio_keys); +- +- ath79_register_spi(&ubnt_xm_spi_data, ubnt_xm_spi_info, +- ARRAY_SIZE(ubnt_xm_spi_info)); +- +- ubnt_xm_pci_init(); +-} +- +-MIPS_MACHINE(ATH79_MACH_UBNT_XM, +- "UBNT-XM", +- "Ubiquiti Networks XM (rev 1.0) board", +- ubnt_xm_init); +--- a/arch/mips/ath79/machtypes.h ++++ /dev/null +@@ -1,28 +0,0 @@ +-/* +- * Atheros AR71XX/AR724X/AR913X machine type definitions +- * +- * Copyright (C) 2008-2010 Gabor Juhos +- * Copyright (C) 2008 Imre Kaloz +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of the GNU General Public License version 2 as published +- * by the Free Software Foundation. +- */ +- +-#ifndef _ATH79_MACHTYPE_H +-#define _ATH79_MACHTYPE_H +- +-#include +- +-enum ath79_mach_type { +- ATH79_MACH_GENERIC_OF = -1, /* Device tree board */ +- ATH79_MACH_GENERIC = 0, +- ATH79_MACH_AP121, /* Atheros AP121 reference board */ +- ATH79_MACH_AP136_010, /* Atheros AP136-010 reference board */ +- ATH79_MACH_AP81, /* Atheros AP81 reference board */ +- ATH79_MACH_DB120, /* Atheros DB120 reference board */ +- ATH79_MACH_PB44, /* Atheros PB44 reference board */ +- ATH79_MACH_UBNT_XM, /* Ubiquiti Networks XM board rev 1.0 */ +-}; +- +-#endif /* _ATH79_MACHTYPE_H */ +--- a/arch/mips/ath79/setup.c ++++ b/arch/mips/ath79/setup.c +@@ -33,7 +33,6 @@ + #include + #include "common.h" + #include "dev-common.h" +-#include "machtypes.h" + + #define ATH79_SYS_TYPE_LEN 64 + +@@ -236,25 +235,21 @@ void __init plat_mem_setup(void) + else if (fw_passed_dtb) + __dt_setup_arch((void *)KSEG0ADDR(fw_passed_dtb)); + +- if (mips_machtype != ATH79_MACH_GENERIC_OF) { +- ath79_reset_base = ioremap_nocache(AR71XX_RESET_BASE, +- AR71XX_RESET_SIZE); +- ath79_pll_base = ioremap_nocache(AR71XX_PLL_BASE, +- AR71XX_PLL_SIZE); +- ath79_detect_sys_type(); +- ath79_ddr_ctrl_init(); ++ ath79_reset_base = ioremap_nocache(AR71XX_RESET_BASE, ++ AR71XX_RESET_SIZE); ++ ath79_pll_base = ioremap_nocache(AR71XX_PLL_BASE, ++ AR71XX_PLL_SIZE); ++ ath79_detect_sys_type(); ++ ath79_ddr_ctrl_init(); + +- detect_memory_region(0, ATH79_MEM_SIZE_MIN, ATH79_MEM_SIZE_MAX); +- +- /* OF machines should use the reset driver */ +- _machine_restart = ath79_restart; +- } ++ detect_memory_region(0, ATH79_MEM_SIZE_MIN, ATH79_MEM_SIZE_MAX); + ++ _machine_restart = ath79_restart; + _machine_halt = ath79_halt; + pm_power_off = ath79_halt; + } + +-static void __init ath79_of_plat_time_init(void) ++void __init plat_time_init(void) + { + struct device_node *np; + struct clk *clk; +@@ -284,66 +279,12 @@ static void __init ath79_of_plat_time_in + clk_put(clk); + } + +-void __init plat_time_init(void) +-{ +- unsigned long cpu_clk_rate; +- unsigned long ahb_clk_rate; +- unsigned long ddr_clk_rate; +- unsigned long ref_clk_rate; +- +- if (IS_ENABLED(CONFIG_OF) && mips_machtype == ATH79_MACH_GENERIC_OF) { +- ath79_of_plat_time_init(); +- return; +- } +- +- ath79_clocks_init(); +- +- cpu_clk_rate = ath79_get_sys_clk_rate("cpu"); +- ahb_clk_rate = ath79_get_sys_clk_rate("ahb"); +- ddr_clk_rate = ath79_get_sys_clk_rate("ddr"); +- ref_clk_rate = ath79_get_sys_clk_rate("ref"); +- +- pr_info("Clocks: CPU:%lu.%03luMHz, DDR:%lu.%03luMHz, AHB:%lu.%03luMHz, Ref:%lu.%03luMHz\n", +- cpu_clk_rate / 1000000, (cpu_clk_rate / 1000) % 1000, +- ddr_clk_rate / 1000000, (ddr_clk_rate / 1000) % 1000, +- ahb_clk_rate / 1000000, (ahb_clk_rate / 1000) % 1000, +- ref_clk_rate / 1000000, (ref_clk_rate / 1000) % 1000); +- +- mips_hpt_frequency = cpu_clk_rate / 2; +-} +- + void __init arch_init_irq(void) + { + irqchip_init(); + } + +-static int __init ath79_setup(void) +-{ +- if (mips_machtype == ATH79_MACH_GENERIC_OF) +- return 0; +- +- ath79_gpio_init(); +- ath79_register_uart(); +- ath79_register_wdt(); +- +- mips_machine_setup(); +- +- return 0; +-} +- +-arch_initcall(ath79_setup); +- + void __init device_tree_init(void) + { + unflatten_and_copy_device_tree(); + } +- +-MIPS_MACHINE(ATH79_MACH_GENERIC, +- "Generic", +- "Generic AR71XX/AR724X/AR913X based board", +- NULL); +- +-MIPS_MACHINE(ATH79_MACH_GENERIC_OF, +- "DTB", +- "Generic AR71XX/AR724X/AR913X based board (DT)", +- NULL); diff --git a/target/linux/ath79/patches-4.19/0029-MIPS-ath79-drop-legacy-pci-code.patch b/target/linux/ath79/patches-4.19/0029-MIPS-ath79-drop-legacy-pci-code.patch new file mode 100644 index 000000000..254f2f925 --- /dev/null +++ b/target/linux/ath79/patches-4.19/0029-MIPS-ath79-drop-legacy-pci-code.patch @@ -0,0 +1,379 @@ +From d0f1420702ed47a82572aaf39e7407055518d14e Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Sat, 23 Jun 2018 15:05:19 +0200 +Subject: [PATCH 29/33] MIPS: ath79: drop legacy pci code + +With the target now being fully OF based, we can drop the legacy pci +platform code. The only bits that we need to keep is the fixup code +which we move to its own code file. + +Signed-off-by: John Crispin +--- + arch/mips/ath79/Makefile | 1 - + arch/mips/ath79/pci.c | 273 -------------------------------------------- + arch/mips/ath79/pci.h | 35 ------ + arch/mips/pci/Makefile | 1 + + arch/mips/pci/fixup-ath79.c | 21 ++++ + 5 files changed, 22 insertions(+), 309 deletions(-) + delete mode 100644 arch/mips/ath79/pci.c + delete mode 100644 arch/mips/ath79/pci.h + create mode 100644 arch/mips/pci/fixup-ath79.c + +--- a/arch/mips/ath79/Makefile ++++ b/arch/mips/ath79/Makefile +@@ -11,7 +11,6 @@ + obj-y := prom.o setup.o common.o clock.o + + obj-$(CONFIG_EARLY_PRINTK) += early_printk.o +-obj-$(CONFIG_PCI) += pci.o + + # + # Devices +--- a/arch/mips/ath79/pci.c ++++ /dev/null +@@ -1,273 +0,0 @@ +-/* +- * Atheros AR71XX/AR724X specific PCI setup code +- * +- * Copyright (C) 2011 René Bolldorf +- * Copyright (C) 2008-2011 Gabor Juhos +- * Copyright (C) 2008 Imre Kaloz +- * +- * Parts of this file are based on Atheros' 2.6.15 BSP +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of the GNU General Public License version 2 as published +- * by the Free Software Foundation. +- */ +- +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include "pci.h" +- +-static int (*ath79_pci_plat_dev_init)(struct pci_dev *dev); +-static const struct ath79_pci_irq *ath79_pci_irq_map; +-static unsigned ath79_pci_nr_irqs; +- +-static const struct ath79_pci_irq ar71xx_pci_irq_map[] = { +- { +- .slot = 17, +- .pin = 1, +- .irq = ATH79_PCI_IRQ(0), +- }, { +- .slot = 18, +- .pin = 1, +- .irq = ATH79_PCI_IRQ(1), +- }, { +- .slot = 19, +- .pin = 1, +- .irq = ATH79_PCI_IRQ(2), +- } +-}; +- +-static const struct ath79_pci_irq ar724x_pci_irq_map[] = { +- { +- .slot = 0, +- .pin = 1, +- .irq = ATH79_PCI_IRQ(0), +- } +-}; +- +-static const struct ath79_pci_irq qca955x_pci_irq_map[] = { +- { +- .bus = 0, +- .slot = 0, +- .pin = 1, +- .irq = ATH79_PCI_IRQ(0), +- }, +- { +- .bus = 1, +- .slot = 0, +- .pin = 1, +- .irq = ATH79_PCI_IRQ(1), +- }, +-}; +- +-int pcibios_map_irq(const struct pci_dev *dev, uint8_t slot, uint8_t pin) +-{ +- int irq = -1; +- int i; +- +- if (ath79_pci_nr_irqs == 0 || +- ath79_pci_irq_map == NULL) { +- if (soc_is_ar71xx()) { +- ath79_pci_irq_map = ar71xx_pci_irq_map; +- ath79_pci_nr_irqs = ARRAY_SIZE(ar71xx_pci_irq_map); +- } else if (soc_is_ar724x() || +- soc_is_ar9342() || +- soc_is_ar9344()) { +- ath79_pci_irq_map = ar724x_pci_irq_map; +- ath79_pci_nr_irqs = ARRAY_SIZE(ar724x_pci_irq_map); +- } else if (soc_is_qca955x()) { +- ath79_pci_irq_map = qca955x_pci_irq_map; +- ath79_pci_nr_irqs = ARRAY_SIZE(qca955x_pci_irq_map); +- } else { +- pr_crit("pci %s: invalid irq map\n", +- pci_name((struct pci_dev *) dev)); +- return irq; +- } +- } +- +- for (i = 0; i < ath79_pci_nr_irqs; i++) { +- const struct ath79_pci_irq *entry; +- +- entry = &ath79_pci_irq_map[i]; +- if (entry->bus == dev->bus->number && +- entry->slot == slot && +- entry->pin == pin) { +- irq = entry->irq; +- break; +- } +- } +- +- if (irq < 0) +- pr_crit("pci %s: no irq found for pin %u\n", +- pci_name((struct pci_dev *) dev), pin); +- else +- pr_info("pci %s: using irq %d for pin %u\n", +- pci_name((struct pci_dev *) dev), irq, pin); +- +- return irq; +-} +- +-int pcibios_plat_dev_init(struct pci_dev *dev) +-{ +- if (ath79_pci_plat_dev_init) +- return ath79_pci_plat_dev_init(dev); +- +- return 0; +-} +- +-void __init ath79_pci_set_irq_map(unsigned nr_irqs, +- const struct ath79_pci_irq *map) +-{ +- ath79_pci_nr_irqs = nr_irqs; +- ath79_pci_irq_map = map; +-} +- +-void __init ath79_pci_set_plat_dev_init(int (*func)(struct pci_dev *dev)) +-{ +- ath79_pci_plat_dev_init = func; +-} +- +-static struct platform_device * +-ath79_register_pci_ar71xx(void) +-{ +- struct platform_device *pdev; +- struct resource res[4]; +- +- memset(res, 0, sizeof(res)); +- +- res[0].name = "cfg_base"; +- res[0].flags = IORESOURCE_MEM; +- res[0].start = AR71XX_PCI_CFG_BASE; +- res[0].end = AR71XX_PCI_CFG_BASE + AR71XX_PCI_CFG_SIZE - 1; +- +- res[1].flags = IORESOURCE_IRQ; +- res[1].start = ATH79_CPU_IRQ(2); +- res[1].end = ATH79_CPU_IRQ(2); +- +- res[2].name = "io_base"; +- res[2].flags = IORESOURCE_IO; +- res[2].start = 0; +- res[2].end = 0; +- +- res[3].name = "mem_base"; +- res[3].flags = IORESOURCE_MEM; +- res[3].start = AR71XX_PCI_MEM_BASE; +- res[3].end = AR71XX_PCI_MEM_BASE + AR71XX_PCI_MEM_SIZE - 1; +- +- pdev = platform_device_register_simple("ar71xx-pci", -1, +- res, ARRAY_SIZE(res)); +- return pdev; +-} +- +-static struct platform_device * +-ath79_register_pci_ar724x(int id, +- unsigned long cfg_base, +- unsigned long ctrl_base, +- unsigned long crp_base, +- unsigned long mem_base, +- unsigned long mem_size, +- unsigned long io_base, +- int irq) +-{ +- struct platform_device *pdev; +- struct resource res[6]; +- +- memset(res, 0, sizeof(res)); +- +- res[0].name = "cfg_base"; +- res[0].flags = IORESOURCE_MEM; +- res[0].start = cfg_base; +- res[0].end = cfg_base + AR724X_PCI_CFG_SIZE - 1; +- +- res[1].name = "ctrl_base"; +- res[1].flags = IORESOURCE_MEM; +- res[1].start = ctrl_base; +- res[1].end = ctrl_base + AR724X_PCI_CTRL_SIZE - 1; +- +- res[2].flags = IORESOURCE_IRQ; +- res[2].start = irq; +- res[2].end = irq; +- +- res[3].name = "mem_base"; +- res[3].flags = IORESOURCE_MEM; +- res[3].start = mem_base; +- res[3].end = mem_base + mem_size - 1; +- +- res[4].name = "io_base"; +- res[4].flags = IORESOURCE_IO; +- res[4].start = io_base; +- res[4].end = io_base; +- +- res[5].name = "crp_base"; +- res[5].flags = IORESOURCE_MEM; +- res[5].start = crp_base; +- res[5].end = crp_base + AR724X_PCI_CRP_SIZE - 1; +- +- pdev = platform_device_register_simple("ar724x-pci", id, +- res, ARRAY_SIZE(res)); +- return pdev; +-} +- +-int __init ath79_register_pci(void) +-{ +- struct platform_device *pdev = NULL; +- +- if (soc_is_ar71xx()) { +- pdev = ath79_register_pci_ar71xx(); +- } else if (soc_is_ar724x()) { +- pdev = ath79_register_pci_ar724x(-1, +- AR724X_PCI_CFG_BASE, +- AR724X_PCI_CTRL_BASE, +- AR724X_PCI_CRP_BASE, +- AR724X_PCI_MEM_BASE, +- AR724X_PCI_MEM_SIZE, +- 0, +- ATH79_CPU_IRQ(2)); +- } else if (soc_is_ar9342() || +- soc_is_ar9344()) { +- u32 bootstrap; +- +- bootstrap = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP); +- if ((bootstrap & AR934X_BOOTSTRAP_PCIE_RC) == 0) +- return -ENODEV; +- +- pdev = ath79_register_pci_ar724x(-1, +- AR724X_PCI_CFG_BASE, +- AR724X_PCI_CTRL_BASE, +- AR724X_PCI_CRP_BASE, +- AR724X_PCI_MEM_BASE, +- AR724X_PCI_MEM_SIZE, +- 0, +- ATH79_IP2_IRQ(0)); +- } else if (soc_is_qca9558()) { +- pdev = ath79_register_pci_ar724x(0, +- QCA955X_PCI_CFG_BASE0, +- QCA955X_PCI_CTRL_BASE0, +- QCA955X_PCI_CRP_BASE0, +- QCA955X_PCI_MEM_BASE0, +- QCA955X_PCI_MEM_SIZE, +- 0, +- ATH79_IP2_IRQ(0)); +- +- pdev = ath79_register_pci_ar724x(1, +- QCA955X_PCI_CFG_BASE1, +- QCA955X_PCI_CTRL_BASE1, +- QCA955X_PCI_CRP_BASE1, +- QCA955X_PCI_MEM_BASE1, +- QCA955X_PCI_MEM_SIZE, +- 1, +- ATH79_IP3_IRQ(2)); +- } else { +- /* No PCI support */ +- return -ENODEV; +- } +- +- if (!pdev) +- pr_err("unable to register PCI controller device\n"); +- +- return pdev ? 0 : -ENODEV; +-} +--- a/arch/mips/ath79/pci.h ++++ /dev/null +@@ -1,35 +0,0 @@ +-/* +- * Atheros AR71XX/AR724X PCI support +- * +- * Copyright (C) 2011 René Bolldorf +- * Copyright (C) 2008-2011 Gabor Juhos +- * Copyright (C) 2008 Imre Kaloz +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of the GNU General Public License version 2 as published +- * by the Free Software Foundation. +- */ +- +-#ifndef _ATH79_PCI_H +-#define _ATH79_PCI_H +- +-struct ath79_pci_irq { +- int bus; +- u8 slot; +- u8 pin; +- int irq; +-}; +- +-#ifdef CONFIG_PCI +-void ath79_pci_set_irq_map(unsigned nr_irqs, const struct ath79_pci_irq *map); +-void ath79_pci_set_plat_dev_init(int (*func)(struct pci_dev *dev)); +-int ath79_register_pci(void); +-#else +-static inline void +-ath79_pci_set_irq_map(unsigned nr_irqs, const struct ath79_pci_irq *map) {} +-static inline void +-ath79_pci_set_plat_dev_init(int (*func)(struct pci_dev *)) {} +-static inline int ath79_register_pci(void) { return 0; } +-#endif +- +-#endif /* _ATH79_PCI_H */ +--- a/arch/mips/pci/Makefile ++++ b/arch/mips/pci/Makefile +@@ -29,6 +29,7 @@ obj-$(CONFIG_MIPS_PCI_VIRTIO) += pci-vir + # + # These are still pretty much in the old state, watch, go blind. + # ++obj-$(CONFIG_ATH79) += fixup-ath79.o + obj-$(CONFIG_LASAT) += pci-lasat.o + obj-$(CONFIG_MIPS_COBALT) += fixup-cobalt.o + obj-$(CONFIG_LEMOTE_FULOONG2E) += fixup-fuloong2e.o ops-loongson2.o +--- /dev/null ++++ b/arch/mips/pci/fixup-ath79.c +@@ -0,0 +1,21 @@ ++/* ++ * Copyright (C) 2018 John Crispin ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#include ++//#include ++#include ++ ++int pcibios_plat_dev_init(struct pci_dev *dev) ++{ ++ return PCIBIOS_SUCCESSFUL; ++} ++ ++int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) ++{ ++ return of_irq_parse_and_map_pci(dev, slot, pin); ++} diff --git a/target/linux/ath79/patches-4.19/0030-MIPS-ath79-drop-platform-device-registration-code.patch b/target/linux/ath79/patches-4.19/0030-MIPS-ath79-drop-platform-device-registration-code.patch new file mode 100644 index 000000000..93a133c1d --- /dev/null +++ b/target/linux/ath79/patches-4.19/0030-MIPS-ath79-drop-platform-device-registration-code.patch @@ -0,0 +1,933 @@ +From dce930fba8ad3a90ccd164f199e57c2d61937ccd Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Sat, 23 Jun 2018 15:12:38 +0200 +Subject: [PATCH 30/33] MIPS: ath79: drop platform device registration code + +With the target now being fully OF based, we can drop the legacy platform +device registration code. All devices and their drivers are now probed +via OF. + +Signed-off-by: John Crispin +--- + arch/mips/ath79/Makefile | 10 -- + arch/mips/ath79/common.h | 2 - + arch/mips/ath79/dev-common.c | 159 ------------------------ + arch/mips/ath79/dev-common.h | 18 --- + arch/mips/ath79/dev-gpio-buttons.c | 56 --------- + arch/mips/ath79/dev-gpio-buttons.h | 23 ---- + arch/mips/ath79/dev-leds-gpio.c | 54 --------- + arch/mips/ath79/dev-leds-gpio.h | 21 ---- + arch/mips/ath79/dev-spi.c | 38 ------ + arch/mips/ath79/dev-spi.h | 22 ---- + arch/mips/ath79/dev-usb.c | 242 ------------------------------------- + arch/mips/ath79/dev-usb.h | 17 --- + arch/mips/ath79/dev-wmac.c | 155 ------------------------ + arch/mips/ath79/dev-wmac.h | 17 --- + arch/mips/ath79/setup.c | 1 - + 15 files changed, 835 deletions(-) + delete mode 100644 arch/mips/ath79/dev-common.c + delete mode 100644 arch/mips/ath79/dev-common.h + delete mode 100644 arch/mips/ath79/dev-gpio-buttons.c + delete mode 100644 arch/mips/ath79/dev-gpio-buttons.h + delete mode 100644 arch/mips/ath79/dev-leds-gpio.c + delete mode 100644 arch/mips/ath79/dev-leds-gpio.h + delete mode 100644 arch/mips/ath79/dev-spi.c + delete mode 100644 arch/mips/ath79/dev-spi.h + delete mode 100644 arch/mips/ath79/dev-usb.c + delete mode 100644 arch/mips/ath79/dev-usb.h + delete mode 100644 arch/mips/ath79/dev-wmac.c + delete mode 100644 arch/mips/ath79/dev-wmac.h + +--- a/arch/mips/ath79/Makefile ++++ b/arch/mips/ath79/Makefile +@@ -11,13 +11,3 @@ + obj-y := prom.o setup.o common.o clock.o + + obj-$(CONFIG_EARLY_PRINTK) += early_printk.o +- +-# +-# Devices +-# +-obj-y += dev-common.o +-obj-$(CONFIG_ATH79_DEV_GPIO_BUTTONS) += dev-gpio-buttons.o +-obj-$(CONFIG_ATH79_DEV_LEDS_GPIO) += dev-leds-gpio.o +-obj-$(CONFIG_ATH79_DEV_SPI) += dev-spi.o +-obj-$(CONFIG_ATH79_DEV_USB) += dev-usb.o +-obj-$(CONFIG_ATH79_DEV_WMAC) += dev-wmac.o +--- a/arch/mips/ath79/common.h ++++ b/arch/mips/ath79/common.h +@@ -24,6 +24,4 @@ unsigned long ath79_get_sys_clk_rate(con + + void ath79_ddr_ctrl_init(void); + +-void ath79_gpio_init(void); +- + #endif /* __ATH79_COMMON_H */ +--- a/arch/mips/ath79/dev-common.c ++++ /dev/null +@@ -1,159 +0,0 @@ +-/* +- * Atheros AR71XX/AR724X/AR913X common devices +- * +- * Copyright (C) 2008-2011 Gabor Juhos +- * Copyright (C) 2008 Imre Kaloz +- * +- * Parts of this file are based on Atheros' 2.6.15 BSP +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of the GNU General Public License version 2 as published +- * by the Free Software Foundation. +- */ +- +-#include +-#include +-#include +-#include +-#include +-#include +-#include +- +-#include +-#include +-#include "common.h" +-#include "dev-common.h" +- +-static struct resource ath79_uart_resources[] = { +- { +- .start = AR71XX_UART_BASE, +- .end = AR71XX_UART_BASE + AR71XX_UART_SIZE - 1, +- .flags = IORESOURCE_MEM, +- }, +-}; +- +-#define AR71XX_UART_FLAGS (UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_IOREMAP) +-static struct plat_serial8250_port ath79_uart_data[] = { +- { +- .mapbase = AR71XX_UART_BASE, +- .irq = ATH79_MISC_IRQ(3), +- .flags = AR71XX_UART_FLAGS, +- .iotype = UPIO_MEM32, +- .regshift = 2, +- }, { +- /* terminating entry */ +- } +-}; +- +-static struct platform_device ath79_uart_device = { +- .name = "serial8250", +- .id = PLAT8250_DEV_PLATFORM, +- .resource = ath79_uart_resources, +- .num_resources = ARRAY_SIZE(ath79_uart_resources), +- .dev = { +- .platform_data = ath79_uart_data +- }, +-}; +- +-static struct resource ar933x_uart_resources[] = { +- { +- .start = AR933X_UART_BASE, +- .end = AR933X_UART_BASE + AR71XX_UART_SIZE - 1, +- .flags = IORESOURCE_MEM, +- }, +- { +- .start = ATH79_MISC_IRQ(3), +- .end = ATH79_MISC_IRQ(3), +- .flags = IORESOURCE_IRQ, +- }, +-}; +- +-static struct platform_device ar933x_uart_device = { +- .name = "ar933x-uart", +- .id = -1, +- .resource = ar933x_uart_resources, +- .num_resources = ARRAY_SIZE(ar933x_uart_resources), +-}; +- +-void __init ath79_register_uart(void) +-{ +- unsigned long uart_clk_rate; +- +- uart_clk_rate = ath79_get_sys_clk_rate("uart"); +- +- if (soc_is_ar71xx() || +- soc_is_ar724x() || +- soc_is_ar913x() || +- soc_is_ar934x() || +- soc_is_qca955x()) { +- ath79_uart_data[0].uartclk = uart_clk_rate; +- platform_device_register(&ath79_uart_device); +- } else if (soc_is_ar933x()) { +- platform_device_register(&ar933x_uart_device); +- } else { +- BUG(); +- } +-} +- +-void __init ath79_register_wdt(void) +-{ +- struct resource res; +- +- memset(&res, 0, sizeof(res)); +- +- res.flags = IORESOURCE_MEM; +- res.start = AR71XX_RESET_BASE + AR71XX_RESET_REG_WDOG_CTRL; +- res.end = res.start + 0x8 - 1; +- +- platform_device_register_simple("ath79-wdt", -1, &res, 1); +-} +- +-static struct ath79_gpio_platform_data ath79_gpio_pdata; +- +-static struct resource ath79_gpio_resources[] = { +- { +- .flags = IORESOURCE_MEM, +- .start = AR71XX_GPIO_BASE, +- .end = AR71XX_GPIO_BASE + AR71XX_GPIO_SIZE - 1, +- }, +- { +- .start = ATH79_MISC_IRQ(2), +- .end = ATH79_MISC_IRQ(2), +- .flags = IORESOURCE_IRQ, +- }, +-}; +- +-static struct platform_device ath79_gpio_device = { +- .name = "ath79-gpio", +- .id = -1, +- .resource = ath79_gpio_resources, +- .num_resources = ARRAY_SIZE(ath79_gpio_resources), +- .dev = { +- .platform_data = &ath79_gpio_pdata +- }, +-}; +- +-void __init ath79_gpio_init(void) +-{ +- if (soc_is_ar71xx()) { +- ath79_gpio_pdata.ngpios = AR71XX_GPIO_COUNT; +- } else if (soc_is_ar7240()) { +- ath79_gpio_pdata.ngpios = AR7240_GPIO_COUNT; +- } else if (soc_is_ar7241() || soc_is_ar7242()) { +- ath79_gpio_pdata.ngpios = AR7241_GPIO_COUNT; +- } else if (soc_is_ar913x()) { +- ath79_gpio_pdata.ngpios = AR913X_GPIO_COUNT; +- } else if (soc_is_ar933x()) { +- ath79_gpio_pdata.ngpios = AR933X_GPIO_COUNT; +- } else if (soc_is_ar934x()) { +- ath79_gpio_pdata.ngpios = AR934X_GPIO_COUNT; +- ath79_gpio_pdata.oe_inverted = 1; +- } else if (soc_is_qca955x()) { +- ath79_gpio_pdata.ngpios = QCA955X_GPIO_COUNT; +- ath79_gpio_pdata.oe_inverted = 1; +- } else { +- BUG(); +- } +- +- platform_device_register(&ath79_gpio_device); +-} +--- a/arch/mips/ath79/dev-common.h ++++ /dev/null +@@ -1,18 +0,0 @@ +-/* +- * Atheros AR71XX/AR724X/AR913X common devices +- * +- * Copyright (C) 2008-2010 Gabor Juhos +- * Copyright (C) 2008 Imre Kaloz +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of the GNU General Public License version 2 as published +- * by the Free Software Foundation. +- */ +- +-#ifndef _ATH79_DEV_COMMON_H +-#define _ATH79_DEV_COMMON_H +- +-void ath79_register_uart(void); +-void ath79_register_wdt(void); +- +-#endif /* _ATH79_DEV_COMMON_H */ +--- a/arch/mips/ath79/dev-gpio-buttons.c ++++ /dev/null +@@ -1,56 +0,0 @@ +-/* +- * Atheros AR71XX/AR724X/AR913X GPIO button support +- * +- * Copyright (C) 2008-2010 Gabor Juhos +- * Copyright (C) 2008 Imre Kaloz +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of the GNU General Public License version 2 as published +- * by the Free Software Foundation. +- */ +- +-#include "linux/init.h" +-#include "linux/slab.h" +-#include +- +-#include "dev-gpio-buttons.h" +- +-void __init ath79_register_gpio_keys_polled(int id, +- unsigned poll_interval, +- unsigned nbuttons, +- struct gpio_keys_button *buttons) +-{ +- struct platform_device *pdev; +- struct gpio_keys_platform_data pdata; +- struct gpio_keys_button *p; +- int err; +- +- p = kmemdup(buttons, nbuttons * sizeof(*p), GFP_KERNEL); +- if (!p) +- return; +- +- pdev = platform_device_alloc("gpio-keys-polled", id); +- if (!pdev) +- goto err_free_buttons; +- +- memset(&pdata, 0, sizeof(pdata)); +- pdata.poll_interval = poll_interval; +- pdata.nbuttons = nbuttons; +- pdata.buttons = p; +- +- err = platform_device_add_data(pdev, &pdata, sizeof(pdata)); +- if (err) +- goto err_put_pdev; +- +- err = platform_device_add(pdev); +- if (err) +- goto err_put_pdev; +- +- return; +- +-err_put_pdev: +- platform_device_put(pdev); +- +-err_free_buttons: +- kfree(p); +-} +--- a/arch/mips/ath79/dev-gpio-buttons.h ++++ /dev/null +@@ -1,23 +0,0 @@ +-/* +- * Atheros AR71XX/AR724X/AR913X GPIO button support +- * +- * Copyright (C) 2008-2010 Gabor Juhos +- * Copyright (C) 2008 Imre Kaloz +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of the GNU General Public License version 2 as published +- * by the Free Software Foundation. +- */ +- +-#ifndef _ATH79_DEV_GPIO_BUTTONS_H +-#define _ATH79_DEV_GPIO_BUTTONS_H +- +-#include +-#include +- +-void ath79_register_gpio_keys_polled(int id, +- unsigned poll_interval, +- unsigned nbuttons, +- struct gpio_keys_button *buttons); +- +-#endif /* _ATH79_DEV_GPIO_BUTTONS_H */ +--- a/arch/mips/ath79/dev-leds-gpio.c ++++ /dev/null +@@ -1,54 +0,0 @@ +-/* +- * Atheros AR71XX/AR724X/AR913X common GPIO LEDs support +- * +- * Copyright (C) 2008-2010 Gabor Juhos +- * Copyright (C) 2008 Imre Kaloz +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of the GNU General Public License version 2 as published +- * by the Free Software Foundation. +- */ +- +-#include +-#include +-#include +- +-#include "dev-leds-gpio.h" +- +-void __init ath79_register_leds_gpio(int id, +- unsigned num_leds, +- struct gpio_led *leds) +-{ +- struct platform_device *pdev; +- struct gpio_led_platform_data pdata; +- struct gpio_led *p; +- int err; +- +- p = kmemdup(leds, num_leds * sizeof(*p), GFP_KERNEL); +- if (!p) +- return; +- +- pdev = platform_device_alloc("leds-gpio", id); +- if (!pdev) +- goto err_free_leds; +- +- memset(&pdata, 0, sizeof(pdata)); +- pdata.num_leds = num_leds; +- pdata.leds = p; +- +- err = platform_device_add_data(pdev, &pdata, sizeof(pdata)); +- if (err) +- goto err_put_pdev; +- +- err = platform_device_add(pdev); +- if (err) +- goto err_put_pdev; +- +- return; +- +-err_put_pdev: +- platform_device_put(pdev); +- +-err_free_leds: +- kfree(p); +-} +--- a/arch/mips/ath79/dev-leds-gpio.h ++++ /dev/null +@@ -1,21 +0,0 @@ +-/* +- * Atheros AR71XX/AR724X/AR913X common GPIO LEDs support +- * +- * Copyright (C) 2008-2010 Gabor Juhos +- * Copyright (C) 2008 Imre Kaloz +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of the GNU General Public License version 2 as published +- * by the Free Software Foundation. +- */ +- +-#ifndef _ATH79_DEV_LEDS_GPIO_H +-#define _ATH79_DEV_LEDS_GPIO_H +- +-#include +- +-void ath79_register_leds_gpio(int id, +- unsigned num_leds, +- struct gpio_led *leds); +- +-#endif /* _ATH79_DEV_LEDS_GPIO_H */ +--- a/arch/mips/ath79/dev-spi.c ++++ /dev/null +@@ -1,38 +0,0 @@ +-/* +- * Atheros AR71XX/AR724X/AR913X SPI controller device +- * +- * Copyright (C) 2008-2010 Gabor Juhos +- * Copyright (C) 2008 Imre Kaloz +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of the GNU General Public License version 2 as published +- * by the Free Software Foundation. +- */ +- +-#include +-#include +-#include "dev-spi.h" +- +-static struct resource ath79_spi_resources[] = { +- { +- .start = AR71XX_SPI_BASE, +- .end = AR71XX_SPI_BASE + AR71XX_SPI_SIZE - 1, +- .flags = IORESOURCE_MEM, +- }, +-}; +- +-static struct platform_device ath79_spi_device = { +- .name = "ath79-spi", +- .id = -1, +- .resource = ath79_spi_resources, +- .num_resources = ARRAY_SIZE(ath79_spi_resources), +-}; +- +-void __init ath79_register_spi(struct ath79_spi_platform_data *pdata, +- struct spi_board_info const *info, +- unsigned n) +-{ +- spi_register_board_info(info, n); +- ath79_spi_device.dev.platform_data = pdata; +- platform_device_register(&ath79_spi_device); +-} +--- a/arch/mips/ath79/dev-spi.h ++++ /dev/null +@@ -1,22 +0,0 @@ +-/* +- * Atheros AR71XX/AR724X/AR913X SPI controller device +- * +- * Copyright (C) 2008-2010 Gabor Juhos +- * Copyright (C) 2008 Imre Kaloz +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of the GNU General Public License version 2 as published +- * by the Free Software Foundation. +- */ +- +-#ifndef _ATH79_DEV_SPI_H +-#define _ATH79_DEV_SPI_H +- +-#include +-#include +- +-void ath79_register_spi(struct ath79_spi_platform_data *pdata, +- struct spi_board_info const *info, +- unsigned n); +- +-#endif /* _ATH79_DEV_SPI_H */ +--- a/arch/mips/ath79/dev-usb.c ++++ /dev/null +@@ -1,242 +0,0 @@ +-/* +- * Atheros AR7XXX/AR9XXX USB Host Controller device +- * +- * Copyright (C) 2008-2011 Gabor Juhos +- * Copyright (C) 2008 Imre Kaloz +- * +- * Parts of this file are based on Atheros' 2.6.15 BSP +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of the GNU General Public License version 2 as published +- * by the Free Software Foundation. +- */ +- +-#include +-#include +-#include +-#include +-#include +-#include +-#include +-#include +- +-#include +-#include +-#include "common.h" +-#include "dev-usb.h" +- +-static u64 ath79_usb_dmamask = DMA_BIT_MASK(32); +- +-static struct usb_ohci_pdata ath79_ohci_pdata = { +-}; +- +-static struct usb_ehci_pdata ath79_ehci_pdata_v1 = { +- .has_synopsys_hc_bug = 1, +-}; +- +-static struct usb_ehci_pdata ath79_ehci_pdata_v2 = { +- .caps_offset = 0x100, +- .has_tt = 1, +-}; +- +-static void __init ath79_usb_register(const char *name, int id, +- unsigned long base, unsigned long size, +- int irq, const void *data, +- size_t data_size) +-{ +- struct resource res[2]; +- struct platform_device *pdev; +- +- memset(res, 0, sizeof(res)); +- +- res[0].flags = IORESOURCE_MEM; +- res[0].start = base; +- res[0].end = base + size - 1; +- +- res[1].flags = IORESOURCE_IRQ; +- res[1].start = irq; +- res[1].end = irq; +- +- pdev = platform_device_register_resndata(NULL, name, id, +- res, ARRAY_SIZE(res), +- data, data_size); +- +- if (IS_ERR(pdev)) { +- pr_err("ath79: unable to register USB at %08lx, err=%d\n", +- base, (int) PTR_ERR(pdev)); +- return; +- } +- +- pdev->dev.dma_mask = &ath79_usb_dmamask; +- pdev->dev.coherent_dma_mask = DMA_BIT_MASK(32); +-} +- +-#define AR71XX_USB_RESET_MASK (AR71XX_RESET_USB_HOST | \ +- AR71XX_RESET_USB_PHY | \ +- AR71XX_RESET_USB_OHCI_DLL) +- +-static void __init ath79_usb_setup(void) +-{ +- void __iomem *usb_ctrl_base; +- +- ath79_device_reset_set(AR71XX_USB_RESET_MASK); +- mdelay(1000); +- ath79_device_reset_clear(AR71XX_USB_RESET_MASK); +- +- usb_ctrl_base = ioremap(AR71XX_USB_CTRL_BASE, AR71XX_USB_CTRL_SIZE); +- +- /* Turning on the Buff and Desc swap bits */ +- __raw_writel(0xf0000, usb_ctrl_base + AR71XX_USB_CTRL_REG_CONFIG); +- +- /* WAR for HW bug. Here it adjusts the duration between two SOFS */ +- __raw_writel(0x20c00, usb_ctrl_base + AR71XX_USB_CTRL_REG_FLADJ); +- +- iounmap(usb_ctrl_base); +- +- mdelay(900); +- +- ath79_usb_register("ohci-platform", -1, +- AR71XX_OHCI_BASE, AR71XX_OHCI_SIZE, +- ATH79_MISC_IRQ(6), +- &ath79_ohci_pdata, sizeof(ath79_ohci_pdata)); +- +- ath79_usb_register("ehci-platform", -1, +- AR71XX_EHCI_BASE, AR71XX_EHCI_SIZE, +- ATH79_CPU_IRQ(3), +- &ath79_ehci_pdata_v1, sizeof(ath79_ehci_pdata_v1)); +-} +- +-static void __init ar7240_usb_setup(void) +-{ +- void __iomem *usb_ctrl_base; +- +- ath79_device_reset_clear(AR7240_RESET_OHCI_DLL); +- ath79_device_reset_set(AR7240_RESET_USB_HOST); +- +- mdelay(1000); +- +- ath79_device_reset_set(AR7240_RESET_OHCI_DLL); +- ath79_device_reset_clear(AR7240_RESET_USB_HOST); +- +- usb_ctrl_base = ioremap(AR7240_USB_CTRL_BASE, AR7240_USB_CTRL_SIZE); +- +- /* WAR for HW bug. Here it adjusts the duration between two SOFS */ +- __raw_writel(0x3, usb_ctrl_base + AR71XX_USB_CTRL_REG_FLADJ); +- +- iounmap(usb_ctrl_base); +- +- ath79_usb_register("ohci-platform", -1, +- AR7240_OHCI_BASE, AR7240_OHCI_SIZE, +- ATH79_CPU_IRQ(3), +- &ath79_ohci_pdata, sizeof(ath79_ohci_pdata)); +-} +- +-static void __init ar724x_usb_setup(void) +-{ +- ath79_device_reset_set(AR724X_RESET_USBSUS_OVERRIDE); +- mdelay(10); +- +- ath79_device_reset_clear(AR724X_RESET_USB_HOST); +- mdelay(10); +- +- ath79_device_reset_clear(AR724X_RESET_USB_PHY); +- mdelay(10); +- +- ath79_usb_register("ehci-platform", -1, +- AR724X_EHCI_BASE, AR724X_EHCI_SIZE, +- ATH79_CPU_IRQ(3), +- &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); +-} +- +-static void __init ar913x_usb_setup(void) +-{ +- ath79_device_reset_set(AR913X_RESET_USBSUS_OVERRIDE); +- mdelay(10); +- +- ath79_device_reset_clear(AR913X_RESET_USB_HOST); +- mdelay(10); +- +- ath79_device_reset_clear(AR913X_RESET_USB_PHY); +- mdelay(10); +- +- ath79_usb_register("ehci-platform", -1, +- AR913X_EHCI_BASE, AR913X_EHCI_SIZE, +- ATH79_CPU_IRQ(3), +- &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); +-} +- +-static void __init ar933x_usb_setup(void) +-{ +- ath79_device_reset_set(AR933X_RESET_USBSUS_OVERRIDE); +- mdelay(10); +- +- ath79_device_reset_clear(AR933X_RESET_USB_HOST); +- mdelay(10); +- +- ath79_device_reset_clear(AR933X_RESET_USB_PHY); +- mdelay(10); +- +- ath79_usb_register("ehci-platform", -1, +- AR933X_EHCI_BASE, AR933X_EHCI_SIZE, +- ATH79_CPU_IRQ(3), +- &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); +-} +- +-static void __init ar934x_usb_setup(void) +-{ +- u32 bootstrap; +- +- bootstrap = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP); +- if (bootstrap & AR934X_BOOTSTRAP_USB_MODE_DEVICE) +- return; +- +- ath79_device_reset_set(AR934X_RESET_USBSUS_OVERRIDE); +- udelay(1000); +- +- ath79_device_reset_clear(AR934X_RESET_USB_PHY); +- udelay(1000); +- +- ath79_device_reset_clear(AR934X_RESET_USB_PHY_ANALOG); +- udelay(1000); +- +- ath79_device_reset_clear(AR934X_RESET_USB_HOST); +- udelay(1000); +- +- ath79_usb_register("ehci-platform", -1, +- AR934X_EHCI_BASE, AR934X_EHCI_SIZE, +- ATH79_CPU_IRQ(3), +- &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); +-} +- +-static void __init qca955x_usb_setup(void) +-{ +- ath79_usb_register("ehci-platform", 0, +- QCA955X_EHCI0_BASE, QCA955X_EHCI_SIZE, +- ATH79_IP3_IRQ(0), +- &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); +- +- ath79_usb_register("ehci-platform", 1, +- QCA955X_EHCI1_BASE, QCA955X_EHCI_SIZE, +- ATH79_IP3_IRQ(1), +- &ath79_ehci_pdata_v2, sizeof(ath79_ehci_pdata_v2)); +-} +- +-void __init ath79_register_usb(void) +-{ +- if (soc_is_ar71xx()) +- ath79_usb_setup(); +- else if (soc_is_ar7240()) +- ar7240_usb_setup(); +- else if (soc_is_ar7241() || soc_is_ar7242()) +- ar724x_usb_setup(); +- else if (soc_is_ar913x()) +- ar913x_usb_setup(); +- else if (soc_is_ar933x()) +- ar933x_usb_setup(); +- else if (soc_is_ar934x()) +- ar934x_usb_setup(); +- else if (soc_is_qca955x()) +- qca955x_usb_setup(); +- else +- BUG(); +-} +--- a/arch/mips/ath79/dev-usb.h ++++ /dev/null +@@ -1,17 +0,0 @@ +-/* +- * Atheros AR71XX/AR724X/AR913X USB Host Controller support +- * +- * Copyright (C) 2008-2010 Gabor Juhos +- * Copyright (C) 2008 Imre Kaloz +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of the GNU General Public License version 2 as published +- * by the Free Software Foundation. +- */ +- +-#ifndef _ATH79_DEV_USB_H +-#define _ATH79_DEV_USB_H +- +-void ath79_register_usb(void); +- +-#endif /* _ATH79_DEV_USB_H */ +--- a/arch/mips/ath79/dev-wmac.c ++++ /dev/null +@@ -1,155 +0,0 @@ +-/* +- * Atheros AR913X/AR933X SoC built-in WMAC device support +- * +- * Copyright (C) 2010-2011 Jaiganesh Narayanan +- * Copyright (C) 2008-2011 Gabor Juhos +- * Copyright (C) 2008 Imre Kaloz +- * +- * Parts of this file are based on Atheros 2.6.15/2.6.31 BSP +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of the GNU General Public License version 2 as published +- * by the Free Software Foundation. +- */ +- +-#include +-#include +-#include +-#include +-#include +- +-#include +-#include +-#include "dev-wmac.h" +- +-static struct ath9k_platform_data ath79_wmac_data; +- +-static struct resource ath79_wmac_resources[] = { +- { +- /* .start and .end fields are filled dynamically */ +- .flags = IORESOURCE_MEM, +- }, { +- /* .start and .end fields are filled dynamically */ +- .flags = IORESOURCE_IRQ, +- }, +-}; +- +-static struct platform_device ath79_wmac_device = { +- .name = "ath9k", +- .id = -1, +- .resource = ath79_wmac_resources, +- .num_resources = ARRAY_SIZE(ath79_wmac_resources), +- .dev = { +- .platform_data = &ath79_wmac_data, +- }, +-}; +- +-static void __init ar913x_wmac_setup(void) +-{ +- /* reset the WMAC */ +- ath79_device_reset_set(AR913X_RESET_AMBA2WMAC); +- mdelay(10); +- +- ath79_device_reset_clear(AR913X_RESET_AMBA2WMAC); +- mdelay(10); +- +- ath79_wmac_resources[0].start = AR913X_WMAC_BASE; +- ath79_wmac_resources[0].end = AR913X_WMAC_BASE + AR913X_WMAC_SIZE - 1; +- ath79_wmac_resources[1].start = ATH79_CPU_IRQ(2); +- ath79_wmac_resources[1].end = ATH79_CPU_IRQ(2); +-} +- +- +-static int ar933x_wmac_reset(void) +-{ +- ath79_device_reset_set(AR933X_RESET_WMAC); +- ath79_device_reset_clear(AR933X_RESET_WMAC); +- +- return 0; +-} +- +-static int ar933x_r1_get_wmac_revision(void) +-{ +- return ath79_soc_rev; +-} +- +-static void __init ar933x_wmac_setup(void) +-{ +- u32 t; +- +- ar933x_wmac_reset(); +- +- ath79_wmac_device.name = "ar933x_wmac"; +- +- ath79_wmac_resources[0].start = AR933X_WMAC_BASE; +- ath79_wmac_resources[0].end = AR933X_WMAC_BASE + AR933X_WMAC_SIZE - 1; +- ath79_wmac_resources[1].start = ATH79_CPU_IRQ(2); +- ath79_wmac_resources[1].end = ATH79_CPU_IRQ(2); +- +- t = ath79_reset_rr(AR933X_RESET_REG_BOOTSTRAP); +- if (t & AR933X_BOOTSTRAP_REF_CLK_40) +- ath79_wmac_data.is_clk_25mhz = false; +- else +- ath79_wmac_data.is_clk_25mhz = true; +- +- if (ath79_soc_rev == 1) +- ath79_wmac_data.get_mac_revision = ar933x_r1_get_wmac_revision; +- +- ath79_wmac_data.external_reset = ar933x_wmac_reset; +-} +- +-static void ar934x_wmac_setup(void) +-{ +- u32 t; +- +- ath79_wmac_device.name = "ar934x_wmac"; +- +- ath79_wmac_resources[0].start = AR934X_WMAC_BASE; +- ath79_wmac_resources[0].end = AR934X_WMAC_BASE + AR934X_WMAC_SIZE - 1; +- ath79_wmac_resources[1].start = ATH79_IP2_IRQ(1); +- ath79_wmac_resources[1].end = ATH79_IP2_IRQ(1); +- +- t = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP); +- if (t & AR934X_BOOTSTRAP_REF_CLK_40) +- ath79_wmac_data.is_clk_25mhz = false; +- else +- ath79_wmac_data.is_clk_25mhz = true; +-} +- +-static void qca955x_wmac_setup(void) +-{ +- u32 t; +- +- ath79_wmac_device.name = "qca955x_wmac"; +- +- ath79_wmac_resources[0].start = QCA955X_WMAC_BASE; +- ath79_wmac_resources[0].end = QCA955X_WMAC_BASE + QCA955X_WMAC_SIZE - 1; +- ath79_wmac_resources[1].start = ATH79_IP2_IRQ(1); +- ath79_wmac_resources[1].end = ATH79_IP2_IRQ(1); +- +- t = ath79_reset_rr(QCA955X_RESET_REG_BOOTSTRAP); +- if (t & QCA955X_BOOTSTRAP_REF_CLK_40) +- ath79_wmac_data.is_clk_25mhz = false; +- else +- ath79_wmac_data.is_clk_25mhz = true; +-} +- +-void __init ath79_register_wmac(u8 *cal_data) +-{ +- if (soc_is_ar913x()) +- ar913x_wmac_setup(); +- else if (soc_is_ar933x()) +- ar933x_wmac_setup(); +- else if (soc_is_ar934x()) +- ar934x_wmac_setup(); +- else if (soc_is_qca955x()) +- qca955x_wmac_setup(); +- else +- BUG(); +- +- if (cal_data) +- memcpy(ath79_wmac_data.eeprom_data, cal_data, +- sizeof(ath79_wmac_data.eeprom_data)); +- +- platform_device_register(&ath79_wmac_device); +-} +--- a/arch/mips/ath79/dev-wmac.h ++++ /dev/null +@@ -1,17 +0,0 @@ +-/* +- * Atheros AR913X/AR933X SoC built-in WMAC device support +- * +- * Copyright (C) 2008-2011 Gabor Juhos +- * Copyright (C) 2008 Imre Kaloz +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of the GNU General Public License version 2 as published +- * by the Free Software Foundation. +- */ +- +-#ifndef _ATH79_DEV_WMAC_H +-#define _ATH79_DEV_WMAC_H +- +-void ath79_register_wmac(u8 *cal_data); +- +-#endif /* _ATH79_DEV_WMAC_H */ +--- a/arch/mips/ath79/setup.c ++++ b/arch/mips/ath79/setup.c +@@ -32,7 +32,6 @@ + #include + #include + #include "common.h" +-#include "dev-common.h" + + #define ATH79_SYS_TYPE_LEN 64 + diff --git a/target/linux/ath79/patches-4.19/0031-MIPS-ath79-drop-OF-clock-code.patch b/target/linux/ath79/patches-4.19/0031-MIPS-ath79-drop-OF-clock-code.patch new file mode 100644 index 000000000..a11be73d7 --- /dev/null +++ b/target/linux/ath79/patches-4.19/0031-MIPS-ath79-drop-OF-clock-code.patch @@ -0,0 +1,95 @@ +From 00e4313da4609074fff134e61dd9ffe3fd37474d Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Sun, 24 Jun 2018 09:39:41 +0200 +Subject: [PATCH 31/33] MIPS: ath79: drop !OF clock code + +With the target now being fully OF based, we can drop the legacy clock +registration code. All clocks are now probed via devicetree. + +Signed-off-by: John Crispin +--- + arch/mips/ath79/clock.c | 56 ------------------------------------------------ + arch/mips/ath79/common.h | 3 --- + 2 files changed, 59 deletions(-) + +--- a/arch/mips/ath79/clock.c ++++ b/arch/mips/ath79/clock.c +@@ -617,60 +617,6 @@ static void __init qca956x_clocks_init(v + ath79_set_clk(ATH79_CLK_AHB, ahb_rate); + } + +-void __init ath79_clocks_init(void) +-{ +- const char *wdt; +- const char *uart; +- +- if (soc_is_ar71xx()) +- ar71xx_clocks_init(ath79_pll_base); +- else if (soc_is_ar724x() || soc_is_ar913x()) +- ar724x_clocks_init(ath79_pll_base); +- else if (soc_is_ar933x()) +- ar933x_clocks_init(ath79_pll_base); +- else if (soc_is_ar934x()) +- ar934x_clocks_init(ath79_pll_base); +- else if (soc_is_qca953x()) +- qca953x_clocks_init(ath79_pll_base); +- else if (soc_is_qca955x()) +- qca955x_clocks_init(ath79_pll_base); +- else if (soc_is_qca956x() || soc_is_tp9343()) +- qca956x_clocks_init(ath79_pll_base); +- else +- BUG(); +- +- if (soc_is_ar71xx() || soc_is_ar724x() || soc_is_ar913x()) { +- wdt = "ahb"; +- uart = "ahb"; +- } else if (soc_is_ar933x()) { +- wdt = "ahb"; +- uart = "ref"; +- } else { +- wdt = "ref"; +- uart = "ref"; +- } +- +- clk_add_alias("wdt", NULL, wdt, NULL); +- clk_add_alias("uart", NULL, uart, NULL); +-} +- +-unsigned long __init +-ath79_get_sys_clk_rate(const char *id) +-{ +- struct clk *clk; +- unsigned long rate; +- +- clk = clk_get(NULL, id); +- if (IS_ERR(clk)) +- panic("unable to get %s clock, err=%d", id, (int) PTR_ERR(clk)); +- +- rate = clk_get_rate(clk); +- clk_put(clk); +- +- return rate; +-} +- +-#ifdef CONFIG_OF + static void __init ath79_clocks_init_dt(struct device_node *np) + { + struct clk *ref_clk; +@@ -727,5 +673,3 @@ CLK_OF_DECLARE(ar9340_clk, "qca,ar9340-p + CLK_OF_DECLARE(ar9530_clk, "qca,qca9530-pll", ath79_clocks_init_dt); + CLK_OF_DECLARE(ar9550_clk, "qca,qca9550-pll", ath79_clocks_init_dt); + CLK_OF_DECLARE(ar9560_clk, "qca,qca9560-pll", ath79_clocks_init_dt); +- +-#endif +--- a/arch/mips/ath79/common.h ++++ b/arch/mips/ath79/common.h +@@ -19,9 +19,6 @@ + #define ATH79_MEM_SIZE_MIN (2 * 1024 * 1024) + #define ATH79_MEM_SIZE_MAX (256 * 1024 * 1024) + +-void ath79_clocks_init(void); +-unsigned long ath79_get_sys_clk_rate(const char *id); +- + void ath79_ddr_ctrl_init(void); + + #endif /* __ATH79_COMMON_H */ diff --git a/target/linux/ath79/patches-4.19/0032-MIPS-ath79-sanitize-symbols.patch b/target/linux/ath79/patches-4.19/0032-MIPS-ath79-sanitize-symbols.patch new file mode 100644 index 000000000..1c3813932 --- /dev/null +++ b/target/linux/ath79/patches-4.19/0032-MIPS-ath79-sanitize-symbols.patch @@ -0,0 +1,93 @@ +From 3fc8585cf76022dba7496627074d42af88c30718 Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Sat, 23 Jun 2018 15:16:55 +0200 +Subject: [PATCH 32/33] MIPS: ath79: sanitize symbols + +We no longer need to select which SoCs are supported as the whole arch +code is always built. So lets drop all the SoC symbols + +Signed-off-by: John Crispin +--- + arch/mips/Kconfig | 2 ++ + arch/mips/ath79/Kconfig | 44 +++++--------------------------------------- + arch/mips/pci/Makefile | 2 +- + 3 files changed, 8 insertions(+), 40 deletions(-) + +--- a/arch/mips/Kconfig ++++ b/arch/mips/Kconfig +@@ -208,6 +208,8 @@ config ATH79 + select SYS_SUPPORTS_BIG_ENDIAN + select SYS_SUPPORTS_MIPS16 + select SYS_SUPPORTS_ZBOOT_UART_PROM ++ select HW_HAS_PCI ++ select USB_ARCH_HAS_EHCI + select USE_OF + select USB_EHCI_ROOT_HUB_TT if USB_EHCI_HCD_PLATFORM + help +--- a/arch/mips/ath79/Kconfig ++++ b/arch/mips/ath79/Kconfig +@@ -1,48 +1,14 @@ + # SPDX-License-Identifier: GPL-2.0 + if ATH79 + +-config SOC_AR71XX +- select HW_HAS_PCI +- def_bool n +- +-config SOC_AR724X +- select HW_HAS_PCI +- select PCI_AR724X if PCI +- def_bool n +- +-config SOC_AR913X +- def_bool n +- +-config SOC_AR933X +- def_bool n +- +-config SOC_AR934X +- select HW_HAS_PCI +- select PCI_AR724X if PCI +- def_bool n +- +-config SOC_QCA955X +- select HW_HAS_PCI +- select PCI_AR724X if PCI ++config PCI_AR71XX ++ bool "PCI support for AR7100 type SoCs" ++ depends on PCI + def_bool n + + config PCI_AR724X +- def_bool n +- +-config ATH79_DEV_GPIO_BUTTONS +- def_bool n +- +-config ATH79_DEV_LEDS_GPIO +- def_bool n +- +-config ATH79_DEV_SPI +- def_bool n +- +-config ATH79_DEV_USB +- def_bool n +- +-config ATH79_DEV_WMAC +- depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X || SOC_QCA955X) ++ bool "PCI support for AR724x type SoCs" ++ depends on PCI + def_bool n + + endif +--- a/arch/mips/pci/Makefile ++++ b/arch/mips/pci/Makefile +@@ -23,7 +23,7 @@ obj-$(CONFIG_BCM63XX) += pci-bcm63xx.o + ops-bcm63xx.o + obj-$(CONFIG_MIPS_ALCHEMY) += pci-alchemy.o + obj-$(CONFIG_PCI_AR2315) += pci-ar2315.o +-obj-$(CONFIG_SOC_AR71XX) += pci-ar71xx.o ++obj-$(CONFIG_PCI_AR71XX) += pci-ar71xx.o + obj-$(CONFIG_PCI_AR724X) += pci-ar724x.o + obj-$(CONFIG_MIPS_PCI_VIRTIO) += pci-virtio-guest.o + # diff --git a/target/linux/ath79/patches-4.19/0033-spi-ath79-drop-pdata-support.patch b/target/linux/ath79/patches-4.19/0033-spi-ath79-drop-pdata-support.patch new file mode 100644 index 000000000..aeb50c9b1 --- /dev/null +++ b/target/linux/ath79/patches-4.19/0033-spi-ath79-drop-pdata-support.patch @@ -0,0 +1,73 @@ +From c4e197bbcecc7233aa9e553e7047fa50e4e1fe77 Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Mon, 25 Jun 2018 15:52:34 +0200 +Subject: [PATCH 33/33] spi: ath79: drop pdata support + +The target is being converted to pure OF. We can therefore drop all of the +platform data code from the driver. + +Cc: linux-spi@vger.kernel.org +Acked-by: Mark Brown +Signed-off-by: John Crispin +--- + arch/mips/include/asm/mach-ath79/ath79_spi_platform.h | 19 ------------------- + drivers/spi/spi-ath79.c | 8 -------- + 2 files changed, 27 deletions(-) + delete mode 100644 arch/mips/include/asm/mach-ath79/ath79_spi_platform.h + +--- a/arch/mips/include/asm/mach-ath79/ath79_spi_platform.h ++++ /dev/null +@@ -1,19 +0,0 @@ +-/* +- * Platform data definition for Atheros AR71XX/AR724X/AR913X SPI controller +- * +- * Copyright (C) 2008-2010 Gabor Juhos +- * +- * This program is free software; you can redistribute it and/or modify it +- * under the terms of the GNU General Public License version 2 as published +- * by the Free Software Foundation. +- */ +- +-#ifndef _ATH79_SPI_PLATFORM_H +-#define _ATH79_SPI_PLATFORM_H +- +-struct ath79_spi_platform_data { +- unsigned bus_num; +- unsigned num_chipselect; +-}; +- +-#endif /* _ATH79_SPI_PLATFORM_H */ +--- a/drivers/spi/spi-ath79.c ++++ b/drivers/spi/spi-ath79.c +@@ -26,7 +26,6 @@ + #include + + #include +-#include + + #define DRV_NAME "ath79-spi" + +@@ -208,7 +207,6 @@ static int ath79_spi_probe(struct platfo + { + struct spi_master *master; + struct ath79_spi *sp; +- struct ath79_spi_platform_data *pdata; + struct resource *r; + unsigned long rate; + int ret; +@@ -223,15 +221,9 @@ static int ath79_spi_probe(struct platfo + master->dev.of_node = pdev->dev.of_node; + platform_set_drvdata(pdev, sp); + +- pdata = dev_get_platdata(&pdev->dev); +- + master->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32); + master->setup = ath79_spi_setup; + master->cleanup = ath79_spi_cleanup; +- if (pdata) { +- master->bus_num = pdata->bus_num; +- master->num_chipselect = pdata->num_chipselect; +- } + + sp->bitbang.master = master; + sp->bitbang.chipselect = ath79_spi_chipselect; diff --git a/target/linux/ath79/patches-4.19/0034-MIPS-ath79-ath9k-exports.patch b/target/linux/ath79/patches-4.19/0034-MIPS-ath79-ath9k-exports.patch new file mode 100644 index 000000000..6eec142c7 --- /dev/null +++ b/target/linux/ath79/patches-4.19/0034-MIPS-ath79-ath9k-exports.patch @@ -0,0 +1,27 @@ +--- a/arch/mips/ath79/common.c ++++ b/arch/mips/ath79/common.c +@@ -34,11 +34,13 @@ EXPORT_SYMBOL_GPL(ath79_ddr_freq); + + enum ath79_soc_type ath79_soc; + unsigned int ath79_soc_rev; ++EXPORT_SYMBOL_GPL(ath79_soc_rev); + + void __iomem *ath79_pll_base; + void __iomem *ath79_reset_base; + EXPORT_SYMBOL_GPL(ath79_reset_base); +-static void __iomem *ath79_ddr_base; ++void __iomem *ath79_ddr_base; ++EXPORT_SYMBOL_GPL(ath79_ddr_base); + static void __iomem *ath79_ddr_wb_flush_base; + static void __iomem *ath79_ddr_pci_win_base; + +--- a/arch/mips/include/asm/mach-ath79/ath79.h ++++ b/arch/mips/include/asm/mach-ath79/ath79.h +@@ -152,6 +152,7 @@ void ath79_ddr_wb_flush(unsigned int reg + void ath79_ddr_set_pci_windows(void); + + extern void __iomem *ath79_pll_base; ++extern void __iomem *ath79_ddr_base; + extern void __iomem *ath79_reset_base; + + static inline void ath79_pll_wr(unsigned reg, u32 val) diff --git a/target/linux/ath79/patches-4.19/0036-GPIO-add-named-gpio-exports.patch b/target/linux/ath79/patches-4.19/0036-GPIO-add-named-gpio-exports.patch new file mode 100644 index 000000000..c3977efa0 --- /dev/null +++ b/target/linux/ath79/patches-4.19/0036-GPIO-add-named-gpio-exports.patch @@ -0,0 +1,165 @@ +From 4267880319bc1a2270d352e0ded6d6386242a7ef Mon Sep 17 00:00:00 2001 +From: John Crispin +Date: Tue, 12 Aug 2014 20:49:27 +0200 +Subject: [PATCH 24/53] GPIO: add named gpio exports + +Signed-off-by: John Crispin +--- + drivers/gpio/gpiolib-of.c | 68 +++++++++++++++++++++++++++++++++++++++++ + drivers/gpio/gpiolib-sysfs.c | 10 +++++- + include/asm-generic/gpio.h | 6 ++++ + include/linux/gpio/consumer.h | 8 +++++ + 4 files changed, 91 insertions(+), 1 deletion(-) + +--- a/drivers/gpio/gpiolib-of.c ++++ b/drivers/gpio/gpiolib-of.c +@@ -23,6 +23,8 @@ + #include + #include + #include ++#include ++#include + + #include "gpiolib.h" + +@@ -654,3 +656,68 @@ void of_gpiochip_remove(struct gpio_chip + gpiochip_remove_pin_ranges(chip); + of_node_put(chip->of_node); + } ++ ++static struct of_device_id gpio_export_ids[] = { ++ { .compatible = "gpio-export" }, ++ { /* sentinel */ } ++}; ++ ++static int of_gpio_export_probe(struct platform_device *pdev) ++{ ++ struct device_node *np = pdev->dev.of_node; ++ struct device_node *cnp; ++ u32 val; ++ int nb = 0; ++ ++ for_each_child_of_node(np, cnp) { ++ const char *name = NULL; ++ int gpio; ++ bool dmc; ++ int max_gpio = 1; ++ int i; ++ ++ of_property_read_string(cnp, "gpio-export,name", &name); ++ ++ if (!name) ++ max_gpio = of_gpio_count(cnp); ++ ++ for (i = 0; i < max_gpio; i++) { ++ unsigned flags = 0; ++ enum of_gpio_flags of_flags; ++ ++ gpio = of_get_gpio_flags(cnp, i, &of_flags); ++ if (!gpio_is_valid(gpio)) ++ return gpio; ++ ++ if (of_flags == OF_GPIO_ACTIVE_LOW) ++ flags |= GPIOF_ACTIVE_LOW; ++ ++ if (!of_property_read_u32(cnp, "gpio-export,output", &val)) ++ flags |= val ? GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW; ++ else ++ flags |= GPIOF_IN; ++ ++ if (devm_gpio_request_one(&pdev->dev, gpio, flags, name ? name : of_node_full_name(np))) ++ continue; ++ ++ dmc = of_property_read_bool(cnp, "gpio-export,direction_may_change"); ++ gpio_export_with_name(gpio, dmc, name); ++ nb++; ++ } ++ } ++ ++ dev_info(&pdev->dev, "%d gpio(s) exported\n", nb); ++ ++ return 0; ++} ++ ++static struct platform_driver gpio_export_driver = { ++ .driver = { ++ .name = "gpio-export", ++ .owner = THIS_MODULE, ++ .of_match_table = of_match_ptr(gpio_export_ids), ++ }, ++ .probe = of_gpio_export_probe, ++}; ++ ++module_platform_driver(gpio_export_driver); +--- a/drivers/gpio/gpiolib-sysfs.c ++++ b/drivers/gpio/gpiolib-sysfs.c +@@ -568,7 +568,7 @@ static struct class gpio_class = { + * + * Returns zero on success, else an error. + */ +-int gpiod_export(struct gpio_desc *desc, bool direction_may_change) ++int __gpiod_export(struct gpio_desc *desc, bool direction_may_change, const char *name) + { + struct gpio_chip *chip; + struct gpio_device *gdev; +@@ -630,6 +630,8 @@ int gpiod_export(struct gpio_desc *desc, + offset = gpio_chip_hwgpio(desc); + if (chip->names && chip->names[offset]) + ioname = chip->names[offset]; ++ if (name) ++ ioname = name; + + dev = device_create_with_groups(&gpio_class, &gdev->dev, + MKDEV(0, 0), data, gpio_groups, +@@ -651,6 +653,12 @@ err_unlock: + gpiod_dbg(desc, "%s: status %d\n", __func__, status); + return status; + } ++EXPORT_SYMBOL_GPL(__gpiod_export); ++ ++int gpiod_export(struct gpio_desc *desc, bool direction_may_change) ++{ ++ return __gpiod_export(desc, direction_may_change, NULL); ++} + EXPORT_SYMBOL_GPL(gpiod_export); + + static int match_export(struct device *dev, const void *desc) +--- a/include/asm-generic/gpio.h ++++ b/include/asm-generic/gpio.h +@@ -127,6 +127,12 @@ static inline int gpio_export(unsigned g + return gpiod_export(gpio_to_desc(gpio), direction_may_change); + } + ++int __gpiod_export(struct gpio_desc *desc, bool direction_may_change, const char *name); ++static inline int gpio_export_with_name(unsigned gpio, bool direction_may_change, const char *name) ++{ ++ return __gpiod_export(gpio_to_desc(gpio), direction_may_change, name); ++} ++ + static inline int gpio_export_link(struct device *dev, const char *name, + unsigned gpio) + { +--- a/include/linux/gpio/consumer.h ++++ b/include/linux/gpio/consumer.h +@@ -533,6 +533,7 @@ struct gpio_desc *devm_fwnode_get_gpiod_ + + #if IS_ENABLED(CONFIG_GPIOLIB) && IS_ENABLED(CONFIG_GPIO_SYSFS) + ++int _gpiod_export(struct gpio_desc *desc, bool direction_may_change, const char *name); + int gpiod_export(struct gpio_desc *desc, bool direction_may_change); + int gpiod_export_link(struct device *dev, const char *name, + struct gpio_desc *desc); +@@ -540,6 +541,13 @@ void gpiod_unexport(struct gpio_desc *de + + #else /* CONFIG_GPIOLIB && CONFIG_GPIO_SYSFS */ + ++static inline int _gpiod_export(struct gpio_desc *desc, ++ bool direction_may_change, ++ const char *name) ++{ ++ return -ENOSYS; ++} ++ + static inline int gpiod_export(struct gpio_desc *desc, + bool direction_may_change) + { diff --git a/target/linux/ath79/patches-4.19/0036-MIPS-ath79-remove-irq-code-from-pci.patch b/target/linux/ath79/patches-4.19/0036-MIPS-ath79-remove-irq-code-from-pci.patch new file mode 100644 index 000000000..460c4580e --- /dev/null +++ b/target/linux/ath79/patches-4.19/0036-MIPS-ath79-remove-irq-code-from-pci.patch @@ -0,0 +1,139 @@ +--- a/arch/mips/pci/pci-ar71xx.c ++++ b/arch/mips/pci/pci-ar71xx.c +@@ -54,11 +54,9 @@ + struct ar71xx_pci_controller { + struct device_node *np; + void __iomem *cfg_base; +- int irq; + struct pci_controller pci_ctrl; + struct resource io_res; + struct resource mem_res; +- struct irq_domain *domain; + }; + + /* Byte lane enable bits */ +@@ -230,104 +228,6 @@ static struct pci_ops ar71xx_pci_ops = { + .write = ar71xx_pci_write_config, + }; + +-static void ar71xx_pci_irq_handler(struct irq_desc *desc) +-{ +- void __iomem *base = ath79_reset_base; +- struct irq_chip *chip = irq_desc_get_chip(desc); +- struct ar71xx_pci_controller *apc = irq_desc_get_handler_data(desc); +- u32 pending; +- +- chained_irq_enter(chip, desc); +- pending = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_STATUS) & +- __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); +- +- if (pending & AR71XX_PCI_INT_DEV0) +- generic_handle_irq(irq_linear_revmap(apc->domain, 1)); +- +- else if (pending & AR71XX_PCI_INT_DEV1) +- generic_handle_irq(irq_linear_revmap(apc->domain, 2)); +- +- else if (pending & AR71XX_PCI_INT_DEV2) +- generic_handle_irq(irq_linear_revmap(apc->domain, 3)); +- +- else if (pending & AR71XX_PCI_INT_CORE) +- generic_handle_irq(irq_linear_revmap(apc->domain, 4)); +- +- else +- spurious_interrupt(); +- chained_irq_exit(chip, desc); +-} +- +-static void ar71xx_pci_irq_unmask(struct irq_data *d) +-{ +- struct ar71xx_pci_controller *apc; +- unsigned int irq; +- void __iomem *base = ath79_reset_base; +- u32 t; +- +- apc = irq_data_get_irq_chip_data(d); +- irq = irq_linear_revmap(apc->domain, d->irq); +- +- t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); +- __raw_writel(t | (1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE); +- +- /* flush write */ +- __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); +-} +- +-static void ar71xx_pci_irq_mask(struct irq_data *d) +-{ +- struct ar71xx_pci_controller *apc; +- unsigned int irq; +- void __iomem *base = ath79_reset_base; +- u32 t; +- +- apc = irq_data_get_irq_chip_data(d); +- irq = irq_linear_revmap(apc->domain, d->irq); +- +- t = __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); +- __raw_writel(t & ~(1 << irq), base + AR71XX_RESET_REG_PCI_INT_ENABLE); +- +- /* flush write */ +- __raw_readl(base + AR71XX_RESET_REG_PCI_INT_ENABLE); +-} +- +-static struct irq_chip ar71xx_pci_irq_chip = { +- .name = "AR71XX PCI", +- .irq_mask = ar71xx_pci_irq_mask, +- .irq_unmask = ar71xx_pci_irq_unmask, +- .irq_mask_ack = ar71xx_pci_irq_mask, +-}; +- +-static int ar71xx_pci_irq_map(struct irq_domain *d, +- unsigned int irq, irq_hw_number_t hw) +-{ +- struct ar71xx_pci_controller *apc = d->host_data; +- +- irq_set_chip_and_handler(irq, &ar71xx_pci_irq_chip, handle_level_irq); +- irq_set_chip_data(irq, apc); +- +- return 0; +-} +- +-static const struct irq_domain_ops ar71xx_pci_domain_ops = { +- .xlate = irq_domain_xlate_onecell, +- .map = ar71xx_pci_irq_map, +-}; +- +-static void ar71xx_pci_irq_init(struct ar71xx_pci_controller *apc) +-{ +- void __iomem *base = ath79_reset_base; +- +- __raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_ENABLE); +- __raw_writel(0, base + AR71XX_RESET_REG_PCI_INT_STATUS); +- +- apc->domain = irq_domain_add_linear(apc->np, AR71XX_PCI_IRQ_COUNT, +- &ar71xx_pci_domain_ops, apc); +- irq_set_chained_handler_and_data(apc->irq, ar71xx_pci_irq_handler, +- apc); +-} +- + static void ar71xx_pci_reset(void) + { + ath79_device_reset_set(AR71XX_RESET_PCI_BUS | AR71XX_RESET_PCI_CORE); +@@ -361,10 +261,6 @@ static int ar71xx_pci_probe(struct platf + if (IS_ERR(apc->cfg_base)) + return PTR_ERR(apc->cfg_base); + +- apc->irq = platform_get_irq(pdev, 0); +- if (apc->irq < 0) +- return -EINVAL; +- + ar71xx_pci_reset(); + + /* setup COMMAND register */ +@@ -375,8 +271,6 @@ static int ar71xx_pci_probe(struct platf + /* clear bus errors */ + ar71xx_pci_check_error(apc, 1); + +- ar71xx_pci_irq_init(apc); +- + apc->np = pdev->dev.of_node; + apc->pci_ctrl.pci_ops = &ar71xx_pci_ops; + apc->pci_ctrl.mem_resource = &apc->mem_res; diff --git a/target/linux/ath79/patches-4.19/0037-missing-registers.patch b/target/linux/ath79/patches-4.19/0037-missing-registers.patch new file mode 100644 index 000000000..9fde3d39d --- /dev/null +++ b/target/linux/ath79/patches-4.19/0037-missing-registers.patch @@ -0,0 +1,21 @@ +commit f3ffac90bc7266b7d917616f3233f58e8c08a196 +Author: Christian Lamparter +Date: Fri Aug 10 23:24:47 2018 +0200 + + ath79: gmac: add parsers for rxd(v)- and tx(d|en)-delay for AR9344 + + Signed-off-by: Christian Lamparter + +--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h ++++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +@@ -1229,6 +1229,10 @@ + #define AR934X_ETH_CFG_RDV_DELAY BIT(16) + #define AR934X_ETH_CFG_RDV_DELAY_MASK 0x3 + #define AR934X_ETH_CFG_RDV_DELAY_SHIFT 16 ++#define AR934X_ETH_CFG_TXD_DELAY_MASK 0x3 ++#define AR934X_ETH_CFG_TXD_DELAY_SHIFT 18 ++#define AR934X_ETH_CFG_TXE_DELAY_MASK 0x3 ++#define AR934X_ETH_CFG_TXE_DELAY_SHIFT 20 + + /* + * QCA953X GMAC Interface diff --git a/target/linux/ath79/patches-4.19/004-register_gpio_driver_earlier.patch b/target/linux/ath79/patches-4.19/004-register_gpio_driver_earlier.patch new file mode 100644 index 000000000..78899c45e --- /dev/null +++ b/target/linux/ath79/patches-4.19/004-register_gpio_driver_earlier.patch @@ -0,0 +1,18 @@ +HACK: register the GPIO driver earlier to ensure that gpio_request calls +from mach files succeed. + +--- a/drivers/gpio/gpio-ath79.c ++++ b/drivers/gpio/gpio-ath79.c +@@ -325,7 +325,11 @@ static struct platform_driver ath79_gpio + .remove = ath79_gpio_remove, + }; + +-module_platform_driver(ath79_gpio_driver); ++static int __init ath79_gpio_init(void) ++{ ++ return platform_driver_register(&ath79_gpio_driver); ++} ++postcore_initcall(ath79_gpio_init); + + MODULE_DESCRIPTION("Atheros AR71XX/AR724X/AR913X GPIO API support"); + MODULE_LICENSE("GPL v2"); diff --git a/target/linux/ath79/patches-4.19/403-mtd_fix_cfi_cmdset_0002_status_check.patch b/target/linux/ath79/patches-4.19/403-mtd_fix_cfi_cmdset_0002_status_check.patch new file mode 100644 index 000000000..eeda62095 --- /dev/null +++ b/target/linux/ath79/patches-4.19/403-mtd_fix_cfi_cmdset_0002_status_check.patch @@ -0,0 +1,64 @@ +--- a/drivers/mtd/chips/cfi_cmdset_0002.c ++++ b/drivers/mtd/chips/cfi_cmdset_0002.c +@@ -1634,8 +1634,8 @@ static int __xipram do_write_oneword(str + break; + } + +- if (chip_ready(map, adr)) +- break; ++ if (chip_good(map, adr, datum)) ++ goto enable_xip; + + /* Latency issues. Drop the lock, wait a while and retry */ + UDELAY(map, chip, adr, 1); +@@ -1651,6 +1651,8 @@ static int __xipram do_write_oneword(str + + ret = -EIO; + } ++ ++ enable_xip: + xip_enable(map, chip, adr); + op_done: + if (mode == FL_OTP_WRITE) +@@ -2229,7 +2231,6 @@ static int cfi_amdstd_panic_write(struct + return 0; + } + +- + /* + * Handle devices with one erase region, that only implement + * the chip erase command. +@@ -2297,7 +2298,7 @@ static int __xipram do_erase_chip(struct + } + + if (chip_good(map, adr, map_word_ff(map))) +- break; ++ goto op_done; + + if (time_after(jiffies, timeo)) { + printk(KERN_WARNING "MTD %s(): software timeout\n", +@@ -2321,6 +2322,7 @@ static int __xipram do_erase_chip(struct + } + } + ++ op_done: + chip->state = FL_READY; + xip_enable(map, chip, adr); + DISABLE_VPP(map); +@@ -2393,7 +2395,7 @@ static int __xipram do_erase_oneblock(st + } + + if (chip_good(map, adr, map_word_ff(map))) +- break; ++ goto op_done; + + if (time_after(jiffies, timeo)) { + printk(KERN_WARNING "MTD %s(): software timeout\n", +@@ -2417,6 +2419,7 @@ static int __xipram do_erase_oneblock(st + } + } + ++ op_done: + chip->state = FL_READY; + xip_enable(map, chip, adr); + DISABLE_VPP(map); diff --git a/target/linux/ath79/patches-4.19/404-mtd-cybertan-trx-parser.patch b/target/linux/ath79/patches-4.19/404-mtd-cybertan-trx-parser.patch new file mode 100644 index 000000000..22e31db3f --- /dev/null +++ b/target/linux/ath79/patches-4.19/404-mtd-cybertan-trx-parser.patch @@ -0,0 +1,20 @@ +--- a/drivers/mtd/parsers/Makefile ++++ b/drivers/mtd/parsers/Makefile +@@ -1,2 +1,3 @@ ++obj-$(CONFIG_MTD_PARSER_CYBERTAN) += parser_cybertan.o + obj-$(CONFIG_MTD_PARSER_TRX) += parser_trx.o + obj-$(CONFIG_MTD_SHARPSL_PARTS) += sharpslpart.o +--- a/drivers/mtd/parsers/Kconfig ++++ b/drivers/mtd/parsers/Kconfig +@@ -1,3 +1,11 @@ ++config MTD_PARSER_CYBERTAN ++ tristate "Parser for Cybertan format partitions" ++ depends on MTD && (ATH79 || COMPILE_TEST) ++ help ++ Cybertan has a proprietory header than encompasses a Broadcom trx ++ header. This driver will parse the header and take care of the ++ special offsets that result in the extra headers. ++ + config MTD_PARSER_TRX + tristate "Parser for TRX format partitions" + depends on MTD && (BCM47XX || ARCH_BCM_5301X || COMPILE_TEST) diff --git a/target/linux/ath79/patches-4.19/405-mtd-tp-link-partition-parser.patch b/target/linux/ath79/patches-4.19/405-mtd-tp-link-partition-parser.patch new file mode 100644 index 000000000..16fe5ed27 --- /dev/null +++ b/target/linux/ath79/patches-4.19/405-mtd-tp-link-partition-parser.patch @@ -0,0 +1,25 @@ +--- a/drivers/mtd/Kconfig ++++ b/drivers/mtd/Kconfig +@@ -193,6 +193,12 @@ config MTD_MYLOADER_PARTS + You will still need the parsing functions to be called by the driver + for your particular device. It won't happen automatically. + ++config MTD_TPLINK_PARTS ++ tristate "TP-Link AR7XXX/AR9XXX partitioning support" ++ depends on ATH79 ++ ---help--- ++ TBD. ++ + comment "User Modules And Translation Layers" + + # +--- a/drivers/mtd/Makefile ++++ b/drivers/mtd/Makefile +@@ -18,6 +18,7 @@ obj-$(CONFIG_MTD_BCM63XX_PARTS) += bcm63 + obj-$(CONFIG_MTD_BCM47XX_PARTS) += bcm47xxpart.o + obj-$(CONFIG_MTD_MYLOADER_PARTS) += myloader.o + obj-y += parsers/ ++obj-$(CONFIG_MTD_TPLINK_PARTS) += tplinkpart.o + + # 'Users' - code which presents functionality to userspace. + obj-$(CONFIG_MTD_BLKDEVS) += mtd_blkdevs.o diff --git a/target/linux/ath79/patches-4.19/420-net-ar71xx_mac_driver.patch b/target/linux/ath79/patches-4.19/420-net-ar71xx_mac_driver.patch new file mode 100644 index 000000000..6377db0ac --- /dev/null +++ b/target/linux/ath79/patches-4.19/420-net-ar71xx_mac_driver.patch @@ -0,0 +1,28 @@ +--- a/drivers/net/ethernet/atheros/Kconfig ++++ b/drivers/net/ethernet/atheros/Kconfig +@@ -5,7 +5,7 @@ + config NET_VENDOR_ATHEROS + bool "Atheros devices" + default y +- depends on PCI ++ depends on (PCI || ATH79) + ---help--- + If you have a network (Ethernet) card belonging to this class, say Y. + +@@ -78,4 +78,6 @@ config ALX + To compile this driver as a module, choose M here. The module + will be called alx. + ++source drivers/net/ethernet/atheros/ag71xx/Kconfig ++ + endif # NET_VENDOR_ATHEROS +--- a/drivers/net/ethernet/atheros/Makefile ++++ b/drivers/net/ethernet/atheros/Makefile +@@ -3,6 +3,7 @@ + # Makefile for the Atheros network device drivers. + # + ++obj-$(CONFIG_AG71XX) += ag71xx/ + obj-$(CONFIG_ATL1) += atlx/ + obj-$(CONFIG_ATL2) += atlx/ + obj-$(CONFIG_ATL1E) += atl1e/ diff --git a/target/linux/ath79/patches-4.19/430-drivers-link-spi-before-mtd.patch b/target/linux/ath79/patches-4.19/430-drivers-link-spi-before-mtd.patch new file mode 100644 index 000000000..4c6558db9 --- /dev/null +++ b/target/linux/ath79/patches-4.19/430-drivers-link-spi-before-mtd.patch @@ -0,0 +1,12 @@ +--- a/drivers/Makefile ++++ b/drivers/Makefile +@@ -80,8 +80,8 @@ obj-y += scsi/ + obj-y += nvme/ + obj-$(CONFIG_ATA) += ata/ + obj-$(CONFIG_TARGET_CORE) += target/ +-obj-$(CONFIG_MTD) += mtd/ + obj-$(CONFIG_SPI) += spi/ ++obj-$(CONFIG_MTD) += mtd/ + obj-$(CONFIG_SPMI) += spmi/ + obj-$(CONFIG_HSI) += hsi/ + obj-$(CONFIG_SLIMBUS) += slimbus/ diff --git a/target/linux/ath79/patches-4.19/470-MIPS-ath79-swizzle-pci-address-for-ar71xx.patch b/target/linux/ath79/patches-4.19/470-MIPS-ath79-swizzle-pci-address-for-ar71xx.patch new file mode 100644 index 000000000..634ce5635 --- /dev/null +++ b/target/linux/ath79/patches-4.19/470-MIPS-ath79-swizzle-pci-address-for-ar71xx.patch @@ -0,0 +1,98 @@ +--- /dev/null ++++ b/arch/mips/include/asm/mach-ath79/mangle-port.h +@@ -0,0 +1,37 @@ ++/* ++ * Copyright (C) 2012 Gabor Juhos ++ * ++ * This file was derived from: inlude/asm-mips/mach-generic/mangle-port.h ++ * Copyright (C) 2003, 2004 Ralf Baechle ++ * ++ * This program is free software; you can redistribute it and/or modify it ++ * under the terms of the GNU General Public License version 2 as published ++ * by the Free Software Foundation. ++ */ ++ ++#ifndef __ASM_MACH_ATH79_MANGLE_PORT_H ++#define __ASM_MACH_ATH79_MANGLE_PORT_H ++ ++#ifdef CONFIG_PCI_AR71XX ++extern unsigned long (ath79_pci_swizzle_b)(unsigned long port); ++extern unsigned long (ath79_pci_swizzle_w)(unsigned long port); ++#else ++#define ath79_pci_swizzle_b(port) (port) ++#define ath79_pci_swizzle_w(port) (port) ++#endif ++ ++#define __swizzle_addr_b(port) ath79_pci_swizzle_b(port) ++#define __swizzle_addr_w(port) ath79_pci_swizzle_w(port) ++#define __swizzle_addr_l(port) (port) ++#define __swizzle_addr_q(port) (port) ++ ++# define ioswabb(a, x) (x) ++# define __mem_ioswabb(a, x) (x) ++# define ioswabw(a, x) (x) ++# define __mem_ioswabw(a, x) cpu_to_le16(x) ++# define ioswabl(a, x) (x) ++# define __mem_ioswabl(a, x) cpu_to_le32(x) ++# define ioswabq(a, x) (x) ++# define __mem_ioswabq(a, x) cpu_to_le64(x) ++ ++#endif /* __ASM_MACH_ATH79_MANGLE_PORT_H */ +--- a/arch/mips/pci/pci-ar71xx.c ++++ b/arch/mips/pci/pci-ar71xx.c +@@ -71,6 +71,45 @@ static const u32 ar71xx_pci_read_mask[8] + 0, 0xff, 0xffff, 0, 0xffffffff, 0, 0, 0 + }; + ++static unsigned long (*__ath79_pci_swizzle_b)(unsigned long port); ++static unsigned long (*__ath79_pci_swizzle_w)(unsigned long port); ++ ++static inline bool ar71xx_is_pci_addr(unsigned long port) ++{ ++ unsigned long phys = CPHYSADDR(port); ++ ++ return (phys >= AR71XX_PCI_MEM_BASE && ++ phys < AR71XX_PCI_MEM_BASE + AR71XX_PCI_MEM_SIZE); ++} ++ ++static unsigned long ar71xx_pci_swizzle_b(unsigned long port) ++{ ++ return ar71xx_is_pci_addr(port) ? port ^ 3 : port; ++} ++ ++static unsigned long ar71xx_pci_swizzle_w(unsigned long port) ++{ ++ return ar71xx_is_pci_addr(port) ? port ^ 2 : port; ++} ++ ++unsigned long ath79_pci_swizzle_b(unsigned long port) ++{ ++ if (__ath79_pci_swizzle_b) ++ return __ath79_pci_swizzle_b(port); ++ ++ return port; ++} ++EXPORT_SYMBOL(ath79_pci_swizzle_b); ++ ++unsigned long ath79_pci_swizzle_w(unsigned long port) ++{ ++ if (__ath79_pci_swizzle_w) ++ return __ath79_pci_swizzle_w(port); ++ ++ return port; ++} ++EXPORT_SYMBOL(ath79_pci_swizzle_w); ++ + static inline u32 ar71xx_pci_get_ble(int where, int size, int local) + { + u32 t; +@@ -279,6 +318,9 @@ static int ar71xx_pci_probe(struct platf + + register_pci_controller(&apc->pci_ctrl); + ++ __ath79_pci_swizzle_b = ar71xx_pci_swizzle_b; ++ __ath79_pci_swizzle_w = ar71xx_pci_swizzle_w; ++ + return 0; + } + diff --git a/target/linux/ath79/patches-4.19/490-usb-ehci-add-quirks-for-qca-socs.patch b/target/linux/ath79/patches-4.19/490-usb-ehci-add-quirks-for-qca-socs.patch new file mode 100644 index 000000000..4e2a6fece --- /dev/null +++ b/target/linux/ath79/patches-4.19/490-usb-ehci-add-quirks-for-qca-socs.patch @@ -0,0 +1,103 @@ +--- a/drivers/usb/host/ehci-hcd.c ++++ b/drivers/usb/host/ehci-hcd.c +@@ -239,6 +239,37 @@ int ehci_reset(struct ehci_hcd *ehci) + command |= CMD_RESET; + dbg_cmd (ehci, "reset", command); + ehci_writel(ehci, command, &ehci->regs->command); ++ ++ if (ehci->qca_force_host_mode) { ++ u32 usbmode; ++ ++ udelay(1000); ++ ++ usbmode = ehci_readl(ehci, &ehci->regs->usbmode); ++ usbmode |= USBMODE_CM_HC | (1 << 4); ++ ehci_writel(ehci, usbmode, &ehci->regs->usbmode); ++ ++ ehci_dbg(ehci, "forced host mode, usbmode: %08x\n", ++ ehci_readl(ehci, &ehci->regs->usbmode)); ++ } ++ ++ if (ehci->qca_force_16bit_ptw) { ++ u32 port_status; ++ ++ udelay(1000); ++ ++ /* enable 16-bit UTMI interface */ ++ port_status = ehci_readl(ehci, &ehci->regs->port_status[0]); ++ port_status |= BIT(28); ++ ehci_writel(ehci, port_status, &ehci->regs->port_status[0]); ++ ++ ehci_dbg(ehci, "16-bit UTMI interface enabled, status: %08x\n", ++ ehci_readl(ehci, &ehci->regs->port_status[0])); ++ } ++ ++ if (ehci->reset_notifier) ++ ehci->reset_notifier(ehci_to_hcd(ehci)); ++ + ehci->rh_state = EHCI_RH_HALTED; + ehci->next_statechange = jiffies; + retval = ehci_handshake(ehci, &ehci->regs->command, +--- a/drivers/usb/host/ehci.h ++++ b/drivers/usb/host/ehci.h +@@ -219,6 +219,10 @@ struct ehci_hcd { /* one per controlle + unsigned need_oc_pp_cycle:1; /* MPC834X port power */ + unsigned imx28_write_fix:1; /* For Freescale i.MX28 */ + unsigned ignore_oc:1; ++ unsigned qca_force_host_mode:1; ++ unsigned qca_force_16bit_ptw:1; /* force 16 bit UTMI */ ++ ++ void (*reset_notifier)(struct usb_hcd *hcd); + + /* required for usb32 quirk */ + #define OHCI_CTRL_HCFS (3 << 6) +--- a/include/linux/usb/ehci_pdriver.h ++++ b/include/linux/usb/ehci_pdriver.h +@@ -51,6 +51,8 @@ struct usb_ehci_pdata { + unsigned reset_on_resume:1; + unsigned dma_mask_64:1; + unsigned ignore_oc:1; ++ unsigned qca_force_host_mode:1; ++ unsigned qca_force_16bit_ptw:1; + + /* Turn on all power and clocks */ + int (*power_on)(struct platform_device *pdev); +@@ -60,6 +62,7 @@ struct usb_ehci_pdata { + * turn off everything else */ + void (*power_suspend)(struct platform_device *pdev); + int (*pre_setup)(struct usb_hcd *hcd); ++ void (*reset_notifier)(struct platform_device *pdev); + }; + + #endif /* __USB_CORE_EHCI_PDRIVER_H */ +--- a/drivers/usb/host/ehci-platform.c ++++ b/drivers/usb/host/ehci-platform.c +@@ -48,6 +48,14 @@ struct ehci_platform_priv { + + static const char hcd_name[] = "ehci-platform"; + ++static void ehci_platform_reset_notifier(struct usb_hcd *hcd) ++{ ++ struct platform_device *pdev = to_platform_device(hcd->self.controller); ++ struct usb_ehci_pdata *pdata = pdev->dev.platform_data; ++ ++ pdata->reset_notifier(pdev); ++} ++ + static int ehci_platform_reset(struct usb_hcd *hcd) + { + struct platform_device *pdev = to_platform_device(hcd->self.controller); +@@ -215,6 +223,13 @@ static int ehci_platform_probe(struct pl + priv->reset_on_resume = true; + if (pdata->ignore_oc) + ehci->ignore_oc = 1; ++ if (pdata->qca_force_host_mode) ++ ehci->qca_force_host_mode = 1; ++ if (pdata->qca_force_16bit_ptw) ++ ehci->qca_force_16bit_ptw = 1; ++ ++ if (pdata->reset_notifier) ++ ehci->reset_notifier = ehci_platform_reset_notifier; + + #ifndef CONFIG_USB_EHCI_BIG_ENDIAN_MMIO + if (ehci->big_endian_mmio) { diff --git a/target/linux/ath79/patches-4.19/900-mdio_bitbang_ignore_ta_value.patch b/target/linux/ath79/patches-4.19/900-mdio_bitbang_ignore_ta_value.patch new file mode 100644 index 000000000..8f8f349a6 --- /dev/null +++ b/target/linux/ath79/patches-4.19/900-mdio_bitbang_ignore_ta_value.patch @@ -0,0 +1,32 @@ +--- a/drivers/net/phy/mdio-bitbang.c ++++ b/drivers/net/phy/mdio-bitbang.c +@@ -155,7 +155,7 @@ static int mdiobb_cmd_addr(struct mdiobb + static int mdiobb_read(struct mii_bus *bus, int phy, int reg) + { + struct mdiobb_ctrl *ctrl = bus->priv; +- int ret, i; ++ int ret; + + if (reg & MII_ADDR_C45) { + reg = mdiobb_cmd_addr(ctrl, phy, reg); +@@ -165,19 +165,7 @@ static int mdiobb_read(struct mii_bus *b + + ctrl->ops->set_mdio_dir(ctrl, 0); + +- /* check the turnaround bit: the PHY should be driving it to zero, if this +- * PHY is listed in phy_ignore_ta_mask as having broken TA, skip that +- */ +- if (mdiobb_get_bit(ctrl) != 0 && +- !(bus->phy_ignore_ta_mask & (1 << phy))) { +- /* PHY didn't drive TA low -- flush any bits it +- * may be trying to send. +- */ +- for (i = 0; i < 32; i++) +- mdiobb_get_bit(ctrl); +- +- return 0xffff; +- } ++ mdiobb_get_bit(ctrl); + + ret = mdiobb_get_num(ctrl, 16); + mdiobb_get_bit(ctrl); diff --git a/target/linux/ath79/patches-4.19/901-phy-mdio-bitbang-prevent-rescheduling-during-command.patch b/target/linux/ath79/patches-4.19/901-phy-mdio-bitbang-prevent-rescheduling-during-command.patch new file mode 100644 index 000000000..a830346a3 --- /dev/null +++ b/target/linux/ath79/patches-4.19/901-phy-mdio-bitbang-prevent-rescheduling-during-command.patch @@ -0,0 +1,61 @@ +From 66e584435ac0de6e0abeb6d7166fe4fe25d6bb73 Mon Sep 17 00:00:00 2001 +From: Jonas Gorski +Date: Tue, 16 Jun 2015 13:15:08 +0200 +Subject: [PATCH] phy/mdio-bitbang: prevent rescheduling during command + +It seems some phys have some maximum timings for accessing the MDIO line, +resulting in bit errors under cpu stress. Prevent this from happening by +disabling interrupts when sending commands. + +Signed-off-by: Jonas Gorski +--- + drivers/net/phy/mdio-bitbang.c | 9 +++++++++ + 1 file changed, 9 insertions(+) + +--- a/drivers/net/phy/mdio-bitbang.c ++++ b/drivers/net/phy/mdio-bitbang.c +@@ -17,6 +17,7 @@ + * kind, whether express or implied. + */ + ++#include + #include + #include + #include +@@ -156,7 +157,9 @@ static int mdiobb_read(struct mii_bus *b + { + struct mdiobb_ctrl *ctrl = bus->priv; + int ret; ++ unsigned long flags; + ++ local_irq_save(flags); + if (reg & MII_ADDR_C45) { + reg = mdiobb_cmd_addr(ctrl, phy, reg); + mdiobb_cmd(ctrl, MDIO_C45_READ, phy, reg); +@@ -169,13 +172,17 @@ static int mdiobb_read(struct mii_bus *b + + ret = mdiobb_get_num(ctrl, 16); + mdiobb_get_bit(ctrl); ++ local_irq_restore(flags); ++ + return ret; + } + + static int mdiobb_write(struct mii_bus *bus, int phy, int reg, u16 val) + { + struct mdiobb_ctrl *ctrl = bus->priv; ++ unsigned long flags; + ++ local_irq_save(flags); + if (reg & MII_ADDR_C45) { + reg = mdiobb_cmd_addr(ctrl, phy, reg); + mdiobb_cmd(ctrl, MDIO_C45_WRITE, phy, reg); +@@ -190,6 +197,8 @@ static int mdiobb_write(struct mii_bus * + + ctrl->ops->set_mdio_dir(ctrl, 0); + mdiobb_get_bit(ctrl); ++ local_irq_restore(flags); ++ + return 0; + } + diff --git a/target/linux/ath79/patches-4.19/910-unaligned_access_hacks.patch b/target/linux/ath79/patches-4.19/910-unaligned_access_hacks.patch new file mode 100644 index 000000000..67e462aec --- /dev/null +++ b/target/linux/ath79/patches-4.19/910-unaligned_access_hacks.patch @@ -0,0 +1,891 @@ +--- a/arch/mips/include/asm/checksum.h ++++ b/arch/mips/include/asm/checksum.h +@@ -134,26 +134,30 @@ static inline __sum16 ip_fast_csum(const + const unsigned int *stop = word + ihl; + unsigned int csum; + int carry; ++ unsigned int w; + +- csum = word[0]; +- csum += word[1]; +- carry = (csum < word[1]); ++ csum = net_hdr_word(word++); ++ ++ w = net_hdr_word(word++); ++ csum += w; ++ carry = (csum < w); + csum += carry; + +- csum += word[2]; +- carry = (csum < word[2]); ++ w = net_hdr_word(word++); ++ csum += w; ++ carry = (csum < w); + csum += carry; + +- csum += word[3]; +- carry = (csum < word[3]); ++ w = net_hdr_word(word++); ++ csum += w; ++ carry = (csum < w); + csum += carry; + +- word += 4; + do { +- csum += *word; +- carry = (csum < *word); ++ w = net_hdr_word(word++); ++ csum += w; ++ carry = (csum < w); + csum += carry; +- word++; + } while (word != stop); + + return csum_fold(csum); +@@ -214,73 +218,6 @@ static inline __sum16 ip_compute_csum(co + return csum_fold(csum_partial(buff, len, 0)); + } + +-#define _HAVE_ARCH_IPV6_CSUM +-static __inline__ __sum16 csum_ipv6_magic(const struct in6_addr *saddr, +- const struct in6_addr *daddr, +- __u32 len, __u8 proto, +- __wsum sum) +-{ +- __wsum tmp; +- +- __asm__( +- " .set push # csum_ipv6_magic\n" +- " .set noreorder \n" +- " .set noat \n" +- " addu %0, %5 # proto (long in network byte order)\n" +- " sltu $1, %0, %5 \n" +- " addu %0, $1 \n" +- +- " addu %0, %6 # csum\n" +- " sltu $1, %0, %6 \n" +- " lw %1, 0(%2) # four words source address\n" +- " addu %0, $1 \n" +- " addu %0, %1 \n" +- " sltu $1, %0, %1 \n" +- +- " lw %1, 4(%2) \n" +- " addu %0, $1 \n" +- " addu %0, %1 \n" +- " sltu $1, %0, %1 \n" +- +- " lw %1, 8(%2) \n" +- " addu %0, $1 \n" +- " addu %0, %1 \n" +- " sltu $1, %0, %1 \n" +- +- " lw %1, 12(%2) \n" +- " addu %0, $1 \n" +- " addu %0, %1 \n" +- " sltu $1, %0, %1 \n" +- +- " lw %1, 0(%3) \n" +- " addu %0, $1 \n" +- " addu %0, %1 \n" +- " sltu $1, %0, %1 \n" +- +- " lw %1, 4(%3) \n" +- " addu %0, $1 \n" +- " addu %0, %1 \n" +- " sltu $1, %0, %1 \n" +- +- " lw %1, 8(%3) \n" +- " addu %0, $1 \n" +- " addu %0, %1 \n" +- " sltu $1, %0, %1 \n" +- +- " lw %1, 12(%3) \n" +- " addu %0, $1 \n" +- " addu %0, %1 \n" +- " sltu $1, %0, %1 \n" +- +- " addu %0, $1 # Add final carry\n" +- " .set pop" +- : "=&r" (sum), "=&r" (tmp) +- : "r" (saddr), "r" (daddr), +- "0" (htonl(len)), "r" (htonl(proto)), "r" (sum)); +- +- return csum_fold(sum); +-} +- + #include + #endif /* CONFIG_GENERIC_CSUM */ + +--- a/include/uapi/linux/ip.h ++++ b/include/uapi/linux/ip.h +@@ -103,7 +103,7 @@ struct iphdr { + __be32 saddr; + __be32 daddr; + /*The options start here. */ +-}; ++} __attribute__((packed, aligned(2))); + + + struct ip_auth_hdr { +--- a/include/uapi/linux/ipv6.h ++++ b/include/uapi/linux/ipv6.h +@@ -131,7 +131,7 @@ struct ipv6hdr { + + struct in6_addr saddr; + struct in6_addr daddr; +-}; ++} __attribute__((packed, aligned(2))); + + + /* index values for the variables in ipv6_devconf */ +--- a/include/uapi/linux/tcp.h ++++ b/include/uapi/linux/tcp.h +@@ -55,7 +55,7 @@ struct tcphdr { + __be16 window; + __sum16 check; + __be16 urg_ptr; +-}; ++} __attribute__((packed, aligned(2))); + + /* + * The union cast uses a gcc extension to avoid aliasing problems +@@ -65,7 +65,7 @@ struct tcphdr { + union tcp_word_hdr { + struct tcphdr hdr; + __be32 words[5]; +-}; ++} __attribute__((packed, aligned(2))); + + #define tcp_flag_word(tp) ( ((union tcp_word_hdr *)(tp))->words [3]) + +--- a/include/uapi/linux/udp.h ++++ b/include/uapi/linux/udp.h +@@ -25,7 +25,7 @@ struct udphdr { + __be16 dest; + __be16 len; + __sum16 check; +-}; ++} __attribute__((packed, aligned(2))); + + /* UDP socket options */ + #define UDP_CORK 1 /* Never send partially complete segments */ +--- a/net/netfilter/nf_conntrack_core.c ++++ b/net/netfilter/nf_conntrack_core.c +@@ -262,8 +262,8 @@ nf_ct_get_tuple(const struct sk_buff *sk + + switch (l3num) { + case NFPROTO_IPV4: +- tuple->src.u3.ip = ap[0]; +- tuple->dst.u3.ip = ap[1]; ++ tuple->src.u3.ip = net_hdr_word(ap++); ++ tuple->dst.u3.ip = net_hdr_word(ap); + break; + case NFPROTO_IPV6: + memcpy(tuple->src.u3.ip6, ap, sizeof(tuple->src.u3.ip6)); +--- a/include/uapi/linux/icmp.h ++++ b/include/uapi/linux/icmp.h +@@ -82,7 +82,7 @@ struct icmphdr { + } frag; + __u8 reserved[4]; + } un; +-}; ++} __attribute__((packed, aligned(2))); + + + /* +--- a/include/uapi/linux/in6.h ++++ b/include/uapi/linux/in6.h +@@ -43,7 +43,7 @@ struct in6_addr { + #define s6_addr16 in6_u.u6_addr16 + #define s6_addr32 in6_u.u6_addr32 + #endif +-}; ++} __attribute__((packed, aligned(2))); + #endif /* __UAPI_DEF_IN6_ADDR */ + + #if __UAPI_DEF_SOCKADDR_IN6 +--- a/net/ipv6/tcp_ipv6.c ++++ b/net/ipv6/tcp_ipv6.c +@@ -39,6 +39,7 @@ + #include + #include + #include ++#include + #include + #include + #include +@@ -836,10 +837,10 @@ static void tcp_v6_send_response(const s + topt = (__be32 *)(t1 + 1); + + if (tsecr) { +- *topt++ = htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) | +- (TCPOPT_TIMESTAMP << 8) | TCPOLEN_TIMESTAMP); +- *topt++ = htonl(tsval); +- *topt++ = htonl(tsecr); ++ put_unaligned_be32((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) | ++ (TCPOPT_TIMESTAMP << 8) | TCPOLEN_TIMESTAMP, topt++); ++ put_unaligned_be32(tsval, topt++); ++ put_unaligned_be32(tsecr, topt++); + } + + #ifdef CONFIG_TCP_MD5SIG +--- a/include/linux/ipv6.h ++++ b/include/linux/ipv6.h +@@ -6,6 +6,7 @@ + + #define ipv6_optlen(p) (((p)->hdrlen+1) << 3) + #define ipv6_authlen(p) (((p)->hdrlen+2) << 2) ++ + /* + * This structure contains configuration options per IPv6 link. + */ +--- a/net/ipv6/datagram.c ++++ b/net/ipv6/datagram.c +@@ -478,7 +478,7 @@ int ipv6_recv_error(struct sock *sk, str + ipv6_iface_scope_id(&sin->sin6_addr, + IP6CB(skb)->iif); + } else { +- ipv6_addr_set_v4mapped(*(__be32 *)(nh + serr->addr_offset), ++ ipv6_addr_set_v4mapped(net_hdr_word(nh + serr->addr_offset), + &sin->sin6_addr); + sin->sin6_scope_id = 0; + } +@@ -828,12 +828,12 @@ int ip6_datagram_send_ctl(struct net *ne + } + + if (fl6->flowlabel&IPV6_FLOWINFO_MASK) { +- if ((fl6->flowlabel^*(__be32 *)CMSG_DATA(cmsg))&~IPV6_FLOWINFO_MASK) { ++ if ((fl6->flowlabel^net_hdr_word(CMSG_DATA(cmsg)))&~IPV6_FLOWINFO_MASK) { + err = -EINVAL; + goto exit_f; + } + } +- fl6->flowlabel = IPV6_FLOWINFO_MASK & *(__be32 *)CMSG_DATA(cmsg); ++ fl6->flowlabel = IPV6_FLOWINFO_MASK & net_hdr_word(CMSG_DATA(cmsg)); + break; + + case IPV6_2292HOPOPTS: +--- a/net/ipv6/ip6_gre.c ++++ b/net/ipv6/ip6_gre.c +@@ -452,7 +452,7 @@ static void ip6gre_err(struct sk_buff *s + return; + ipv6h = (const struct ipv6hdr *)skb->data; + greh = (const struct gre_base_hdr *)(skb->data + offset); +- key = key_off ? *(__be32 *)(skb->data + key_off) : 0; ++ key = key_off ? net_hdr_word((__be32 *)(skb->data + key_off)) : 0; + + t = ip6gre_tunnel_lookup(skb->dev, &ipv6h->daddr, &ipv6h->saddr, + key, greh->protocol); +--- a/net/ipv6/exthdrs.c ++++ b/net/ipv6/exthdrs.c +@@ -756,7 +756,7 @@ static bool ipv6_hop_jumbo(struct sk_buf + goto drop; + } + +- pkt_len = ntohl(*(__be32 *)(nh + optoff + 2)); ++ pkt_len = ntohl(net_hdr_word(nh + optoff + 2)); + if (pkt_len <= IPV6_MAXPLEN) { + __IP6_INC_STATS(net, idev, IPSTATS_MIB_INHDRERRORS); + icmpv6_param_prob(skb, ICMPV6_HDR_FIELD, optoff+2); +--- a/include/linux/types.h ++++ b/include/linux/types.h +@@ -230,5 +230,11 @@ struct callback_head { + typedef void (*rcu_callback_t)(struct rcu_head *head); + typedef void (*call_rcu_func_t)(struct rcu_head *head, rcu_callback_t func); + ++struct net_hdr_word { ++ u32 words[1]; ++} __attribute__((packed, aligned(2))); ++ ++#define net_hdr_word(_p) (((struct net_hdr_word *) (_p))->words[0]) ++ + #endif /* __ASSEMBLY__ */ + #endif /* _LINUX_TYPES_H */ +--- a/net/ipv4/af_inet.c ++++ b/net/ipv4/af_inet.c +@@ -1422,8 +1422,8 @@ struct sk_buff *inet_gro_receive(struct + if (unlikely(ip_fast_csum((u8 *)iph, 5))) + goto out_unlock; + +- id = ntohl(*(__be32 *)&iph->id); +- flush = (u16)((ntohl(*(__be32 *)iph) ^ skb_gro_len(skb)) | (id & ~IP_DF)); ++ id = ntohl(net_hdr_word(&iph->id)); ++ flush = (u16)((ntohl(net_hdr_word(iph)) ^ skb_gro_len(skb)) | (id & ~IP_DF)); + id >>= 16; + + list_for_each_entry(p, head, list) { +--- a/net/ipv4/route.c ++++ b/net/ipv4/route.c +@@ -448,7 +448,7 @@ static struct neighbour *ipv4_neigh_look + else if (skb) + pkey = &ip_hdr(skb)->daddr; + +- n = __ipv4_neigh_lookup(dev, *(__force u32 *)pkey); ++ n = __ipv4_neigh_lookup(dev, net_hdr_word(pkey)); + if (n) + return n; + return neigh_create(&arp_tbl, pkey, dev); +--- a/net/ipv4/tcp_output.c ++++ b/net/ipv4/tcp_output.c +@@ -461,48 +461,53 @@ static void tcp_options_write(__be32 *pt + u16 options = opts->options; /* mungable copy */ + + if (unlikely(OPTION_MD5 & options)) { +- *ptr++ = htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) | +- (TCPOPT_MD5SIG << 8) | TCPOLEN_MD5SIG); ++ net_hdr_word(ptr++) = ++ htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) | ++ (TCPOPT_MD5SIG << 8) | TCPOLEN_MD5SIG); + /* overload cookie hash location */ + opts->hash_location = (__u8 *)ptr; + ptr += 4; + } + + if (unlikely(opts->mss)) { +- *ptr++ = htonl((TCPOPT_MSS << 24) | +- (TCPOLEN_MSS << 16) | +- opts->mss); ++ net_hdr_word(ptr++) = ++ htonl((TCPOPT_MSS << 24) | (TCPOLEN_MSS << 16) | ++ opts->mss); + } + + if (likely(OPTION_TS & options)) { + if (unlikely(OPTION_SACK_ADVERTISE & options)) { +- *ptr++ = htonl((TCPOPT_SACK_PERM << 24) | +- (TCPOLEN_SACK_PERM << 16) | +- (TCPOPT_TIMESTAMP << 8) | +- TCPOLEN_TIMESTAMP); ++ net_hdr_word(ptr++) = ++ htonl((TCPOPT_SACK_PERM << 24) | ++ (TCPOLEN_SACK_PERM << 16) | ++ (TCPOPT_TIMESTAMP << 8) | ++ TCPOLEN_TIMESTAMP); + options &= ~OPTION_SACK_ADVERTISE; + } else { +- *ptr++ = htonl((TCPOPT_NOP << 24) | +- (TCPOPT_NOP << 16) | +- (TCPOPT_TIMESTAMP << 8) | +- TCPOLEN_TIMESTAMP); ++ net_hdr_word(ptr++) = ++ htonl((TCPOPT_NOP << 24) | ++ (TCPOPT_NOP << 16) | ++ (TCPOPT_TIMESTAMP << 8) | ++ TCPOLEN_TIMESTAMP); + } +- *ptr++ = htonl(opts->tsval); +- *ptr++ = htonl(opts->tsecr); ++ net_hdr_word(ptr++) = htonl(opts->tsval); ++ net_hdr_word(ptr++) = htonl(opts->tsecr); + } + + if (unlikely(OPTION_SACK_ADVERTISE & options)) { +- *ptr++ = htonl((TCPOPT_NOP << 24) | +- (TCPOPT_NOP << 16) | +- (TCPOPT_SACK_PERM << 8) | +- TCPOLEN_SACK_PERM); ++ net_hdr_word(ptr++) = ++ htonl((TCPOPT_NOP << 24) | ++ (TCPOPT_NOP << 16) | ++ (TCPOPT_SACK_PERM << 8) | ++ TCPOLEN_SACK_PERM); + } + + if (unlikely(OPTION_WSCALE & options)) { +- *ptr++ = htonl((TCPOPT_NOP << 24) | +- (TCPOPT_WINDOW << 16) | +- (TCPOLEN_WINDOW << 8) | +- opts->ws); ++ net_hdr_word(ptr++) = ++ htonl((TCPOPT_NOP << 24) | ++ (TCPOPT_WINDOW << 16) | ++ (TCPOLEN_WINDOW << 8) | ++ opts->ws); + } + + if (unlikely(opts->num_sack_blocks)) { +@@ -510,16 +515,17 @@ static void tcp_options_write(__be32 *pt + tp->duplicate_sack : tp->selective_acks; + int this_sack; + +- *ptr++ = htonl((TCPOPT_NOP << 24) | +- (TCPOPT_NOP << 16) | +- (TCPOPT_SACK << 8) | +- (TCPOLEN_SACK_BASE + (opts->num_sack_blocks * ++ net_hdr_word(ptr++) = ++ htonl((TCPOPT_NOP << 24) | ++ (TCPOPT_NOP << 16) | ++ (TCPOPT_SACK << 8) | ++ (TCPOLEN_SACK_BASE + (opts->num_sack_blocks * + TCPOLEN_SACK_PERBLOCK))); + + for (this_sack = 0; this_sack < opts->num_sack_blocks; + ++this_sack) { +- *ptr++ = htonl(sp[this_sack].start_seq); +- *ptr++ = htonl(sp[this_sack].end_seq); ++ net_hdr_word(ptr++) = htonl(sp[this_sack].start_seq); ++ net_hdr_word(ptr++) = htonl(sp[this_sack].end_seq); + } + + tp->rx_opt.dsack = 0; +@@ -532,13 +538,14 @@ static void tcp_options_write(__be32 *pt + + if (foc->exp) { + len = TCPOLEN_EXP_FASTOPEN_BASE + foc->len; +- *ptr = htonl((TCPOPT_EXP << 24) | (len << 16) | ++ net_hdr_word(ptr) = ++ htonl((TCPOPT_EXP << 24) | (len << 16) | + TCPOPT_FASTOPEN_MAGIC); + p += TCPOLEN_EXP_FASTOPEN_BASE; + } else { + len = TCPOLEN_FASTOPEN_BASE + foc->len; +- *p++ = TCPOPT_FASTOPEN; +- *p++ = len; ++ net_hdr_word(p++) = TCPOPT_FASTOPEN; ++ net_hdr_word(p++) = len; + } + + memcpy(p, foc->val, foc->len); +--- a/include/uapi/linux/igmp.h ++++ b/include/uapi/linux/igmp.h +@@ -33,7 +33,7 @@ struct igmphdr { + __u8 code; /* For newer IGMP */ + __sum16 csum; + __be32 group; +-}; ++} __attribute__((packed, aligned(2))); + + /* V3 group record types [grec_type] */ + #define IGMPV3_MODE_IS_INCLUDE 1 +@@ -49,7 +49,7 @@ struct igmpv3_grec { + __be16 grec_nsrcs; + __be32 grec_mca; + __be32 grec_src[0]; +-}; ++} __attribute__((packed, aligned(2))); + + struct igmpv3_report { + __u8 type; +@@ -58,7 +58,7 @@ struct igmpv3_report { + __be16 resv2; + __be16 ngrec; + struct igmpv3_grec grec[0]; +-}; ++} __attribute__((packed, aligned(2))); + + struct igmpv3_query { + __u8 type; +@@ -79,7 +79,7 @@ struct igmpv3_query { + __u8 qqic; + __be16 nsrcs; + __be32 srcs[0]; +-}; ++} __attribute__((packed, aligned(2))); + + #define IGMP_HOST_MEMBERSHIP_QUERY 0x11 /* From RFC1112 */ + #define IGMP_HOST_MEMBERSHIP_REPORT 0x12 /* Ditto */ +--- a/net/core/flow_dissector.c ++++ b/net/core/flow_dissector.c +@@ -111,7 +111,7 @@ __be32 __skb_flow_get_ports(const struct + ports = __skb_header_pointer(skb, thoff + poff, + sizeof(_ports), data, hlen, &_ports); + if (ports) +- return *ports; ++ return (__be32)net_hdr_word(ports); + } + + return 0; +--- a/include/uapi/linux/icmpv6.h ++++ b/include/uapi/linux/icmpv6.h +@@ -77,7 +77,7 @@ struct icmp6hdr { + #define icmp6_addrconf_other icmp6_dataun.u_nd_ra.other + #define icmp6_rt_lifetime icmp6_dataun.u_nd_ra.rt_lifetime + #define icmp6_router_pref icmp6_dataun.u_nd_ra.router_pref +-}; ++} __attribute__((packed, aligned(2))); + + + #define ICMPV6_ROUTER_PREF_LOW 0x3 +--- a/include/net/ndisc.h ++++ b/include/net/ndisc.h +@@ -89,7 +89,7 @@ struct ra_msg { + struct icmp6hdr icmph; + __be32 reachable_time; + __be32 retrans_timer; +-}; ++} __attribute__((packed, aligned(2))); + + struct rd_msg { + struct icmp6hdr icmph; +@@ -368,10 +368,10 @@ static inline u32 ndisc_hashfn(const voi + { + const u32 *p32 = pkey; + +- return (((p32[0] ^ hash32_ptr(dev)) * hash_rnd[0]) + +- (p32[1] * hash_rnd[1]) + +- (p32[2] * hash_rnd[2]) + +- (p32[3] * hash_rnd[3])); ++ return (((net_hdr_word(&p32[0]) ^ hash32_ptr(dev)) * hash_rnd[0]) + ++ (net_hdr_word(&p32[1]) * hash_rnd[1]) + ++ (net_hdr_word(&p32[2]) * hash_rnd[2]) + ++ (net_hdr_word(&p32[3]) * hash_rnd[3])); + } + + static inline struct neighbour *__ipv6_neigh_lookup_noref(struct net_device *dev, const void *pkey) +--- a/net/sched/cls_u32.c ++++ b/net/sched/cls_u32.c +@@ -165,7 +165,7 @@ next_knode: + data = skb_header_pointer(skb, toff, 4, &hdata); + if (!data) + goto out; +- if ((*data ^ key->val) & key->mask) { ++ if ((net_hdr_word(data) ^ key->val) & key->mask) { + n = rcu_dereference_bh(n->next); + goto next_knode; + } +@@ -218,8 +218,8 @@ check_terminal: + &hdata); + if (!data) + goto out; +- sel = ht->divisor & u32_hash_fold(*data, &n->sel, +- n->fshift); ++ sel = ht->divisor & u32_hash_fold(net_hdr_word(data), ++ &n->sel, n->fshift); + } + if (!(n->sel.flags & (TC_U32_VAROFFSET | TC_U32_OFFSET | TC_U32_EAT))) + goto next_ht; +--- a/net/ipv6/ip6_offload.c ++++ b/net/ipv6/ip6_offload.c +@@ -223,7 +223,7 @@ static struct sk_buff *ipv6_gro_receive( + continue; + + iph2 = (struct ipv6hdr *)(p->data + off); +- first_word = *(__be32 *)iph ^ *(__be32 *)iph2; ++ first_word = net_hdr_word(iph) ^ net_hdr_word(iph2); + + /* All fields must match except length and Traffic Class. + * XXX skbs on the gro_list have all been parsed and pulled +--- a/include/net/addrconf.h ++++ b/include/net/addrconf.h +@@ -47,7 +47,7 @@ struct prefix_info { + __be32 reserved2; + + struct in6_addr prefix; +-}; ++} __attribute__((packed, aligned(2))); + + #include + #include +--- a/include/net/inet_ecn.h ++++ b/include/net/inet_ecn.h +@@ -125,9 +125,9 @@ static inline int IP6_ECN_set_ce(struct + if (INET_ECN_is_not_ect(ipv6_get_dsfield(iph))) + return 0; + +- from = *(__be32 *)iph; ++ from = net_hdr_word(iph); + to = from | htonl(INET_ECN_CE << 20); +- *(__be32 *)iph = to; ++ net_hdr_word(iph) = to; + if (skb->ip_summed == CHECKSUM_COMPLETE) + skb->csum = csum_add(csum_sub(skb->csum, (__force __wsum)from), + (__force __wsum)to); +--- a/include/net/ipv6.h ++++ b/include/net/ipv6.h +@@ -149,7 +149,7 @@ struct frag_hdr { + __u8 reserved; + __be16 frag_off; + __be32 identification; +-}; ++} __attribute__((packed, aligned(2))); + + #define IP6_MF 0x0001 + #define IP6_OFFSET 0xFFF8 +@@ -499,8 +499,8 @@ static inline void __ipv6_addr_set_half( + } + #endif + #endif +- addr[0] = wh; +- addr[1] = wl; ++ net_hdr_word(&addr[0]) = wh; ++ net_hdr_word(&addr[1]) = wl; + } + + static inline void ipv6_addr_set(struct in6_addr *addr, +@@ -559,6 +559,8 @@ static inline bool ipv6_prefix_equal(con + const __be32 *a1 = addr1->s6_addr32; + const __be32 *a2 = addr2->s6_addr32; + unsigned int pdw, pbi; ++ /* Used for last <32-bit fraction of prefix */ ++ u32 pbia1, pbia2; + + /* check complete u32 in prefix */ + pdw = prefixlen >> 5; +@@ -567,7 +569,9 @@ static inline bool ipv6_prefix_equal(con + + /* check incomplete u32 in prefix */ + pbi = prefixlen & 0x1f; +- if (pbi && ((a1[pdw] ^ a2[pdw]) & htonl((0xffffffff) << (32 - pbi)))) ++ pbia1 = net_hdr_word(&a1[pdw]); ++ pbia2 = net_hdr_word(&a2[pdw]); ++ if (pbi && ((pbia1 ^ pbia2) & htonl((0xffffffff) << (32 - pbi)))) + return false; + + return true; +@@ -683,13 +687,13 @@ static inline void ipv6_addr_set_v4mappe + */ + static inline int __ipv6_addr_diff32(const void *token1, const void *token2, int addrlen) + { +- const __be32 *a1 = token1, *a2 = token2; ++ const struct in6_addr *a1 = token1, *a2 = token2; + int i; + + addrlen >>= 2; + + for (i = 0; i < addrlen; i++) { +- __be32 xb = a1[i] ^ a2[i]; ++ __be32 xb = a1->s6_addr32[i] ^ a2->s6_addr32[i]; + if (xb) + return i * 32 + 31 - __fls(ntohl(xb)); + } +@@ -876,17 +880,18 @@ static inline int ip6_multipath_hash_pol + static inline void ip6_flow_hdr(struct ipv6hdr *hdr, unsigned int tclass, + __be32 flowlabel) + { +- *(__be32 *)hdr = htonl(0x60000000 | (tclass << 20)) | flowlabel; ++ net_hdr_word((__be32 *)hdr) = ++ htonl(0x60000000 | (tclass << 20)) | flowlabel; + } + + static inline __be32 ip6_flowinfo(const struct ipv6hdr *hdr) + { +- return *(__be32 *)hdr & IPV6_FLOWINFO_MASK; ++ return net_hdr_word((__be32 *)hdr) & IPV6_FLOWINFO_MASK; + } + + static inline __be32 ip6_flowlabel(const struct ipv6hdr *hdr) + { +- return *(__be32 *)hdr & IPV6_FLOWLABEL_MASK; ++ return net_hdr_word((__be32 *)hdr) & IPV6_FLOWLABEL_MASK; + } + + static inline u8 ip6_tclass(__be32 flowinfo) +--- a/include/net/secure_seq.h ++++ b/include/net/secure_seq.h +@@ -3,6 +3,7 @@ + #define _NET_SECURE_SEQ + + #include ++#include + + u32 secure_ipv4_port_ephemeral(__be32 saddr, __be32 daddr, __be16 dport); + u32 secure_ipv6_port_ephemeral(const __be32 *saddr, const __be32 *daddr, +--- a/include/uapi/linux/in.h ++++ b/include/uapi/linux/in.h +@@ -84,7 +84,7 @@ enum { + /* Internet address. */ + struct in_addr { + __be32 s_addr; +-}; ++} __attribute__((packed, aligned(2))); + #endif + + #define IP_TOS 1 +--- a/net/ipv6/ip6_fib.c ++++ b/net/ipv6/ip6_fib.c +@@ -142,7 +142,7 @@ static __be32 addr_bit_set(const void *t + * See include/asm-generic/bitops/le.h. + */ + return (__force __be32)(1 << ((~fn_bit ^ BITOP_BE32_SWIZZLE) & 0x1f)) & +- addr[fn_bit >> 5]; ++ net_hdr_word(&addr[fn_bit >> 5]); + } + + struct fib6_info *fib6_info_alloc(gfp_t gfp_flags) +--- a/net/netfilter/nf_conntrack_proto_tcp.c ++++ b/net/netfilter/nf_conntrack_proto_tcp.c +@@ -423,7 +423,7 @@ static void tcp_sack(const struct sk_buf + + /* Fast path for timestamp-only option */ + if (length == TCPOLEN_TSTAMP_ALIGNED +- && *(__be32 *)ptr == htonl((TCPOPT_NOP << 24) ++ && net_hdr_word(ptr) == htonl((TCPOPT_NOP << 24) + | (TCPOPT_NOP << 16) + | (TCPOPT_TIMESTAMP << 8) + | TCPOLEN_TIMESTAMP)) +--- a/net/xfrm/xfrm_input.c ++++ b/net/xfrm/xfrm_input.c +@@ -194,8 +194,8 @@ int xfrm_parse_spi(struct sk_buff *skb, + if (!pskb_may_pull(skb, hlen)) + return -EINVAL; + +- *spi = *(__be32 *)(skb_transport_header(skb) + offset); +- *seq = *(__be32 *)(skb_transport_header(skb) + offset_seq); ++ *spi = net_hdr_word(skb_transport_header(skb) + offset); ++ *seq = net_hdr_word(skb_transport_header(skb) + offset_seq); + return 0; + } + EXPORT_SYMBOL(xfrm_parse_spi); +--- a/net/ipv4/tcp_input.c ++++ b/net/ipv4/tcp_input.c +@@ -3898,14 +3898,16 @@ static bool tcp_parse_aligned_timestamp( + { + const __be32 *ptr = (const __be32 *)(th + 1); + +- if (*ptr == htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) +- | (TCPOPT_TIMESTAMP << 8) | TCPOLEN_TIMESTAMP)) { ++ if (net_hdr_word(ptr) == ++ htonl((TCPOPT_NOP << 24) | (TCPOPT_NOP << 16) | ++ (TCPOPT_TIMESTAMP << 8) | TCPOLEN_TIMESTAMP)) { + tp->rx_opt.saw_tstamp = 1; + ++ptr; +- tp->rx_opt.rcv_tsval = ntohl(*ptr); ++ tp->rx_opt.rcv_tsval = get_unaligned_be32(ptr); + ++ptr; +- if (*ptr) +- tp->rx_opt.rcv_tsecr = ntohl(*ptr) - tp->tsoffset; ++ if (net_hdr_word(ptr)) ++ tp->rx_opt.rcv_tsecr = get_unaligned_be32(ptr) - ++ tp->tsoffset; + else + tp->rx_opt.rcv_tsecr = 0; + return true; +--- a/include/uapi/linux/if_pppox.h ++++ b/include/uapi/linux/if_pppox.h +@@ -51,6 +51,7 @@ struct pppoe_addr { + */ + struct pptp_addr { + __u16 call_id; ++ __u16 pad; + struct in_addr sin_addr; + }; + +--- a/net/ipv6/netfilter/nf_log_ipv6.c ++++ b/net/ipv6/netfilter/nf_log_ipv6.c +@@ -66,9 +66,9 @@ static void dump_ipv6_packet(struct net + /* Max length: 44 "LEN=65535 TC=255 HOPLIMIT=255 FLOWLBL=FFFFF " */ + nf_log_buf_add(m, "LEN=%zu TC=%u HOPLIMIT=%u FLOWLBL=%u ", + ntohs(ih->payload_len) + sizeof(struct ipv6hdr), +- (ntohl(*(__be32 *)ih) & 0x0ff00000) >> 20, ++ (ntohl(net_hdr_word(ih)) & 0x0ff00000) >> 20, + ih->hop_limit, +- (ntohl(*(__be32 *)ih) & 0x000fffff)); ++ (ntohl(net_hdr_word(ih)) & 0x000fffff)); + + fragment = 0; + ptr = ip6hoff + sizeof(struct ipv6hdr); +--- a/include/net/neighbour.h ++++ b/include/net/neighbour.h +@@ -266,8 +266,10 @@ static inline bool neigh_key_eq128(const + const u32 *n32 = (const u32 *)n->primary_key; + const u32 *p32 = pkey; + +- return ((n32[0] ^ p32[0]) | (n32[1] ^ p32[1]) | +- (n32[2] ^ p32[2]) | (n32[3] ^ p32[3])) == 0; ++ return ((n32[0] ^ net_hdr_word(&p32[0])) | ++ (n32[1] ^ net_hdr_word(&p32[1])) | ++ (n32[2] ^ net_hdr_word(&p32[2])) | ++ (n32[3] ^ net_hdr_word(&p32[3]))) == 0; + } + + static inline struct neighbour *___neigh_lookup_noref( +--- a/include/uapi/linux/netfilter_arp/arp_tables.h ++++ b/include/uapi/linux/netfilter_arp/arp_tables.h +@@ -70,7 +70,7 @@ struct arpt_arp { + __u8 flags; + /* Inverse flags */ + __u16 invflags; +-}; ++} __attribute__((aligned(4))); + + /* Values for "flag" field in struct arpt_ip (general arp structure). + * No flags defined yet. +--- a/net/core/utils.c ++++ b/net/core/utils.c +@@ -447,8 +447,14 @@ void inet_proto_csum_replace16(__sum16 * + bool pseudohdr) + { + __be32 diff[] = { +- ~from[0], ~from[1], ~from[2], ~from[3], +- to[0], to[1], to[2], to[3], ++ ~net_hdr_word(&from[0]), ++ ~net_hdr_word(&from[1]), ++ ~net_hdr_word(&from[2]), ++ ~net_hdr_word(&from[3]), ++ net_hdr_word(&to[0]), ++ net_hdr_word(&to[1]), ++ net_hdr_word(&to[2]), ++ net_hdr_word(&to[3]), + }; + if (skb->ip_summed != CHECKSUM_PARTIAL) { + *sum = csum_fold(csum_partial(diff, sizeof(diff), +--- a/include/linux/etherdevice.h ++++ b/include/linux/etherdevice.h +@@ -480,7 +480,7 @@ static inline bool is_etherdev_addr(cons + * @b: Pointer to Ethernet header + * + * Compare two Ethernet headers, returns 0 if equal. +- * This assumes that the network header (i.e., IP header) is 4-byte ++ * This assumes that the network header (i.e., IP header) is 2-byte + * aligned OR the platform can handle unaligned access. This is the + * case for all packets coming into netif_receive_skb or similar + * entry points. +@@ -503,11 +503,12 @@ static inline unsigned long compare_ethe + fold |= *(unsigned long *)(a + 6) ^ *(unsigned long *)(b + 6); + return fold; + #else +- u32 *a32 = (u32 *)((u8 *)a + 2); +- u32 *b32 = (u32 *)((u8 *)b + 2); ++ const u16 *a16 = a; ++ const u16 *b16 = b; + +- return (*(u16 *)a ^ *(u16 *)b) | (a32[0] ^ b32[0]) | +- (a32[1] ^ b32[1]) | (a32[2] ^ b32[2]); ++ return (a16[0] ^ b16[0]) | (a16[1] ^ b16[1]) | (a16[2] ^ b16[2]) | ++ (a16[3] ^ b16[3]) | (a16[4] ^ b16[4]) | (a16[5] ^ b16[5]) | ++ (a16[6] ^ b16[6]); + #endif + } + +--- a/net/ipv4/tcp_offload.c ++++ b/net/ipv4/tcp_offload.c +@@ -226,7 +226,7 @@ struct sk_buff *tcp_gro_receive(struct l + + th2 = tcp_hdr(p); + +- if (*(u32 *)&th->source ^ *(u32 *)&th2->source) { ++ if (net_hdr_word(&th->source) ^ net_hdr_word(&th2->source)) { + NAPI_GRO_CB(p)->same_flow = 0; + continue; + } +@@ -244,8 +244,8 @@ found: + ~(TCP_FLAG_CWR | TCP_FLAG_FIN | TCP_FLAG_PSH)); + flush |= (__force int)(th->ack_seq ^ th2->ack_seq); + for (i = sizeof(*th); i < thlen; i += 4) +- flush |= *(u32 *)((u8 *)th + i) ^ +- *(u32 *)((u8 *)th2 + i); ++ flush |= net_hdr_word((u8 *)th + i) ^ ++ net_hdr_word((u8 *)th2 + i); + + /* When we receive our second frame we can made a decision on if we + * continue this flow as an atomic flow with a fixed ID or if we use +--- a/net/ipv6/netfilter/ip6table_mangle.c ++++ b/net/ipv6/netfilter/ip6table_mangle.c +@@ -50,7 +50,7 @@ ip6t_mangle_out(struct sk_buff *skb, con + hop_limit = ipv6_hdr(skb)->hop_limit; + + /* flowlabel and prio (includes version, which shouldn't change either */ +- flowlabel = *((u_int32_t *)ipv6_hdr(skb)); ++ flowlabel = net_hdr_word(ipv6_hdr(skb)); + + ret = ip6t_do_table(skb, state, state->net->ipv6.ip6table_mangle); + +@@ -59,7 +59,7 @@ ip6t_mangle_out(struct sk_buff *skb, con + !ipv6_addr_equal(&ipv6_hdr(skb)->daddr, &daddr) || + skb->mark != mark || + ipv6_hdr(skb)->hop_limit != hop_limit || +- flowlabel != *((u_int32_t *)ipv6_hdr(skb)))) { ++ flowlabel != net_hdr_word(ipv6_hdr(skb)))) { + err = ip6_route_me_harder(state->net, skb); + if (err < 0) + ret = NF_DROP_ERR(err); diff --git a/target/linux/bcm53xx/patches-4.19/180-usb-xhci-add-support-for-performing-fake-doorbell.patch b/target/linux/bcm53xx/patches-4.19/180-usb-xhci-add-support-for-performing-fake-doorbell.patch index 89b4cc8d9..6bd99b748 100644 --- a/target/linux/bcm53xx/patches-4.19/180-usb-xhci-add-support-for-performing-fake-doorbell.patch +++ b/target/linux/bcm53xx/patches-4.19/180-usb-xhci-add-support-for-performing-fake-doorbell.patch @@ -127,7 +127,7 @@ it on BCM4708 family. /* --- a/drivers/usb/host/xhci.h +++ b/drivers/usb/host/xhci.h -@@ -1848,6 +1848,7 @@ struct xhci_hcd { +@@ -1856,6 +1856,7 @@ struct xhci_hcd { #define XHCI_ZERO_64B_REGS BIT_ULL(32) #define XHCI_RESET_PLL_ON_DISCONNECT BIT_ULL(34) #define XHCI_SNPS_BROKEN_SUSPEND BIT_ULL(35) diff --git a/target/linux/bcm53xx/patches-4.19/905-BCM53573-minor-hacks.patch b/target/linux/bcm53xx/patches-4.19/905-BCM53573-minor-hacks.patch index 773197d8d..470b17a5f 100644 --- a/target/linux/bcm53xx/patches-4.19/905-BCM53573-minor-hacks.patch +++ b/target/linux/bcm53xx/patches-4.19/905-BCM53573-minor-hacks.patch @@ -61,7 +61,7 @@ Signed-off-by: Rafał Miłecki #include #include #include -@@ -864,6 +865,16 @@ static void arch_timer_of_configure_rate +@@ -919,6 +920,16 @@ static void arch_timer_of_configure_rate if (of_property_read_u32(np, "clock-frequency", &arch_timer_rate)) arch_timer_rate = rate; diff --git a/target/linux/brcm2708/patches-4.14/950-0056-fbdev-add-FBIOCOPYAREA-ioctl.patch b/target/linux/brcm2708/patches-4.14/950-0056-fbdev-add-FBIOCOPYAREA-ioctl.patch index dd41f5d44..242fa50d9 100644 --- a/target/linux/brcm2708/patches-4.14/950-0056-fbdev-add-FBIOCOPYAREA-ioctl.patch +++ b/target/linux/brcm2708/patches-4.14/950-0056-fbdev-add-FBIOCOPYAREA-ioctl.patch @@ -170,7 +170,7 @@ bcm2708_fb: Add ioctl for reading gpu memory through dma platform_set_drvdata(dev, fb); --- a/drivers/video/fbdev/core/fbmem.c +++ b/drivers/video/fbdev/core/fbmem.c -@@ -1090,6 +1090,31 @@ fb_blank(struct fb_info *info, int blank +@@ -1093,6 +1093,31 @@ fb_blank(struct fb_info *info, int blank } EXPORT_SYMBOL(fb_blank); @@ -202,7 +202,7 @@ bcm2708_fb: Add ioctl for reading gpu memory through dma static long do_fb_ioctl(struct fb_info *info, unsigned int cmd, unsigned long arg) { -@@ -1100,6 +1125,7 @@ static long do_fb_ioctl(struct fb_info * +@@ -1103,6 +1128,7 @@ static long do_fb_ioctl(struct fb_info * struct fb_cmap cmap_from; struct fb_cmap_user cmap; struct fb_event event; @@ -210,7 +210,7 @@ bcm2708_fb: Add ioctl for reading gpu memory through dma void __user *argp = (void __user *)arg; long ret = 0; -@@ -1217,6 +1243,15 @@ static long do_fb_ioctl(struct fb_info * +@@ -1220,6 +1246,15 @@ static long do_fb_ioctl(struct fb_info * unlock_fb_info(info); console_unlock(); break; @@ -226,7 +226,7 @@ bcm2708_fb: Add ioctl for reading gpu memory through dma default: if (!lock_fb_info(info)) return -ENODEV; -@@ -1362,6 +1397,7 @@ static long fb_compat_ioctl(struct file +@@ -1365,6 +1400,7 @@ static long fb_compat_ioctl(struct file case FBIOPAN_DISPLAY: case FBIOGET_CON2FBMAP: case FBIOPUT_CON2FBMAP: diff --git a/target/linux/brcm2708/patches-4.14/950-0136-cgroup-Disable-cgroup-memory-by-default.patch b/target/linux/brcm2708/patches-4.14/950-0136-cgroup-Disable-cgroup-memory-by-default.patch index 9011de8b9..eb85fe643 100644 --- a/target/linux/brcm2708/patches-4.14/950-0136-cgroup-Disable-cgroup-memory-by-default.patch +++ b/target/linux/brcm2708/patches-4.14/950-0136-cgroup-Disable-cgroup-memory-by-default.patch @@ -39,7 +39,7 @@ Signed-off-by: Phil Elwell for_each_subsys(ss, ssid) { if (ss->early_init) { struct cgroup_subsys_state *css = -@@ -5580,6 +5588,28 @@ static int __init cgroup_disable(char *s +@@ -5583,6 +5591,28 @@ static int __init cgroup_disable(char *s } __setup("cgroup_disable=", cgroup_disable); diff --git a/target/linux/brcm47xx/patches-4.19/031-v5.1-mips-bcm47xx-Enable-USB-power-on-Netgear-WNDR3400v2.patch b/target/linux/brcm47xx/patches-4.19/031-v5.1-mips-bcm47xx-Enable-USB-power-on-Netgear-WNDR3400v2.patch index 6e8ad0f36..34a79f9d5 100644 --- a/target/linux/brcm47xx/patches-4.19/031-v5.1-mips-bcm47xx-Enable-USB-power-on-Netgear-WNDR3400v2.patch +++ b/target/linux/brcm47xx/patches-4.19/031-v5.1-mips-bcm47xx-Enable-USB-power-on-Netgear-WNDR3400v2.patch @@ -22,8 +22,6 @@ Signed-off-by: Paul Burton arch/mips/bcm47xx/workarounds.c | 1 + 1 file changed, 1 insertion(+) -diff --git a/arch/mips/bcm47xx/workarounds.c b/arch/mips/bcm47xx/workarounds.c -index 46eddbe..0ab95dd 100644 --- a/arch/mips/bcm47xx/workarounds.c +++ b/arch/mips/bcm47xx/workarounds.c @@ -24,6 +24,7 @@ void __init bcm47xx_workarounds(void) @@ -34,6 +32,3 @@ index 46eddbe..0ab95dd 100644 case BCM47XX_BOARD_NETGEAR_WNDR3400_V3: bcm47xx_workarounds_enable_usb_power(21); break; --- -1.9.1 - diff --git a/target/linux/cns3xxx/patches-4.19/130-Extend-PCIE_BUS_PEER2PEER-to-set-MRSS-128-to-fix-CNS3xxx-BM-DMA..patch b/target/linux/cns3xxx/patches-4.19/130-Extend-PCIE_BUS_PEER2PEER-to-set-MRSS-128-to-fix-CNS3xxx-BM-DMA..patch index 4b4f0e4f0..b17a61392 100644 --- a/target/linux/cns3xxx/patches-4.19/130-Extend-PCIE_BUS_PEER2PEER-to-set-MRSS-128-to-fix-CNS3xxx-BM-DMA..patch +++ b/target/linux/cns3xxx/patches-4.19/130-Extend-PCIE_BUS_PEER2PEER-to-set-MRSS-128-to-fix-CNS3xxx-BM-DMA..patch @@ -1,6 +1,6 @@ --- a/drivers/pci/probe.c +++ b/drivers/pci/probe.c -@@ -2619,7 +2619,8 @@ static void pcie_write_mrrs(struct pci_d +@@ -2629,7 +2629,8 @@ static void pcie_write_mrrs(struct pci_d * In the "safe" case, do not configure the MRRS. There appear to be * issues with setting MRRS to 0 on a number of devices. */ diff --git a/target/linux/gemini/Makefile b/target/linux/gemini/Makefile index 3204b3f5d..304e51598 100644 --- a/target/linux/gemini/Makefile +++ b/target/linux/gemini/Makefile @@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk ARCH:=arm BOARD:=gemini BOARDNAME:=Cortina Systems CS351x -FEATURES:=squashfs pci rtc usb dt gpio display +FEATURES:=squashfs pci rtc usb dt gpio display ext4 rootfs-part boot-part CPU_TYPE:=fa526 MAINTAINER:=Roman Yeryomin @@ -26,7 +26,7 @@ include $(INCLUDE_DIR)/target.mk DEFAULT_PACKAGES += \ kmod-usb-core kmod-usb-fotg210 \ kmod-usb-ledtrig-usbport \ - kmod-leds-gpio kmod-led-trig-heartbeat \ + kmod-leds-gpio kmod-ledtrig-heartbeat \ kmod-gpio-button-hotplug $(eval $(call BuildTarget)) diff --git a/target/linux/gemini/config-4.14 b/target/linux/gemini/config-4.14 index 326b05c08..ef5900771 100644 --- a/target/linux/gemini/config-4.14 +++ b/target/linux/gemini/config-4.14 @@ -277,6 +277,8 @@ CONFIG_MTD_CFI_STAA=y # CONFIG_MTD_COMPLEX_MAPPINGS is not set CONFIG_MTD_PHYSMAP=y CONFIG_MTD_PHYSMAP_OF_GEMINI=y +CONFIG_MTD_SPLIT_FIRMWARE=y +CONFIG_MTD_SPLIT_WRGG_FW=y CONFIG_MULTI_IRQ_HANDLER=y CONFIG_NAMESPACES=y CONFIG_NEED_DMA_MAP_STATE=y diff --git a/target/linux/gemini/config-4.19 b/target/linux/gemini/config-4.19 index 7025ec149..014175ea1 100644 --- a/target/linux/gemini/config-4.19 +++ b/target/linux/gemini/config-4.19 @@ -330,6 +330,8 @@ CONFIG_MTD_JEDECPROBE=y CONFIG_MTD_PHYSMAP=y CONFIG_MTD_PHYSMAP_OF_GEMINI=y CONFIG_MTD_REDBOOT_PARTS=y +CONFIG_MTD_SPLIT_FIRMWARE=y +CONFIG_MTD_SPLIT_WRGG_FW=y CONFIG_NAMESPACES=y CONFIG_NEED_DMA_MAP_STATE=y CONFIG_NEED_KUSER_HELPERS=y diff --git a/target/linux/gemini/image/Makefile b/target/linux/gemini/image/Makefile index d0180e297..8fec250f1 100644 --- a/target/linux/gemini/image/Makefile +++ b/target/linux/gemini/image/Makefile @@ -10,8 +10,8 @@ include $(INCLUDE_DIR)/image.mk # Cook a "WRGG" image, this board is apparently one in the D-Link # WRGG family and uses the exact same firmware format as other # D-Link devices. -define Build/dir685-images - mkwrggimg -i $(IMAGE_KERNEL) \ +define Build/dir685-image + mkwrggimg -i $@ \ -o $@.new \ -d /dev/mtdblock/1 \ -s wrgns01_dlwbr_dir685RBWW \ @@ -22,12 +22,19 @@ define Build/dir685-images mv $@.new $@ endef +# Padding added after the rootfs to an even 128k boundary +# as this is 128k eraseblocks flash. +define Build/dir685-pad-rootfs + $(STAGING_DIR_HOST)/bin/padjffs2 $(IMAGE_ROOTFS) -c 128 >>$@ +endef + # Build D-Link DNS-313 images using the special header tool. # rootfs.tgz and rd.tgz contains nothing, we only need them # to satisfy the boot loader on the device. The zImage is # the only real content. define Build/dns313-images mkdir -p $@.tmp/.boot + chmod 755 $@.tmp/.boot echo "dummy" > $@.tmp/dummyfile @@ -38,9 +45,20 @@ define Build/dns313-images dns313-header $(IMAGE_KERNEL) \ $@.tmp/.boot/zImage - tar --sort=name --owner=0 --group=0 --numeric-owner -czf $@ \ - -C $@.tmp .boot \ - $(if $(SOURCE_DATE_EPOCH),--mtime="@$(SOURCE_DATE_EPOCH)") + rm $@.tmp/dummyfile + + genext2fs --block-size $(BLOCKSIZE:%k=%Ki) \ + --size-in-blocks $$((1024 * $(CONFIG_TARGET_KERNEL_PARTSIZE))) \ + --squash-uids \ + --root $@.tmp $@.tmp-boot + + # The device firmware needs revision 1 of EXT2 + tune2fs -O filetype $@.tmp-boot + e2fsck -pDf $@.tmp-boot > /dev/null + + ./dns313_gen_hdd_img.sh $@ $@.tmp-boot $(IMAGE_ROOTFS) \ + $(CONFIG_TARGET_KERNEL_PARTSIZE) \ + $(CONFIG_TARGET_ROOTFS_PARTSIZE) rm -rf $@.tmp endef @@ -106,8 +124,19 @@ GEMINI_NAS_PACKAGES:=kmod-md-mod kmod-md-linear kmod-md-multipath \ kmod-fs-btrfs kmod-fs-cifs kmod-fs-nfs \ kmod-fs-nfsd kmod-fs-ntfs kmod-fs-reiserfs kmod-fs-vfat \ kmod-nls-utf8 kmod-usb-storage-extras \ - samba36-server mdadm cfdisk fdisk e2fsprogs badblocks + samba36-server mdadm cfdisk fdisk e2fsprogs badblocks \ + partx-utils +# The DIR-685 flash layout is kernel in WRGG format, padded and followed +# by the appended rootfs followed by some reasonable JFFS padding, the +# remainder will be used by JFFS2 through overlayfs. +# +# - For the factory image, the WRGG image includes the rootfs so that the +# default firmware will flash it properly as all it knows is WRGG format. +# - For the sysupgrade, we do not include the rootfs in the kernel image +# so it is not needelessly tossed into the RAM by the boot loader. +# This will be flashed from OpenWrt userland anyways so we only need +# the minimum to make the boot loader happy. define Device/dlink_dir-685 DEVICE_TITLE := D-Link DIR-685 Xtreme N Storage Router DEVICE_DTS := gemini-dlink-dir-685 @@ -115,16 +144,20 @@ define Device/dlink_dir-685 kmod-switch-rtl8366rb swconfig \ kmod-rt2800-pci IMAGES := factory.bin - IMAGE/factory.bin := dir685-images + # Pad to 128k erase blocks with 160 bytes WRGG header + IMAGE/factory.bin := append-kernel | pad-offset 128k 160 | append-rootfs | dir685-pad-rootfs | dir685-image endef TARGET_DEVICES += dlink_dir-685 define Device/dlink_dns-313 DEVICE_TITLE := D-Link DNS-313 1-Bay Network Storage Enclosure DEVICE_DTS := gemini-dlink-dns-313 + DEVICE_TYPE := nas DEVICE_PACKAGES := $(GEMINI_NAS_PACKAGES) - IMAGES := factory.bin - IMAGE/factory.bin := dns313-images + BLOCKSIZE := 1k + FILESYSTEMS := ext4 + IMAGES := factory.bin.gz + IMAGE/factory.bin.gz := dns313-images | gzip endef TARGET_DEVICES += dlink_dns-313 @@ -147,6 +180,7 @@ define Device/raidsonic_ib-4220-b $(Device/itian-raidsonic) DEVICE_TITLE := Raidsonic NAS IB-4220-B DEVICE_DTS := gemini-nas4220b + DEVICE_TYPE := nas endef TARGET_DEVICES += raidsonic_ib-4220-b diff --git a/target/linux/gemini/image/dns313_gen_hdd_img.sh b/target/linux/gemini/image/dns313_gen_hdd_img.sh new file mode 100755 index 000000000..1eb2c7c57 --- /dev/null +++ b/target/linux/gemini/image/dns313_gen_hdd_img.sh @@ -0,0 +1,28 @@ +#!/usr/bin/env bash + +set -x +[ $# -eq 5 ] || { + echo "SYNTAX: $0 " + exit 1 +} + +OUTPUT="$1" +BOOTFS="$2" +ROOTFS="$3" +BOOTFSSIZE="$4" +ROOTFSSIZE="$5" + +head=4 +sect=63 + +# Create two empty partitions followed by the boot partition with +# the ./boot/zImage and then the rootfs partition. +set `ptgen -o $OUTPUT -h $head -s $sect -t 83 -n -p 0 -p 0 -p ${BOOTFSSIZE}M -p ${ROOTFSSIZE}M` + +BOOTOFFSET="$(($1 / 512))" +BOOTSIZE="$(($2 / 512))" +ROOTFSOFFSET="$(($3 / 512))" +ROOTFSSIZE="$(($4 / 512))" + +dd bs=512 if="$BOOTFS" of="$OUTPUT" seek="$BOOTOFFSET" conv=notrunc +dd bs=512 if="$ROOTFS" of="$OUTPUT" seek="$ROOTFSOFFSET" conv=notrunc diff --git a/target/linux/gemini/patches-4.19/0019-ARM-dts-gemini-Indent-DIR-685-partition-table.patch b/target/linux/gemini/patches-4.19/0019-ARM-dts-gemini-Indent-DIR-685-partition-table.patch new file mode 100644 index 000000000..c205b5f88 --- /dev/null +++ b/target/linux/gemini/patches-4.19/0019-ARM-dts-gemini-Indent-DIR-685-partition-table.patch @@ -0,0 +1,105 @@ +From 4a228ecf553e879bae384e634bb6413438e81a0e Mon Sep 17 00:00:00 2001 +From: Linus Walleij +Date: Mon, 11 Mar 2019 15:43:05 +0100 +Subject: [PATCH 1/2] ARM: dts: gemini: Indent DIR-685 partition table + +It is discouraged to have OF partitions as subnodes directly +under the device, create a "partitions" subnode and put the +partitions inside it. + +Signed-off-by: Linus Walleij +--- + arch/arm/boot/dts/gemini-dlink-dir-685.dts | 82 ++++++++++++---------- + 1 file changed, 44 insertions(+), 38 deletions(-) + +--- a/arch/arm/boot/dts/gemini-dlink-dir-685.dts ++++ b/arch/arm/boot/dts/gemini-dlink-dir-685.dts +@@ -267,44 +267,50 @@ + /* 32MB of flash */ + reg = <0x30000000 0x02000000>; + +- /* +- * This "RedBoot" is the Storlink derivative. +- */ +- partition@0 { +- label = "RedBoot"; +- reg = <0x00000000 0x00040000>; +- read-only; +- }; +- /* +- * This firmware image contains the kernel catenated +- * with the squashfs root filesystem. For some reason +- * this is called "upgrade" on the vendor system. +- */ +- partition@40000 { +- label = "upgrade"; +- reg = <0x00040000 0x01f40000>; +- read-only; +- }; +- /* RGDB, Residental Gateway Database? */ +- partition@1f80000 { +- label = "rgdb"; +- reg = <0x01f80000 0x00040000>; +- read-only; +- }; +- /* +- * This partition contains MAC addresses for WAN, +- * WLAN and LAN, and the country code (for wireless +- * I guess). +- */ +- partition@1fc0000 { +- label = "nvram"; +- reg = <0x01fc0000 0x00020000>; +- read-only; +- }; +- partition@1fe0000 { +- label = "LangPack"; +- reg = <0x01fe0000 0x00020000>; +- read-only; ++ partitions { ++ compatible = "fixed-partitions"; ++ #address-cells = <1>; ++ #size-cells = <1>; ++ ++ /* ++ * This "RedBoot" is the Storlink derivative. ++ */ ++ partition@0 { ++ label = "RedBoot"; ++ reg = <0x00000000 0x00040000>; ++ read-only; ++ }; ++ /* ++ * This firmware image contains the kernel catenated ++ * with the squashfs root filesystem. For some reason ++ * this is called "upgrade" on the vendor system. ++ */ ++ partition@40000 { ++ label = "upgrade"; ++ reg = <0x00040000 0x01f40000>; ++ read-only; ++ }; ++ /* RGDB, Residental Gateway Database? */ ++ partition@1f80000 { ++ label = "rgdb"; ++ reg = <0x01f80000 0x00040000>; ++ read-only; ++ }; ++ /* ++ * This partition contains MAC addresses for WAN, ++ * WLAN and LAN, and the country code (for wireless ++ * I guess). ++ */ ++ partition@1fc0000 { ++ label = "nvram"; ++ reg = <0x01fc0000 0x00020000>; ++ read-only; ++ }; ++ partition@1fe0000 { ++ label = "LangPack"; ++ reg = <0x01fe0000 0x00020000>; ++ read-only; ++ }; + }; + }; + diff --git a/target/linux/gemini/patches-4.19/0020-ARM-dts-Augment-DIR-685-partition-table-for-OpenWrt.patch b/target/linux/gemini/patches-4.19/0020-ARM-dts-Augment-DIR-685-partition-table-for-OpenWrt.patch new file mode 100644 index 000000000..bb4076558 --- /dev/null +++ b/target/linux/gemini/patches-4.19/0020-ARM-dts-Augment-DIR-685-partition-table-for-OpenWrt.patch @@ -0,0 +1,35 @@ +From 854934b0ce8e758ce581f5ddbc30e618ab46fbdb Mon Sep 17 00:00:00 2001 +From: Linus Walleij +Date: Mon, 11 Mar 2019 15:44:29 +0100 +Subject: [PATCH 2/2] ARM: dts: Augment DIR-685 partition table for OpenWrt + +Rename the firmware partition so that the firmware MTD +splitter will do its job, drop the rootfs arguments as +the MTD splitter will set this up automatically. + +Signed-off-by: Linus Walleij +--- + arch/arm/boot/dts/gemini-dlink-dir-685.dts | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +--- a/arch/arm/boot/dts/gemini-dlink-dir-685.dts ++++ b/arch/arm/boot/dts/gemini-dlink-dir-685.dts +@@ -20,7 +20,7 @@ + }; + + chosen { +- bootargs = "console=ttyS0,19200n8 root=/dev/sda1 rw rootwait consoleblank=300"; ++ bootargs = "console=ttyS0,19200n8 consoleblank=300"; + stdout-path = "uart0:19200n8"; + }; + +@@ -286,7 +286,8 @@ + * this is called "upgrade" on the vendor system. + */ + partition@40000 { +- label = "upgrade"; ++ compatible = "wrg"; ++ label = "firmware"; + reg = <0x00040000 0x01f40000>; + read-only; + }; diff --git a/target/linux/generic/backport-4.14/030-USB-serial-option-fix-dwm-158-3g-modem-interface.patch b/target/linux/generic/backport-4.14/030-USB-serial-option-fix-dwm-158-3g-modem-interface.patch index 9f07fddc6..7053f61a0 100644 --- a/target/linux/generic/backport-4.14/030-USB-serial-option-fix-dwm-158-3g-modem-interface.patch +++ b/target/linux/generic/backport-4.14/030-USB-serial-option-fix-dwm-158-3g-modem-interface.patch @@ -30,7 +30,7 @@ Signed-off-by: Johan Hovold --- a/drivers/usb/serial/option.c +++ b/drivers/usb/serial/option.c -@@ -1936,7 +1936,8 @@ static const struct usb_device_id option +@@ -1941,7 +1941,8 @@ static const struct usb_device_id option { USB_DEVICE_INTERFACE_CLASS(0x2001, 0x7d01, 0xff) }, /* D-Link DWM-156 (variant) */ { USB_DEVICE_INTERFACE_CLASS(0x2001, 0x7d02, 0xff) }, { USB_DEVICE_INTERFACE_CLASS(0x2001, 0x7d03, 0xff) }, diff --git a/target/linux/generic/backport-4.14/293-v4.16-netfilter-reduce-size-of-hook-entry-point-locations.patch b/target/linux/generic/backport-4.14/293-v4.16-netfilter-reduce-size-of-hook-entry-point-locations.patch index fcf54e985..007b8315e 100644 --- a/target/linux/generic/backport-4.14/293-v4.16-netfilter-reduce-size-of-hook-entry-point-locations.patch +++ b/target/linux/generic/backport-4.14/293-v4.16-netfilter-reduce-size-of-hook-entry-point-locations.patch @@ -92,7 +92,7 @@ Signed-off-by: Pablo Neira Ayuso #endif --- a/net/bridge/br_netfilter_hooks.c +++ b/net/bridge/br_netfilter_hooks.c -@@ -992,7 +992,7 @@ int br_nf_hook_thresh(unsigned int hook, +@@ -987,7 +987,7 @@ int br_nf_hook_thresh(unsigned int hook, unsigned int i; int ret; diff --git a/target/linux/generic/backport-4.14/320-v4.16-netfilter-nf_conntrack-add-IPS_OFFLOAD-status-bit.patch b/target/linux/generic/backport-4.14/320-v4.16-netfilter-nf_conntrack-add-IPS_OFFLOAD-status-bit.patch index 00303f90a..53993ffe5 100644 --- a/target/linux/generic/backport-4.14/320-v4.16-netfilter-nf_conntrack-add-IPS_OFFLOAD-status-bit.patch +++ b/target/linux/generic/backport-4.14/320-v4.16-netfilter-nf_conntrack-add-IPS_OFFLOAD-status-bit.patch @@ -47,7 +47,7 @@ Signed-off-by: Pablo Neira Ayuso }; --- a/net/netfilter/nf_conntrack_core.c +++ b/net/netfilter/nf_conntrack_core.c -@@ -917,6 +917,9 @@ static unsigned int early_drop_list(stru +@@ -925,6 +925,9 @@ static unsigned int early_drop_list(stru hlist_nulls_for_each_entry_rcu(h, n, head, hnnode) { tmp = nf_ct_tuplehash_to_ctrack(h); @@ -57,7 +57,7 @@ Signed-off-by: Pablo Neira Ayuso if (nf_ct_is_expired(tmp)) { nf_ct_gc_expired(tmp); continue; -@@ -994,6 +997,18 @@ static bool gc_worker_can_early_drop(con +@@ -1002,6 +1005,18 @@ static bool gc_worker_can_early_drop(con return false; } @@ -76,7 +76,7 @@ Signed-off-by: Pablo Neira Ayuso static void gc_worker(struct work_struct *work) { unsigned int min_interval = max(HZ / GC_MAX_BUCKETS_DIV, 1u); -@@ -1030,6 +1045,11 @@ static void gc_worker(struct work_struct +@@ -1038,6 +1053,11 @@ static void gc_worker(struct work_struct tmp = nf_ct_tuplehash_to_ctrack(h); scanned++; diff --git a/target/linux/generic/backport-4.14/370-netfilter-nf_flow_table-fix-offloaded-connection-tim.patch b/target/linux/generic/backport-4.14/370-netfilter-nf_flow_table-fix-offloaded-connection-tim.patch index 166b7219d..22fdebb3a 100644 --- a/target/linux/generic/backport-4.14/370-netfilter-nf_flow_table-fix-offloaded-connection-tim.patch +++ b/target/linux/generic/backport-4.14/370-netfilter-nf_flow_table-fix-offloaded-connection-tim.patch @@ -21,7 +21,7 @@ Signed-off-by: Felix Fietkau --- a/net/netfilter/nf_conntrack_core.c +++ b/net/netfilter/nf_conntrack_core.c -@@ -997,18 +997,6 @@ static bool gc_worker_can_early_drop(con +@@ -1005,18 +1005,6 @@ static bool gc_worker_can_early_drop(con return false; } @@ -40,7 +40,7 @@ Signed-off-by: Felix Fietkau static void gc_worker(struct work_struct *work) { unsigned int min_interval = max(HZ / GC_MAX_BUCKETS_DIV, 1u); -@@ -1045,10 +1033,8 @@ static void gc_worker(struct work_struct +@@ -1053,10 +1041,8 @@ static void gc_worker(struct work_struct tmp = nf_ct_tuplehash_to_ctrack(h); scanned++; diff --git a/target/linux/generic/backport-4.19/020-backport_netfilter_rtcache.patch b/target/linux/generic/backport-4.19/020-backport_netfilter_rtcache.patch index 32b43082b..3a35381ce 100644 --- a/target/linux/generic/backport-4.19/020-backport_netfilter_rtcache.patch +++ b/target/linux/generic/backport-4.19/020-backport_netfilter_rtcache.patch @@ -209,8 +209,8 @@ Signed-off-by: Florian Westphal + if (pf == NFPROTO_IPV6) { + const struct rt6_info *rt = (const struct rt6_info *)dst; + -+ if (rt->rt6i_node) -+ return (u32)rt->rt6i_node->fn_sernum; ++ if (rt->from && rt->from->fib6_node) ++ return (u32)rt->from->fib6_node->fn_sernum; + } +#endif + return 0; diff --git a/target/linux/generic/backport-4.19/060-v5.1-serial-ar933x_uart-Fix-build-failure-with-disabled-c.patch b/target/linux/generic/backport-4.19/060-v5.1-serial-ar933x_uart-Fix-build-failure-with-disabled-c.patch new file mode 100644 index 000000000..b1843842e --- /dev/null +++ b/target/linux/generic/backport-4.19/060-v5.1-serial-ar933x_uart-Fix-build-failure-with-disabled-c.patch @@ -0,0 +1,94 @@ +From 72ff51d8dd262d1fef25baedc2ac35116435be47 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Petr=20=C5=A0tetiar?= +Date: Wed, 6 Mar 2019 17:54:03 +0100 +Subject: [PATCH] serial: ar933x_uart: Fix build failure with disabled console +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Andrey has reported on OpenWrt's bug tracking system[1], that he +currently can't use ar93xx_uart as pure serial UART without console +(CONFIG_SERIAL_8250_CONSOLE and CONFIG_SERIAL_AR933X_CONSOLE undefined), +because compilation ends with following error: + + ar933x_uart.c: In function 'ar933x_uart_console_write': + ar933x_uart.c:550:14: error: 'struct uart_port' has no + member named 'sysrq' + +So this patch moves all the code related to console handling behind +series of CONFIG_SERIAL_AR933X_CONSOLE ifdefs. + +1. https://bugs.openwrt.org/index.php?do=details&task_id=2152 + +Cc: Greg Kroah-Hartman +Cc: Jiri Slaby +Cc: Andrey Batyiev +Reported-by: Andrey Batyiev +Tested-by: Andrey Batyiev +Signed-off-by: Petr Štetiar +Signed-off-by: Greg Kroah-Hartman +--- + drivers/tty/serial/ar933x_uart.c | 24 ++++++++---------------- + 1 file changed, 8 insertions(+), 16 deletions(-) + +--- a/drivers/tty/serial/ar933x_uart.c ++++ b/drivers/tty/serial/ar933x_uart.c +@@ -49,11 +49,6 @@ struct ar933x_uart_port { + struct clk *clk; + }; + +-static inline bool ar933x_uart_console_enabled(void) +-{ +- return IS_ENABLED(CONFIG_SERIAL_AR933X_CONSOLE); +-} +- + static inline unsigned int ar933x_uart_read(struct ar933x_uart_port *up, + int offset) + { +@@ -508,6 +503,7 @@ static const struct uart_ops ar933x_uart + .verify_port = ar933x_uart_verify_port, + }; + ++#ifdef CONFIG_SERIAL_AR933X_CONSOLE + static struct ar933x_uart_port * + ar933x_console_ports[CONFIG_SERIAL_AR933X_NR_UARTS]; + +@@ -604,14 +600,7 @@ static struct console ar933x_uart_consol + .index = -1, + .data = &ar933x_uart_driver, + }; +- +-static void ar933x_uart_add_console_port(struct ar933x_uart_port *up) +-{ +- if (!ar933x_uart_console_enabled()) +- return; +- +- ar933x_console_ports[up->port.line] = up; +-} ++#endif /* CONFIG_SERIAL_AR933X_CONSOLE */ + + static struct uart_driver ar933x_uart_driver = { + .owner = THIS_MODULE, +@@ -700,7 +689,9 @@ static int ar933x_uart_probe(struct plat + baud = ar933x_uart_get_baud(port->uartclk, 0, AR933X_UART_MAX_STEP); + up->max_baud = min_t(unsigned int, baud, AR933X_UART_MAX_BAUD); + +- ar933x_uart_add_console_port(up); ++#ifdef CONFIG_SERIAL_AR933X_CONSOLE ++ ar933x_console_ports[up->port.line] = up; ++#endif + + ret = uart_add_one_port(&ar933x_uart_driver, &up->port); + if (ret) +@@ -749,8 +740,9 @@ static int __init ar933x_uart_init(void) + { + int ret; + +- if (ar933x_uart_console_enabled()) +- ar933x_uart_driver.cons = &ar933x_uart_console; ++#ifdef CONFIG_SERIAL_AR933X_CONSOLE ++ ar933x_uart_driver.cons = &ar933x_uart_console; ++#endif + + ret = uart_register_driver(&ar933x_uart_driver); + if (ret) diff --git a/target/linux/generic/backport-4.19/343-netfilter-nft_flow_offload-handle-netdevice-events-f.patch b/target/linux/generic/backport-4.19/343-netfilter-nft_flow_offload-handle-netdevice-events-f.patch index 51c9e488e..f8ccfcc95 100644 --- a/target/linux/generic/backport-4.19/343-netfilter-nft_flow_offload-handle-netdevice-events-f.patch +++ b/target/linux/generic/backport-4.19/343-netfilter-nft_flow_offload-handle-netdevice-events-f.patch @@ -10,7 +10,7 @@ Signed-off-by: Pablo Neira Ayuso --- a/net/netfilter/nf_flow_table_core.c +++ b/net/netfilter/nf_flow_table_core.c -@@ -519,5 +519,35 @@ void nf_flow_table_free(struct nf_flowta +@@ -520,5 +520,35 @@ void nf_flow_table_free(struct nf_flowta } EXPORT_SYMBOL_GPL(nf_flow_table_free); @@ -48,7 +48,7 @@ Signed-off-by: Pablo Neira Ayuso MODULE_AUTHOR("Pablo Neira Ayuso "); --- a/net/netfilter/nft_flow_offload.c +++ b/net/netfilter/nft_flow_offload.c -@@ -193,47 +193,14 @@ static struct nft_expr_type nft_flow_off +@@ -196,47 +196,14 @@ static struct nft_expr_type nft_flow_off .owner = THIS_MODULE, }; diff --git a/target/linux/generic/backport-4.19/366-netfilter-nf_flow_table-clean-up-and-fix-dst-handlin.patch b/target/linux/generic/backport-4.19/366-netfilter-nf_flow_table-clean-up-and-fix-dst-handlin.patch index 624602dab..ac7a73b60 100644 --- a/target/linux/generic/backport-4.19/366-netfilter-nf_flow_table-clean-up-and-fix-dst-handlin.patch +++ b/target/linux/generic/backport-4.19/366-netfilter-nf_flow_table-clean-up-and-fix-dst-handlin.patch @@ -38,7 +38,7 @@ Signed-off-by: Felix Fietkau return NF_ACCEPT; --- a/net/netfilter/nft_flow_offload.c +++ b/net/netfilter/nft_flow_offload.c -@@ -17,27 +17,38 @@ struct nft_flow_offload { +@@ -18,13 +18,11 @@ struct nft_flow_offload { struct nft_flowtable *flowtable; }; @@ -56,14 +56,7 @@ Signed-off-by: Felix Fietkau struct flowi fl; memset(&fl, 0, sizeof(fl)); - switch (nft_pf(pkt)) { - case NFPROTO_IPV4: -- fl.u.ip4.daddr = ct->tuplehash[!dir].tuple.dst.u3.ip; -+ fl.u.ip4.daddr = ct->tuplehash[dir].tuple.src.u3.ip; - break; - case NFPROTO_IPV6: -- fl.u.ip6.daddr = ct->tuplehash[!dir].tuple.dst.u3.in6; -+ fl.u.ip6.daddr = ct->tuplehash[dir].tuple.src.u3.in6; +@@ -39,8 +37,21 @@ static int nft_flow_route(const struct n break; } diff --git a/target/linux/generic/backport-4.19/370-netfilter-nf_flow_table-fix-offloaded-connection-tim.patch b/target/linux/generic/backport-4.19/370-netfilter-nf_flow_table-fix-offloaded-connection-tim.patch index 9c4b7e392..c7436f774 100644 --- a/target/linux/generic/backport-4.19/370-netfilter-nf_flow_table-fix-offloaded-connection-tim.patch +++ b/target/linux/generic/backport-4.19/370-netfilter-nf_flow_table-fix-offloaded-connection-tim.patch @@ -21,7 +21,7 @@ Signed-off-by: Felix Fietkau --- a/net/netfilter/nf_conntrack_core.c +++ b/net/netfilter/nf_conntrack_core.c -@@ -1119,18 +1119,6 @@ static bool gc_worker_can_early_drop(con +@@ -1143,18 +1143,6 @@ static bool gc_worker_can_early_drop(con return false; } @@ -40,7 +40,7 @@ Signed-off-by: Felix Fietkau static void gc_worker(struct work_struct *work) { unsigned int min_interval = max(HZ / GC_MAX_BUCKETS_DIV, 1u); -@@ -1167,10 +1155,8 @@ static void gc_worker(struct work_struct +@@ -1191,10 +1179,8 @@ static void gc_worker(struct work_struct tmp = nf_ct_tuplehash_to_ctrack(h); scanned++; @@ -54,7 +54,7 @@ Signed-off-by: Felix Fietkau nf_ct_gc_expired(tmp); --- a/net/netfilter/nf_flow_table_core.c +++ b/net/netfilter/nf_flow_table_core.c -@@ -182,8 +182,27 @@ static const struct rhashtable_params nf +@@ -183,8 +183,27 @@ static const struct rhashtable_params nf .automatic_shrinking = true, }; @@ -82,7 +82,7 @@ Signed-off-by: Felix Fietkau flow->timeout = (u32)jiffies; rhashtable_insert_fast(&flow_table->rhashtable, -@@ -304,6 +323,8 @@ static int nf_flow_offload_gc_step(struc +@@ -305,6 +324,8 @@ static int nf_flow_offload_gc_step(struc rhashtable_walk_start(&hti); while ((tuplehash = rhashtable_walk_next(&hti))) { @@ -91,7 +91,7 @@ Signed-off-by: Felix Fietkau if (IS_ERR(tuplehash)) { err = PTR_ERR(tuplehash); if (err != -EAGAIN) -@@ -316,9 +337,13 @@ static int nf_flow_offload_gc_step(struc +@@ -317,9 +338,13 @@ static int nf_flow_offload_gc_step(struc flow = container_of(tuplehash, struct flow_offload, tuplehash[0]); diff --git a/target/linux/generic/backport-4.19/371-netfilter-nf_flow_table-fix-up-ct-state-of-flows-aft.patch b/target/linux/generic/backport-4.19/371-netfilter-nf_flow_table-fix-up-ct-state-of-flows-aft.patch index 59751ff03..5ee55b8f0 100644 --- a/target/linux/generic/backport-4.19/371-netfilter-nf_flow_table-fix-up-ct-state-of-flows-aft.patch +++ b/target/linux/generic/backport-4.19/371-netfilter-nf_flow_table-fix-up-ct-state-of-flows-aft.patch @@ -12,7 +12,7 @@ Signed-off-by: Felix Fietkau --- a/net/netfilter/nf_flow_table_core.c +++ b/net/netfilter/nf_flow_table_core.c -@@ -230,6 +230,9 @@ static void flow_offload_del(struct nf_f +@@ -231,6 +231,9 @@ static void flow_offload_del(struct nf_f e = container_of(flow, struct flow_offload_entry, flow); clear_bit(IPS_OFFLOAD_BIT, &e->ct->status); diff --git a/target/linux/generic/backport-4.19/400-v5.2-leds-trigger-netdev-fix-refcnt-leak-on-interface-ren.patch b/target/linux/generic/backport-4.19/400-v5.2-leds-trigger-netdev-fix-refcnt-leak-on-interface-ren.patch new file mode 100644 index 000000000..851e13ba2 --- /dev/null +++ b/target/linux/generic/backport-4.19/400-v5.2-leds-trigger-netdev-fix-refcnt-leak-on-interface-ren.patch @@ -0,0 +1,69 @@ +From dd7590a3ab3f0804ed5e930295e2caa5979e3958 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= +Date: Thu, 28 Feb 2019 22:57:33 +0100 +Subject: [PATCH] leds: trigger: netdev: fix refcnt leak on interface rename +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +Renaming a netdev-trigger-tracked interface was resulting in an +unbalanced dev_hold(). + +Example: +> iw phy phy0 interface add foo type __ap +> echo netdev > trigger +> echo foo > device_name +> ip link set foo name bar +> iw dev bar del +[ 237.355366] unregister_netdevice: waiting for bar to become free. Usage count = 1 +[ 247.435362] unregister_netdevice: waiting for bar to become free. Usage count = 1 +[ 257.545366] unregister_netdevice: waiting for bar to become free. Usage count = 1 + +Above problem was caused by trigger checking a dev->name which obviously +changes after renaming an interface. It meant missing all further events +including the NETDEV_UNREGISTER which is required for calling dev_put(). + +This change fixes that by: +1) Comparing device struct *address* for notification-filtering purposes +2) Dropping unneeded NETDEV_CHANGENAME code (no behavior change) + +Fixes: 06f502f57d0d ("leds: trigger: Introduce a NETDEV trigger") +Signed-off-by: Rafał Miłecki +Acked-by: Pavel Machek +Signed-off-by: Jacek Anaszewski +--- + drivers/leds/trigger/ledtrig-netdev.c | 13 +++++-------- + 1 file changed, 5 insertions(+), 8 deletions(-) + +--- a/drivers/leds/trigger/ledtrig-netdev.c ++++ b/drivers/leds/trigger/ledtrig-netdev.c +@@ -301,11 +301,11 @@ static int netdev_trig_notify(struct not + container_of(nb, struct led_netdev_data, notifier); + + if (evt != NETDEV_UP && evt != NETDEV_DOWN && evt != NETDEV_CHANGE +- && evt != NETDEV_REGISTER && evt != NETDEV_UNREGISTER +- && evt != NETDEV_CHANGENAME) ++ && evt != NETDEV_REGISTER && evt != NETDEV_UNREGISTER) + return NOTIFY_DONE; + +- if (strcmp(dev->name, trigger_data->device_name)) ++ if (!(dev == trigger_data->net_dev || ++ (evt == NETDEV_REGISTER && !strcmp(dev->name, trigger_data->device_name)))) + return NOTIFY_DONE; + + cancel_delayed_work_sync(&trigger_data->work); +@@ -320,12 +320,9 @@ static int netdev_trig_notify(struct not + dev_hold(dev); + trigger_data->net_dev = dev; + break; +- case NETDEV_CHANGENAME: + case NETDEV_UNREGISTER: +- if (trigger_data->net_dev) { +- dev_put(trigger_data->net_dev); +- trigger_data->net_dev = NULL; +- } ++ dev_put(trigger_data->net_dev); ++ trigger_data->net_dev = NULL; + break; + case NETDEV_UP: + case NETDEV_CHANGE: diff --git a/target/linux/generic/pending-4.19/551-ubifs-fix-default-compression-selection.patch b/target/linux/generic/backport-4.19/500-v4.20-ubifs-Fix-default-compression-selection-in-ubifs.patch similarity index 66% rename from target/linux/generic/pending-4.19/551-ubifs-fix-default-compression-selection.patch rename to target/linux/generic/backport-4.19/500-v4.20-ubifs-Fix-default-compression-selection-in-ubifs.patch index 60d561998..7bd3ed9fa 100644 --- a/target/linux/generic/pending-4.19/551-ubifs-fix-default-compression-selection.patch +++ b/target/linux/generic/backport-4.19/500-v4.20-ubifs-Fix-default-compression-selection-in-ubifs.patch @@ -1,7 +1,16 @@ +From d62e98ed1efcaa94caa004f622944afdce5f1c3c Mon Sep 17 00:00:00 2001 From: Gabor Juhos -Subject: fs: ubifs: fix default compression selection in ubifs +Date: Sun, 9 Dec 2018 18:12:13 +0100 +Subject: [PATCH] ubifs: Fix default compression selection in ubifs + +When ubifs is build without the LZO compressor and no compressor is +given the creation of the default file system will fail. before +selection the LZO compressor check if it is present and if not fall back +to the zlib or none. Signed-off-by: Gabor Juhos +Signed-off-by: Hauke Mehrtens +Signed-off-by: Richard Weinberger --- fs/ubifs/sb.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/target/linux/generic/config-4.19 b/target/linux/generic/config-4.19 index 72b1bceae..ba2d67c2d 100644 --- a/target/linux/generic/config-4.19 +++ b/target/linux/generic/config-4.19 @@ -283,6 +283,7 @@ CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=8 # CONFIG_ARCH_ZYNQMP is not set # CONFIG_ARCNET is not set # CONFIG_ARC_EMAC is not set +# CONFIG_ARC_IRQ_NO_AUTOSAVE is not set # CONFIG_ARM64_ERRATUM_1024718 is not set # CONFIG_ARM64_ERRATUM_819472 is not set # CONFIG_ARM64_ERRATUM_824069 is not set @@ -4981,6 +4982,7 @@ CONFIG_STRIP_ASM_SYMS=y # CONFIG_ST_UVIS25 is not set # CONFIG_SUN4I_GPADC is not set # CONFIG_SUN50I_DE2_BUS is not set +# CONFIG_SUN50I_ERRATUM_UNKNOWN1 is not set # CONFIG_SUNDANCE is not set # CONFIG_SUNGEM is not set # CONFIG_SUNRPC is not set diff --git a/target/linux/generic/hack-4.14/902-debloat_proc.patch b/target/linux/generic/hack-4.14/902-debloat_proc.patch index 945538056..99e3b5e34 100644 --- a/target/linux/generic/hack-4.14/902-debloat_proc.patch +++ b/target/linux/generic/hack-4.14/902-debloat_proc.patch @@ -232,7 +232,7 @@ Signed-off-by: Felix Fietkau return -ENOMEM; --- a/mm/vmalloc.c +++ b/mm/vmalloc.c -@@ -2770,6 +2770,8 @@ static const struct file_operations proc +@@ -2774,6 +2774,8 @@ static const struct file_operations proc static int __init proc_vmalloc_init(void) { diff --git a/target/linux/generic/hack-4.19/207-disable-modorder.patch b/target/linux/generic/hack-4.19/207-disable-modorder.patch index 92c3343dd..f47da3f24 100644 --- a/target/linux/generic/hack-4.19/207-disable-modorder.patch +++ b/target/linux/generic/hack-4.19/207-disable-modorder.patch @@ -15,7 +15,7 @@ Signed-off-by: Felix Fietkau --- a/Makefile +++ b/Makefile -@@ -1227,7 +1227,6 @@ all: modules +@@ -1232,7 +1232,6 @@ all: modules PHONY += modules modules: $(vmlinux-dirs) $(if $(KBUILD_BUILTIN),vmlinux) modules.builtin @@ -23,7 +23,7 @@ Signed-off-by: Felix Fietkau @$(kecho) ' Building modules, stage 2.'; $(Q)$(MAKE) -f $(srctree)/scripts/Makefile.modpost -@@ -1256,7 +1255,6 @@ _modinst_: +@@ -1261,7 +1260,6 @@ _modinst_: rm -f $(MODLIB)/build ; \ ln -s $(CURDIR) $(MODLIB)/build ; \ fi diff --git a/target/linux/generic/hack-4.19/220-gc_sections.patch b/target/linux/generic/hack-4.19/220-gc_sections.patch index 17fcc5cbd..2d0de9d8d 100644 --- a/target/linux/generic/hack-4.19/220-gc_sections.patch +++ b/target/linux/generic/hack-4.19/220-gc_sections.patch @@ -33,7 +33,7 @@ Signed-off-by: Gabor Juhos # Read KERNELRELEASE from include/config/kernel.release (if it exists) KERNELRELEASE = $(shell cat include/config/kernel.release 2> /dev/null) KERNELVERSION = $(VERSION)$(if $(PATCHLEVEL),.$(PATCHLEVEL)$(if $(SUBLEVEL),.$(SUBLEVEL)))$(EXTRAVERSION) -@@ -785,11 +790,6 @@ ifdef CONFIG_DEBUG_SECTION_MISMATCH +@@ -788,11 +793,6 @@ ifdef CONFIG_DEBUG_SECTION_MISMATCH KBUILD_CFLAGS += $(call cc-option, -fno-inline-functions-called-once) endif diff --git a/target/linux/generic/hack-4.19/647-netfilter-flow-acct.patch b/target/linux/generic/hack-4.19/647-netfilter-flow-acct.patch index 8b13a43fd..2a9725f93 100644 --- a/target/linux/generic/hack-4.19/647-netfilter-flow-acct.patch +++ b/target/linux/generic/hack-4.19/647-netfilter-flow-acct.patch @@ -1,6 +1,6 @@ --- a/include/net/netfilter/nf_flow_table.h +++ b/include/net/netfilter/nf_flow_table.h -@@ -164,6 +164,8 @@ struct nf_flow_table_hw { +@@ -163,6 +163,8 @@ struct nf_flow_table_hw { int nf_flow_table_hw_register(const struct nf_flow_table_hw *offload); void nf_flow_table_hw_unregister(const struct nf_flow_table_hw *offload); @@ -19,7 +19,7 @@ struct flow_offload_entry { struct flow_offload flow; -@@ -148,6 +149,22 @@ void flow_offload_free(struct flow_offlo +@@ -149,6 +150,22 @@ void flow_offload_free(struct flow_offlo } EXPORT_SYMBOL_GPL(flow_offload_free); diff --git a/target/linux/generic/hack-4.19/650-netfilter-add-xt_OFFLOAD-target.patch b/target/linux/generic/hack-4.19/650-netfilter-add-xt_OFFLOAD-target.patch index ab1bb6aa8..8ebea32a8 100644 --- a/target/linux/generic/hack-4.19/650-netfilter-add-xt_OFFLOAD-target.patch +++ b/target/linux/generic/hack-4.19/650-netfilter-add-xt_OFFLOAD-target.patch @@ -98,7 +98,7 @@ Signed-off-by: Felix Fietkau obj-$(CONFIG_NETFILTER_XT_TARGET_LED) += xt_LED.o --- /dev/null +++ b/net/netfilter/xt_FLOWOFFLOAD.c -@@ -0,0 +1,368 @@ +@@ -0,0 +1,366 @@ +/* + * Copyright (C) 2018 Felix Fietkau + * @@ -330,9 +330,7 @@ Signed-off-by: Felix Fietkau + return -EINVAL; + + route->tuple[dir].dst = this_dst; -+ route->tuple[dir].ifindex = xt_in(par)->ifindex; + route->tuple[!dir].dst = other_dst; -+ route->tuple[!dir].ifindex = xt_out(par)->ifindex; + + return 0; +} diff --git a/target/linux/generic/hack-4.19/661-use_fq_codel_by_default.patch b/target/linux/generic/hack-4.19/661-use_fq_codel_by_default.patch index ce9d4b14f..817c41801 100644 --- a/target/linux/generic/hack-4.19/661-use_fq_codel_by_default.patch +++ b/target/linux/generic/hack-4.19/661-use_fq_codel_by_default.patch @@ -14,7 +14,7 @@ Signed-off-by: Felix Fietkau --- a/include/net/sch_generic.h +++ b/include/net/sch_generic.h -@@ -486,12 +486,13 @@ extern struct Qdisc_ops noop_qdisc_ops; +@@ -481,12 +481,13 @@ extern struct Qdisc_ops noop_qdisc_ops; extern struct Qdisc_ops pfifo_fast_ops; extern struct Qdisc_ops mq_qdisc_ops; extern struct Qdisc_ops noqueue_qdisc_ops; @@ -83,7 +83,7 @@ Signed-off-by: Felix Fietkau EXPORT_SYMBOL(default_qdisc_ops); /* Main transmission queue. */ -@@ -1005,7 +1005,7 @@ static void attach_one_default_qdisc(str +@@ -1004,7 +1004,7 @@ static void attach_one_default_qdisc(str void *_unused) { struct Qdisc *qdisc; diff --git a/target/linux/generic/hack-4.19/662-remove_pfifo_fast.patch b/target/linux/generic/hack-4.19/662-remove_pfifo_fast.patch index 8f54c516f..0009940cd 100644 --- a/target/linux/generic/hack-4.19/662-remove_pfifo_fast.patch +++ b/target/linux/generic/hack-4.19/662-remove_pfifo_fast.patch @@ -10,7 +10,7 @@ Signed-off-by: Felix Fietkau --- a/net/sched/sch_generic.c +++ b/net/sched/sch_generic.c -@@ -595,208 +595,6 @@ struct Qdisc_ops noqueue_qdisc_ops __rea +@@ -595,207 +595,6 @@ struct Qdisc_ops noqueue_qdisc_ops __rea .owner = THIS_MODULE, }; @@ -52,7 +52,7 @@ Signed-off-by: Felix Fietkau - if (unlikely(err)) - return qdisc_drop_cpu(skb, qdisc, to_free); - -- qdisc_qstats_cpu_qlen_inc(qdisc); +- qdisc_qstats_atomic_qlen_inc(qdisc); - /* Note: skb can not be used after skb_array_produce(), - * so we better not use qdisc_qstats_cpu_backlog_inc() - */ @@ -77,7 +77,7 @@ Signed-off-by: Felix Fietkau - if (likely(skb)) { - qdisc_qstats_cpu_backlog_dec(qdisc, skb); - qdisc_bstats_cpu_update(qdisc, skb); -- qdisc_qstats_cpu_qlen_dec(qdisc); +- qdisc_qstats_atomic_qlen_dec(qdisc); - } - - return skb; @@ -121,7 +121,6 @@ Signed-off-by: Felix Fietkau - struct gnet_stats_queue *q = per_cpu_ptr(qdisc->cpu_qstats, i); - - q->backlog = 0; -- q->qlen = 0; - } -} - diff --git a/target/linux/generic/hack-4.19/702-phy_add_aneg_done_function.patch b/target/linux/generic/hack-4.19/702-phy_add_aneg_done_function.patch index 85ffa1ac1..6fbcd43d6 100644 --- a/target/linux/generic/hack-4.19/702-phy_add_aneg_done_function.patch +++ b/target/linux/generic/hack-4.19/702-phy_add_aneg_done_function.patch @@ -22,6 +22,6 @@ + if (phydev->drv && phydev->drv->update_link) + return phydev->drv->update_link(phydev); + - /* Do a fake read */ - status = phy_read(phydev, MII_BMSR); - if (status < 0) + /* The link state is latched low so that momentary link + * drops can be detected. Do not double-read the status + * in polling mode to detect such short link drops. diff --git a/target/linux/generic/hack-4.19/902-debloat_proc.patch b/target/linux/generic/hack-4.19/902-debloat_proc.patch index 018efda8f..bf633d5ec 100644 --- a/target/linux/generic/hack-4.19/902-debloat_proc.patch +++ b/target/linux/generic/hack-4.19/902-debloat_proc.patch @@ -232,7 +232,7 @@ Signed-off-by: Felix Fietkau if (!pe) --- a/mm/vmalloc.c +++ b/mm/vmalloc.c -@@ -2736,6 +2736,8 @@ static const struct seq_operations vmall +@@ -2740,6 +2740,8 @@ static const struct seq_operations vmall static int __init proc_vmalloc_init(void) { diff --git a/target/linux/generic/hack-4.19/904-debloat_dma_buf.patch b/target/linux/generic/hack-4.19/904-debloat_dma_buf.patch index 9b686be77..a4b6e36d0 100644 --- a/target/linux/generic/hack-4.19/904-debloat_dma_buf.patch +++ b/target/linux/generic/hack-4.19/904-debloat_dma_buf.patch @@ -54,7 +54,7 @@ Signed-off-by: Felix Fietkau +MODULE_LICENSE("GPL"); --- a/kernel/sched/core.c +++ b/kernel/sched/core.c -@@ -2127,6 +2127,7 @@ int wake_up_state(struct task_struct *p, +@@ -2129,6 +2129,7 @@ int wake_up_state(struct task_struct *p, { return try_to_wake_up(p, state, 0); } diff --git a/target/linux/generic/hack-4.19/940-cleanup-offload-hooks-on-netdev-unregister.patch b/target/linux/generic/hack-4.19/940-cleanup-offload-hooks-on-netdev-unregister.patch index 6638a5e94..6db6112b7 100644 --- a/target/linux/generic/hack-4.19/940-cleanup-offload-hooks-on-netdev-unregister.patch +++ b/target/linux/generic/hack-4.19/940-cleanup-offload-hooks-on-netdev-unregister.patch @@ -39,7 +39,7 @@ Signed-off-by: Chen Minqiang --- a/net/netfilter/xt_FLOWOFFLOAD.c +++ b/net/netfilter/xt_FLOWOFFLOAD.c -@@ -340,10 +340,41 @@ static void xt_flowoffload_table_cleanup +@@ -338,10 +338,41 @@ static void xt_flowoffload_table_cleanup nf_flow_table_free(table); } @@ -81,7 +81,7 @@ Signed-off-by: Chen Minqiang INIT_DELAYED_WORK(&hook_work, xt_flowoffload_hook_work); ret = xt_flowoffload_table_init(&nf_flowtable); -@@ -361,6 +392,7 @@ static void __exit xt_flowoffload_tg_exi +@@ -359,6 +390,7 @@ static void __exit xt_flowoffload_tg_exi { xt_unregister_target(&offload_tg_reg); xt_flowoffload_table_cleanup(&nf_flowtable); diff --git a/target/linux/generic/hack-4.9/902-debloat_proc.patch b/target/linux/generic/hack-4.9/902-debloat_proc.patch index 91d1d2835..7c4a48f5f 100644 --- a/target/linux/generic/hack-4.9/902-debloat_proc.patch +++ b/target/linux/generic/hack-4.9/902-debloat_proc.patch @@ -233,7 +233,7 @@ Signed-off-by: Felix Fietkau return -ENOMEM; --- a/mm/vmalloc.c +++ b/mm/vmalloc.c -@@ -2714,6 +2714,8 @@ static const struct file_operations proc +@@ -2718,6 +2718,8 @@ static const struct file_operations proc static int __init proc_vmalloc_init(void) { diff --git a/target/linux/generic/pending-4.19/201-extra_optimization.patch b/target/linux/generic/pending-4.19/201-extra_optimization.patch index d86e29fc7..3a34c4744 100644 --- a/target/linux/generic/pending-4.19/201-extra_optimization.patch +++ b/target/linux/generic/pending-4.19/201-extra_optimization.patch @@ -14,7 +14,7 @@ Signed-off-by: Felix Fietkau --- a/Makefile +++ b/Makefile -@@ -659,12 +659,12 @@ KBUILD_CFLAGS += $(call cc-disable-warni +@@ -662,12 +662,12 @@ KBUILD_CFLAGS += $(call cc-disable-warni ifdef CONFIG_CC_OPTIMIZE_FOR_SIZE KBUILD_CFLAGS += $(call cc-option,-Oz,-Os) diff --git a/target/linux/generic/pending-4.19/305-mips_module_reloc.patch b/target/linux/generic/pending-4.19/305-mips_module_reloc.patch index 253b50f62..609a96db4 100644 --- a/target/linux/generic/pending-4.19/305-mips_module_reloc.patch +++ b/target/linux/generic/pending-4.19/305-mips_module_reloc.patch @@ -11,7 +11,7 @@ Signed-off-by: Felix Fietkau --- a/arch/mips/Makefile +++ b/arch/mips/Makefile -@@ -93,8 +93,13 @@ all-$(CONFIG_SYS_SUPPORTS_ZBOOT)+= vmlin +@@ -93,8 +93,18 @@ all-$(CONFIG_SYS_SUPPORTS_ZBOOT)+= vmlin cflags-y += -G 0 -mno-abicalls -fno-pic -pipe -mno-branch-likely cflags-y += -msoft-float LDFLAGS_vmlinux += -G 0 -static -n -nostdlib @@ -19,8 +19,13 @@ Signed-off-by: Felix Fietkau KBUILD_AFLAGS_MODULE += -mlong-calls KBUILD_CFLAGS_MODULE += -mlong-calls +else -+KBUILD_AFLAGS_MODULE += -mno-long-calls -+KBUILD_CFLAGS_MODULE += -mno-long-calls ++ ifdef CONFIG_DYNAMIC_FTRACE ++ KBUILD_AFLAGS_MODULE += -mlong-calls ++ KBUILD_CFLAGS_MODULE += -mlong-calls ++ else ++ KBUILD_AFLAGS_MODULE += -mno-long-calls ++ KBUILD_CFLAGS_MODULE += -mno-long-calls ++ endif +endif ifeq ($(CONFIG_RELOCATABLE),y) diff --git a/target/linux/generic/pending-4.19/308-mips32r2_tune.patch b/target/linux/generic/pending-4.19/308-mips32r2_tune.patch index 17c867acc..d9a2a92f5 100644 --- a/target/linux/generic/pending-4.19/308-mips32r2_tune.patch +++ b/target/linux/generic/pending-4.19/308-mips32r2_tune.patch @@ -11,7 +11,7 @@ Signed-off-by: Felix Fietkau --- a/arch/mips/Makefile +++ b/arch/mips/Makefile -@@ -171,7 +171,7 @@ cflags-$(CONFIG_CPU_VR41XX) += -march=r4 +@@ -176,7 +176,7 @@ cflags-$(CONFIG_CPU_VR41XX) += -march=r4 cflags-$(CONFIG_CPU_R4X00) += -march=r4600 -Wa,--trap cflags-$(CONFIG_CPU_TX49XX) += -march=r4600 -Wa,--trap cflags-$(CONFIG_CPU_MIPS32_R1) += -march=mips32 -Wa,--trap diff --git a/target/linux/generic/pending-4.19/332-arc-add-OWRTDTB-section.patch b/target/linux/generic/pending-4.19/332-arc-add-OWRTDTB-section.patch index 963547eed..7927ea424 100644 --- a/target/linux/generic/pending-4.19/332-arc-add-OWRTDTB-section.patch +++ b/target/linux/generic/pending-4.19/332-arc-add-OWRTDTB-section.patch @@ -1,5 +1,7 @@ -From: Alexey Brodkin -Subject: openwrt: arc - add OWRTDTB section +From 34ef04f3845ed2b47d57dd9d3b795b16e1f8185a Mon Sep 17 00:00:00 2001 +From: Evgeniy Didin +Date: Fri, 15 Mar 2019 18:53:38 +0300 +Subject: [PATCH] arc add OWRTDTB section This change allows OpenWRT to patch resulting kernel binary with external .dtb. @@ -10,7 +12,9 @@ given its ARC core configurations match (at least cache line sizes etc). ""patch-dtb" searches for ASCII "OWRTDTB:" strign and copies external .dtb right after it, keeping the string in place. +Signed-off-by: Eugeniy Paltsev Signed-off-by: Alexey Brodkin +Signed-off-by: Evgeniy Didin --- arch/arc/kernel/head.S | 10 ++++++++++ arch/arc/kernel/setup.c | 4 +++- @@ -19,18 +23,18 @@ Signed-off-by: Alexey Brodkin --- a/arch/arc/kernel/head.S +++ b/arch/arc/kernel/head.S -@@ -49,6 +49,16 @@ - 1: +@@ -59,6 +59,16 @@ + #endif .endm -+; Here "patch-dtb" will embed external .dtb -+; Note "patch-dtb" searches for ASCII "OWRTDTB:" string -+; and pastes .dtb right after it, hense the string precedes -+; __image_dtb symbol. ++ ; Here "patch-dtb" will embed external .dtb ++ ; Note "patch-dtb" searches for ASCII "OWRTDTB:" string ++ ; and pastes .dtb right after it, hense the string precedes ++ ; __image_dtb symbol. + .section .owrt, "aw",@progbits -+ .ascii "OWRTDTB:" ++ .ascii "OWRTDTB:" +ENTRY(__image_dtb) -+ .fill 0x4000 ++ .fill 0x4000 +END(__image_dtb) + .section .init.text, "ax",@progbits @@ -38,24 +42,24 @@ Signed-off-by: Alexey Brodkin ;---------------------------------------------------------------- --- a/arch/arc/kernel/setup.c +++ b/arch/arc/kernel/setup.c -@@ -456,6 +456,8 @@ static inline int is_kernel(unsigned lon - return 0; +@@ -520,7 +520,7 @@ ignore_uboot_args: + #endif + + if (use_embedded_dtb) { +- machine_desc = setup_machine_fdt(__dtb_start); ++ machine_desc = setup_machine_fdt(&__image_dtb); + if (!machine_desc) + panic("Embedded DT invalid\n"); + } +@@ -536,6 +536,8 @@ ignore_uboot_args: + } } +extern struct boot_param_header __image_dtb; + void __init setup_arch(char **cmdline_p) { - #ifdef CONFIG_ARC_UBOOT_SUPPORT -@@ -469,7 +471,7 @@ void __init setup_arch(char **cmdline_p) - #endif - { - /* No, so try the embedded one */ -- machine_desc = setup_machine_fdt(__dtb_start); -+ machine_desc = setup_machine_fdt(&__image_dtb); - if (!machine_desc) - panic("Embedded DT invalid\n"); - + handle_uboot_args(); --- a/arch/arc/kernel/vmlinux.lds.S +++ b/arch/arc/kernel/vmlinux.lds.S @@ -30,6 +30,19 @@ SECTIONS @@ -63,16 +67,16 @@ Signed-off-by: Alexey Brodkin . = CONFIG_LINUX_LINK_BASE; + /* -+ * In OpenWRT we want to patch built binary embedding .dtb of choice. -+ * This is implemented with "patch-dtb" utility which searches for -+ * "OWRTDTB:" string in first 16k of image and if it is found -+ * copies .dtb right after mentioned string. -+ * -+ * Note: "OWRTDTB:" won't be overwritten with .dtb, .dtb will follow it. -+ */ -+ .owrt : { ++ * In OpenWRT we want to patch built binary embedding .dtb of choice. ++ * This is implemented with "patch-dtb" utility which searches for ++ * "OWRTDTB:" string in first 16k of image and if it is found ++ * copies .dtb right after mentioned string. ++ * ++ * Note: "OWRTDTB:" won't be overwritten with .dtb, .dtb will follow it. ++ */ ++ .owrt : { + *(.owrt) -+ . = ALIGN(PAGE_SIZE); ++ . = ALIGN(PAGE_SIZE); + } + _int_vec_base_lds = .; diff --git a/target/linux/generic/pending-4.19/613-netfilter_optional_tcp_window_check.patch b/target/linux/generic/pending-4.19/613-netfilter_optional_tcp_window_check.patch index f9613a1ff..aa5330939 100644 --- a/target/linux/generic/pending-4.19/613-netfilter_optional_tcp_window_check.patch +++ b/target/linux/generic/pending-4.19/613-netfilter_optional_tcp_window_check.patch @@ -28,7 +28,7 @@ Signed-off-by: Felix Fietkau /* * Get the required data from the packet. */ -@@ -1476,6 +1482,13 @@ static struct ctl_table tcp_sysctl_table +@@ -1506,6 +1512,13 @@ static struct ctl_table tcp_sysctl_table .mode = 0644, .proc_handler = proc_dointvec, }, diff --git a/target/linux/generic/pending-4.19/640-netfilter-nf_flow_table-add-hardware-offload-support.patch b/target/linux/generic/pending-4.19/640-netfilter-nf_flow_table-add-hardware-offload-support.patch index 0ac545c51..2e83ff391 100644 --- a/target/linux/generic/pending-4.19/640-netfilter-nf_flow_table-add-hardware-offload-support.patch +++ b/target/linux/generic/pending-4.19/640-netfilter-nf_flow_table-add-hardware-offload-support.patch @@ -85,7 +85,7 @@ Signed-off-by: Pablo Neira Ayuso struct flow_offload { struct flow_offload_tuple_rhash tuplehash[FLOW_OFFLOAD_DIR_MAX]; -@@ -126,6 +133,22 @@ unsigned int nf_flow_offload_ip_hook(voi +@@ -125,6 +132,22 @@ unsigned int nf_flow_offload_ip_hook(voi unsigned int nf_flow_offload_ipv6_hook(void *priv, struct sk_buff *skb, const struct nf_hook_state *state); @@ -156,7 +156,7 @@ Signed-off-by: Pablo Neira Ayuso obj-$(CONFIG_NETFILTER_XTABLES) += x_tables.o xt_tcpudp.o --- a/net/netfilter/nf_flow_table_core.c +++ b/net/netfilter/nf_flow_table_core.c -@@ -215,10 +215,16 @@ int flow_offload_add(struct nf_flowtable +@@ -216,10 +216,16 @@ int flow_offload_add(struct nf_flowtable } EXPORT_SYMBOL_GPL(flow_offload_add); @@ -173,7 +173,7 @@ Signed-off-by: Pablo Neira Ayuso rhashtable_remove_fast(&flow_table->rhashtable, &flow->tuplehash[FLOW_OFFLOAD_DIR_ORIGINAL].node, -@@ -233,6 +239,9 @@ static void flow_offload_del(struct nf_f +@@ -234,6 +240,9 @@ static void flow_offload_del(struct nf_f if (!(flow->flags & FLOW_OFFLOAD_TEARDOWN)) flow_offload_fixup_ct_state(e->ct); @@ -183,7 +183,7 @@ Signed-off-by: Pablo Neira Ayuso flow_offload_free(flow); } -@@ -346,6 +355,9 @@ static int nf_flow_offload_gc_step(struc +@@ -347,6 +356,9 @@ static int nf_flow_offload_gc_step(struc if (!teardown) nf_ct_offload_timeout(flow); @@ -193,7 +193,7 @@ Signed-off-by: Pablo Neira Ayuso if (nf_flow_has_expired(flow) || teardown) flow_offload_del(flow_table, flow); } -@@ -481,10 +493,43 @@ int nf_flow_dnat_port(const struct flow_ +@@ -482,10 +494,43 @@ int nf_flow_dnat_port(const struct flow_ } EXPORT_SYMBOL_GPL(nf_flow_dnat_port); @@ -237,7 +237,7 @@ Signed-off-by: Pablo Neira Ayuso INIT_DEFERRABLE_WORK(&flowtable->gc_work, nf_flow_offload_work_gc); err = rhashtable_init(&flowtable->rhashtable, -@@ -522,6 +567,8 @@ static void nf_flow_table_iterate_cleanu +@@ -523,6 +568,8 @@ static void nf_flow_table_iterate_cleanu { nf_flow_table_iterate(flowtable, nf_flow_table_do_cleanup, dev); flush_delayed_work(&flowtable->gc_work); @@ -246,7 +246,7 @@ Signed-off-by: Pablo Neira Ayuso } void nf_flow_table_cleanup(struct net *net, struct net_device *dev) -@@ -535,6 +582,26 @@ void nf_flow_table_cleanup(struct net *n +@@ -536,6 +583,26 @@ void nf_flow_table_cleanup(struct net *n } EXPORT_SYMBOL_GPL(nf_flow_table_cleanup); @@ -273,7 +273,7 @@ Signed-off-by: Pablo Neira Ayuso void nf_flow_table_free(struct nf_flowtable *flow_table) { mutex_lock(&flowtable_lock); -@@ -544,9 +611,58 @@ void nf_flow_table_free(struct nf_flowta +@@ -545,9 +612,58 @@ void nf_flow_table_free(struct nf_flowta nf_flow_table_iterate(flow_table, nf_flow_table_do_cleanup, NULL); WARN_ON(!nf_flow_offload_gc_step(flow_table)); rhashtable_destroy(&flow_table->rhashtable); @@ -506,7 +506,7 @@ Signed-off-by: Pablo Neira Ayuso +MODULE_ALIAS("nf-flow-table-hw"); --- a/net/netfilter/nf_tables_api.c +++ b/net/netfilter/nf_tables_api.c -@@ -5394,6 +5394,13 @@ static int nf_tables_flowtable_parse_hoo +@@ -5399,6 +5399,13 @@ static int nf_tables_flowtable_parse_hoo if (err < 0) return err; @@ -520,7 +520,7 @@ Signed-off-by: Pablo Neira Ayuso ops = kcalloc(n, sizeof(struct nf_hook_ops), GFP_KERNEL); if (!ops) return -ENOMEM; -@@ -5525,10 +5532,19 @@ static int nf_tables_newflowtable(struct +@@ -5530,10 +5537,19 @@ static int nf_tables_newflowtable(struct } flowtable->data.type = type; @@ -540,7 +540,7 @@ Signed-off-by: Pablo Neira Ayuso err = nf_tables_flowtable_parse_hook(&ctx, nla[NFTA_FLOWTABLE_HOOK], flowtable); if (err < 0) -@@ -5654,7 +5670,8 @@ static int nf_tables_fill_flowtable_info +@@ -5659,7 +5675,8 @@ static int nf_tables_fill_flowtable_info nla_put_string(skb, NFTA_FLOWTABLE_NAME, flowtable->name) || nla_put_be32(skb, NFTA_FLOWTABLE_USE, htonl(flowtable->use)) || nla_put_be64(skb, NFTA_FLOWTABLE_HANDLE, cpu_to_be64(flowtable->handle), @@ -552,7 +552,7 @@ Signed-off-by: Pablo Neira Ayuso nest = nla_nest_start(skb, NFTA_FLOWTABLE_HOOK); --- a/net/netfilter/nft_flow_offload.c +++ b/net/netfilter/nft_flow_offload.c -@@ -121,6 +121,9 @@ static void nft_flow_offload_eval(const +@@ -124,6 +124,9 @@ static void nft_flow_offload_eval(const if (ret < 0) goto err_flow_add; diff --git a/target/linux/generic/pending-4.19/645-netfilter-nf_flow_table-rework-hardware-offload-time.patch b/target/linux/generic/pending-4.19/645-netfilter-nf_flow_table-rework-hardware-offload-time.patch index 2b3725f81..292f5f8cc 100644 --- a/target/linux/generic/pending-4.19/645-netfilter-nf_flow_table-rework-hardware-offload-time.patch +++ b/target/linux/generic/pending-4.19/645-netfilter-nf_flow_table-rework-hardware-offload-time.patch @@ -26,7 +26,7 @@ Signed-off-by: Felix Fietkau struct flow_offload_tuple_rhash tuplehash[FLOW_OFFLOAD_DIR_MAX]; --- a/net/netfilter/nf_flow_table_core.c +++ b/net/netfilter/nf_flow_table_core.c -@@ -355,7 +355,7 @@ static int nf_flow_offload_gc_step(struc +@@ -356,7 +356,7 @@ static int nf_flow_offload_gc_step(struc if (!teardown) nf_ct_offload_timeout(flow); diff --git a/target/linux/generic/pending-4.19/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch b/target/linux/generic/pending-4.19/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch index c664cb2b2..20cfe3712 100644 --- a/target/linux/generic/pending-4.19/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch +++ b/target/linux/generic/pending-4.19/670-ipv6-allow-rejecting-with-source-address-failed-policy.patch @@ -157,7 +157,7 @@ Signed-off-by: Jonas Gorski case RTN_THROW: case RTN_UNREACHABLE: default: -@@ -3747,6 +3766,17 @@ static int ip6_pkt_prohibit_out(struct n +@@ -3765,6 +3784,17 @@ static int ip6_pkt_prohibit_out(struct n return ip6_pkt_drop(skb, ICMPV6_ADM_PROHIBITED, IPSTATS_MIB_OUTNOROUTES); } @@ -175,7 +175,7 @@ Signed-off-by: Jonas Gorski /* * Allocate a dst for local (unicast / anycast) address. */ -@@ -4194,7 +4224,8 @@ static int rtm_to_fib6_config(struct sk_ +@@ -4212,7 +4242,8 @@ static int rtm_to_fib6_config(struct sk_ if (rtm->rtm_type == RTN_UNREACHABLE || rtm->rtm_type == RTN_BLACKHOLE || rtm->rtm_type == RTN_PROHIBIT || @@ -185,7 +185,7 @@ Signed-off-by: Jonas Gorski cfg->fc_flags |= RTF_REJECT; if (rtm->rtm_type == RTN_LOCAL) -@@ -5033,6 +5064,8 @@ static int ip6_route_dev_notify(struct n +@@ -5056,6 +5087,8 @@ static int ip6_route_dev_notify(struct n #ifdef CONFIG_IPV6_MULTIPLE_TABLES net->ipv6.ip6_prohibit_entry->dst.dev = dev; net->ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(dev); @@ -194,7 +194,7 @@ Signed-off-by: Jonas Gorski net->ipv6.ip6_blk_hole_entry->dst.dev = dev; net->ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(dev); #endif -@@ -5044,6 +5077,7 @@ static int ip6_route_dev_notify(struct n +@@ -5067,6 +5100,7 @@ static int ip6_route_dev_notify(struct n in6_dev_put_clear(&net->ipv6.ip6_null_entry->rt6i_idev); #ifdef CONFIG_IPV6_MULTIPLE_TABLES in6_dev_put_clear(&net->ipv6.ip6_prohibit_entry->rt6i_idev); @@ -202,7 +202,7 @@ Signed-off-by: Jonas Gorski in6_dev_put_clear(&net->ipv6.ip6_blk_hole_entry->rt6i_idev); #endif } -@@ -5238,6 +5272,15 @@ static int __net_init ip6_route_net_init +@@ -5261,6 +5295,15 @@ static int __net_init ip6_route_net_init net->ipv6.ip6_blk_hole_entry->dst.ops = &net->ipv6.ip6_dst_ops; dst_init_metrics(&net->ipv6.ip6_blk_hole_entry->dst, ip6_template_metrics, true); @@ -218,7 +218,7 @@ Signed-off-by: Jonas Gorski #endif net->ipv6.sysctl.flush_delay = 0; -@@ -5256,6 +5299,8 @@ out: +@@ -5279,6 +5322,8 @@ out: return ret; #ifdef CONFIG_IPV6_MULTIPLE_TABLES @@ -227,7 +227,7 @@ Signed-off-by: Jonas Gorski out_ip6_prohibit_entry: kfree(net->ipv6.ip6_prohibit_entry); out_ip6_null_entry: -@@ -5276,6 +5321,7 @@ static void __net_exit ip6_route_net_exi +@@ -5299,6 +5344,7 @@ static void __net_exit ip6_route_net_exi #ifdef CONFIG_IPV6_MULTIPLE_TABLES kfree(net->ipv6.ip6_prohibit_entry); kfree(net->ipv6.ip6_blk_hole_entry); @@ -235,7 +235,7 @@ Signed-off-by: Jonas Gorski #endif dst_entries_destroy(&net->ipv6.ip6_dst_ops); } -@@ -5352,6 +5398,9 @@ void __init ip6_route_init_special_entri +@@ -5375,6 +5421,9 @@ void __init ip6_route_init_special_entri init_net.ipv6.ip6_prohibit_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev); init_net.ipv6.ip6_blk_hole_entry->dst.dev = init_net.loopback_dev; init_net.ipv6.ip6_blk_hole_entry->rt6i_idev = in6_dev_get(init_net.loopback_dev); diff --git a/target/linux/generic/pending-4.19/840-media-i2c-tda1997x-select-V4L2_FWNODE.patch b/target/linux/generic/pending-4.19/840-media-i2c-tda1997x-select-V4L2_FWNODE.patch new file mode 100644 index 000000000..65fcfb5bf --- /dev/null +++ b/target/linux/generic/pending-4.19/840-media-i2c-tda1997x-select-V4L2_FWNODE.patch @@ -0,0 +1,43 @@ +From 237e88dcbcb0098e1a8a0887fb7299fcf18650a5 Mon Sep 17 00:00:00 2001 +From: Koen Vandeputte +Date: Mon, 18 Mar 2019 17:39:26 +0100 +Subject: [PATCH] media: i2c: tda1997x: select V4L2_FWNODE + +Building tda1997x fails now unless V4L2_FWNODE is selected: + +drivers/media/i2c/tda1997x.o: in function `tda1997x_parse_dt' +undefined reference to `v4l2_fwnode_endpoint_parse' + +While at it, also sort the selections alphabetically + +Fixes: 9ac0038db9a7 ("media: i2c: Add TDA1997x HDMI receiver driver") +Signed-off-by: Koen Vandeputte +Cc: Akinobu Mita +Cc: Bingbu Cao +Cc: Hans Verkuil +Cc: Jacopo Mondi +Cc: Matt Ranostay +Cc: Mauro Carvalho Chehab +Cc: Robin Leblon +Cc: Rui Miguel Silva +Cc: Sakari Ailus +Cc: Tim Harvey +Cc: linux-kernel@vger.kernel.org +Cc: stable@vger.kernel.org # v4.17+ +--- + drivers/media/i2c/Kconfig | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/drivers/media/i2c/Kconfig ++++ b/drivers/media/i2c/Kconfig +@@ -60,8 +60,9 @@ config VIDEO_TDA1997X + tristate "NXP TDA1997x HDMI receiver" + depends on VIDEO_V4L2 && I2C && VIDEO_V4L2_SUBDEV_API + depends on SND_SOC +- select SND_PCM + select HDMI ++ select SND_PCM ++ select V4L2_FWNODE + ---help--- + V4L2 subdevice driver for the NXP TDA1997x HDMI receivers. + diff --git a/target/linux/layerscape/patches-4.14/807-usb-support-layerscape.patch b/target/linux/layerscape/patches-4.14/807-usb-support-layerscape.patch index 35fa2545e..333dc9f3d 100644 --- a/target/linux/layerscape/patches-4.14/807-usb-support-layerscape.patch +++ b/target/linux/layerscape/patches-4.14/807-usb-support-layerscape.patch @@ -440,9 +440,9 @@ Signed-off-by: Yangbo Lu irq = dwc3_gadget_get_irq(dwc); if (irq < 0) { -@@ -3286,6 +3287,12 @@ int dwc3_gadget_init(struct dwc3 *dwc) - goto err4; - } +@@ -3288,6 +3289,12 @@ int dwc3_gadget_init(struct dwc3 *dwc) + + dwc3_gadget_set_speed(&dwc->gadget, dwc->maximum_speed); + if (dwc->disable_devinit_u1u2_quirk) { + reg = dwc3_readl(dwc->regs, DWC3_DCTL); @@ -1202,7 +1202,7 @@ Signed-off-by: Yangbo Lu xhci->quirks |= XHCI_BROKEN_PORT_PED; --- a/drivers/usb/host/xhci-ring.c +++ b/drivers/usb/host/xhci-ring.c -@@ -1969,10 +1969,12 @@ static int finish_td(struct xhci_hcd *xh +@@ -1972,10 +1972,12 @@ static int finish_td(struct xhci_hcd *xh union xhci_trb *ep_trb, struct xhci_transfer_event *event, struct xhci_virt_ep *ep, int *status) { @@ -1215,7 +1215,7 @@ Signed-off-by: Yangbo Lu u32 trb_comp_code; int ep_index; -@@ -1995,14 +1997,30 @@ static int finish_td(struct xhci_hcd *xh +@@ -1998,14 +2000,30 @@ static int finish_td(struct xhci_hcd *xh if (trb_comp_code == COMP_STALL_ERROR || xhci_requires_manual_halt_cleanup(xhci, ep_ctx, trb_comp_code)) { diff --git a/target/linux/layerscape/patches-4.14/812-flexspi-support-layerscape.patch b/target/linux/layerscape/patches-4.14/812-flexspi-support-layerscape.patch index 061943121..e08cbb488 100644 --- a/target/linux/layerscape/patches-4.14/812-flexspi-support-layerscape.patch +++ b/target/linux/layerscape/patches-4.14/812-flexspi-support-layerscape.patch @@ -40,7 +40,7 @@ Signed-off-by: Biwen Li --- a/drivers/md/dm-thin.c +++ b/drivers/md/dm-thin.c -@@ -3690,6 +3690,19 @@ static int process_create_thin_mesg(unsi +@@ -3697,6 +3697,19 @@ static int process_create_thin_mesg(unsi return r; } diff --git a/target/linux/mpc85xx/patches-4.14/102-powerpc-add-cmdline-override.patch b/target/linux/mpc85xx/patches-4.14/102-powerpc-add-cmdline-override.patch index a3b69bbbb..6a16a34a1 100644 --- a/target/linux/mpc85xx/patches-4.14/102-powerpc-add-cmdline-override.patch +++ b/target/linux/mpc85xx/patches-4.14/102-powerpc-add-cmdline-override.patch @@ -1,6 +1,6 @@ --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig -@@ -830,6 +830,14 @@ config CMDLINE_FORCE +@@ -835,6 +835,14 @@ config CMDLINE_FORCE This is useful if you cannot or don't want to change the command-line options your boot loader passes to the kernel. diff --git a/target/linux/octeon/base-files/lib/upgrade/platform.sh b/target/linux/octeon/base-files/lib/upgrade/platform.sh index 6d258dbb0..0e4ca3762 100755 --- a/target/linux/octeon/base-files/lib/upgrade/platform.sh +++ b/target/linux/octeon/base-files/lib/upgrade/platform.sh @@ -88,7 +88,7 @@ platform_check_image() { local kernel_length=`(tar xf $tar_file sysupgrade-$board/kernel -O | wc -c) 2> /dev/null` local rootfs_length=`(tar xf $tar_file sysupgrade-$board/root -O | wc -c) 2> /dev/null` [ "$kernel_length" = 0 -o "$rootfs_length" = 0 ] && { - echo "The upgarde image is corrupt." + echo "The upgrade image is corrupt." return 1 } return 0 diff --git a/target/linux/octeon/config-4.19 b/target/linux/octeon/config-4.19 new file mode 100644 index 000000000..8bb1dcef1 --- /dev/null +++ b/target/linux/octeon/config-4.19 @@ -0,0 +1,280 @@ +CONFIG_64BIT=y +CONFIG_ARCH_BINFMT_ELF_STATE=y +CONFIG_ARCH_CLOCKSOURCE_DATA=y +CONFIG_ARCH_DISCARD_MEMBLOCK=y +CONFIG_ARCH_DMA_ADDR_T_64BIT=y +CONFIG_ARCH_HAS_ELF_RANDOMIZE=y +CONFIG_ARCH_HAS_PHYS_TO_DMA=y +CONFIG_ARCH_MMAP_RND_BITS=12 +CONFIG_ARCH_MMAP_RND_BITS_MAX=18 +CONFIG_ARCH_MMAP_RND_BITS_MIN=12 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS=8 +CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15 +CONFIG_ARCH_SPARSEMEM_ENABLE=y +CONFIG_ARCH_SUPPORTS_UPROBES=y +CONFIG_ARCH_USE_BUILTIN_BSWAP=y +CONFIG_ARCH_USE_CMPXCHG_LOCKREF=y +CONFIG_ARCH_USE_QUEUED_RWLOCKS=y +CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y +CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y +CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y +CONFIG_ARCH_WANT_OLD_COMPAT_IPC=y +CONFIG_BINFMT_ELF32=y +CONFIG_BLK_DEV_LOOP=y +CONFIG_BLK_DEV_SD=y +CONFIG_BLK_MQ_PCI=y +CONFIG_BLK_SCSI_REQUEST=y +CONFIG_BLOCK_COMPAT=y +CONFIG_BUILTIN_DTB=y +# CONFIG_CAVIUM_CN63XXP1 is not set +CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE=2 +CONFIG_CAVIUM_OCTEON_LOCK_L2=y +CONFIG_CAVIUM_OCTEON_LOCK_L2_EXCEPTION=y +CONFIG_CAVIUM_OCTEON_LOCK_L2_INTERRUPT=y +CONFIG_CAVIUM_OCTEON_LOCK_L2_LOW_LEVEL_INTERRUPT=y +CONFIG_CAVIUM_OCTEON_LOCK_L2_MEMCPY=y +CONFIG_CAVIUM_OCTEON_LOCK_L2_TLB=y +CONFIG_CAVIUM_OCTEON_SOC=y +CONFIG_CEVT_R4K=y +CONFIG_CLONE_BACKWARDS=y +CONFIG_COMPAT=y +CONFIG_COMPAT_32BIT_TIME=y +CONFIG_COMPAT_NETLINK_MESSAGES=y +CONFIG_CPU_BIG_ENDIAN=y +CONFIG_CPU_CAVIUM_OCTEON=y +CONFIG_CPU_GENERIC_DUMP_TLB=y +CONFIG_CPU_HAS_PREFETCH=y +CONFIG_CPU_HAS_RIXI=y +CONFIG_CPU_HAS_SYNC=y +# CONFIG_CPU_LITTLE_ENDIAN is not set +CONFIG_CPU_MIPSR2=y +CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y +CONFIG_CPU_R4K_FPU=y +CONFIG_CPU_RMAP=y +CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y +CONFIG_CPU_SUPPORTS_HIGHMEM=y +CONFIG_CPU_SUPPORTS_HUGEPAGES=y +CONFIG_CRAMFS=y +CONFIG_CRC16=y +CONFIG_CRYPTO_AEAD=y +CONFIG_CRYPTO_AEAD2=y +CONFIG_CRYPTO_CRC32=y +CONFIG_CRYPTO_CRC32C=y +CONFIG_CRYPTO_HASH=y +CONFIG_CRYPTO_HASH2=y +CONFIG_CRYPTO_MANAGER=y +CONFIG_CRYPTO_MANAGER2=y +# CONFIG_CRYPTO_MD5_OCTEON is not set +CONFIG_CRYPTO_NULL2=y +CONFIG_CRYPTO_RNG2=y +# CONFIG_CRYPTO_SHA1_OCTEON is not set +# CONFIG_CRYPTO_SHA256_OCTEON is not set +# CONFIG_CRYPTO_SHA512_OCTEON is not set +CONFIG_CRYPTO_WORKQUEUE=y +CONFIG_DMA_DIRECT_OPS=y +CONFIG_DNOTIFY=y +CONFIG_DTC=y +CONFIG_EARLY_PRINTK=y +CONFIG_EDAC_ATOMIC_SCRUB=y +CONFIG_EDAC_SUPPORT=y +CONFIG_ENABLE_MUST_CHECK=y +CONFIG_EXT4_FS=y +# CONFIG_F2FS_CHECK_FS is not set +CONFIG_F2FS_FS=y +# CONFIG_F2FS_FS_SECURITY is not set +CONFIG_F2FS_FS_XATTR=y +CONFIG_F2FS_STAT_FS=y +CONFIG_FAT_FS=y +CONFIG_FIXED_PHY=y +CONFIG_FRAME_WARN=2048 +CONFIG_FS_IOMAP=y +CONFIG_FS_MBCACHE=y +CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CMOS_UPDATE=y +CONFIG_GENERIC_CPU_AUTOPROBE=y +CONFIG_GENERIC_IRQ_SHOW=y +CONFIG_GENERIC_LIB_ASHLDI3=y +CONFIG_GENERIC_LIB_ASHRDI3=y +CONFIG_GENERIC_LIB_CMPDI2=y +CONFIG_GENERIC_LIB_LSHRDI3=y +CONFIG_GENERIC_LIB_UCMPDI2=y +CONFIG_GENERIC_PCI_IOMAP=y +CONFIG_GENERIC_SMP_IDLE_THREAD=y +CONFIG_GENERIC_TIME_VSYSCALL=y +CONFIG_GPIOLIB=y +CONFIG_GPIO_OCTEON=y +CONFIG_GPIO_SYSFS=y +CONFIG_HANDLE_DOMAIN_IRQ=y +CONFIG_HARDWARE_WATCHPOINTS=y +CONFIG_HAS_DMA=y +CONFIG_HAS_IOMEM=y +CONFIG_HAS_IOPORT_MAP=y +CONFIG_HAS_RAPIDIO=y +CONFIG_HAVE_64BIT_ALIGNED_ACCESS=y +CONFIG_HAVE_ARCH_COMPILER_H=y +CONFIG_HAVE_ARCH_JUMP_LABEL=y +CONFIG_HAVE_ARCH_KGDB=y +CONFIG_HAVE_ARCH_MMAP_RND_COMPAT_BITS=y +CONFIG_HAVE_ARCH_SECCOMP_FILTER=y +CONFIG_HAVE_ARCH_TRACEHOOK=y +CONFIG_HAVE_ARCH_TRANSPARENT_HUGEPAGE=y +CONFIG_HAVE_CONTEXT_TRACKING=y +CONFIG_HAVE_COPY_THREAD_TLS=y +CONFIG_HAVE_C_RECORDMCOUNT=y +CONFIG_HAVE_DMA_CONTIGUOUS=y +CONFIG_HAVE_DYNAMIC_FTRACE=y +CONFIG_HAVE_EBPF_JIT=y +CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y +CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y +CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_GENERIC_DMA_COHERENT=y +CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y +CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y +CONFIG_HAVE_LATENCYTOP_SUPPORT=y +CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y +CONFIG_HAVE_MEMBLOCK=y +CONFIG_HAVE_MEMBLOCK_NODE_MAP=y +CONFIG_HAVE_MEMORY_PRESENT=y +CONFIG_HAVE_MOD_ARCH_SPECIFIC=y +CONFIG_HAVE_NET_DSA=y +CONFIG_HAVE_OPROFILE=y +CONFIG_HAVE_PERF_EVENTS=y +CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y +CONFIG_HAVE_RSEQ=y +CONFIG_HAVE_SYSCALL_TRACEPOINTS=y +CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y +CONFIG_HOLES_IN_ZONE=y +# CONFIG_HUGETLBFS is not set +CONFIG_HW_HAS_PCI=y +CONFIG_HW_RANDOM=y +CONFIG_HW_RANDOM_OCTEON=y +CONFIG_HZ_PERIODIC=y +CONFIG_IMAGE_CMDLINE_HACK=y +CONFIG_INITRAMFS_SOURCE="" +CONFIG_IRQCHIP=y +CONFIG_IRQ_DOMAIN=y +CONFIG_IRQ_FORCED_THREADING=y +CONFIG_IRQ_WORK=y +CONFIG_JBD2=y +CONFIG_LIBFDT=y +CONFIG_LOCK_DEBUGGING_SUPPORT=y +CONFIG_MDIO_BUS=y +CONFIG_MDIO_CAVIUM=y +CONFIG_MDIO_DEVICE=y +CONFIG_MDIO_OCTEON=y +CONFIG_MEMFD_CREATE=y +CONFIG_MIGRATION=y +CONFIG_MIPS=y +CONFIG_MIPS32_COMPAT=y +CONFIG_MIPS32_N32=y +CONFIG_MIPS32_O32=y +CONFIG_MIPS_ASID_BITS=8 +CONFIG_MIPS_ASID_SHIFT=0 +# CONFIG_MIPS_CMDLINE_DTB_EXTEND is not set +CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER=y +# CONFIG_MIPS_CMDLINE_FROM_DTB is not set +# CONFIG_MIPS_ELF_APPENDED_DTB is not set +CONFIG_MIPS_L1_CACHE_SHIFT=7 +CONFIG_MIPS_L1_CACHE_SHIFT_7=y +# CONFIG_MIPS_NO_APPENDED_DTB is not set +CONFIG_MIPS_NR_CPU_NR_MAP=1024 +CONFIG_MIPS_NR_CPU_NR_MAP_1024=y +CONFIG_MIPS_PGD_C0_CONTEXT=y +CONFIG_MIPS_RAW_APPENDED_DTB=y +CONFIG_MIPS_SPRAM=y +# CONFIG_MIPS_VA_BITS_48 is not set +CONFIG_MMC=y +CONFIG_MMC_BLOCK=y +CONFIG_MMC_CAVIUM_OCTEON=y +# CONFIG_MMC_TIFM_SD is not set +CONFIG_MODULES_USE_ELF_REL=y +CONFIG_MODULES_USE_ELF_RELA=y +# CONFIG_MTD_CFI_INTELEXT is not set +CONFIG_MTD_CMDLINE_PARTS=y +CONFIG_MTD_PHYSMAP=y +CONFIG_NEED_DMA_MAP_STATE=y +CONFIG_NET_FLOW_LIMIT=y +CONFIG_NLS=y +CONFIG_NLS_CODEPAGE_437=y +CONFIG_NLS_ISO8859_1=y +CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y +CONFIG_NR_CPUS=16 +CONFIG_NR_CPUS_DEFAULT_64=y +CONFIG_NVMEM=y +CONFIG_OCTEON_ETHERNET=y +# CONFIG_OCTEON_ILM is not set +CONFIG_OCTEON_MGMT_ETHERNET=y +CONFIG_OCTEON_USB=y +CONFIG_OCTEON_WDT=y +CONFIG_OF=y +CONFIG_OF_ADDRESS=y +CONFIG_OF_EARLY_FLATTREE=y +CONFIG_OF_FLATTREE=y +CONFIG_OF_GPIO=y +CONFIG_OF_IRQ=y +CONFIG_OF_KOBJ=y +CONFIG_OF_MDIO=y +CONFIG_OF_NET=y +CONFIG_PADATA=y +# CONFIG_PARTITION_ADVANCED is not set +CONFIG_PCI=y +CONFIG_PCI_DOMAINS=y +CONFIG_PCI_DRIVERS_LEGACY=y +CONFIG_PERF_USE_VMALLOC=y +CONFIG_PGTABLE_LEVELS=3 +CONFIG_PHYLIB=y +CONFIG_PHYS_ADDR_T_64BIT=y +CONFIG_POSIX_MQUEUE=y +CONFIG_POSIX_MQUEUE_SYSCTL=y +CONFIG_QUEUED_RWLOCKS=y +CONFIG_QUEUED_SPINLOCKS=y +CONFIG_RCU_NEED_SEGCBLIST=y +CONFIG_RCU_STALL_COMMON=y +CONFIG_RELAY=y +CONFIG_RFS_ACCEL=y +CONFIG_RPS=y +CONFIG_SCSI=y +CONFIG_SECCOMP=y +CONFIG_SECCOMP_FILTER=y +CONFIG_SERIAL_8250_DW=y +CONFIG_SG_POOL=y +CONFIG_SMP=y +CONFIG_SPARSEMEM=y +CONFIG_SPARSEMEM_STATIC=y +CONFIG_SRCU=y +CONFIG_SWIOTLB=y +CONFIG_SWPHY=y +CONFIG_SYSCTL_EXCEPTION_TRACE=y +CONFIG_SYSVIPC_COMPAT=y +CONFIG_SYS_HAS_CPU_CAVIUM_OCTEON=y +CONFIG_SYS_HAS_EARLY_PRINTK=y +CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y +CONFIG_SYS_SUPPORTS_ARBIT_HZ=y +CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y +CONFIG_SYS_SUPPORTS_HOTPLUG_CPU=y +CONFIG_SYS_SUPPORTS_HUGETLBFS=y +CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y +CONFIG_SYS_SUPPORTS_RELOCATABLE=y +CONFIG_SYS_SUPPORTS_SMP=y +CONFIG_TICK_CPU_ACCOUNTING=y +CONFIG_TREE_RCU=y +CONFIG_TREE_SRCU=y +CONFIG_USB=y +CONFIG_USB_COMMON=y +CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_HCD_PLATFORM=y +# CONFIG_USB_OCTEON_EHCI is not set +# CONFIG_USB_OCTEON_OHCI is not set +CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_HCD_PLATFORM=y +CONFIG_USB_STORAGE=y +CONFIG_USB_SUPPORT=y +CONFIG_USE_OF=y +CONFIG_VFAT_FS=y +CONFIG_VM_EVENT_COUNTERS=y +CONFIG_WATCHDOG_CORE=y +CONFIG_WEAK_ORDERING=y +CONFIG_XPS=y +CONFIG_ZONE_DMA32=y diff --git a/target/linux/octeon/patches-4.19/100-ubnt_edgerouter2_support.patch b/target/linux/octeon/patches-4.19/100-ubnt_edgerouter2_support.patch new file mode 100644 index 000000000..991eb56ce --- /dev/null +++ b/target/linux/octeon/patches-4.19/100-ubnt_edgerouter2_support.patch @@ -0,0 +1,31 @@ +--- a/arch/mips/include/asm/octeon/cvmx-bootinfo.h ++++ b/arch/mips/include/asm/octeon/cvmx-bootinfo.h +@@ -295,6 +295,8 @@ enum cvmx_board_types_enum { + */ + CVMX_BOARD_TYPE_CUST_PRIVATE_MIN = 20001, + CVMX_BOARD_TYPE_UBNT_E100 = 20002, ++ CVMX_BOARD_TYPE_UBNT_E200 = 20003, ++ CVMX_BOARD_TYPE_UBNT_E220 = 20005, + CVMX_BOARD_TYPE_CUST_DSR1000N = 20006, + CVMX_BOARD_TYPE_KONTRON_S1901 = 21901, + CVMX_BOARD_TYPE_CUST_PRIVATE_MAX = 30000, +@@ -396,6 +398,8 @@ static inline const char *cvmx_board_typ + /* Customer private range */ + ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_PRIVATE_MIN) + ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_UBNT_E100) ++ ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_UBNT_E200) ++ ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_UBNT_E220) + ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_DSR1000N) + ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_KONTRON_S1901) + ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_PRIVATE_MAX) +--- a/arch/mips/cavium-octeon/executive/cvmx-helper-board.c ++++ b/arch/mips/cavium-octeon/executive/cvmx-helper-board.c +@@ -173,6 +173,8 @@ int cvmx_helper_board_get_mii_address(in + return 7 - ipd_port; + else + return -1; ++ case CVMX_BOARD_TYPE_UBNT_E200: ++ return -1; + case CVMX_BOARD_TYPE_KONTRON_S1901: + if (ipd_port == CVMX_HELPER_BOARD_MGMT_IPD_PORT) + return 1; diff --git a/target/linux/octeon/patches-4.19/110-er200-ethernet_probe_order.patch b/target/linux/octeon/patches-4.19/110-er200-ethernet_probe_order.patch new file mode 100644 index 000000000..93d1e9350 --- /dev/null +++ b/target/linux/octeon/patches-4.19/110-er200-ethernet_probe_order.patch @@ -0,0 +1,34 @@ +--- a/drivers/staging/octeon/ethernet.c ++++ b/drivers/staging/octeon/ethernet.c +@@ -670,6 +670,7 @@ static int cvm_oct_probe(struct platform + int interface; + int fau = FAU_NUM_PACKET_BUFFERS_TO_FREE; + int qos; ++ int i; + struct device_node *pip; + int mtu_overhead = ETH_HLEN + ETH_FCS_LEN; + +@@ -793,13 +794,19 @@ static int cvm_oct_probe(struct platform + } + + num_interfaces = cvmx_helper_get_number_of_interfaces(); +- for (interface = 0; interface < num_interfaces; interface++) { +- cvmx_helper_interface_mode_t imode = +- cvmx_helper_interface_get_mode(interface); +- int num_ports = cvmx_helper_ports_on_interface(interface); ++ for (i = 0; i < num_interfaces; i++) { ++ cvmx_helper_interface_mode_t imode; ++ int interface; ++ int num_ports; + int port; + int port_index; + ++ interface = i; ++ if (cvmx_sysinfo_get()->board_type == CVMX_BOARD_TYPE_UBNT_E200) ++ interface = num_interfaces - (i + 1); ++ ++ num_ports = cvmx_helper_ports_on_interface(interface); ++ imode = cvmx_helper_interface_get_mode(interface); + for (port_index = 0, + port = cvmx_helper_get_ipd_port(interface, 0); + port < cvmx_helper_get_ipd_port(interface, num_ports); diff --git a/target/linux/octeon/patches-4.19/120-cmdline-hack.patch b/target/linux/octeon/patches-4.19/120-cmdline-hack.patch new file mode 100644 index 000000000..2b5978c5e --- /dev/null +++ b/target/linux/octeon/patches-4.19/120-cmdline-hack.patch @@ -0,0 +1,47 @@ +--- a/arch/mips/cavium-octeon/setup.c ++++ b/arch/mips/cavium-octeon/setup.c +@@ -651,6 +651,35 @@ void octeon_user_io_init(void) + write_c0_derraddr1(0); + } + ++#ifdef CONFIG_IMAGE_CMDLINE_HACK ++extern char __image_cmdline[]; ++ ++static int __init octeon_use_image_cmdline(void) ++{ ++ char *p = __image_cmdline; ++ int replace = 0; ++ ++ if (*p == '-') { ++ replace = 1; ++ p++; ++ } ++ ++ if (*p == '\0') ++ return 0; ++ ++ if (replace) { ++ strlcpy(arcs_cmdline, p, sizeof(arcs_cmdline)); ++ } else { ++ strlcat(arcs_cmdline, " ", sizeof(arcs_cmdline)); ++ strlcat(arcs_cmdline, p, sizeof(arcs_cmdline)); ++ } ++ ++ return 1; ++} ++#else ++static inline int octeon_use_image_cmdline(void) { return 0; } ++#endif ++ + /** + * Early entry point for arch setup + */ +@@ -895,6 +924,8 @@ void __init prom_init(void) + } + } + ++ octeon_use_image_cmdline(); ++ + if (strstr(arcs_cmdline, "console=") == NULL) { + if (octeon_uart == 1) + strcat(arcs_cmdline, " console=ttyS1,115200"); diff --git a/target/linux/sunxi/base-files/lib/firmware/brcm/brcmfmac43430a0-sdio.txt b/target/linux/sunxi/base-files/lib/firmware/brcm/brcmfmac43430a0-sdio.txt new file mode 120000 index 000000000..2ed668982 --- /dev/null +++ b/target/linux/sunxi/base-files/lib/firmware/brcm/brcmfmac43430a0-sdio.txt @@ -0,0 +1 @@ +brcmfmac43430-sdio.txt \ No newline at end of file diff --git a/target/linux/sunxi/cortexa53/config-4.14 b/target/linux/sunxi/cortexa53/config-4.14 index 154f5e9a4..b46c4aa41 100644 --- a/target/linux/sunxi/cortexa53/config-4.14 +++ b/target/linux/sunxi/cortexa53/config-4.14 @@ -97,6 +97,7 @@ CONFIG_SPARSEMEM_MANUAL=y CONFIG_SPARSEMEM_VMEMMAP=y CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y CONFIG_SUN50I_A64_CCU=y +CONFIG_SUN50I_ERRATUM_UNKNOWN1=y CONFIG_SYSCTL_EXCEPTION_TRACE=y CONFIG_THREAD_INFO_IN_TASK=y CONFIG_UNMAP_KERNEL_AT_EL0=y diff --git a/target/linux/sunxi/cortexa53/config-4.19 b/target/linux/sunxi/cortexa53/config-4.19 index 819a51e24..a35c84b90 100644 --- a/target/linux/sunxi/cortexa53/config-4.19 +++ b/target/linux/sunxi/cortexa53/config-4.19 @@ -93,6 +93,7 @@ CONFIG_SPARSEMEM_VMEMMAP=y CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y CONFIG_SUN50I_A64_CCU=y CONFIG_SUN50I_DE2_BUS=y +CONFIG_SUN50I_ERRATUM_UNKNOWN1=y CONFIG_SUN50I_H6_CCU=y CONFIG_SUN50I_H6_R_CCU=y CONFIG_SWIOTLB=y diff --git a/target/linux/sunxi/cortexa53/config-default b/target/linux/sunxi/cortexa53/config-default deleted file mode 100644 index b1702bc3c..000000000 --- a/target/linux/sunxi/cortexa53/config-default +++ /dev/null @@ -1,109 +0,0 @@ -CONFIG_64BIT=y -CONFIG_ARCH_DMA_ADDR_T_64BIT=y -CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y -CONFIG_ARCH_HAS_FORTIFY_SOURCE=y -CONFIG_ARCH_HAS_HOLES_MEMORYMODEL=y -CONFIG_ARCH_HAS_KCOV=y -CONFIG_ARCH_MMAP_RND_BITS=18 -CONFIG_ARCH_MMAP_RND_BITS_MAX=24 -CONFIG_ARCH_MMAP_RND_BITS_MIN=18 -CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11 -# CONFIG_ARCH_OPTIONAL_KERNEL_RWX is not set -# CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT is not set -CONFIG_ARCH_PROC_KCORE_TEXT=y -CONFIG_ARCH_SELECT_MEMORY_MODEL=y -CONFIG_ARCH_SPARSEMEM_DEFAULT=y -CONFIG_ARCH_SPARSEMEM_ENABLE=y -CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y -CONFIG_ARCH_SUPPORTS_MEMORY_FAILURE=y -CONFIG_ARCH_SUPPORTS_NUMA_BALANCING=y -CONFIG_ARCH_WANT_COMPAT_IPC_PARSE_VERSION=y -CONFIG_ARCH_WANT_FRAME_POINTERS=y -CONFIG_ARCH_WANT_HUGE_PMD_SHARE=y -CONFIG_ARM64=y -# CONFIG_ARM64_16K_PAGES is not set -CONFIG_ARM64_4K_PAGES=y -# CONFIG_ARM64_64K_PAGES is not set -CONFIG_ARM64_CONT_SHIFT=4 -# CONFIG_ARM64_CRYPTO is not set -# CONFIG_ARM64_HW_AFDBM is not set -# CONFIG_ARM64_LSE_ATOMICS is not set -CONFIG_ARM64_PAGE_SHIFT=12 -# CONFIG_ARM64_PAN is not set -# CONFIG_ARM64_PMEM is not set -# CONFIG_ARM64_PTDUMP is not set -# CONFIG_ARM64_PTDUMP_CORE is not set -# CONFIG_ARM64_PTDUMP_DEBUGFS is not set -# CONFIG_ARM64_RANDOMIZE_TEXT_OFFSET is not set -CONFIG_ARM64_SSBD=y -# CONFIG_ARM64_SW_TTBR0_PAN is not set -# CONFIG_ARM64_UAO is not set -CONFIG_ARM64_VA_BITS=39 -CONFIG_ARM64_VA_BITS_39=y -# CONFIG_ARM64_VA_BITS_48 is not set -# CONFIG_ARM64_VHE is not set -CONFIG_ARM_AMBA=y -CONFIG_ARM_GIC_V3=y -# CONFIG_ARM_SP805_WATCHDOG is not set -CONFIG_AUDIT_ARCH_COMPAT_GENERIC=y -# CONFIG_COMMON_CLK_VERSATILE is not set -CONFIG_COMMON_CLK_XGENE=y -# CONFIG_COMPAT is not set -# CONFIG_DEBUG_ALIGN_RODATA is not set -CONFIG_DWMAC_SUN8I=y -CONFIG_FRAME_POINTER=y -# CONFIG_FSL_ERRATUM_A008585 is not set -CONFIG_GENERIC_BUG_RELATIVE_POINTERS=y -CONFIG_GENERIC_CSUM=y -CONFIG_GENERIC_IRQ_MIGRATION=y -CONFIG_HARDEN_BRANCH_PREDICTOR=y -CONFIG_HAVE_ALIGNED_STRUCT_PAGE=y -CONFIG_HAVE_ARCH_HUGE_VMAP=y -CONFIG_HAVE_ARCH_KASAN=y -CONFIG_HAVE_ARCH_VMAP_STACK=y -CONFIG_HAVE_CMPXCHG_DOUBLE=y -CONFIG_HAVE_CMPXCHG_LOCAL=y -CONFIG_HAVE_DEBUG_BUGVERBOSE=y -CONFIG_HAVE_MEMORY_PRESENT=y -CONFIG_HAVE_PATA_PLATFORM=y -CONFIG_ILLEGAL_POINTER_VALUE=0xdead000000000000 -CONFIG_KERNEL_MODE_NEON=y -CONFIG_KVM_ARM_PMU=y -CONFIG_MDIO_BUS_MUX=y -CONFIG_MODULES_USE_ELF_RELA=y -CONFIG_NEED_SG_DMA_LENGTH=y -CONFIG_NO_IOPORT_MAP=y -# CONFIG_NUMA is not set -CONFIG_PARTITION_PERCPU=y -# CONFIG_PCI_DOMAINS is not set -# CONFIG_PHY_XGENE is not set -# CONFIG_PINCTRL_SUN4I_A10 is not set -CONFIG_PINCTRL_SUN50I_A64=y -CONFIG_PINCTRL_SUN50I_A64_R=y -CONFIG_PINCTRL_SUN50I_H5=y -# CONFIG_PINCTRL_SUN5I is not set -# CONFIG_PINCTRL_SUN6I_A31 is not set -# CONFIG_PINCTRL_SUN6I_A31_R is not set -# CONFIG_PINCTRL_SUN8I_A23 is not set -# CONFIG_PINCTRL_SUN8I_A23_R is not set -# CONFIG_PINCTRL_SUN8I_A33 is not set -# CONFIG_PINCTRL_SUN8I_A83T is not set -# CONFIG_PINCTRL_SUN8I_A83T_R is not set -# CONFIG_PINCTRL_SUN8I_H3 is not set -# CONFIG_PINCTRL_SUN8I_V3S is not set -# CONFIG_PINCTRL_SUN9I_A80 is not set -# CONFIG_PINCTRL_SUN9I_A80_R is not set -# CONFIG_RANDOMIZE_BASE is not set -CONFIG_REALTEK_PHY=y -# CONFIG_SERIAL_AMBA_PL011 is not set -CONFIG_SOUND_OSS_CORE_PRECLAIM=y -CONFIG_SPARSEMEM=y -CONFIG_SPARSEMEM_EXTREME=y -CONFIG_SPARSEMEM_MANUAL=y -CONFIG_SPARSEMEM_VMEMMAP=y -CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y -CONFIG_SUN50I_A64_CCU=y -CONFIG_SYSCTL_EXCEPTION_TRACE=y -CONFIG_THREAD_INFO_IN_TASK=y -CONFIG_UNMAP_KERNEL_AT_EL0=y -CONFIG_VMAP_STACK=y diff --git a/target/linux/sunxi/cortexa7/config-default b/target/linux/sunxi/cortexa7/config-default deleted file mode 100644 index ee8873e08..000000000 --- a/target/linux/sunxi/cortexa7/config-default +++ /dev/null @@ -1,10 +0,0 @@ -CONFIG_DWMAC_SUN8I=y -CONFIG_HARDEN_BRANCH_PREDICTOR=y -# CONFIG_MACH_SUN4I is not set -# CONFIG_MACH_SUN5I is not set -# CONFIG_PINCTRL_GR8 is not set -# CONFIG_PINCTRL_SUN4I_A10 is not set -# CONFIG_PINCTRL_SUN5I_A10S is not set -# CONFIG_PINCTRL_SUN5I_A13 is not set -CONFIG_MDIO_BUS_MUX=y -# CONFIG_PINCTRL_SUN5I is not set diff --git a/target/linux/sunxi/cortexa8/config-default b/target/linux/sunxi/cortexa8/config-default deleted file mode 100644 index aab7dec0a..000000000 --- a/target/linux/sunxi/cortexa8/config-default +++ /dev/null @@ -1,22 +0,0 @@ -# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set -# CONFIG_ARM_ERRATA_643719 is not set -# CONFIG_ARM_LPAE is not set -CONFIG_HARDEN_BRANCH_PREDICTOR=y -# CONFIG_MACH_SUN6I is not set -# CONFIG_MACH_SUN7I is not set -# CONFIG_MACH_SUN8I is not set -# CONFIG_MACH_SUN9I is not set -CONFIG_PGTABLE_LEVELS=2 -# CONFIG_PHYS_ADDR_T_64BIT is not set -# CONFIG_PINCTRL_SUN6I_A31 is not set -# CONFIG_PINCTRL_SUN6I_A31S is not set -# CONFIG_PINCTRL_SUN6I_A31_R is not set -# CONFIG_PINCTRL_SUN7I_A20 is not set -# CONFIG_PINCTRL_SUN8I_A23 is not set -# CONFIG_PINCTRL_SUN8I_A23_R is not set -# CONFIG_PINCTRL_SUN8I_A33 is not set -# CONFIG_PINCTRL_SUN8I_A83T is not set -# CONFIG_PINCTRL_SUN8I_H3 is not set -# CONFIG_PINCTRL_SUN8I_H3_R is not set -# CONFIG_PINCTRL_SUN9I_A80 is not set -# CONFIG_PINCTRL_SUN9I_A80_R is not set diff --git a/target/linux/sunxi/image/cortex-a7.mk b/target/linux/sunxi/image/cortex-a7.mk index 969864bb7..ce0cbe5a5 100644 --- a/target/linux/sunxi/image/cortex-a7.mk +++ b/target/linux/sunxi/image/cortex-a7.mk @@ -1,5 +1,5 @@ # -# Copyright (C) 2013-2016 OpenWrt.org +# Copyright (C) 2013-2019 OpenWrt.org # Copyright (C) 2016 Yousong Zhou # # This is free software, licensed under the GNU General Public License v2. @@ -127,6 +127,16 @@ endef TARGET_DEVICES += sun8i-h2-plus-orangepi-r1 +define Device/sun8i-h3-bananapi-m2-plus + DEVICE_TITLE:=Sinovoip Banana Pi M2 Plus + DEVICE_PACKAGES:=kmod-rtc-sunxi \ + kmod-leds-gpio kmod-ledtrig-heartbeat \ + kmod-brcmfmac brcmfmac-firmware-43430a0-sdio wpad-basic + SUPPORTED_DEVICES:=sinovoip,bananapi-m2-plus + SUNXI_DTS:=sun8i-h3-bananapi-m2-plus +endef + +TARGET_DEVICES += sun8i-h3-bananapi-m2-plus define Device/sun8i-h3-nanopi-m1-plus DEVICE_TITLE:=FriendlyArm NanoPi M1 Plus @@ -149,6 +159,16 @@ endef TARGET_DEVICES += sun8i-h3-nanopi-neo +define Device/sun8i-h3-orangepi-one + DEVICE_TITLE:=Xunlong Orange Pi One + DEVICE_PACKAGES:=kmod-rtc-sunxi + SUPPORTED_DEVICES:=xunlong,orangepi-one + SUNXI_DTS:=sun8i-h3-orangepi-one +endef + +TARGET_DEVICES += sun8i-h3-orangepi-one + + define Device/sun8i-h3-orangepi-pc DEVICE_TITLE:=Xunlong Orange Pi PC DEVICE_PACKAGES:=kmod-rtc-sunxi kmod-gpio-button-hotplug @@ -159,6 +179,16 @@ endef TARGET_DEVICES += sun8i-h3-orangepi-pc +define Device/sun8i-h3-orangepi-pc-plus + DEVICE_TITLE:=Xunlong Orange Pi PC Plus + DEVICE_PACKAGES:=kmod-rtc-sunxi kmod-gpio-button-hotplug + SUPPORTED_DEVICES:=xunlong,orangepi-pc-plus + SUNXI_DTS:=sun8i-h3-orangepi-pc-plus +endef + +TARGET_DEVICES += sun8i-h3-orangepi-pc-plus + + define Device/sun8i-h3-orangepi-plus DEVICE_TITLE:=Xunlong Orange Pi Plus DEVICE_PACKAGES:=kmod-rtc-sunxi diff --git a/target/linux/sunxi/patches-4.14/031-arm64-Implement-arch_counter_get_cntpct-to-read-the-.patch b/target/linux/sunxi/patches-4.14/031-arm64-Implement-arch_counter_get_cntpct-to-read-the-.patch new file mode 100644 index 000000000..60f0cb6c9 --- /dev/null +++ b/target/linux/sunxi/patches-4.14/031-arm64-Implement-arch_counter_get_cntpct-to-read-the-.patch @@ -0,0 +1,118 @@ +From f2e600c149fda3453344f89c7e9353fe278ebd32 Mon Sep 17 00:00:00 2001 +From: Christoffer Dall +Date: Wed, 18 Oct 2017 13:06:25 +0200 +Subject: [PATCH] arm64: Implement arch_counter_get_cntpct to read the physical + counter + +As we are about to use the physical counter on arm64 systems that have +KVM support, implement arch_counter_get_cntpct() and the associated +errata workaround functionality for stable timer reads. + +Cc: Will Deacon +Cc: Mark Rutland +Acked-by: Catalin Marinas +Acked-by: Marc Zyngier +Signed-off-by: Christoffer Dall +--- + arch/arm64/include/asm/arch_timer.h | 8 +++----- + drivers/clocksource/arm_arch_timer.c | 23 +++++++++++++++++++++++ + 2 files changed, 26 insertions(+), 5 deletions(-) + +--- a/arch/arm64/include/asm/arch_timer.h ++++ b/arch/arm64/include/asm/arch_timer.h +@@ -52,6 +52,7 @@ struct arch_timer_erratum_workaround { + const char *desc; + u32 (*read_cntp_tval_el0)(void); + u32 (*read_cntv_tval_el0)(void); ++ u64 (*read_cntpct_el0)(void); + u64 (*read_cntvct_el0)(void); + int (*set_next_event_phys)(unsigned long, struct clock_event_device *); + int (*set_next_event_virt)(unsigned long, struct clock_event_device *); +@@ -148,11 +149,8 @@ static inline void arch_timer_set_cntkct + + static inline u64 arch_counter_get_cntpct(void) + { +- /* +- * AArch64 kernel and user space mandate the use of CNTVCT. +- */ +- BUG(); +- return 0; ++ isb(); ++ return arch_timer_reg_read_stable(cntpct_el0); + } + + static inline u64 arch_counter_get_cntvct(void) +--- a/drivers/clocksource/arm_arch_timer.c ++++ b/drivers/clocksource/arm_arch_timer.c +@@ -217,6 +217,11 @@ static u32 notrace fsl_a008585_read_cntv + return __fsl_a008585_read_reg(cntv_tval_el0); + } + ++static u64 notrace fsl_a008585_read_cntpct_el0(void) ++{ ++ return __fsl_a008585_read_reg(cntpct_el0); ++} ++ + static u64 notrace fsl_a008585_read_cntvct_el0(void) + { + return __fsl_a008585_read_reg(cntvct_el0); +@@ -258,6 +263,11 @@ static u32 notrace hisi_161010101_read_c + return __hisi_161010101_read_reg(cntv_tval_el0); + } + ++static u64 notrace hisi_161010101_read_cntpct_el0(void) ++{ ++ return __hisi_161010101_read_reg(cntpct_el0); ++} ++ + static u64 notrace hisi_161010101_read_cntvct_el0(void) + { + return __hisi_161010101_read_reg(cntvct_el0); +@@ -288,6 +298,15 @@ static struct ate_acpi_oem_info hisi_161 + #endif + + #ifdef CONFIG_ARM64_ERRATUM_858921 ++static u64 notrace arm64_858921_read_cntpct_el0(void) ++{ ++ u64 old, new; ++ ++ old = read_sysreg(cntpct_el0); ++ new = read_sysreg(cntpct_el0); ++ return (((old ^ new) >> 32) & 1) ? old : new; ++} ++ + static u64 notrace arm64_858921_read_cntvct_el0(void) + { + u64 old, new; +@@ -346,6 +365,7 @@ static const struct arch_timer_erratum_w + .desc = "Freescale erratum a005858", + .read_cntp_tval_el0 = fsl_a008585_read_cntp_tval_el0, + .read_cntv_tval_el0 = fsl_a008585_read_cntv_tval_el0, ++ .read_cntpct_el0 = fsl_a008585_read_cntpct_el0, + .read_cntvct_el0 = fsl_a008585_read_cntvct_el0, + .set_next_event_phys = erratum_set_next_event_tval_phys, + .set_next_event_virt = erratum_set_next_event_tval_virt, +@@ -358,6 +378,7 @@ static const struct arch_timer_erratum_w + .desc = "HiSilicon erratum 161010101", + .read_cntp_tval_el0 = hisi_161010101_read_cntp_tval_el0, + .read_cntv_tval_el0 = hisi_161010101_read_cntv_tval_el0, ++ .read_cntpct_el0 = hisi_161010101_read_cntpct_el0, + .read_cntvct_el0 = hisi_161010101_read_cntvct_el0, + .set_next_event_phys = erratum_set_next_event_tval_phys, + .set_next_event_virt = erratum_set_next_event_tval_virt, +@@ -368,6 +389,7 @@ static const struct arch_timer_erratum_w + .desc = "HiSilicon erratum 161010101", + .read_cntp_tval_el0 = hisi_161010101_read_cntp_tval_el0, + .read_cntv_tval_el0 = hisi_161010101_read_cntv_tval_el0, ++ .read_cntpct_el0 = hisi_161010101_read_cntpct_el0, + .read_cntvct_el0 = hisi_161010101_read_cntvct_el0, + .set_next_event_phys = erratum_set_next_event_tval_phys, + .set_next_event_virt = erratum_set_next_event_tval_virt, +@@ -378,6 +400,7 @@ static const struct arch_timer_erratum_w + .match_type = ate_match_local_cap_id, + .id = (void *)ARM64_WORKAROUND_858921, + .desc = "ARM erratum 858921", ++ .read_cntpct_el0 = arm64_858921_read_cntpct_el0, + .read_cntvct_el0 = arm64_858921_read_cntvct_el0, + }, + #endif diff --git a/target/linux/sunxi/patches-4.14/100-clocksource-drivers-arch_timer-Workaround-for-Allwin.patch b/target/linux/sunxi/patches-4.14/100-clocksource-drivers-arch_timer-Workaround-for-Allwin.patch new file mode 100644 index 000000000..6da300312 --- /dev/null +++ b/target/linux/sunxi/patches-4.14/100-clocksource-drivers-arch_timer-Workaround-for-Allwin.patch @@ -0,0 +1,244 @@ +From 7cd6dca3600d8d71328950216688ecd00015d1ce Mon Sep 17 00:00:00 2001 +From: Samuel Holland +Date: Sat, 12 Jan 2019 20:17:18 -0600 +Subject: [PATCH] clocksource/drivers/arch_timer: Workaround for Allwinner A64 + timer instability +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +The Allwinner A64 SoC is known[1] to have an unstable architectural +timer, which manifests itself most obviously in the time jumping forward +a multiple of 95 years[2][3]. This coincides with 2^56 cycles at a +timer frequency of 24 MHz, implying that the time went slightly backward +(and this was interpreted by the kernel as it jumping forward and +wrapping around past the epoch). + +Investigation revealed instability in the low bits of CNTVCT at the +point a high bit rolls over. This leads to power-of-two cycle forward +and backward jumps. (Testing shows that forward jumps are about twice as +likely as backward jumps.) Since the counter value returns to normal +after an indeterminate read, each "jump" really consists of both a +forward and backward jump from the software perspective. + +Unless the kernel is trapping CNTVCT reads, a userspace program is able +to read the register in a loop faster than it changes. A test program +running on all 4 CPU cores that reported jumps larger than 100 ms was +run for 13.6 hours and reported the following: + + Count | Event +-------+--------------------------- + 9940 | jumped backward 699ms + 268 | jumped backward 1398ms + 1 | jumped backward 2097ms + 16020 | jumped forward 175ms + 6443 | jumped forward 699ms + 2976 | jumped forward 1398ms + 9 | jumped forward 356516ms + 9 | jumped forward 357215ms + 4 | jumped forward 714430ms + 1 | jumped forward 3578440ms + +This works out to a jump larger than 100 ms about every 5.5 seconds on +each CPU core. + +The largest jump (almost an hour!) was the following sequence of reads: + 0x0000007fffffffff → 0x00000093feffffff → 0x0000008000000000 + +Note that the middle bits don't necessarily all read as all zeroes or +all ones during the anomalous behavior; however the low 10 bits checked +by the function in this patch have never been observed with any other +value. + +Also note that smaller jumps are much more common, with backward jumps +of 2048 (2^11) cycles observed over 400 times per second on each core. +(Of course, this is partially explained by lower bits rolling over more +frequently.) Any one of these could have caused the 95 year time skip. + +Similar anomalies were observed while reading CNTPCT (after patching the +kernel to allow reads from userspace). However, the CNTPCT jumps are +much less frequent, and only small jumps were observed. The same program +as before (except now reading CNTPCT) observed after 72 hours: + + Count | Event +-------+--------------------------- + 17 | jumped backward 699ms + 52 | jumped forward 175ms + 2831 | jumped forward 699ms + 5 | jumped forward 1398ms + +Further investigation showed that the instability in CNTPCT/CNTVCT also +affected the respective timer's TVAL register. The following values were +observed immediately after writing CNVT_TVAL to 0x10000000: + + CNTVCT | CNTV_TVAL | CNTV_CVAL | CNTV_TVAL Error +--------------------+------------+--------------------+----------------- + 0x000000d4a2d8bfff | 0x10003fff | 0x000000d4b2d8bfff | +0x00004000 + 0x000000d4a2d94000 | 0x0fffffff | 0x000000d4b2d97fff | -0x00004000 + 0x000000d4a2d97fff | 0x10003fff | 0x000000d4b2d97fff | +0x00004000 + 0x000000d4a2d9c000 | 0x0fffffff | 0x000000d4b2d9ffff | -0x00004000 + +The pattern of errors in CNTV_TVAL seemed to depend on exactly which +value was written to it. For example, after writing 0x10101010: + + CNTVCT | CNTV_TVAL | CNTV_CVAL | CNTV_TVAL Error +--------------------+------------+--------------------+----------------- + 0x000001ac3effffff | 0x1110100f | 0x000001ac4f10100f | +0x1000000 + 0x000001ac40000000 | 0x1010100f | 0x000001ac5110100f | -0x1000000 + 0x000001ac58ffffff | 0x1110100f | 0x000001ac6910100f | +0x1000000 + 0x000001ac66000000 | 0x1010100f | 0x000001ac7710100f | -0x1000000 + 0x000001ac6affffff | 0x1110100f | 0x000001ac7b10100f | +0x1000000 + 0x000001ac6e000000 | 0x1010100f | 0x000001ac7f10100f | -0x1000000 + +I was also twice able to reproduce the issue covered by Allwinner's +workaround[4], that writing to TVAL sometimes fails, and both CVAL and +TVAL are left with entirely bogus values. One was the following values: + + CNTVCT | CNTV_TVAL | CNTV_CVAL +--------------------+------------+-------------------------------------- + 0x000000d4a2d6014c | 0x8fbd5721 | 0x000000d132935fff (615s in the past) +Reviewed-by: Marc Zyngier + +======================================================================== + +Because the CPU can read the CNTPCT/CNTVCT registers faster than they +change, performing two reads of the register and comparing the high bits +(like other workarounds) is not a workable solution. And because the +timer can jump both forward and backward, no pair of reads can +distinguish a good value from a bad one. The only way to guarantee a +good value from consecutive reads would be to read _three_ times, and +take the middle value only if the three values are 1) each unique and +2) increasing. This takes at minimum 3 counter cycles (125 ns), or more +if an anomaly is detected. + +However, since there is a distinct pattern to the bad values, we can +optimize the common case (1022/1024 of the time) to a single read by +simply ignoring values that match the error pattern. This still takes no +more than 3 cycles in the worst case, and requires much less code. As an +additional safety check, we still limit the loop iteration to the number +of max-frequency (1.2 GHz) CPU cycles in three 24 MHz counter periods. + +For the TVAL registers, the simple solution is to not use them. Instead, +read or write the CVAL and calculate the TVAL value in software. + +Although the manufacturer is aware of at least part of the erratum[4], +there is no official name for it. For now, use the kernel-internal name +"UNKNOWN1". + +[1]: https://github.com/armbian/build/commit/a08cd6fe7ae9 +[2]: https://forum.armbian.com/topic/3458-a64-datetime-clock-issue/ +[3]: https://irclog.whitequark.org/linux-sunxi/2018-01-26 +[4]: https://github.com/Allwinner-Homlet/H6-BSP4.9-linux/blob/master/drivers/clocksource/arm_arch_timer.c#L272 + +Acked-by: Maxime Ripard +Tested-by: Andre Przywara +Signed-off-by: Samuel Holland +Cc: stable@vger.kernel.org +Signed-off-by: Daniel Lezcano +--- + Documentation/arm64/silicon-errata.txt | 2 + + drivers/clocksource/Kconfig | 10 +++++ + drivers/clocksource/arm_arch_timer.c | 55 ++++++++++++++++++++++++++ + 3 files changed, 67 insertions(+) + +--- a/Documentation/arm64/silicon-errata.txt ++++ b/Documentation/arm64/silicon-errata.txt +@@ -44,6 +44,8 @@ stable kernels. + + | Implementor | Component | Erratum ID | Kconfig | + +----------------+-----------------+-----------------+-----------------------------+ ++| Allwinner | A64/R18 | UNKNOWN1 | SUN50I_ERRATUM_UNKNOWN1 | ++| | | | | + | ARM | Cortex-A53 | #826319 | ARM64_ERRATUM_826319 | + | ARM | Cortex-A53 | #827319 | ARM64_ERRATUM_827319 | + | ARM | Cortex-A53 | #824069 | ARM64_ERRATUM_824069 | +--- a/drivers/clocksource/Kconfig ++++ b/drivers/clocksource/Kconfig +@@ -374,6 +374,16 @@ config ARM64_ERRATUM_858921 + The workaround will be dynamically enabled when an affected + core is detected. + ++config SUN50I_ERRATUM_UNKNOWN1 ++ bool "Workaround for Allwinner A64 erratum UNKNOWN1" ++ default y ++ depends on ARM_ARCH_TIMER && ARM64 && ARCH_SUNXI ++ select ARM_ARCH_TIMER_OOL_WORKAROUND ++ help ++ This option enables a workaround for instability in the timer on ++ the Allwinner A64 SoC. The workaround will only be active if the ++ allwinner,erratum-unknown1 property is found in the timer node. ++ + config ARM_GLOBAL_TIMER + bool "Support for the ARM global timer" if COMPILE_TEST + select TIMER_OF if OF +--- a/drivers/clocksource/arm_arch_timer.c ++++ b/drivers/clocksource/arm_arch_timer.c +@@ -317,6 +317,48 @@ static u64 notrace arm64_858921_read_cnt + } + #endif + ++#ifdef CONFIG_SUN50I_ERRATUM_UNKNOWN1 ++/* ++ * The low bits of the counter registers are indeterminate while bit 10 or ++ * greater is rolling over. Since the counter value can jump both backward ++ * (7ff -> 000 -> 800) and forward (7ff -> fff -> 800), ignore register values ++ * with all ones or all zeros in the low bits. Bound the loop by the maximum ++ * number of CPU cycles in 3 consecutive 24 MHz counter periods. ++ */ ++#define __sun50i_a64_read_reg(reg) ({ \ ++ u64 _val; \ ++ int _retries = 150; \ ++ \ ++ do { \ ++ _val = read_sysreg(reg); \ ++ _retries--; \ ++ } while (((_val + 1) & GENMASK(9, 0)) <= 1 && _retries); \ ++ \ ++ WARN_ON_ONCE(!_retries); \ ++ _val; \ ++}) ++ ++static u64 notrace sun50i_a64_read_cntpct_el0(void) ++{ ++ return __sun50i_a64_read_reg(cntpct_el0); ++} ++ ++static u64 notrace sun50i_a64_read_cntvct_el0(void) ++{ ++ return __sun50i_a64_read_reg(cntvct_el0); ++} ++ ++static u32 notrace sun50i_a64_read_cntp_tval_el0(void) ++{ ++ return read_sysreg(cntp_cval_el0) - sun50i_a64_read_cntpct_el0(); ++} ++ ++static u32 notrace sun50i_a64_read_cntv_tval_el0(void) ++{ ++ return read_sysreg(cntv_cval_el0) - sun50i_a64_read_cntvct_el0(); ++} ++#endif ++ + #ifdef CONFIG_ARM_ARCH_TIMER_OOL_WORKAROUND + DEFINE_PER_CPU(const struct arch_timer_erratum_workaround *, + timer_unstable_counter_workaround); +@@ -404,6 +446,19 @@ static const struct arch_timer_erratum_w + .read_cntvct_el0 = arm64_858921_read_cntvct_el0, + }, + #endif ++#ifdef CONFIG_SUN50I_ERRATUM_UNKNOWN1 ++ { ++ .match_type = ate_match_dt, ++ .id = "allwinner,erratum-unknown1", ++ .desc = "Allwinner erratum UNKNOWN1", ++ .read_cntp_tval_el0 = sun50i_a64_read_cntp_tval_el0, ++ .read_cntv_tval_el0 = sun50i_a64_read_cntv_tval_el0, ++ .read_cntpct_el0 = sun50i_a64_read_cntpct_el0, ++ .read_cntvct_el0 = sun50i_a64_read_cntvct_el0, ++ .set_next_event_phys = erratum_set_next_event_tval_phys, ++ .set_next_event_virt = erratum_set_next_event_tval_virt, ++ }, ++#endif + }; + + typedef bool (*ate_match_fn_t)(const struct arch_timer_erratum_workaround *, diff --git a/target/linux/sunxi/patches-4.14/101-arm64-dts-allwinner-a64-Enable-A64-timer-workaround.patch b/target/linux/sunxi/patches-4.14/101-arm64-dts-allwinner-a64-Enable-A64-timer-workaround.patch new file mode 100644 index 000000000..5bfd33b94 --- /dev/null +++ b/target/linux/sunxi/patches-4.14/101-arm64-dts-allwinner-a64-Enable-A64-timer-workaround.patch @@ -0,0 +1,26 @@ +From 55ec26d6a4241363fa94f15377ebd8f1116fbfd7 Mon Sep 17 00:00:00 2001 +From: Samuel Holland +Date: Sat, 12 Jan 2019 20:17:19 -0600 +Subject: [PATCH] arm64: dts: allwinner: a64: Enable A64 timer workaround + +As instability in the architectural timer has been observed on multiple +devices using this SoC, inluding the Pine64 and the Orange Pi Win, +enable the workaround in the SoC's device tree. + +Acked-by: Maxime Ripard +Signed-off-by: Samuel Holland +Signed-off-by: Chen-Yu Tsai +--- + arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 1 + + 1 file changed, 1 insertion(+) + +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +@@ -114,6 +114,7 @@ + + timer { + compatible = "arm,armv8-timer"; ++ allwinner,erratum-unknown1; + interrupts = , + -Date: Tue, 4 Aug 2015 23:22:45 +0200 -Subject: [PATCH] musb: sunxi: Ignore VBus errors in host-only mode - -For some unclear reason sometimes we get VBus errors in host-only mode, -even though we do not have any vbus-detection then. Ignore these. - -Signed-off-by: Hans de Goede ---- - drivers/usb/musb/sunxi.c | 4 ++++ - 1 file changed, 4 insertions(+) - ---- a/drivers/usb/musb/sunxi.c -+++ b/drivers/usb/musb/sunxi.c -@@ -192,6 +192,10 @@ static irqreturn_t sunxi_musb_interrupt( - musb_writeb(musb->mregs, MUSB_FADDR, 0); - } - -+ /* Ignore Vbus errors when in host only mode */ -+ if (musb->port_mode == MUSB_PORT_MODE_HOST) -+ musb->int_usb &= ~MUSB_INTR_VBUSERROR; -+ - musb->int_tx = readw(musb->mregs + SUNXI_MUSB_INTRTX); - if (musb->int_tx) - writew(musb->int_tx, musb->mregs + SUNXI_MUSB_INTRTX); diff --git a/target/linux/sunxi/patches-4.14/131-reset-add-h3-resets.patch b/target/linux/sunxi/patches-4.14/131-reset-add-h3-resets.patch deleted file mode 100644 index 8e8fdafca..000000000 --- a/target/linux/sunxi/patches-4.14/131-reset-add-h3-resets.patch +++ /dev/null @@ -1,92 +0,0 @@ -From 5f0bb9d0bc545ef53a83f7bd176fdc0736eed8e5 Mon Sep 17 00:00:00 2001 -From: Jens Kuske -Date: Tue, 27 Oct 2015 17:50:24 +0100 -Subject: [PATCH] reset: sunxi: Add Allwinner H3 bus resets - -The H3 bus resets have some holes between the registers, so we add -an of_xlate() function to skip them according to the datasheet. - -Signed-off-by: Jens Kuske ---- - .../bindings/reset/allwinner,sunxi-clock-reset.txt | 1 + - drivers/reset/reset-sunxi.c | 30 +++++++++++++++++++--- - 2 files changed, 28 insertions(+), 3 deletions(-) - ---- a/Documentation/devicetree/bindings/reset/allwinner,sunxi-clock-reset.txt -+++ b/Documentation/devicetree/bindings/reset/allwinner,sunxi-clock-reset.txt -@@ -8,6 +8,7 @@ Required properties: - - compatible: Should be one of the following: - "allwinner,sun6i-a31-ahb1-reset" - "allwinner,sun6i-a31-clock-reset" -+ "allwinner,sun8i-h3-bus-reset" - - reg: should be register base and length as documented in the - datasheet - - #reset-cells: 1, see below ---- a/drivers/reset/reset-sunxi.c -+++ b/drivers/reset/reset-sunxi.c -@@ -77,7 +77,9 @@ static const struct reset_control_ops su - .deassert = sunxi_reset_deassert, - }; - --static int sunxi_reset_init(struct device_node *np) -+static int sunxi_reset_init(struct device_node *np, -+ int (*of_xlate)(struct reset_controller_dev *rcdev, -+ const struct of_phandle_args *reset_spec)) - { - struct sunxi_reset_data *data; - struct resource res; -@@ -110,6 +112,7 @@ static int sunxi_reset_init(struct devic - data->rcdev.nr_resets = size * 8; - data->rcdev.ops = &sunxi_reset_ops; - data->rcdev.of_node = np; -+ data->rcdev.of_xlate = of_xlate; - - return reset_controller_register(&data->rcdev); - -@@ -118,6 +121,21 @@ err_alloc: - return ret; - }; - -+static int sun8i_h3_bus_reset_xlate(struct reset_controller_dev *rcdev, -+ const struct of_phandle_args *reset_spec) -+{ -+ unsigned int index = reset_spec->args[0]; -+ -+ if (index < 96) -+ return index; -+ else if (index < 128) -+ return index + 32; -+ else if (index < 160) -+ return index + 64; -+ else -+ return -EINVAL; -+} -+ - /* - * These are the reset controller we need to initialize early on in - * our system, before we can even think of using a regular device -@@ -125,15 +143,21 @@ err_alloc: - */ - static const struct of_device_id sunxi_early_reset_dt_ids[] __initconst = { - { .compatible = "allwinner,sun6i-a31-ahb1-reset", }, -+ { .compatible = "allwinner,sun8i-h3-bus-reset", .data = sun8i_h3_bus_reset_xlate, }, - { /* sentinel */ }, - }; - - void __init sun6i_reset_init(void) - { - struct device_node *np; -- -- for_each_matching_node(np, sunxi_early_reset_dt_ids) -- sunxi_reset_init(np); -+ const struct of_device_id *match; -+ int (*of_xlate)(struct reset_controller_dev *rcdev, -+ const struct of_phandle_args *reset_spec); -+ -+ for_each_matching_node_and_match(np, sunxi_early_reset_dt_ids, &match) { -+ of_xlate = match->data; -+ sunxi_reset_init(np, of_xlate); -+ } - } - - /* diff --git a/target/linux/sunxi/patches-4.19/101-arm64-dts-allwinner-a64-Enable-A64-timer-workaround.patch b/target/linux/sunxi/patches-4.19/101-arm64-dts-allwinner-a64-Enable-A64-timer-workaround.patch new file mode 100644 index 000000000..ef7867af8 --- /dev/null +++ b/target/linux/sunxi/patches-4.19/101-arm64-dts-allwinner-a64-Enable-A64-timer-workaround.patch @@ -0,0 +1,26 @@ +From 55ec26d6a4241363fa94f15377ebd8f1116fbfd7 Mon Sep 17 00:00:00 2001 +From: Samuel Holland +Date: Sat, 12 Jan 2019 20:17:19 -0600 +Subject: [PATCH] arm64: dts: allwinner: a64: Enable A64 timer workaround + +As instability in the architectural timer has been observed on multiple +devices using this SoC, inluding the Pine64 and the Orange Pi Win, +enable the workaround in the SoC's device tree. + +Acked-by: Maxime Ripard +Signed-off-by: Samuel Holland +Signed-off-by: Chen-Yu Tsai +--- + arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 1 + + 1 file changed, 1 insertion(+) + +--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi ++++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi +@@ -159,6 +159,7 @@ + + timer { + compatible = "arm,armv8-timer"; ++ allwinner,erratum-unknown1; + interrupts = , +