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generic: move QCOM SPI NAND driver
QCOM SPI NAND driver got merged upstream hence we can drop the special patch from qualcommax and qualcommbe target and move them to the generic backports directory to reduce patch maintenance. While at it refresh any affected patch and target and also backport other minor fixup for the SPI NAND driver merged upstream later. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
This commit is contained in:
Christian Marangi
parent
10874577a1
commit
923677a74b
@ -1,18 +1,7 @@
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From 7304d1909080ef0c9da703500a97f46c98393fcd Mon Sep 17 00:00:00 2001
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From: Md Sadre Alam <quic_mdalam@quicinc.com>
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To: <broonie@kernel.org>, <robh@kernel.org>, <krzk+dt@kernel.org>,
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<conor+dt@kernel.org>, <andersson@kernel.org>,
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<konradybcio@kernel.org>, <miquel.raynal@bootlin.com>,
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<richard@nod.at>, <vigneshr@ti.com>,
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<manivannan.sadhasivam@linaro.org>,
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<linux-arm-msm@vger.kernel.org>, <linux-spi@vger.kernel.org>,
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<devicetree@vger.kernel.org>, <linux-kernel@vger.kernel.org>,
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<linux-mtd@lists.infradead.org>
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Cc: <quic_srichara@quicinc.com>, <quic_varada@quicinc.com>,
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<quic_mdalam@quicinc.com>
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Subject: [PATCH v14 6/8] spi: spi-qpic: add driver for QCOM SPI NAND flash Interface
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Date: Wed, 20 Nov 2024 14:45:04 +0530 [thread overview]
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Message-ID: <20241120091507.1404368-7-quic_mdalam@quicinc.com> (raw)
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In-Reply-To: <20241120091507.1404368-1-quic_mdalam@quicinc.com>
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Date: Mon, 24 Feb 2025 16:44:14 +0530
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Subject: [PATCH] spi: spi-qpic: add driver for QCOM SPI NAND flash Interface
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This driver implements support for the SPI-NAND mode of QCOM NAND Flash
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Interface as a SPI-MEM controller with pipelined ECC capability.
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@ -22,199 +11,23 @@ Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com>
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Co-developed-by: Varadarajan Narayanan <quic_varada@quicinc.com>
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Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
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Signed-off-by: Md Sadre Alam <quic_mdalam@quicinc.com>
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Link: https://patch.msgid.link/20250224111414.2809669-3-quic_mdalam@quicinc.com
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Signed-off-by: Mark Brown <broonie@kernel.org>
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---
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Change in [v14]
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* No Change
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Change in [v13]
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* Changed return type of qcom_spi_cmd_mapping() from u32 to
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int to fix the kernel test bot warning
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* Changed type of variable cmd in qcom_spi_write_page() from u32
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to int
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* Removed unused variable s_op from qcom_spi_write_page()
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* Updated return value variable type from u32 to int in
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qcom_spi_send_cmdaddr()
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Change in [v12]
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* Added obj-$(CONFIG_SPI_QPIC_SNAND) += qpic_common.o in Makefile
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to build qpic_common.c based on CONFIG_SPI_QPIC_SNAND
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Change in [v11]
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* Fixed build error reported by kernel test bot
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* Changed "depends on MTD" to "select MTD" in
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drivers/spi/Kconfig file
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Change in [v10]
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* Fixed compilation warnings reported by kernel test robot.
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* Added depends on CONFIG_MTD
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* removed extra bracket from statement if (i == (num_cw - 1)) in
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qcom_spi_program_raw() api.
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Change in [v9]
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* Changed data type of addr1, addr2, cmd, to __le32 in qpic_spi_nand
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structure
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* In qcom_spi_set_read_loc_first() api added cpu_to_le32() macro to fix
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compilation warning
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* In qcom_spi_set_read_loc_last() api added cpu_to_le32() macro to fix
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compilation warning
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* In qcom_spi_init() api added cpu_to_le32() macro to fix compilation
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warning
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* In qcom_spi_ecc_init_ctx_pipelined() api removed unused variables
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reqs, user, step_size, strength and added cpu_to_le32() macro as well
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to fix compilation warning
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* In qcom_spi_read_last_cw() api added cpu_to_le32() macro to fix compilation
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warning
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* In qcom_spi_check_error() api added cpu_to_le32() macro to fix compilation
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warning
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* In qcom_spi_read_page_ecc() api added cpu_to_le32() macro to fix compilation
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warning
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* In qcom_spi_read_page_oob() api added cpu_to_le32() macro to fix compilation
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warning
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* In qcom_spi_program_raw() api added cpu_to_le32() macro to fix compilation
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warning
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* In qcom_spi_program_ecc() api added cpu_to_le32() macro to fix compilation
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warning
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* In qcom_spi_program_oob() api added cpu_to_le32() macro to fix compilation
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warning
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* In qcom_spi_send_cmdaddr() api added cpu_to_le32() macro to fix compilation
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warning
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* In qcom_spi_io_op() api added cpu_to_le32() macro to fix compilation
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warning
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Change in [v8]
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* Included "bitfield.h" file to /spi-qpic-snand.c
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to fix compilation warning reported by kernel test robot
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* Removed unused variable "steps" in
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qcom_spi_ecc_init_ctx_pipelined() to fix compilation warning
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Change in [v7]
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* Added read_oob() and write_oob() api
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* Handled offset value for oob layout
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* Made CONFIG_SPI_QPIC_SNAND as bool
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* Added macro ecceng_to_qspi()
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* Added FIELD_PREP() Macro in spi init
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* Added else condition in
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qcom_spi_ecc_finish_io_req_pipelined()
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for corrected ecc
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* Handled multiple error condition for api
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qcom_spi_cmd_mapping()
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* Fix typo for printing debug message
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Change in [v6]
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* Added separate qpic_spi_nand{...} struct
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* moved qpic_ecc and qcom_ecc_stats struct to
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spi-qpic-snand.c file, since its spi nand
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specific
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* Added FIELD_PREP() and GENMASK() macro
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* Removed rawnand.h and partition.h from
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spi-qpic-snand.c
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* Removed oob_buff assignment form
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qcom_spi_write_page_cache
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* Added qcom_nand_unalloc() in remove() path
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* Fixes all all comments
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Change in [v5]
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* Added raw_read() and raw_write() api
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* Updated commit message
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* Removed register indirection
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* Added qcom_spi_ prefix to all the api
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* Removed snand_set_reg() api.
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* Fixed nandbiterr issue
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* Removed hardcoded num_cw and made it variable
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* Removed hardcoded value for mtd pagesize
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* Added -ENOSUPPORT in cmd mapping for unsupported
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commands
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* Replace if..else with switch..case statement
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Change in [v4]
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* No change
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Change in [v3]
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* Set SPI_QPIC_SNAND to n and added COMPILE_TEST in Kconfig
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* Made driver name sorted in Make file
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* Made comment like c++
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* Changed macro to functions, snandc_set_read_loc_last()
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and snandc_set_read_loc_first()
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* Added error handling in snandc_set_reg()
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* Changed into normal conditional statement for
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return snandc->ecc_stats.failed ? -EBADMSG :
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snandc->ecc_stats.bitflips;
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* Remove cast of wbuf in qpic_snand_program_execute()
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function
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* Made num_cw variable instead hardcoded value
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* changed if..else condition of function qpic_snand_io_op()
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to switch..case statement
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* Added __devm_spi_alloc_controller() api instead of
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devm_spi_alloc_master()
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* Disabling clock in remove path
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Change in [v2]
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* Added initial support for SPI-NAND driver
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Change in [v1]
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* Added RFC patch for design review
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drivers/mtd/nand/Makefile | 4 +
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drivers/spi/Kconfig | 9 +
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drivers/spi/Makefile | 1 +
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drivers/spi/spi-qpic-snand.c | 1633 ++++++++++++++++++++++++++
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drivers/spi/spi-qpic-snand.c | 1631 ++++++++++++++++++++++++++
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include/linux/mtd/nand-qpic-common.h | 7 +
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5 files changed, 1654 insertions(+)
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5 files changed, 1652 insertions(+)
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create mode 100644 drivers/spi/spi-qpic-snand.c
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--- a/drivers/mtd/nand/Makefile
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+++ b/drivers/mtd/nand/Makefile
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@@ -4,7 +4,11 @@ nandcore-objs := core.o bbt.o
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@@ -3,7 +3,11 @@
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nandcore-objs := core.o bbt.o
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obj-$(CONFIG_MTD_NAND_CORE) += nandcore.o
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obj-$(CONFIG_MTD_NAND_ECC_MEDIATEK) += ecc-mtk.o
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obj-$(CONFIG_MTD_NAND_MTK_BMT) += mtk_bmt.o mtk_bmt_v2.o mtk_bmt_bbt.o mtk_bmt_nmbm.o
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+ifeq ($(CONFIG_SPI_QPIC_SNAND),y)
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+obj-$(CONFIG_SPI_QPIC_SNAND) += qpic_common.o
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+else
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@ -253,7 +66,7 @@ Change in [v1]
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obj-$(CONFIG_SPI_ROCKCHIP_SFC) += spi-rockchip-sfc.o
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--- /dev/null
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+++ b/drivers/spi/spi-qpic-snand.c
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@@ -0,0 +1,1633 @@
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@@ -0,0 +1,1631 @@
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+/*
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+ * SPDX-License-Identifier: GPL-2.0
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+ *
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@ -314,6 +127,7 @@ Change in [v1]
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+#define BAD_BLOCK_MARKER_SIZE 0x2
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+#define OOB_BUF_SIZE 128
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+#define ecceng_to_qspi(eng) container_of(eng, struct qpic_spi_nand, ecc_eng)
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+
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+struct qpic_snand_op {
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+ u32 cmd_reg;
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+ u32 addr1_reg;
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@ -1456,64 +1270,63 @@ Change in [v1]
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+ return 0;
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+}
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+
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+static int qcom_spi_cmd_mapping(struct qcom_nand_controller *snandc, u32 opcode)
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+static int qcom_spi_cmd_mapping(struct qcom_nand_controller *snandc, u32 opcode, u32 *cmd)
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+{
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+ int cmd = 0x0;
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+
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+ switch (opcode) {
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+ case SPINAND_RESET:
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+ cmd = (SPI_WP | SPI_HOLD | SPI_TRANSFER_MODE_x1 | OP_RESET_DEVICE);
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+ *cmd = (SPI_WP | SPI_HOLD | SPI_TRANSFER_MODE_x1 | OP_RESET_DEVICE);
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+ break;
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+ case SPINAND_READID:
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+ cmd = (SPI_WP | SPI_HOLD | SPI_TRANSFER_MODE_x1 | OP_FETCH_ID);
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+ *cmd = (SPI_WP | SPI_HOLD | SPI_TRANSFER_MODE_x1 | OP_FETCH_ID);
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+ break;
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+ case SPINAND_GET_FEATURE:
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+ cmd = (SPI_TRANSFER_MODE_x1 | SPI_WP | SPI_HOLD | ACC_FEATURE);
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+ *cmd = (SPI_TRANSFER_MODE_x1 | SPI_WP | SPI_HOLD | ACC_FEATURE);
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+ break;
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+ case SPINAND_SET_FEATURE:
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+ cmd = (SPI_TRANSFER_MODE_x1 | SPI_WP | SPI_HOLD | ACC_FEATURE |
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+ *cmd = (SPI_TRANSFER_MODE_x1 | SPI_WP | SPI_HOLD | ACC_FEATURE |
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+ QPIC_SET_FEATURE);
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+ break;
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+ case SPINAND_READ:
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+ if (snandc->qspi->raw_rw) {
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+ cmd = (PAGE_ACC | LAST_PAGE | SPI_TRANSFER_MODE_x1 |
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+ *cmd = (PAGE_ACC | LAST_PAGE | SPI_TRANSFER_MODE_x1 |
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+ SPI_WP | SPI_HOLD | OP_PAGE_READ);
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+ } else {
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+ cmd = (PAGE_ACC | LAST_PAGE | SPI_TRANSFER_MODE_x1 |
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+ *cmd = (PAGE_ACC | LAST_PAGE | SPI_TRANSFER_MODE_x1 |
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+ SPI_WP | SPI_HOLD | OP_PAGE_READ_WITH_ECC);
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+ }
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+
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+ break;
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+ case SPINAND_ERASE:
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+ cmd = OP_BLOCK_ERASE | PAGE_ACC | LAST_PAGE | SPI_WP |
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+ *cmd = OP_BLOCK_ERASE | PAGE_ACC | LAST_PAGE | SPI_WP |
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+ SPI_HOLD | SPI_TRANSFER_MODE_x1;
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+ break;
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+ case SPINAND_WRITE_EN:
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+ cmd = SPINAND_WRITE_EN;
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+ *cmd = SPINAND_WRITE_EN;
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+ break;
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+ case SPINAND_PROGRAM_EXECUTE:
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+ cmd = (PAGE_ACC | LAST_PAGE | SPI_TRANSFER_MODE_x1 |
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+ *cmd = (PAGE_ACC | LAST_PAGE | SPI_TRANSFER_MODE_x1 |
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+ SPI_WP | SPI_HOLD | OP_PROGRAM_PAGE);
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+ break;
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+ case SPINAND_PROGRAM_LOAD:
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+ cmd = SPINAND_PROGRAM_LOAD;
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+ *cmd = SPINAND_PROGRAM_LOAD;
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+ break;
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+ default:
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+ dev_err(snandc->dev, "Opcode not supported: %u\n", opcode);
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+ return -EOPNOTSUPP;
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+ }
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+
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+ return cmd;
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+ return 0;
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+}
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+
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+static int qcom_spi_write_page(struct qcom_nand_controller *snandc,
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+ const struct spi_mem_op *op)
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+{
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+ int cmd;
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+ int ret;
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+ u32 cmd;
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+
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+ cmd = qcom_spi_cmd_mapping(snandc, op->cmd.opcode);
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+ if (cmd < 0)
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+ return cmd;
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+ ret = qcom_spi_cmd_mapping(snandc, op->cmd.opcode, &cmd);
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+ if (ret < 0)
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+ return ret;
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+
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+ if (op->cmd.opcode == SPINAND_PROGRAM_LOAD)
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+ snandc->qspi->data_buf = (u8 *)op->data.buf.out;
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@ -1528,12 +1341,10 @@ Change in [v1]
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+ u32 cmd;
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+ int ret, opcode;
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+
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+ ret = qcom_spi_cmd_mapping(snandc, op->cmd.opcode);
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+ ret = qcom_spi_cmd_mapping(snandc, op->cmd.opcode, &cmd);
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+ if (ret < 0)
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+ return ret;
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+
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+ cmd = ret;
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+
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+ s_op.cmd_reg = cmd;
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+ s_op.addr1_reg = op->addr.val;
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+ s_op.addr2_reg = 0;
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@ -0,0 +1,28 @@
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From cf1ba3cb245020459f2ca446b7a7b199839f5d83 Mon Sep 17 00:00:00 2001
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From: Dan Carpenter <dan.carpenter@linaro.org>
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Date: Thu, 6 Mar 2025 12:40:01 +0300
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Subject: [PATCH] spi: spi-qpic-snand: Fix ECC_CFG_ECC_DISABLE shift in
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qcom_spi_read_last_cw()
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The ECC_CFG_ECC_DISABLE define is BIT(0). It's supposed to be used
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directly instead of used as a shifter.
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Fixes: 7304d1909080 ("spi: spi-qpic: add driver for QCOM SPI NAND flash Interface")
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Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
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Link: https://patch.msgid.link/2f4b0a0b-2c03-41c0-8a4a-3d789a83832d@stanley.mountain
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Signed-off-by: Mark Brown <broonie@kernel.org>
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---
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drivers/spi/spi-qpic-snand.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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--- a/drivers/spi/spi-qpic-snand.c
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+++ b/drivers/spi/spi-qpic-snand.c
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@@ -514,7 +514,7 @@ static int qcom_spi_read_last_cw(struct
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cfg0 = (ecc_cfg->cfg0_raw & ~(7U << CW_PER_PAGE)) |
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0 << CW_PER_PAGE;
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cfg1 = ecc_cfg->cfg1_raw;
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- ecc_bch_cfg = 1 << ECC_CFG_ECC_DISABLE;
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+ ecc_bch_cfg = ECC_CFG_ECC_DISABLE;
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snandc->regs->cmd = snandc->qspi->cmd;
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snandc->regs->cfg0 = cpu_to_le32(cfg0);
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@ -0,0 +1,35 @@
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From d450cdd9c4398add1f2aa7200f2c95f1e3b9f9fa Mon Sep 17 00:00:00 2001
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From: Gabor Juhos <j4g8y7@gmail.com>
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Date: Thu, 13 Mar 2025 19:31:21 +0100
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Subject: [PATCH] spi: spi-qpic-snand: avoid memleak in
|
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qcom_spi_ecc_init_ctx_pipelined()
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When the allocation of the OOB buffer fails, the
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qcom_spi_ecc_init_ctx_pipelined() function returns without freeing
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the memory allocated for 'ecc_cfg' thus it can cause a memory leak.
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Call kfree() to free 'ecc_cfg' before returning from the function
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to avoid that.
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Fixes: 7304d1909080 ("spi: spi-qpic: add driver for QCOM SPI NAND flash Interface")
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Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
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Link: https://patch.msgid.link/20250313-qpic-snand-memleak-fix-v1-1-e54e78d1da3a@gmail.com
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Signed-off-by: Mark Brown <broonie@kernel.org>
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---
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drivers/spi/spi-qpic-snand.c | 4 +++-
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1 file changed, 3 insertions(+), 1 deletion(-)
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--- a/drivers/spi/spi-qpic-snand.c
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+++ b/drivers/spi/spi-qpic-snand.c
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@@ -263,8 +263,10 @@ static int qcom_spi_ecc_init_ctx_pipelin
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return -ENOMEM;
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||||
snandc->qspi->oob_buf = kzalloc(mtd->writesize + mtd->oobsize,
|
||||
GFP_KERNEL);
|
||||
- if (!snandc->qspi->oob_buf)
|
||||
+ if (!snandc->qspi->oob_buf) {
|
||||
+ kfree(ecc_cfg);
|
||||
return -ENOMEM;
|
||||
+ }
|
||||
|
||||
memset(snandc->qspi->oob_buf, 0xff, mtd->writesize + mtd->oobsize);
|
||||
|
||||
@ -0,0 +1,49 @@
|
||||
From d32c4e58545f17caaa854415f854691e32d42075 Mon Sep 17 00:00:00 2001
|
||||
From: Geert Uytterhoeven <geert+renesas@glider.be>
|
||||
Date: Wed, 26 Mar 2025 15:22:19 +0100
|
||||
Subject: [PATCH] spi: SPI_QPIC_SNAND should be tristate and depend on MTD
|
||||
|
||||
SPI_QPIC_SNAND is the only driver that selects MTD instead of depending
|
||||
on it, which could lead to circular dependencies. Moreover, as
|
||||
SPI_QPIC_SNAND is bool, this forces MTD (and various related symbols) to
|
||||
be built-in, as can be seen in an allmodconfig kernel.
|
||||
|
||||
Except for a missing semicolon, there is no reason why SPI_QPIC_SNAND
|
||||
cannot be tristate; all MODULE_*() boilerplate is already present.
|
||||
Hence make SPI_QPIC_SNAND tristate, let it depend on MTD, and add the
|
||||
missing semicolon.
|
||||
|
||||
Fixes: 7304d1909080ef0c ("spi: spi-qpic: add driver for QCOM SPI NAND flash Interface")
|
||||
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
|
||||
Link: https://patch.msgid.link/b63db431cbf35223a4400e44c296293d32c4543c.1742998909.git.geert+renesas@glider.be
|
||||
Signed-off-by: Mark Brown <broonie@kernel.org>
|
||||
---
|
||||
drivers/spi/Kconfig | 4 ++--
|
||||
drivers/spi/spi-qpic-snand.c | 2 +-
|
||||
2 files changed, 3 insertions(+), 3 deletions(-)
|
||||
|
||||
--- a/drivers/spi/Kconfig
|
||||
+++ b/drivers/spi/Kconfig
|
||||
@@ -871,9 +871,9 @@ config SPI_QCOM_QSPI
|
||||
QSPI(Quad SPI) driver for Qualcomm QSPI controller.
|
||||
|
||||
config SPI_QPIC_SNAND
|
||||
- bool "QPIC SNAND controller"
|
||||
+ tristate "QPIC SNAND controller"
|
||||
depends on ARCH_QCOM || COMPILE_TEST
|
||||
- select MTD
|
||||
+ depends on MTD
|
||||
help
|
||||
QPIC_SNAND (QPIC SPI NAND) driver for Qualcomm QPIC controller.
|
||||
QPIC controller supports both parallel nand and serial nand.
|
||||
--- a/drivers/spi/spi-qpic-snand.c
|
||||
+++ b/drivers/spi/spi-qpic-snand.c
|
||||
@@ -1614,7 +1614,7 @@ static const struct of_device_id qcom_sn
|
||||
.data = &ipq9574_snandc_props,
|
||||
},
|
||||
{}
|
||||
-}
|
||||
+};
|
||||
MODULE_DEVICE_TABLE(of, qcom_snandc_of_match);
|
||||
|
||||
static struct platform_driver qcom_spi_driver = {
|
||||
@ -0,0 +1,29 @@
|
||||
From f48d80503504257682e493dc17408f2f0b47bcfa Mon Sep 17 00:00:00 2001
|
||||
From: Gabor Juhos <j4g8y7@gmail.com>
|
||||
Date: Thu, 20 Mar 2025 19:11:59 +0100
|
||||
Subject: [PATCH] spi: spi-qpic-snand: use kmalloc() for OOB buffer allocation
|
||||
|
||||
The qcom_spi_ecc_init_ctx_pipelined() function allocates zeroed
|
||||
memory for the OOB buffer, then it fills the buffer with '0xff'
|
||||
bytes right after the allocation. In this case zeroing the memory
|
||||
during allocation is superfluous, so use kmalloc() instead of
|
||||
kzalloc() to avoid that.
|
||||
|
||||
Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
|
||||
Link: https://patch.msgid.link/20250320-qpic-snand-kmalloc-v1-1-94e267550675@gmail.com
|
||||
Signed-off-by: Mark Brown <broonie@kernel.org>
|
||||
---
|
||||
drivers/spi/spi-qpic-snand.c | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
--- a/drivers/spi/spi-qpic-snand.c
|
||||
+++ b/drivers/spi/spi-qpic-snand.c
|
||||
@@ -261,7 +261,7 @@ static int qcom_spi_ecc_init_ctx_pipelin
|
||||
ecc_cfg = kzalloc(sizeof(*ecc_cfg), GFP_KERNEL);
|
||||
if (!ecc_cfg)
|
||||
return -ENOMEM;
|
||||
- snandc->qspi->oob_buf = kzalloc(mtd->writesize + mtd->oobsize,
|
||||
+ snandc->qspi->oob_buf = kmalloc(mtd->writesize + mtd->oobsize,
|
||||
GFP_KERNEL);
|
||||
if (!snandc->qspi->oob_buf) {
|
||||
kfree(ecc_cfg);
|
||||
@ -28,6 +28,6 @@ Subject: [PATCH] mtd/nand: add MediaTek NAND bad block managment table
|
||||
obj-$(CONFIG_MTD_NAND_CORE) += nandcore.o
|
||||
obj-$(CONFIG_MTD_NAND_ECC_MEDIATEK) += ecc-mtk.o
|
||||
+obj-$(CONFIG_MTD_NAND_MTK_BMT) += mtk_bmt.o mtk_bmt_v2.o mtk_bmt_bbt.o mtk_bmt_nmbm.o
|
||||
obj-$(CONFIG_MTD_NAND_QCOM) += qpic_common.o
|
||||
obj-y += onenand/
|
||||
obj-y += raw/
|
||||
ifeq ($(CONFIG_SPI_QPIC_SNAND),y)
|
||||
obj-$(CONFIG_SPI_QPIC_SNAND) += qpic_common.o
|
||||
else
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -1,125 +0,0 @@
|
||||
From 8716f3c03d9f71ed0bd12a26f6e9d1e85cff0d12 Mon Sep 17 00:00:00 2001
|
||||
From: Christian Marangi <ansuelsmth@gmail.com>
|
||||
Date: Thu, 30 Jan 2025 00:27:22 +0100
|
||||
Subject: [PATCH 1/2] spi: spi-qpic: fix broken driver with SPINAND_SET_FEATURE
|
||||
command
|
||||
|
||||
The driver always return probe error with SPINAND_SET_FEATURE command:
|
||||
|
||||
spi-nand: probe of spi0.0 failed with error -1207959538
|
||||
|
||||
The error doesn't match any expected negative error but instead seems to
|
||||
be an u32 converted to an int. Investigating the entire codeflow I
|
||||
reached the culprit: qcom_spi_cmd_mapping.
|
||||
|
||||
Such function can return -EOPNOTSUPP or the cmd to run. Problem is that
|
||||
in the specific context of SPINAND_SET_FEATURE, BIT(31) is set that in
|
||||
the context of an integer, it gets treated as a negative value.
|
||||
|
||||
To correctly handle this, rework the function to return 0 or a "correct"
|
||||
negative error and pass a pointer to store the cmd.
|
||||
|
||||
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
|
||||
---
|
||||
drivers/spi/spi-qpic-snand.c | 40 +++++++++++++++++-------------------
|
||||
1 file changed, 19 insertions(+), 21 deletions(-)
|
||||
|
||||
--- a/drivers/spi/spi-qpic-snand.c
|
||||
+++ b/drivers/spi/spi-qpic-snand.c
|
||||
@@ -1200,64 +1200,64 @@ static int qcom_spi_program_execute(stru
|
||||
return 0;
|
||||
}
|
||||
|
||||
-static int qcom_spi_cmd_mapping(struct qcom_nand_controller *snandc, u32 opcode)
|
||||
+static int qcom_spi_cmd_mapping(struct qcom_nand_controller *snandc, u32 opcode,
|
||||
+ u32 *cmd)
|
||||
{
|
||||
- int cmd = 0x0;
|
||||
-
|
||||
switch (opcode) {
|
||||
case SPINAND_RESET:
|
||||
- cmd = (SPI_WP | SPI_HOLD | SPI_TRANSFER_MODE_x1 | OP_RESET_DEVICE);
|
||||
+ *cmd = (SPI_WP | SPI_HOLD | SPI_TRANSFER_MODE_x1 | OP_RESET_DEVICE);
|
||||
break;
|
||||
case SPINAND_READID:
|
||||
- cmd = (SPI_WP | SPI_HOLD | SPI_TRANSFER_MODE_x1 | OP_FETCH_ID);
|
||||
+ *cmd = (SPI_WP | SPI_HOLD | SPI_TRANSFER_MODE_x1 | OP_FETCH_ID);
|
||||
break;
|
||||
case SPINAND_GET_FEATURE:
|
||||
- cmd = (SPI_TRANSFER_MODE_x1 | SPI_WP | SPI_HOLD | ACC_FEATURE);
|
||||
+ *cmd = (SPI_TRANSFER_MODE_x1 | SPI_WP | SPI_HOLD | ACC_FEATURE);
|
||||
break;
|
||||
case SPINAND_SET_FEATURE:
|
||||
- cmd = (SPI_TRANSFER_MODE_x1 | SPI_WP | SPI_HOLD | ACC_FEATURE |
|
||||
+ *cmd = (SPI_TRANSFER_MODE_x1 | SPI_WP | SPI_HOLD | ACC_FEATURE |
|
||||
QPIC_SET_FEATURE);
|
||||
break;
|
||||
case SPINAND_READ:
|
||||
if (snandc->qspi->raw_rw) {
|
||||
- cmd = (PAGE_ACC | LAST_PAGE | SPI_TRANSFER_MODE_x1 |
|
||||
+ *cmd = (PAGE_ACC | LAST_PAGE | SPI_TRANSFER_MODE_x1 |
|
||||
SPI_WP | SPI_HOLD | OP_PAGE_READ);
|
||||
} else {
|
||||
- cmd = (PAGE_ACC | LAST_PAGE | SPI_TRANSFER_MODE_x1 |
|
||||
+ *cmd = (PAGE_ACC | LAST_PAGE | SPI_TRANSFER_MODE_x1 |
|
||||
SPI_WP | SPI_HOLD | OP_PAGE_READ_WITH_ECC);
|
||||
}
|
||||
|
||||
break;
|
||||
case SPINAND_ERASE:
|
||||
- cmd = OP_BLOCK_ERASE | PAGE_ACC | LAST_PAGE | SPI_WP |
|
||||
+ *cmd = OP_BLOCK_ERASE | PAGE_ACC | LAST_PAGE | SPI_WP |
|
||||
SPI_HOLD | SPI_TRANSFER_MODE_x1;
|
||||
break;
|
||||
case SPINAND_WRITE_EN:
|
||||
- cmd = SPINAND_WRITE_EN;
|
||||
+ *cmd = SPINAND_WRITE_EN;
|
||||
break;
|
||||
case SPINAND_PROGRAM_EXECUTE:
|
||||
- cmd = (PAGE_ACC | LAST_PAGE | SPI_TRANSFER_MODE_x1 |
|
||||
+ *cmd = (PAGE_ACC | LAST_PAGE | SPI_TRANSFER_MODE_x1 |
|
||||
SPI_WP | SPI_HOLD | OP_PROGRAM_PAGE);
|
||||
break;
|
||||
case SPINAND_PROGRAM_LOAD:
|
||||
- cmd = SPINAND_PROGRAM_LOAD;
|
||||
+ *cmd = SPINAND_PROGRAM_LOAD;
|
||||
break;
|
||||
default:
|
||||
dev_err(snandc->dev, "Opcode not supported: %u\n", opcode);
|
||||
return -EOPNOTSUPP;
|
||||
}
|
||||
|
||||
- return cmd;
|
||||
+ return 0;
|
||||
}
|
||||
|
||||
static int qcom_spi_write_page(struct qcom_nand_controller *snandc,
|
||||
const struct spi_mem_op *op)
|
||||
{
|
||||
- int cmd;
|
||||
+ u32 cmd;
|
||||
+ int ret;
|
||||
|
||||
- cmd = qcom_spi_cmd_mapping(snandc, op->cmd.opcode);
|
||||
- if (cmd < 0)
|
||||
- return cmd;
|
||||
+ ret = qcom_spi_cmd_mapping(snandc, op->cmd.opcode, &cmd);
|
||||
+ if (ret < 0)
|
||||
+ return ret;
|
||||
|
||||
if (op->cmd.opcode == SPINAND_PROGRAM_LOAD)
|
||||
snandc->qspi->data_buf = (u8 *)op->data.buf.out;
|
||||
@@ -1272,12 +1272,10 @@ static int qcom_spi_send_cmdaddr(struct
|
||||
u32 cmd;
|
||||
int ret, opcode;
|
||||
|
||||
- ret = qcom_spi_cmd_mapping(snandc, op->cmd.opcode);
|
||||
+ ret = qcom_spi_cmd_mapping(snandc, op->cmd.opcode, &cmd);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
- cmd = ret;
|
||||
-
|
||||
s_op.cmd_reg = cmd;
|
||||
s_op.addr1_reg = op->addr.val;
|
||||
s_op.addr2_reg = 0;
|
||||
@ -13,7 +13,7 @@ Signed-off-by: George Moussalem <george.moussalem@outlook.com>
|
||||
|
||||
--- a/drivers/spi/spi-qpic-snand.c
|
||||
+++ b/drivers/spi/spi-qpic-snand.c
|
||||
@@ -252,6 +252,7 @@ static int qcom_spi_ecc_init_ctx_pipelin
|
||||
@@ -253,6 +253,7 @@ static int qcom_spi_ecc_init_ctx_pipelin
|
||||
struct nand_ecc_props *conf = &nand->ecc.ctx.conf;
|
||||
struct mtd_info *mtd = nanddev_to_mtd(nand);
|
||||
int cwperpage, bad_block_byte;
|
||||
@ -21,7 +21,7 @@ Signed-off-by: George Moussalem <george.moussalem@outlook.com>
|
||||
struct qpic_ecc *ecc_cfg;
|
||||
|
||||
cwperpage = mtd->writesize / NANDC_STEP_SIZE;
|
||||
@@ -270,14 +271,17 @@ static int qcom_spi_ecc_init_ctx_pipelin
|
||||
@@ -273,14 +274,17 @@ static int qcom_spi_ecc_init_ctx_pipelin
|
||||
nand->ecc.ctx.priv = ecc_cfg;
|
||||
snandc->qspi->mtd = mtd;
|
||||
|
||||
@ -42,7 +42,7 @@ Signed-off-by: George Moussalem <george.moussalem@outlook.com>
|
||||
ecc_cfg->step_size = 512;
|
||||
ecc_cfg->cw_data = 516;
|
||||
ecc_cfg->cw_size = ecc_cfg->cw_data + ecc_cfg->bytes;
|
||||
@@ -319,7 +323,7 @@ static int qcom_spi_ecc_init_ctx_pipelin
|
||||
@@ -322,7 +326,7 @@ static int qcom_spi_ecc_init_ctx_pipelin
|
||||
FIELD_PREP(ECC_SW_RESET, 0) |
|
||||
FIELD_PREP(ECC_NUM_DATA_BYTES_MASK, ecc_cfg->cw_data) |
|
||||
FIELD_PREP(ECC_FORCE_CLK_OPEN, 1) |
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user