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https://github.com/coolsnowwolf/lede.git
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923677a74b
QCOM SPI NAND driver got merged upstream hence we can drop the special patch from qualcommax and qualcommbe target and move them to the generic backports directory to reduce patch maintenance. While at it refresh any affected patch and target and also backport other minor fixup for the SPI NAND driver merged upstream later. Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
54 lines
1.9 KiB
Diff
54 lines
1.9 KiB
Diff
From 396886e8644d5b601126b97e0b36c40c5fb5cecf Mon Sep 17 00:00:00 2001
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From: Ziyang Huang <hzyitc@outlook.com>
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Date: Sun, 8 Sep 2024 16:40:11 +0800
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Subject: [PATCH 1/2] spi: spi-qpic-snand: support BCH8
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Add BCH8 error-correcting code support for QPIC SPI Nand controller.
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Signed-off-by: Ziyang Huang <hzyitc@outlook.com>
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Signed-off-by: George Moussalem <george.moussalem@outlook.com>
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---
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drivers/spi/spi-qpic-snand.c | 12 ++++++++----
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1 file changed, 8 insertions(+), 4 deletions(-)
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--- a/drivers/spi/spi-qpic-snand.c
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+++ b/drivers/spi/spi-qpic-snand.c
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@@ -253,6 +253,7 @@ static int qcom_spi_ecc_init_ctx_pipelin
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struct nand_ecc_props *conf = &nand->ecc.ctx.conf;
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struct mtd_info *mtd = nanddev_to_mtd(nand);
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int cwperpage, bad_block_byte;
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+ int ecc_mode;
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struct qpic_ecc *ecc_cfg;
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cwperpage = mtd->writesize / NANDC_STEP_SIZE;
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@@ -273,14 +274,17 @@ static int qcom_spi_ecc_init_ctx_pipelin
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nand->ecc.ctx.priv = ecc_cfg;
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snandc->qspi->mtd = mtd;
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- ecc_cfg->ecc_bytes_hw = 7;
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- ecc_cfg->spare_bytes = 4;
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+ /* BCH8 or BCH4 */
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+ ecc_mode = mtd->oobsize > 64 ? 1 : 0;
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+
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+ ecc_cfg->ecc_bytes_hw = ecc_mode ? 13 : 7;
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+ ecc_cfg->spare_bytes = ecc_mode ? 2 : 4;
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ecc_cfg->bbm_size = 1;
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ecc_cfg->bch_enabled = true;
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ecc_cfg->bytes = ecc_cfg->ecc_bytes_hw + ecc_cfg->spare_bytes + ecc_cfg->bbm_size;
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ecc_cfg->steps = 4;
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- ecc_cfg->strength = 4;
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+ ecc_cfg->strength = ecc_mode ? 8 : 4;
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ecc_cfg->step_size = 512;
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ecc_cfg->cw_data = 516;
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ecc_cfg->cw_size = ecc_cfg->cw_data + ecc_cfg->bytes;
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@@ -322,7 +326,7 @@ static int qcom_spi_ecc_init_ctx_pipelin
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FIELD_PREP(ECC_SW_RESET, 0) |
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FIELD_PREP(ECC_NUM_DATA_BYTES_MASK, ecc_cfg->cw_data) |
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FIELD_PREP(ECC_FORCE_CLK_OPEN, 1) |
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- FIELD_PREP(ECC_MODE_MASK, 0) |
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+ FIELD_PREP(ECC_MODE_MASK, ecc_mode) |
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FIELD_PREP(ECC_PARITY_SIZE_BYTES_BCH_MASK, ecc_cfg->ecc_bytes_hw);
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ecc_cfg->ecc_buf_cfg = 0x203 << NUM_STEPS;
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