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mediatek: filogic: sync upstream dts changes

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This commit is contained in:
AmadeusGhost 2023-09-14 23:06:32 +08:00
parent 2fdceb465c
commit 36bd1e35ad
5 changed files with 108 additions and 85 deletions
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23
target/linux/mediatek/dts/mt7981b-cetron-ct3003-mod.dts Normal file
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@ -0,0 +1,23 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include "mt7981b-cetron-ct3003.dts"
/ {
model = "Cetron CT3003 (U-Boot mod)";
compatible = "cetron,ct3003-mod", "mediatek,mt7981";
};
&spi0 {
spi_nand@0 {
partitions {
partition@580000 {
label = "ubi";
reg = <0x0580000 0x7000000>;
};
/delete-node/ partition@2580000;
/delete-node/ partition@4580000;
};
};
};

104
target/linux/mediatek/dts/mt7981b-jcg-q30_pro.dts → target/linux/mediatek/dts/mt7981b-jcg-q30-pro.dts
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@ -1,7 +1,4 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright (C) Tianling Shen <cnsztl@immortalwrt.org>
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
@ -10,46 +7,45 @@
#include "mt7981.dtsi"
/ {
model = "JCG Q30 Pro";
compatible = "jcg,q30_pro", "mediatek,mt7981";
model = "JCG Q30 PRO";
compatible = "jcg,q30-pro", "mediatek,mt7981";
aliases {
led-boot = &status_red_led;
led-failsafe = &status_red_led;
led-running = &status_blue_led;
led-upgrade = &status_blue_led;
serial0 = &uart0;
label-mac-device = &gmac0;
led-boot = &led_status_red;
led-failsafe = &led_status_red;
led-running = &led_status_blue;
led-upgrade = &led_status_blue;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory {
reg = <0 0x40000000 0 0x10000000>;
};
gpio-keys {
compatible = "gpio-keys";
button-reset {
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&pio 1 GPIO_ACTIVE_LOW>;
};
button-wps {
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
};
};
gpio-leds {
leds {
compatible = "gpio-leds";
status_red_led: led-0 {
led_status_red: red {
label = "red:status";
gpios = <&pio 8 GPIO_ACTIVE_HIGH>;
};
status_blue_led: led-1 {
led_status_blue: blue {
label = "blue:status";
gpios = <&pio 13 GPIO_ACTIVE_LOW>;
};
@ -57,9 +53,6 @@
};
&eth {
pinctrl-names = "default";
pinctrl-0 = <&mdio_pins>;
status = "okay";
gmac0: mac@0 {
@ -67,7 +60,7 @@
reg = <0>;
phy-mode = "2500base-x";
nvmem-cells = <&macaddr_factory_a002a>;
nvmem-cells = <&macaddr_lan>;
nvmem-cell-names = "mac-address";
fixed-link {
@ -95,22 +88,16 @@
pinctrl-0 = <&spi0_flash_pins>;
status = "okay";
spi_nand: flash@0 {
spi_nand@0 {
compatible = "spi-nand";
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-nand";
reg = <0>;
spi-max-frequency = <52000000>;
spi-cal-enable;
spi-cal-mode = "read-data";
spi-cal-datalen = <7>;
spi-cal-data = /bits/ 8 <0x53 0x50 0x49 0x4E 0x41 0x4E 0x44>;
spi-cal-addrlen = <5>;
spi-cal-addr = /bits/ 32 <0x0 0x0 0x0 0x0 0x0>;
spi-tx-buswidth = <4>;
spi-rx-buswidth = <4>;
mediatek,nmbm;
mediatek,bmt-max-ratio = <1>;
mediatek,bmt-max-reserved-blocks = <64>;
@ -121,40 +108,31 @@
#size-cells = <1>;
partition@0 {
label = "BL2";
reg = <0x00000 0x100000>;
label = "bl2";
reg = <0x0000000 0x0100000>;
read-only;
};
partition@100000 {
label = "u-boot-env";
reg = <0x100000 0x80000>;
reg = <0x0100000 0x0080000>;
};
factory: partition@180000 {
label = "Factory";
reg = <0x180000 0x200000>;
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_factory_a002a: macaddr@a002a {
reg = <0xa002a 0x6>;
};
macaddr_factory_a0024: macaddr@a0024 {
reg = <0xa0024 0x6>;
};
reg = <0x0180000 0x0200000>;
read-only;
};
partition@380000 {
label = "FIP";
reg = <0x380000 0x200000>;
label = "fip";
reg = <0x0380000 0x0200000>;
read-only;
};
partition@580000 {
label = "ubi";
reg = <0x580000 0x6e80000>;
reg = <0x0580000 0x7000000>;
};
};
};
@ -168,8 +146,7 @@
port@0 {
reg = <0>;
label = "wan";
nvmem-cells = <&macaddr_factory_a0024>;
nvmem-cells = <&macaddr_wan>;
nvmem-cell-names = "mac-address";
};
@ -190,6 +167,7 @@
port@6 {
reg = <6>;
label = "cpu";
ethernet = <&gmac0>;
phy-mode = "2500base-x";
@ -212,13 +190,13 @@
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
drive-strength = <8>;
bias-pull-up = <103>;
mediatek,pull-up-adv = <0>; /* bias-disable */
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
drive-strength = <8>;
bias-pull-down = <103>;
mediatek,pull-up-adv = <0>; /* bias-disable */
};
};
};
@ -236,3 +214,17 @@
mediatek,mtd-eeprom = <&factory 0x0>;
};
&factory {
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_wan: macaddr@a0024 {
reg = <0xa0024 0x6>;
};
macaddr_lan: macaddr@a002a {
reg = <0xa002a 0x6>;
};
};

10
target/linux/mediatek/filogic/base-files/etc/board.d/02_network
View File

@ -14,6 +14,11 @@ mediatek_setup_interfaces()
bananapi,bpi-r3)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4 sfp2" "eth1 wan"
;;
cetron,ct3003|\
jcg,q30-pro|\
qihoo,360t7)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" wan
;;
glinet,gl-mt3000)
ucidef_set_interfaces_lan_wan eth1 eth0
;;
@ -27,11 +32,6 @@ mediatek_setup_interfaces()
mediatek,mt7986b-rfb)
ucidef_set_interfaces_lan_wan "lan0 lan1 lan2 lan3" eth1
;;
cetron,ct3003|\
jcg,q30_pro|\
qihoo,360t7)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3" wan
;;
tplink,tl-xdr4288|\
tplink,tl-xdr6088)
ucidef_set_interfaces_lan_wan "lan1 lan2 lan3 lan4 lan5" eth1

7
target/linux/mediatek/filogic/base-files/etc/hotplug.d/ieee80211/11_fix_wifi_mac
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@ -34,9 +34,10 @@ case "$board" in
[ "$PHYNBR" = "0" ] && macaddr_add $addr 2 > /sys${DEVPATH}/macaddress
[ "$PHYNBR" = "1" ] && macaddr_add $addr 3 > /sys${DEVPATH}/macaddress
;;
jcg,q30_pro)
[ "$PHYNBR" = "1" ] && \
macaddr_setbit_la "$(mtd_get_mac_binary Factory 0x4)" > /sys${DEVPATH}/macaddress
jcg,q30-pro)
# Originally, phy1 is phy0 mac with LA bit set. However, this would conflict
# addresses on multiple VIFs with the other radio. Use label mac to set LA bit.
[ "$PHYNBR" = "1" ] && macaddr_setbit_la $(get_mac_label) > /sys${DEVPATH}/macaddress
;;
qihoo,360t7)
addr=$(mtd_get_mac_ascii factory lanMac)

49
target/linux/mediatek/image/filogic.mk
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@ -164,6 +164,20 @@ define Device/cetron_ct3003
endef
TARGET_DEVICES += cetron_ct3003
define Device/cetron_ct3003-mod
DEVICE_VENDOR := Cetron
DEVICE_MODEL := CT3003 (U-Boot mod)
DEVICE_DTS := mt7981b-cetron-ct3003-mod
DEVICE_DTS_DIR := ../dts
DEVICE_PACKAGES := kmod-mt7981-firmware mt7981-wo-firmware
UBINIZE_OPTS := -E 5
BLOCKSIZE := 128k
PAGESIZE := 2048
KERNEL_IN_UBI := 1
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
endef
TARGET_DEVICES += cetron_ct3003-mod
define Device/glinet_gl-mt3000
DEVICE_VENDOR := GL.iNet
DEVICE_MODEL := GL-MT3000
@ -204,6 +218,20 @@ define Device/h3c_magic-nx30-pro
endef
TARGET_DEVICES += h3c_magic-nx30-pro
define Device/jcg_q30-pro
DEVICE_VENDOR := JCG
DEVICE_MODEL := Q30 PRO
DEVICE_DTS := mt7981b-jcg-q30-pro
DEVICE_DTS_DIR := ../dts
UBINIZE_OPTS := -E 5
BLOCKSIZE := 128k
PAGESIZE := 2048
KERNEL_IN_UBI := 1
DEVICE_PACKAGES := kmod-mt7981-firmware mt7981-wo-firmware
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
endef
TARGET_DEVICES += jcg_q30-pro
define Device/mediatek_mt7986a-rfb
DEVICE_VENDOR := MediaTek
DEVICE_MODEL := MTK7986 rfba AP
@ -245,27 +273,6 @@ define Device/mediatek_mt7986b-rfb
endef
TARGET_DEVICES += mediatek_mt7986b-rfb
define Device/jcg_q30_pro
DEVICE_VENDOR := JCG
DEVICE_MODEL := Q30 Pro
DEVICE_DTS := mt7981b-jcg-q30_pro
DEVICE_DTS_DIR := ../dts
DEVICE_PACKAGES := kmod-mt7981-firmware mt7981-wo-firmware
UBINIZE_OPTS := -E 5
BLOCKSIZE := 128k
PAGESIZE := 2048
IMAGE_SIZE := 113152k
KERNEL_IN_UBI := 1
IMAGES += factory.bin
IMAGE/factory.bin := append-ubi | check-size $$$$(IMAGE_SIZE)
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
KERNEL = kernel-bin | lzma | \
fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb
KERNEL_INITRAMFS = kernel-bin | lzma | \
fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd
endef
TARGET_DEVICES += jcg_q30_pro
define Device/qihoo_360t7
DEVICE_VENDOR := Qihoo
DEVICE_MODEL := 360T7