mediatek: add support for Cetron CT3003

**Hardware specification:**

- SoC: MediaTek MT7981B 2x A53
- Flash: ESMT F50L1G41LB 128MB
- RAM: Nanya NT5CC128M16JR-EK 256MB
- Ethernet: 4 x 10/100/1000 Mbps
- Switch: MediaTek MT7531AE
- WiFi: MediaTek MT7976C
- Button: Reset, Mesh
- Power: DC 12V 1A
- UART: 3.3v, 115200n8

**Flash instructions:**

1. Rename `openwrt-mediatek-filogic-cetron_ct3003-squashfs-factory.bin` to `factory.bin`.
2. Upload the `factory.bin` using the device's Web interface.
3. Click the upgrade button and wait for the process to finish.
4. Access the OpenWrt interface using the same password.
5. Use the 'Restore' function to reset the firmware to its initial state.

**Notes:**

If you plan to recovery the stock firmware in the future, it's advisable
to connect the device via the serial port and enter failsafe mode to
back up all the MTD partitions before proceeding the steps above.

Signed-off-by: Patricia Lee <patricialee320@gmail.com>
This commit is contained in:
Patricia Lee 2023-08-30 19:50:54 +08:00
parent 407fe3d689
commit 2fdceb465c
3 changed files with 64 additions and 54 deletions
target/linux/mediatek
dts
filogic/base-files/etc/hotplug.d/ieee80211
image

View File

@ -1,7 +1,4 @@
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright (C) 2023 Tianling Shen <cnsztl@immortalwrt.org>
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
@ -10,15 +7,15 @@
#include "mt7981.dtsi"
/ {
model = "CETRON CT3003";
model = "Cetron CT3003";
compatible = "cetron,ct3003", "mediatek,mt7981";
aliases {
led-boot = &status_red_led;
led-failsafe = &status_red_led;
led-running = &status_green_led;
led-upgrade = &status_green_led;
serial0 = &uart0;
led-boot = &led_status_red;
led-failsafe = &led_status_red;
led-running = &led_status_green;
led-upgrade = &led_status_green;
};
chosen {
@ -32,28 +29,28 @@
gpio-keys {
compatible = "gpio-keys";
button-reset {
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&pio 1 GPIO_ACTIVE_LOW>;
};
button-wps {
wps {
label = "wps";
linux,code = <KEY_WPS_BUTTON>;
gpios = <&pio 0 GPIO_ACTIVE_HIGH>;
};
};
gpio-leds {
leds {
compatible = "gpio-leds";
status_red_led: led-0 {
led_status_red: led_status_red {
label = "red:status";
gpios = <&pio 3 GPIO_ACTIVE_LOW>;
};
status_green_led: led-1 {
led_status_green: led_status_green {
label = "green:status";
gpios = <&pio 7 GPIO_ACTIVE_LOW>;
};
@ -61,9 +58,6 @@
};
&eth {
pinctrl-names = "default";
pinctrl-0 = <&mdio_pins>;
status = "okay";
gmac0: mac@0 {
@ -71,8 +65,8 @@
reg = <0>;
phy-mode = "2500base-x";
nvmem-cells = <&macaddr_art_7b>;
nvmem-cell-names = "mac-address-ascii";
nvmem-cells = <&macaddr_art_0>;
nvmem-cell-names = "mac-address";
fixed-link {
speed = <2500>;
@ -99,22 +93,16 @@
pinctrl-0 = <&spi0_flash_pins>;
status = "okay";
spi_nand: flash@0 {
spi_nand@0 {
compatible = "spi-nand";
#address-cells = <1>;
#size-cells = <1>;
compatible = "spi-nand";
reg = <0>;
spi-max-frequency = <52000000>;
spi-cal-enable;
spi-cal-mode = "read-data";
spi-cal-datalen = <7>;
spi-cal-data = /bits/ 8 <0x53 0x50 0x49 0x4E 0x41 0x4E 0x44>;
spi-cal-addrlen = <5>;
spi-cal-addr = /bits/ 32 <0x0 0x0 0x0 0x0 0x0>;
spi-tx-buswidth = <4>;
spi-rx-buswidth = <4>;
mediatek,nmbm;
mediatek,bmt-max-ratio = <1>;
mediatek,bmt-max-reserved-blocks = <64>;
@ -126,42 +114,54 @@
partition@0 {
label = "BL2";
reg = <0x00000 0x100000>;
reg = <0x0000000 0x0100000>;
read-only;
};
partition@100000 {
label = "u-boot-env";
reg = <0x100000 0x80000>;
reg = <0x0100000 0x0080000>;
};
partition@180000 {
label = "art";
reg = <0x180000 0x100000>;
reg = <0x0180000 0x0100000>;
read-only;
compatible = "nvmem-cells";
#address-cells = <1>;
#size-cells = <1>;
macaddr_art_7b: macaddr@7b {
reg = <0x7b 0x11>;
macaddr_art_0: macaddr@0 {
reg = <0x0 0x6>;
};
};
factory: partition@280000 {
label = "Factory";
reg = <0x280000 0x100000>;
reg = <0x0280000 0x0100000>;
read-only;
};
partition@380000 {
label = "FIP";
reg = <0x380000 0x200000>;
reg = <0x0380000 0x0200000>;
read-only;
};
partition@580000 {
label = "ubi";
reg = <0x580000 0x6e80000>;
reg = <0x0580000 0x2000000>;
};
partition@2580000 {
label = "ubi_backup";
reg = <0x2580000 0x2000000>;
};
partition@4580000 {
label = "Config_backup";
reg = <0x4580000 0x0400000>;
};
};
};
@ -190,9 +190,8 @@
port@3 {
reg = <3>;
label = "wan";
nvmem-cells = <&macaddr_art_7b>;
nvmem-cell-names = "mac-address-ascii";
nvmem-cells = <&macaddr_art_0>;
nvmem-cell-names = "mac-address";
mac-address-increment = <3>;
};
@ -219,14 +218,14 @@
conf-pu {
pins = "SPI0_CS", "SPI0_HOLD", "SPI0_WP";
drive-strength = <8>;
bias-pull-up = <103>;
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-up = <MTK_PUPD_SET_R1R0_11>;
};
conf-pd {
pins = "SPI0_CLK", "SPI0_MOSI", "SPI0_MISO";
drive-strength = <8>;
bias-pull-down = <103>;
drive-strength = <MTK_DRIVE_8mA>;
bias-pull-down = <MTK_PUPD_SET_R1R0_11>;
};
};
};

View File

@ -25,9 +25,9 @@ case "$board" in
[ "$PHYNBR" = "1" ] && macaddr_setbit $addr 6 > /sys${DEVPATH}/macaddress
;;
cetron,ct3003)
addr=$(cat /sys/class/net/eth0/address)
addr=$(mtd_get_mac_binary "art" 0)
[ "$PHYNBR" = "0" ] && macaddr_add $addr 1 > /sys${DEVPATH}/macaddress
[ "$PHYNBR" = "1" ] && macaddr_add $addr 2 > /sys${DEVPATH}/macaddress
[ "$PHYNBR" = "1" ] && macaddr_setbit_la $(macaddr_add $addr 2) > /sys${DEVPATH}/macaddress
;;
h3c,magic-nx30-pro)
addr=$(mtd_get_mac_ascii pdt_data_1 ethaddr)

View File

@ -67,6 +67,21 @@ define Build/append-gl-metadata
}
endef
define Build/cetron-header
$(eval magic=$(word 1,$(1)))
$(eval model=$(word 2,$(1)))
( \
dd if=/dev/zero bs=856 count=1 2>/dev/null; \
printf "$(model)," | dd bs=128 count=1 conv=sync 2>/dev/null; \
md5sum $@ | cut -f1 -d" " | dd bs=32 count=1 2>/dev/null; \
printf "$(magic)" | dd bs=4 count=1 conv=sync 2>/dev/null; \
cat $@; \
) > $@.tmp
fw_crc=$$(gzip -c $@.tmp | tail -c 8 | od -An -N4 -tx4 --endian little | tr -d ' \n'); \
printf "$$(echo $$fw_crc | sed 's/../\\x&/g')" | cat - $@.tmp > $@
rm $@.tmp
endef
define Device/asus_tuf-ax4200
DEVICE_VENDOR := ASUS
DEVICE_MODEL := TUF-AX4200
@ -133,23 +148,19 @@ TARGET_DEVICES += bananapi_bpi-r3
define Device/cetron_ct3003
DEVICE_VENDOR := CETRON
DEVICE_VENDOR := Cetron
DEVICE_MODEL := CT3003
DEVICE_DTS := mt7981b-cetron-ct3003
DEVICE_DTS_DIR := ../dts
SUPPORTED_DEVICES += mediatek,mt7981-spim-snand-rfb
DEVICE_PACKAGES := kmod-mt7981-firmware mt7981-wo-firmware
UBINIZE_OPTS := -E 5
BLOCKSIZE := 128k
PAGESIZE := 2048
IMAGE_SIZE := 113152k
KERNEL_IN_UBI := 1
IMAGES += factory.bin
IMAGE/factory.bin := append-ubi | check-size $$$$(IMAGE_SIZE)
IMAGE/sysupgrade.bin := sysupgrade-tar | append-metadata
KERNEL = kernel-bin | lzma | \
fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb
KERNEL_INITRAMFS = kernel-bin | lzma | \
fit lzma $$(KDIR)/image-$$(firstword $$(DEVICE_DTS)).dtb with-initrd
IMAGES += factory.bin
IMAGE/factory.bin := $$(IMAGE/sysupgrade.bin) | cetron-header rd30 CT3003
endef
TARGET_DEVICES += cetron_ct3003