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https://github.com/coolsnowwolf/lede.git
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rockchip: add h68k/h69k hardware v2 support
Hard-coded PHY id due to hardware problem.
This commit is contained in:
parent
27cc27f2ac
commit
26f3634631
@ -429,7 +429,6 @@ CONFIG_PADATA=y
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CONFIG_PAGE_POOL=y
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CONFIG_PAGE_POOL=y
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CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
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CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
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CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
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CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
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CONFIG_PAHOLE_VERSION=0
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# CONFIG_PANIC_ON_OOPS is not set
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# CONFIG_PANIC_ON_OOPS is not set
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CONFIG_PANIC_ON_OOPS_VALUE=0
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CONFIG_PANIC_ON_OOPS_VALUE=0
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CONFIG_PANIC_TIMEOUT=0
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CONFIG_PANIC_TIMEOUT=0
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@ -143,6 +143,13 @@
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sound-dai = <&rk809>;
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sound-dai = <&rk809>;
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};
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};
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};
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};
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pwm-fan {
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compatible = "pwm-fan";
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cooling-levels = <0 100 150 200 255>;
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#cooling-cells = <2>;
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pwms = <&pwm0 0 50000 0>;
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};
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};
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};
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&combphy0 {
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&combphy0 {
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@ -552,6 +559,10 @@
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status = "okay";
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status = "okay";
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};
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};
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&pwm0 {
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status = "okay";
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};
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&rng {
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&rng {
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status = "okay";
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status = "okay";
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};
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};
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@ -58,15 +58,17 @@
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};
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};
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&mdio0 {
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&mdio0 {
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rgmii_phy0: ethernet-phy@0 {
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rgmii_phy0: phy@0 {
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compatible = "ethernet-phy-ieee802.3-c22";
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compatible = "ethernet-phy-id001c.c916",
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"ethernet-phy-ieee802.3-c22";
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reg = <0x0>;
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reg = <0x0>;
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};
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};
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};
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};
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&mdio1 {
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&mdio1 {
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rgmii_phy1: ethernet-phy@0 {
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rgmii_phy1: phy@0 {
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compatible = "ethernet-phy-ieee802.3-c22";
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compatible = "ethernet-phy-id001c.c916",
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"ethernet-phy-ieee802.3-c22";
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reg = <0x0>;
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reg = <0x0>;
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};
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};
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};
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};
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@ -13,21 +13,21 @@
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ethernet0 = &gmac0;
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ethernet0 = &gmac0;
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ethernet1 = &gmac1;
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ethernet1 = &gmac1;
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};
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};
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};
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&cpu0_opp_table {
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vcc5v0_ahci: vcc5v0-ahci {
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/delete-node/ opp-1608000000;
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compatible = "regulator-fixed";
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/delete-node/ opp-1800000000;
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enable-active-high;
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/delete-node/ opp-1992000000;
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gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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pinctrl-0 = <&sata_pwr_en>;
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regulator-always-on;
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regulator-min-microvolt = <5000000>;
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regulator-max-microvolt = <5000000>;
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regulator-name = "vcc5v0_ahci";
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vin-supply = <&vcc5v0_sys>;
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};
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};
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};
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#ifdef DTS_NO_LEGACY
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&gpu_opp_table {
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/delete-node/ opp-700000000;
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/delete-node/ opp-800000000;
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};
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#endif
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&gmac0 {
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&gmac0 {
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assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
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assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
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assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>;
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assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>;
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@ -71,19 +71,33 @@
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};
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};
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&mdio0 {
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&mdio0 {
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rgmii_phy0: ethernet-phy@0 {
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rgmii_phy0: phy@0 {
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compatible = "ethernet-phy-ieee802.3-c22";
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compatible = "ethernet-phy-id001c.c916",
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"ethernet-phy-ieee802.3-c22";
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reg = <0x0>;
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reg = <0x0>;
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};
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};
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};
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};
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&mdio1 {
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&mdio1 {
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rgmii_phy1: ethernet-phy@0 {
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rgmii_phy1: phy@0 {
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compatible = "ethernet-phy-ieee802.3-c22";
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compatible = "ethernet-phy-id001c.c916",
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"ethernet-phy-ieee802.3-c22";
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reg = <0x0>;
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reg = <0x0>;
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};
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};
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};
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};
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&pinctrl {
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sata {
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sata_pwr_en: sata-pwr-en {
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rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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};
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&sata0 {
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target-supply = <&vcc5v0_ahci>;
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};
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&vcc3v3_pcie {
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&vcc3v3_pcie {
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gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
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gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
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};
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};
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@ -46,7 +46,7 @@ define Device/hinlink_common
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DEVICE_VENDOR := HINLINK
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DEVICE_VENDOR := HINLINK
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UBOOT_DEVICE_NAME := opc-h68k-rk3568
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UBOOT_DEVICE_NAME := opc-h68k-rk3568
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IMAGE/sysupgrade.img.gz := boot-common | boot-script nanopi-r5s | pine64-img | gzip | append-metadata
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IMAGE/sysupgrade.img.gz := boot-common | boot-script nanopi-r5s | pine64-img | gzip | append-metadata
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DEVICE_PACKAGES := kmod-ata-ahci-platform kmod-mt7921e kmod-r8125 kmod-usb-serial-cp210x wpad-openssl
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DEVICE_PACKAGES := kmod-ata-ahci-platform kmod-hwmon-pwmfan kmod-mt7921e kmod-r8125 wpad-openssl
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endef
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endef
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define Device/hinlink_opc-h66k
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define Device/hinlink_opc-h66k
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