From 26f3634631244eedfbdfd61ea6cc3a2d7f5d896f Mon Sep 17 00:00:00 2001
From: AmadeusGhost <42570690+AmadeusGhost@users.noreply.github.com>
Date: Thu, 27 Apr 2023 23:40:28 +0800
Subject: [PATCH] rockchip: add h68k/h69k hardware v2 support

Hard-coded PHY id due to hardware problem.
---
 target/linux/rockchip/armv8/config-6.1        |  1 -
 .../boot/dts/rockchip/rk3568-hinlink-opc.dtsi | 11 +++++
 .../boot/dts/rockchip/rk3568-opc-h68k.dts     | 10 ++--
 .../boot/dts/rockchip/rk3568-opc-h69k.dts     | 46 ++++++++++++-------
 target/linux/rockchip/image/armv8.mk          |  2 +-
 5 files changed, 48 insertions(+), 22 deletions(-)

diff --git a/target/linux/rockchip/armv8/config-6.1 b/target/linux/rockchip/armv8/config-6.1
index e505d1461..871f8f09d 100644
--- a/target/linux/rockchip/armv8/config-6.1
+++ b/target/linux/rockchip/armv8/config-6.1
@@ -429,7 +429,6 @@ CONFIG_PADATA=y
 CONFIG_PAGE_POOL=y
 CONFIG_PAGE_SIZE_LESS_THAN_256KB=y
 CONFIG_PAGE_SIZE_LESS_THAN_64KB=y
-CONFIG_PAHOLE_VERSION=0
 # CONFIG_PANIC_ON_OOPS is not set
 CONFIG_PANIC_ON_OOPS_VALUE=0
 CONFIG_PANIC_TIMEOUT=0
diff --git a/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-hinlink-opc.dtsi b/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-hinlink-opc.dtsi
index c6146a733..b50dbc2d8 100644
--- a/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-hinlink-opc.dtsi
+++ b/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-hinlink-opc.dtsi
@@ -143,6 +143,13 @@
 			sound-dai = <&rk809>;
 		};
 	};
+
+	pwm-fan {
+		compatible = "pwm-fan";
+		cooling-levels = <0 100 150 200 255>;
+		#cooling-cells = <2>;
+		pwms = <&pwm0 0 50000 0>;
+	};
 };
 
 &combphy0 {
@@ -552,6 +559,10 @@
 	status = "okay";
 };
 
+&pwm0 {
+	status = "okay";
+};
+
 &rng {
 	status = "okay";
 };
diff --git a/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-opc-h68k.dts b/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-opc-h68k.dts
index befa4ee8d..4fee21580 100644
--- a/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-opc-h68k.dts
+++ b/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-opc-h68k.dts
@@ -58,15 +58,17 @@
 };
 
 &mdio0 {
-	rgmii_phy0: ethernet-phy@0 {
-		compatible = "ethernet-phy-ieee802.3-c22";
+	rgmii_phy0: phy@0 {
+		compatible = "ethernet-phy-id001c.c916",
+			     "ethernet-phy-ieee802.3-c22";
 		reg = <0x0>;
 	};
 };
 
 &mdio1 {
-	rgmii_phy1: ethernet-phy@0 {
-		compatible = "ethernet-phy-ieee802.3-c22";
+	rgmii_phy1: phy@0 {
+		compatible = "ethernet-phy-id001c.c916",
+			     "ethernet-phy-ieee802.3-c22";
 		reg = <0x0>;
 	};
 };
diff --git a/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-opc-h69k.dts b/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-opc-h69k.dts
index 32ca60c95..b3d7113d4 100644
--- a/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-opc-h69k.dts
+++ b/target/linux/rockchip/files/arch/arm64/boot/dts/rockchip/rk3568-opc-h69k.dts
@@ -13,21 +13,21 @@
 		ethernet0 = &gmac0;
 		ethernet1 = &gmac1;
 	};
-};
 
-&cpu0_opp_table {
-	/delete-node/ opp-1608000000;
-	/delete-node/ opp-1800000000;
-	/delete-node/ opp-1992000000;
+	vcc5v0_ahci: vcc5v0-ahci {
+		compatible = "regulator-fixed";
+		enable-active-high;
+		gpio = <&gpio0 RK_PC5 GPIO_ACTIVE_HIGH>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&sata_pwr_en>;
+		regulator-always-on;
+		regulator-min-microvolt = <5000000>;
+		regulator-max-microvolt = <5000000>;
+		regulator-name = "vcc5v0_ahci";
+		vin-supply = <&vcc5v0_sys>;
+	};
 };
 
-#ifdef DTS_NO_LEGACY
-&gpu_opp_table {
-	/delete-node/ opp-700000000;
-	/delete-node/ opp-800000000;
-};
-#endif
-
 &gmac0 {
 	assigned-clocks = <&cru SCLK_GMAC0_RX_TX>, <&cru SCLK_GMAC0>;
 	assigned-clock-parents = <&cru SCLK_GMAC0_RGMII_SPEED>;
@@ -71,19 +71,33 @@
 };
 
 &mdio0 {
-	rgmii_phy0: ethernet-phy@0 {
-		compatible = "ethernet-phy-ieee802.3-c22";
+	rgmii_phy0: phy@0 {
+		compatible = "ethernet-phy-id001c.c916",
+			     "ethernet-phy-ieee802.3-c22";
 		reg = <0x0>;
 	};
 };
 
 &mdio1 {
-	rgmii_phy1: ethernet-phy@0 {
-		compatible = "ethernet-phy-ieee802.3-c22";
+	rgmii_phy1: phy@0 {
+		compatible = "ethernet-phy-id001c.c916",
+			     "ethernet-phy-ieee802.3-c22";
 		reg = <0x0>;
 	};
 };
 
+&pinctrl {
+	sata {
+		sata_pwr_en: sata-pwr-en {
+			rockchip,pins = <0 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+};
+
+&sata0 {
+	target-supply = <&vcc5v0_ahci>;
+};
+
 &vcc3v3_pcie {
 	gpio = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>;
 };
diff --git a/target/linux/rockchip/image/armv8.mk b/target/linux/rockchip/image/armv8.mk
index b98e87ccb..7f47e1a6a 100644
--- a/target/linux/rockchip/image/armv8.mk
+++ b/target/linux/rockchip/image/armv8.mk
@@ -46,7 +46,7 @@ define Device/hinlink_common
   DEVICE_VENDOR := HINLINK
   UBOOT_DEVICE_NAME := opc-h68k-rk3568
   IMAGE/sysupgrade.img.gz := boot-common | boot-script nanopi-r5s | pine64-img | gzip | append-metadata
-  DEVICE_PACKAGES := kmod-ata-ahci-platform kmod-mt7921e kmod-r8125 kmod-usb-serial-cp210x wpad-openssl
+  DEVICE_PACKAGES := kmod-ata-ahci-platform kmod-hwmon-pwmfan kmod-mt7921e kmod-r8125 wpad-openssl
 endef
 
 define Device/hinlink_opc-h66k