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fb42176cd1
Import commits from upstream Linux replacing some downstream patches.
Move accepted patches from pending-{5.15,6.1} to backport-{5.15,6.1}.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
45 lines
1.8 KiB
Diff
45 lines
1.8 KiB
Diff
From 489aea123d74a846ce746bfdb3efe1e7ad512e0d Mon Sep 17 00:00:00 2001
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From: Daniel Golle <daniel@makrotopia.org>
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Date: Tue, 22 Aug 2023 17:31:24 +0100
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Subject: [PATCH 110/250] net: ethernet: mtk_eth_soc: fix register definitions
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for MT7988
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More register macros need to be adjusted for the 3rd GMAC on MT7988.
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Account for added bit in SYSCFG0_SGMII_MASK.
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Fixes: 445eb6448ed3 ("net: ethernet: mtk_eth_soc: add basic support for MT7988 SoC")
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Signed-off-by: Daniel Golle <daniel@makrotopia.org>
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Reviewed-by: Simon Horman <horms@kernel.org>
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Link: https://lore.kernel.org/r/1c8da012e2ca80939906d85f314138c552139f0f.1692721443.git.daniel@makrotopia.org
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Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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---
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drivers/net/ethernet/mediatek/mtk_eth_soc.h | 8 +++++---
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1 file changed, 5 insertions(+), 3 deletions(-)
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--- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
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+++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
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@@ -133,10 +133,12 @@
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#define MTK_GDMA_XGDM_SEL BIT(31)
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/* Unicast Filter MAC Address Register - Low */
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-#define MTK_GDMA_MAC_ADRL(x) (0x508 + (x * 0x1000))
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+#define MTK_GDMA_MAC_ADRL(x) ({ typeof(x) _x = (x); (_x == MTK_GMAC3_ID) ? \
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+ 0x548 : 0x508 + (_x * 0x1000); })
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/* Unicast Filter MAC Address Register - High */
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-#define MTK_GDMA_MAC_ADRH(x) (0x50C + (x * 0x1000))
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+#define MTK_GDMA_MAC_ADRH(x) ({ typeof(x) _x = (x); (_x == MTK_GMAC3_ID) ? \
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+ 0x54C : 0x50C + (_x * 0x1000); })
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/* FE global misc reg*/
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#define MTK_FE_GLO_MISC 0x124
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@@ -500,7 +502,7 @@
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#define ETHSYS_SYSCFG0 0x14
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#define SYSCFG0_GE_MASK 0x3
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#define SYSCFG0_GE_MODE(x, y) (x << (12 + (y * 2)))
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-#define SYSCFG0_SGMII_MASK GENMASK(9, 8)
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+#define SYSCFG0_SGMII_MASK GENMASK(9, 7)
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#define SYSCFG0_SGMII_GMAC1 ((2 << 8) & SYSCFG0_SGMII_MASK)
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#define SYSCFG0_SGMII_GMAC2 ((3 << 8) & SYSCFG0_SGMII_MASK)
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#define SYSCFG0_SGMII_GMAC1_V2 BIT(9)
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