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101 lines
3.0 KiB
Diff
101 lines
3.0 KiB
Diff
From 28a3cea6641607c7fd717516c38351d891d3e5cb Mon Sep 17 00:00:00 2001
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From: Robert Marko <robimarko@gmail.com>
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Date: Sun, 13 Mar 2022 13:01:55 +0100
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Subject: [PATCH] clk: qcom: ipq8074: set BRANCH_HALT_DELAY flag for UBI clocks
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Currently, attempting to enable the UBI clocks will cause the stuck at
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off warning to be printed and clk_enable will fail.
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[ 14.936694] gcc_ubi1_ahb_clk status stuck at 'off'
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Downstream 5.4 QCA kernel has fixed this by seting the BRANCH_HALT_DELAY
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flag on UBI clocks, so lets do the same.
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Signed-off-by: Robert Marko <robimarko@gmail.com>
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---
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drivers/clk/qcom/gcc-ipq8074.c | 10 ++++++++++
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1 file changed, 10 insertions(+)
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--- a/drivers/clk/qcom/gcc-ipq8074.c
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+++ b/drivers/clk/qcom/gcc-ipq8074.c
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@@ -3372,6 +3372,7 @@ static struct clk_branch gcc_nssnoc_ubi1
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static struct clk_branch gcc_ubi0_ahb_clk = {
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.halt_reg = 0x6820c,
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+ .halt_check = BRANCH_HALT_DELAY,
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.clkr = {
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.enable_reg = 0x6820c,
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.enable_mask = BIT(0),
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@@ -3389,6 +3390,7 @@ static struct clk_branch gcc_ubi0_ahb_cl
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static struct clk_branch gcc_ubi0_axi_clk = {
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.halt_reg = 0x68200,
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+ .halt_check = BRANCH_HALT_DELAY,
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.clkr = {
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.enable_reg = 0x68200,
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.enable_mask = BIT(0),
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@@ -3406,6 +3408,7 @@ static struct clk_branch gcc_ubi0_axi_cl
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static struct clk_branch gcc_ubi0_nc_axi_clk = {
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.halt_reg = 0x68204,
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+ .halt_check = BRANCH_HALT_DELAY,
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.clkr = {
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.enable_reg = 0x68204,
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.enable_mask = BIT(0),
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@@ -3423,6 +3426,7 @@ static struct clk_branch gcc_ubi0_nc_axi
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static struct clk_branch gcc_ubi0_core_clk = {
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.halt_reg = 0x68210,
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+ .halt_check = BRANCH_HALT_DELAY,
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.clkr = {
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.enable_reg = 0x68210,
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.enable_mask = BIT(0),
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@@ -3440,6 +3444,7 @@ static struct clk_branch gcc_ubi0_core_c
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static struct clk_branch gcc_ubi0_mpt_clk = {
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.halt_reg = 0x68208,
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+ .halt_check = BRANCH_HALT_DELAY,
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.clkr = {
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.enable_reg = 0x68208,
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.enable_mask = BIT(0),
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@@ -3457,6 +3462,7 @@ static struct clk_branch gcc_ubi0_mpt_cl
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static struct clk_branch gcc_ubi1_ahb_clk = {
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.halt_reg = 0x6822c,
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+ .halt_check = BRANCH_HALT_DELAY,
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.clkr = {
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.enable_reg = 0x6822c,
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.enable_mask = BIT(0),
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@@ -3474,6 +3480,7 @@ static struct clk_branch gcc_ubi1_ahb_cl
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static struct clk_branch gcc_ubi1_axi_clk = {
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.halt_reg = 0x68220,
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+ .halt_check = BRANCH_HALT_DELAY,
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.clkr = {
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.enable_reg = 0x68220,
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.enable_mask = BIT(0),
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@@ -3491,6 +3498,7 @@ static struct clk_branch gcc_ubi1_axi_cl
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static struct clk_branch gcc_ubi1_nc_axi_clk = {
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.halt_reg = 0x68224,
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+ .halt_check = BRANCH_HALT_DELAY,
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.clkr = {
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.enable_reg = 0x68224,
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.enable_mask = BIT(0),
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@@ -3508,6 +3516,7 @@ static struct clk_branch gcc_ubi1_nc_axi
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static struct clk_branch gcc_ubi1_core_clk = {
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.halt_reg = 0x68230,
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+ .halt_check = BRANCH_HALT_DELAY,
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.clkr = {
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.enable_reg = 0x68230,
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.enable_mask = BIT(0),
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@@ -3525,6 +3534,7 @@ static struct clk_branch gcc_ubi1_core_c
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static struct clk_branch gcc_ubi1_mpt_clk = {
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.halt_reg = 0x68228,
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+ .halt_check = BRANCH_HALT_DELAY,
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.clkr = {
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.enable_reg = 0x68228,
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.enable_mask = BIT(0),
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