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https://github.com/coolsnowwolf/lede.git
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d926f4d75f
The MediaTek Ethernet PHY drivers are going to be used by multiple targets (airoha, mediatek, ramips). Add generic backports of changes required for recently added Ethernet PHYs. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
272 lines
11 KiB
Diff
272 lines
11 KiB
Diff
From c0dc1b412f9d840c51c5ee8927bf066e15a59550 Mon Sep 17 00:00:00 2001
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From: "SkyLake.Huang" <skylake.huang@mediatek.com>
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Date: Thu, 17 Oct 2024 11:22:12 +0800
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Subject: [PATCH 02/20] net: phy: mediatek-ge-soc: Shrink line wrapping to 80
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characters
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This patch shrinks line wrapping to 80 chars. Also, in
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tx_amp_fill_result(), use FIELD_PREP() to prettify code.
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Signed-off-by: SkyLake.Huang <skylake.huang@mediatek.com>
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Reviewed-by: Simon Horman <horms@kernel.org>
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Signed-off-by: Andrew Lunn <andrew@lunn.ch>
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---
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drivers/net/phy/mediatek-ge-soc.c | 125 +++++++++++++++++++++---------
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1 file changed, 88 insertions(+), 37 deletions(-)
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--- a/drivers/net/phy/mediatek-ge-soc.c
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+++ b/drivers/net/phy/mediatek-ge-soc.c
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@@ -342,7 +342,8 @@ static int cal_cycle(struct phy_device *
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ret = phy_read_mmd_poll_timeout(phydev, MDIO_MMD_VEND1,
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MTK_PHY_RG_AD_CAL_CLK, reg_val,
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reg_val & MTK_PHY_DA_CAL_CLK, 500,
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- ANALOG_INTERNAL_OPERATION_MAX_US, false);
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+ ANALOG_INTERNAL_OPERATION_MAX_US,
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+ false);
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if (ret) {
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phydev_err(phydev, "Calibration cycle timeout\n");
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return ret;
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@@ -441,40 +442,72 @@ static int tx_amp_fill_result(struct phy
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}
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phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_TXVLD_DA_RG,
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- MTK_PHY_DA_TX_I2MPB_A_GBE_MASK, (buf[0] + bias[0]) << 10);
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+ MTK_PHY_DA_TX_I2MPB_A_GBE_MASK,
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+ FIELD_PREP(MTK_PHY_DA_TX_I2MPB_A_GBE_MASK,
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+ buf[0] + bias[0]));
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phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_TXVLD_DA_RG,
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- MTK_PHY_DA_TX_I2MPB_A_TBT_MASK, buf[0] + bias[1]);
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+ MTK_PHY_DA_TX_I2MPB_A_TBT_MASK,
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+ FIELD_PREP(MTK_PHY_DA_TX_I2MPB_A_TBT_MASK,
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+ buf[0] + bias[1]));
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phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_TX_I2MPB_TEST_MODE_A2,
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- MTK_PHY_DA_TX_I2MPB_A_HBT_MASK, (buf[0] + bias[2]) << 10);
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+ MTK_PHY_DA_TX_I2MPB_A_HBT_MASK,
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+ FIELD_PREP(MTK_PHY_DA_TX_I2MPB_A_HBT_MASK,
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+ buf[0] + bias[2]));
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phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_TX_I2MPB_TEST_MODE_A2,
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- MTK_PHY_DA_TX_I2MPB_A_TST_MASK, buf[0] + bias[3]);
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+ MTK_PHY_DA_TX_I2MPB_A_TST_MASK,
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+ FIELD_PREP(MTK_PHY_DA_TX_I2MPB_A_TST_MASK,
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+ buf[0] + bias[3]));
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phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_TX_I2MPB_TEST_MODE_B1,
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- MTK_PHY_DA_TX_I2MPB_B_GBE_MASK, (buf[1] + bias[4]) << 8);
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+ MTK_PHY_DA_TX_I2MPB_B_GBE_MASK,
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+ FIELD_PREP(MTK_PHY_DA_TX_I2MPB_B_GBE_MASK,
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+ buf[1] + bias[4]));
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phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_TX_I2MPB_TEST_MODE_B1,
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- MTK_PHY_DA_TX_I2MPB_B_TBT_MASK, buf[1] + bias[5]);
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+ MTK_PHY_DA_TX_I2MPB_B_TBT_MASK,
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+ FIELD_PREP(MTK_PHY_DA_TX_I2MPB_B_TBT_MASK,
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+ buf[1] + bias[5]));
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phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_TX_I2MPB_TEST_MODE_B2,
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- MTK_PHY_DA_TX_I2MPB_B_HBT_MASK, (buf[1] + bias[6]) << 8);
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+ MTK_PHY_DA_TX_I2MPB_B_HBT_MASK,
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+ FIELD_PREP(MTK_PHY_DA_TX_I2MPB_B_HBT_MASK,
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+ buf[1] + bias[6]));
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phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_TX_I2MPB_TEST_MODE_B2,
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- MTK_PHY_DA_TX_I2MPB_B_TST_MASK, buf[1] + bias[7]);
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+ MTK_PHY_DA_TX_I2MPB_B_TST_MASK,
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+ FIELD_PREP(MTK_PHY_DA_TX_I2MPB_B_TST_MASK,
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+ buf[1] + bias[7]));
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phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_TX_I2MPB_TEST_MODE_C1,
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- MTK_PHY_DA_TX_I2MPB_C_GBE_MASK, (buf[2] + bias[8]) << 8);
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+ MTK_PHY_DA_TX_I2MPB_C_GBE_MASK,
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+ FIELD_PREP(MTK_PHY_DA_TX_I2MPB_C_GBE_MASK,
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+ buf[2] + bias[8]));
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phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_TX_I2MPB_TEST_MODE_C1,
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- MTK_PHY_DA_TX_I2MPB_C_TBT_MASK, buf[2] + bias[9]);
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+ MTK_PHY_DA_TX_I2MPB_C_TBT_MASK,
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+ FIELD_PREP(MTK_PHY_DA_TX_I2MPB_C_TBT_MASK,
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+ buf[2] + bias[9]));
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phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_TX_I2MPB_TEST_MODE_C2,
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- MTK_PHY_DA_TX_I2MPB_C_HBT_MASK, (buf[2] + bias[10]) << 8);
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+ MTK_PHY_DA_TX_I2MPB_C_HBT_MASK,
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+ FIELD_PREP(MTK_PHY_DA_TX_I2MPB_C_HBT_MASK,
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+ buf[2] + bias[10]));
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phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_TX_I2MPB_TEST_MODE_C2,
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- MTK_PHY_DA_TX_I2MPB_C_TST_MASK, buf[2] + bias[11]);
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+ MTK_PHY_DA_TX_I2MPB_C_TST_MASK,
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+ FIELD_PREP(MTK_PHY_DA_TX_I2MPB_C_TST_MASK,
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+ buf[2] + bias[11]));
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phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_TX_I2MPB_TEST_MODE_D1,
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- MTK_PHY_DA_TX_I2MPB_D_GBE_MASK, (buf[3] + bias[12]) << 8);
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+ MTK_PHY_DA_TX_I2MPB_D_GBE_MASK,
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+ FIELD_PREP(MTK_PHY_DA_TX_I2MPB_D_GBE_MASK,
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+ buf[3] + bias[12]));
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phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_TX_I2MPB_TEST_MODE_D1,
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- MTK_PHY_DA_TX_I2MPB_D_TBT_MASK, buf[3] + bias[13]);
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+ MTK_PHY_DA_TX_I2MPB_D_TBT_MASK,
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+ FIELD_PREP(MTK_PHY_DA_TX_I2MPB_D_TBT_MASK,
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+ buf[3] + bias[13]));
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phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_TX_I2MPB_TEST_MODE_D2,
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- MTK_PHY_DA_TX_I2MPB_D_HBT_MASK, (buf[3] + bias[14]) << 8);
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+ MTK_PHY_DA_TX_I2MPB_D_HBT_MASK,
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+ FIELD_PREP(MTK_PHY_DA_TX_I2MPB_D_HBT_MASK,
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+ buf[3] + bias[14]));
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phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_TX_I2MPB_TEST_MODE_D2,
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- MTK_PHY_DA_TX_I2MPB_D_TST_MASK, buf[3] + bias[15]);
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+ MTK_PHY_DA_TX_I2MPB_D_TST_MASK,
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+ FIELD_PREP(MTK_PHY_DA_TX_I2MPB_D_TST_MASK,
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+ buf[3] + bias[15]));
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return 0;
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}
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@@ -663,7 +696,8 @@ static int tx_vcm_cal_sw(struct phy_devi
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goto restore;
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/* We calibrate TX-VCM in different logic. Check upper index and then
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- * lower index. If this calibration is valid, apply lower index's result.
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+ * lower index. If this calibration is valid, apply lower index's
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+ * result.
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*/
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ret = upper_ret - lower_ret;
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if (ret == 1) {
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@@ -692,7 +726,8 @@ static int tx_vcm_cal_sw(struct phy_devi
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} else if (upper_idx == TXRESERVE_MAX && upper_ret == 0 &&
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lower_ret == 0) {
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ret = 0;
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- phydev_warn(phydev, "TX-VCM SW cal result at high margin 0x%x\n",
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+ phydev_warn(phydev,
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+ "TX-VCM SW cal result at high margin 0x%x\n",
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upper_idx);
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} else {
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ret = -EINVAL;
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@@ -796,7 +831,8 @@ static void mt7981_phy_finetune(struct p
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/* TR_OPEN_LOOP_EN = 1, lpf_x_average = 9 */
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phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_DEV1E_REG234,
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- MTK_PHY_TR_OPEN_LOOP_EN_MASK | MTK_PHY_LPF_X_AVERAGE_MASK,
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+ MTK_PHY_TR_OPEN_LOOP_EN_MASK |
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+ MTK_PHY_LPF_X_AVERAGE_MASK,
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BIT(0) | FIELD_PREP(MTK_PHY_LPF_X_AVERAGE_MASK, 0x9));
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/* rg_tr_lpf_cnt_val = 512 */
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@@ -865,7 +901,8 @@ static void mt7988_phy_finetune(struct p
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/* TR_OPEN_LOOP_EN = 1, lpf_x_average = 10 */
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phy_modify_mmd(phydev, MDIO_MMD_VEND1, MTK_PHY_RG_DEV1E_REG234,
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- MTK_PHY_TR_OPEN_LOOP_EN_MASK | MTK_PHY_LPF_X_AVERAGE_MASK,
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+ MTK_PHY_TR_OPEN_LOOP_EN_MASK |
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+ MTK_PHY_LPF_X_AVERAGE_MASK,
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BIT(0) | FIELD_PREP(MTK_PHY_LPF_X_AVERAGE_MASK, 0xa));
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/* rg_tr_lpf_cnt_val = 1023 */
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@@ -977,7 +1014,8 @@ static void mt798x_phy_eee(struct phy_de
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phy_restore_page(phydev, MTK_PHY_PAGE_STANDARD, 0);
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phy_select_page(phydev, MTK_PHY_PAGE_EXTENDED_3);
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- __phy_modify(phydev, MTK_PHY_LPI_REG_14, MTK_PHY_LPI_WAKE_TIMER_1000_MASK,
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+ __phy_modify(phydev, MTK_PHY_LPI_REG_14,
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+ MTK_PHY_LPI_WAKE_TIMER_1000_MASK,
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FIELD_PREP(MTK_PHY_LPI_WAKE_TIMER_1000_MASK, 0x19c));
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__phy_modify(phydev, MTK_PHY_LPI_REG_1c, MTK_PHY_SMI_DET_ON_THRESH_MASK,
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@@ -987,7 +1025,8 @@ static void mt798x_phy_eee(struct phy_de
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phy_modify_mmd(phydev, MDIO_MMD_VEND1,
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MTK_PHY_RG_LPI_PCS_DSP_CTRL_REG122,
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MTK_PHY_LPI_NORM_MSE_HI_THRESH1000_MASK,
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- FIELD_PREP(MTK_PHY_LPI_NORM_MSE_HI_THRESH1000_MASK, 0xff));
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+ FIELD_PREP(MTK_PHY_LPI_NORM_MSE_HI_THRESH1000_MASK,
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+ 0xff));
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}
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static int cal_sw(struct phy_device *phydev, enum CAL_ITEM cal_item,
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@@ -1147,7 +1186,8 @@ static int mt798x_phy_hw_led_on_set(stru
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(index ? 16 : 0), &priv->led_state);
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if (changed)
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return phy_modify_mmd(phydev, MDIO_MMD_VEND2, index ?
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- MTK_PHY_LED1_ON_CTRL : MTK_PHY_LED0_ON_CTRL,
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+ MTK_PHY_LED1_ON_CTRL :
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+ MTK_PHY_LED0_ON_CTRL,
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MTK_PHY_LED_ON_MASK,
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on ? MTK_PHY_LED_ON_FORCE_ON : 0);
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else
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@@ -1157,7 +1197,8 @@ static int mt798x_phy_hw_led_on_set(stru
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static int mt798x_phy_hw_led_blink_set(struct phy_device *phydev, u8 index,
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bool blinking)
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{
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- unsigned int bit_blink = MTK_PHY_LED_STATE_FORCE_BLINK + (index ? 16 : 0);
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+ unsigned int bit_blink = MTK_PHY_LED_STATE_FORCE_BLINK +
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+ (index ? 16 : 0);
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struct mtk_socphy_priv *priv = phydev->priv;
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bool changed;
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@@ -1170,8 +1211,10 @@ static int mt798x_phy_hw_led_blink_set(s
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(index ? 16 : 0), &priv->led_state);
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if (changed)
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return phy_write_mmd(phydev, MDIO_MMD_VEND2, index ?
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- MTK_PHY_LED1_BLINK_CTRL : MTK_PHY_LED0_BLINK_CTRL,
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- blinking ? MTK_PHY_LED_BLINK_FORCE_BLINK : 0);
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+ MTK_PHY_LED1_BLINK_CTRL :
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+ MTK_PHY_LED0_BLINK_CTRL,
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+ blinking ?
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+ MTK_PHY_LED_BLINK_FORCE_BLINK : 0);
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else
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return 0;
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}
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@@ -1237,7 +1280,8 @@ static int mt798x_phy_led_hw_is_supporte
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static int mt798x_phy_led_hw_control_get(struct phy_device *phydev, u8 index,
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unsigned long *rules)
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{
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- unsigned int bit_blink = MTK_PHY_LED_STATE_FORCE_BLINK + (index ? 16 : 0);
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+ unsigned int bit_blink = MTK_PHY_LED_STATE_FORCE_BLINK +
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+ (index ? 16 : 0);
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unsigned int bit_netdev = MTK_PHY_LED_STATE_NETDEV + (index ? 16 : 0);
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unsigned int bit_on = MTK_PHY_LED_STATE_FORCE_ON + (index ? 16 : 0);
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struct mtk_socphy_priv *priv = phydev->priv;
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@@ -1258,8 +1302,8 @@ static int mt798x_phy_led_hw_control_get
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if (blink < 0)
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return -EIO;
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- if ((on & (MTK_PHY_LED_ON_LINK | MTK_PHY_LED_ON_FDX | MTK_PHY_LED_ON_HDX |
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- MTK_PHY_LED_ON_LINKDOWN)) ||
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+ if ((on & (MTK_PHY_LED_ON_LINK | MTK_PHY_LED_ON_FDX |
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+ MTK_PHY_LED_ON_HDX | MTK_PHY_LED_ON_LINKDOWN)) ||
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(blink & (MTK_PHY_LED_BLINK_RX | MTK_PHY_LED_BLINK_TX)))
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set_bit(bit_netdev, &priv->led_state);
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else
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@@ -1333,17 +1377,23 @@ static int mt798x_phy_led_hw_control_set
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if (rules & BIT(TRIGGER_NETDEV_RX)) {
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blink |= (on & MTK_PHY_LED_ON_LINK) ?
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- (((on & MTK_PHY_LED_ON_LINK10) ? MTK_PHY_LED_BLINK_10RX : 0) |
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- ((on & MTK_PHY_LED_ON_LINK100) ? MTK_PHY_LED_BLINK_100RX : 0) |
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- ((on & MTK_PHY_LED_ON_LINK1000) ? MTK_PHY_LED_BLINK_1000RX : 0)) :
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+ (((on & MTK_PHY_LED_ON_LINK10) ?
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+ MTK_PHY_LED_BLINK_10RX : 0) |
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+ ((on & MTK_PHY_LED_ON_LINK100) ?
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+ MTK_PHY_LED_BLINK_100RX : 0) |
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+ ((on & MTK_PHY_LED_ON_LINK1000) ?
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+ MTK_PHY_LED_BLINK_1000RX : 0)) :
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MTK_PHY_LED_BLINK_RX;
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}
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if (rules & BIT(TRIGGER_NETDEV_TX)) {
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blink |= (on & MTK_PHY_LED_ON_LINK) ?
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- (((on & MTK_PHY_LED_ON_LINK10) ? MTK_PHY_LED_BLINK_10TX : 0) |
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- ((on & MTK_PHY_LED_ON_LINK100) ? MTK_PHY_LED_BLINK_100TX : 0) |
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- ((on & MTK_PHY_LED_ON_LINK1000) ? MTK_PHY_LED_BLINK_1000TX : 0)) :
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+ (((on & MTK_PHY_LED_ON_LINK10) ?
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+ MTK_PHY_LED_BLINK_10TX : 0) |
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+ ((on & MTK_PHY_LED_ON_LINK100) ?
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+ MTK_PHY_LED_BLINK_100TX : 0) |
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+ ((on & MTK_PHY_LED_ON_LINK1000) ?
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+ MTK_PHY_LED_BLINK_1000TX : 0)) :
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MTK_PHY_LED_BLINK_TX;
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}
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@@ -1400,7 +1450,8 @@ static int mt7988_phy_fix_leds_polaritie
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/* Only now setup pinctrl to avoid bogus blinking */
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pinctrl = devm_pinctrl_get_select(&phydev->mdio.dev, "gbe-led");
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if (IS_ERR(pinctrl))
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- dev_err(&phydev->mdio.bus->dev, "Failed to setup PHY LED pinctrl\n");
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+ dev_err(&phydev->mdio.bus->dev,
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+ "Failed to setup PHY LED pinctrl\n");
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return 0;
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}
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