mirror of
https://github.com/coolsnowwolf/lede.git
synced 2025-07-01 16:27:08 +08:00
425 lines
13 KiB
Diff
425 lines
13 KiB
Diff
From 01d2f285e3e5b629df9c61514e7ee07a54d0eed9 Mon Sep 17 00:00:00 2001
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From: Pradeep Kumar Chitrapu <pradeepc@codeaurora.org>
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Date: Wed, 16 Feb 2022 17:21:11 -0800
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Subject: [PATCH] ath11k: decode HE status tlv
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Add new bitmasks and macro definitions required for parsing HE
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status tlvs. Decode HE status tlvs, which will used in dumping
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ppdu stats as well as updating radiotap headers.
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Co-developed-by: Miles Hu <milehu@codeaurora.org>
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Signed-off-by: Miles Hu <milehu@codeaurora.org>
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Signed-off-by: Pradeep Kumar Chitrapu <pradeepc@codeaurora.org>
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Signed-off-by: Kalle Valo <quic_kvalo@quicinc.com>
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Link: https://lore.kernel.org/r/20220217012112.31211-3-pradeepc@codeaurora.org
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---
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drivers/net/wireless/ath/ath11k/dp_rx.c | 100 ++++++++++++---
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drivers/net/wireless/ath/ath11k/hal_desc.h | 1 +
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drivers/net/wireless/ath/ath11k/hal_rx.h | 135 ++++++++++++++++++++-
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3 files changed, 215 insertions(+), 21 deletions(-)
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--- a/drivers/net/wireless/ath/ath11k/dp_rx.c
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+++ b/drivers/net/wireless/ath/ath11k/dp_rx.c
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@@ -4807,7 +4807,6 @@ ath11k_dp_rx_mon_merg_msdus(struct ath11
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{
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struct ath11k_base *ab = ar->ab;
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struct sk_buff *msdu, *prev_buf;
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- u32 wifi_hdr_len;
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struct hal_rx_desc *rx_desc;
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char *hdr_desc;
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u8 *dest, decap_format;
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@@ -4849,38 +4848,27 @@ ath11k_dp_rx_mon_merg_msdus(struct ath11
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skb_trim(prev_buf, prev_buf->len - HAL_RX_FCS_LEN);
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} else if (decap_format == DP_RX_DECAP_TYPE_NATIVE_WIFI) {
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- __le16 qos_field;
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u8 qos_pkt = 0;
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rx_desc = (struct hal_rx_desc *)head_msdu->data;
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hdr_desc = ath11k_dp_rxdesc_get_80211hdr(ab, rx_desc);
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/* Base size */
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- wifi_hdr_len = sizeof(struct ieee80211_hdr_3addr);
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wh = (struct ieee80211_hdr_3addr *)hdr_desc;
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- if (ieee80211_is_data_qos(wh->frame_control)) {
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- struct ieee80211_qos_hdr *qwh =
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- (struct ieee80211_qos_hdr *)hdr_desc;
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-
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- qos_field = qwh->qos_ctrl;
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+ if (ieee80211_is_data_qos(wh->frame_control))
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qos_pkt = 1;
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- }
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+
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msdu = head_msdu;
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while (msdu) {
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- rx_desc = (struct hal_rx_desc *)msdu->data;
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- hdr_desc = ath11k_dp_rxdesc_get_80211hdr(ab, rx_desc);
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-
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+ ath11k_dp_rx_msdus_set_payload(ar, msdu);
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if (qos_pkt) {
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dest = skb_push(msdu, sizeof(__le16));
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if (!dest)
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goto err_merge_fail;
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- memcpy(dest, hdr_desc, wifi_hdr_len);
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- memcpy(dest + wifi_hdr_len,
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- (u8 *)&qos_field, sizeof(__le16));
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+ memcpy(dest, hdr_desc, sizeof(struct ieee80211_qos_hdr));
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}
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- ath11k_dp_rx_msdus_set_payload(ar, msdu);
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prev_buf = msdu;
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msdu = msdu->next;
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}
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@@ -4904,8 +4892,83 @@ err_merge_fail:
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return NULL;
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}
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+static void
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+ath11k_dp_rx_update_radiotap_he(struct hal_rx_mon_ppdu_info *rx_status,
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+ u8 *rtap_buf)
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+{
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+ u32 rtap_len = 0;
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+
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+ put_unaligned_le16(rx_status->he_data1, &rtap_buf[rtap_len]);
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+ rtap_len += 2;
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+
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+ put_unaligned_le16(rx_status->he_data2, &rtap_buf[rtap_len]);
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+ rtap_len += 2;
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+
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+ put_unaligned_le16(rx_status->he_data3, &rtap_buf[rtap_len]);
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+ rtap_len += 2;
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+
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+ put_unaligned_le16(rx_status->he_data4, &rtap_buf[rtap_len]);
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+ rtap_len += 2;
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+
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+ put_unaligned_le16(rx_status->he_data5, &rtap_buf[rtap_len]);
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+ rtap_len += 2;
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+
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+ put_unaligned_le16(rx_status->he_data6, &rtap_buf[rtap_len]);
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+}
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+
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+static void
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+ath11k_dp_rx_update_radiotap_he_mu(struct hal_rx_mon_ppdu_info *rx_status,
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+ u8 *rtap_buf)
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+{
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+ u32 rtap_len = 0;
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+
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+ put_unaligned_le16(rx_status->he_flags1, &rtap_buf[rtap_len]);
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+ rtap_len += 2;
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+
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+ put_unaligned_le16(rx_status->he_flags2, &rtap_buf[rtap_len]);
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+ rtap_len += 2;
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+
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+ rtap_buf[rtap_len] = rx_status->he_RU[0];
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+ rtap_len += 1;
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+
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+ rtap_buf[rtap_len] = rx_status->he_RU[1];
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+ rtap_len += 1;
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+
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+ rtap_buf[rtap_len] = rx_status->he_RU[2];
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+ rtap_len += 1;
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+
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+ rtap_buf[rtap_len] = rx_status->he_RU[3];
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+}
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+
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+static void ath11k_update_radiotap(struct hal_rx_mon_ppdu_info *ppduinfo,
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+ struct sk_buff *mon_skb,
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+ struct ieee80211_rx_status *rxs)
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+{
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+ u8 *ptr = NULL;
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+
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+ if (ppduinfo->he_mu_flags) {
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+ rxs->flag |= RX_FLAG_RADIOTAP_HE_MU;
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+ rxs->encoding = RX_ENC_HE;
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+ ptr = skb_push(mon_skb, sizeof(struct ieee80211_radiotap_he_mu));
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+ ath11k_dp_rx_update_radiotap_he_mu(ppduinfo, ptr);
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+ }
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+ if (ppduinfo->he_flags) {
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+ rxs->flag |= RX_FLAG_RADIOTAP_HE;
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+ rxs->encoding = RX_ENC_HE;
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+ ptr = skb_push(mon_skb, sizeof(struct ieee80211_radiotap_he));
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+ ath11k_dp_rx_update_radiotap_he(ppduinfo, ptr);
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+ }
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+
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+ rxs->flag |= RX_FLAG_MACTIME_START;
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+ rxs->signal = ppduinfo->rssi_comb + ATH11K_DEFAULT_NOISE_FLOOR;
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+ rxs->nss = ppduinfo->nss;
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+
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+ rxs->mactime = ppduinfo->tsft;
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+}
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+
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static int ath11k_dp_rx_mon_deliver(struct ath11k *ar, u32 mac_id,
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struct sk_buff *head_msdu,
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+ struct hal_rx_mon_ppdu_info *ppduinfo,
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struct sk_buff *tail_msdu,
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struct napi_struct *napi)
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{
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@@ -4940,7 +5003,7 @@ static int ath11k_dp_rx_mon_deliver(stru
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} else {
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rxs->flag |= RX_FLAG_ALLOW_SAME_PN;
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}
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- rxs->flag |= RX_FLAG_ONLY_MONITOR;
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+ ath11k_update_radiotap(ppduinfo, mon_skb, rxs);
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ath11k_dp_rx_deliver_msdu(ar, napi, mon_skb, rxs);
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mon_skb = skb_next;
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@@ -5045,6 +5108,7 @@ static void ath11k_dp_rx_mon_dest_proces
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}
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if (head_msdu && tail_msdu) {
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ath11k_dp_rx_mon_deliver(ar, dp->mac_id, head_msdu,
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+ &pmon->mon_ppdu_info,
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tail_msdu, napi);
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rx_mon_stats->dest_mpdu_done++;
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}
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@@ -5114,6 +5178,7 @@ int ath11k_dp_rx_process_mon_status(stru
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if (log_type != ATH11K_PKTLOG_TYPE_INVALID)
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trace_ath11k_htt_rxdesc(ar, skb->data, log_type, rx_buf_sz);
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+ memset(ppdu_info, 0, sizeof(struct hal_rx_mon_ppdu_info));
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hal_status = ath11k_hal_rx_parse_mon_status(ab, ppdu_info, skb);
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if (test_bit(ATH11K_FLAG_MONITOR_STARTED, &ar->monitor_flags) &&
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@@ -5374,6 +5439,7 @@ static int ath11k_dp_rx_full_mon_deliver
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tail_msdu = mon_mpdu->tail;
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if (head_msdu && tail_msdu) {
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ret = ath11k_dp_rx_mon_deliver(ar, mac_id, head_msdu,
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+ &pmon->mon_ppdu_info,
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tail_msdu, napi);
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rx_mon_stats->dest_mpdu_done++;
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ath11k_dbg(ar->ab, ATH11K_DBG_DATA, "full mon: deliver ppdu\n");
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--- a/drivers/net/wireless/ath/ath11k/hal_desc.h
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+++ b/drivers/net/wireless/ath/ath11k/hal_desc.h
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@@ -474,6 +474,7 @@ enum hal_tlv_tag {
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#define HAL_TLV_HDR_TAG GENMASK(9, 1)
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#define HAL_TLV_HDR_LEN GENMASK(25, 10)
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+#define HAL_TLV_USR_ID GENMASK(31, 26)
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#define HAL_TLV_ALIGN 4
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--- a/drivers/net/wireless/ath/ath11k/hal_rx.h
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+++ b/drivers/net/wireless/ath/ath11k/hal_rx.h
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@@ -73,6 +73,36 @@ enum hal_rx_mon_status {
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HAL_RX_MON_STATUS_BUF_DONE,
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};
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+struct hal_rx_user_status {
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+ u32 mcs:4,
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+ nss:3,
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+ ofdma_info_valid:1,
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+ dl_ofdma_ru_start_index:7,
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+ dl_ofdma_ru_width:7,
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+ dl_ofdma_ru_size:8;
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+ u32 ul_ofdma_user_v0_word0;
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+ u32 ul_ofdma_user_v0_word1;
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+ u32 ast_index;
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+ u32 tid;
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+ u16 tcp_msdu_count;
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+ u16 udp_msdu_count;
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+ u16 other_msdu_count;
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+ u16 frame_control;
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+ u8 frame_control_info_valid;
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+ u8 data_sequence_control_info_valid;
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+ u16 first_data_seq_ctrl;
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+ u32 preamble_type;
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+ u16 ht_flags;
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+ u16 vht_flags;
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+ u16 he_flags;
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+ u8 rs_flags;
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+ u32 mpdu_cnt_fcs_ok;
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+ u32 mpdu_cnt_fcs_err;
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+ u32 mpdu_fcs_ok_bitmap[8];
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+ u32 mpdu_ok_byte_count;
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+ u32 mpdu_err_byte_count;
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+};
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+
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#define HAL_TLV_STATUS_PPDU_NOT_DONE HAL_RX_MON_STATUS_PPDU_NOT_DONE
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#define HAL_TLV_STATUS_PPDU_DONE HAL_RX_MON_STATUS_PPDU_DONE
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#define HAL_TLV_STATUS_BUF_DONE HAL_RX_MON_STATUS_BUF_DONE
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@@ -107,6 +137,12 @@ struct hal_rx_mon_ppdu_info {
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u8 mcs;
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u8 nss;
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u8 bw;
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+ u8 vht_flag_values1;
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+ u8 vht_flag_values2;
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+ u8 vht_flag_values3[4];
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+ u8 vht_flag_values4;
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+ u8 vht_flag_values5;
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+ u16 vht_flag_values6;
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u8 is_stbc;
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u8 gi;
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u8 ldpc;
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@@ -114,10 +150,46 @@ struct hal_rx_mon_ppdu_info {
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u8 rssi_comb;
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u8 rssi_chain_pri20[HAL_RX_MAX_NSS];
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u8 tid;
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+ u16 ht_flags;
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+ u16 vht_flags;
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+ u16 he_flags;
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+ u16 he_mu_flags;
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u8 dcm;
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u8 ru_alloc;
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u8 reception_type;
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+ u64 tsft;
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u64 rx_duration;
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+ u16 frame_control;
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+ u32 ast_index;
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+ u8 rs_fcs_err;
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+ u8 rs_flags;
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+ u8 cck_flag;
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+ u8 ofdm_flag;
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+ u8 ulofdma_flag;
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+ u8 frame_control_info_valid;
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+ u16 he_per_user_1;
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+ u16 he_per_user_2;
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+ u8 he_per_user_position;
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+ u8 he_per_user_known;
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+ u16 he_flags1;
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+ u16 he_flags2;
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+ u8 he_RU[4];
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+ u16 he_data1;
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+ u16 he_data2;
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+ u16 he_data3;
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+ u16 he_data4;
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+ u16 he_data5;
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+ u16 he_data6;
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+ u32 ppdu_len;
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+ u32 prev_ppdu_id;
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+ u32 device_id;
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+ u16 first_data_seq_ctrl;
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+ u8 monitor_direct_used;
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+ u8 data_sequence_control_info_valid;
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+ u8 ltf_size;
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+ u8 rxpcu_filter_pass;
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+ char rssi_chain[8][8];
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+ struct hal_rx_user_status userstats;
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};
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#define HAL_RX_PPDU_START_INFO0_PPDU_ID GENMASK(15, 0)
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@@ -150,6 +222,9 @@ struct hal_rx_ppdu_start {
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#define HAL_RX_PPDU_END_USER_STATS_INFO6_TID_BITMAP GENMASK(15, 0)
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#define HAL_RX_PPDU_END_USER_STATS_INFO6_TID_EOSP_BITMAP GENMASK(31, 16)
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+#define HAL_RX_PPDU_END_USER_STATS_RSVD2_6_MPDU_OK_BYTE_COUNT GENMASK(24, 0)
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+#define HAL_RX_PPDU_END_USER_STATS_RSVD2_8_MPDU_ERR_BYTE_COUNT GENMASK(24, 0)
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+
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struct hal_rx_ppdu_end_user_stats {
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__le32 rsvd0[2];
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__le32 info0;
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@@ -164,6 +239,16 @@ struct hal_rx_ppdu_end_user_stats {
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__le32 rsvd2[11];
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} __packed;
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+struct hal_rx_ppdu_end_user_stats_ext {
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+ u32 info0;
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+ u32 info1;
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+ u32 info2;
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+ u32 info3;
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+ u32 info4;
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+ u32 info5;
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+ u32 info6;
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+} __packed;
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+
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#define HAL_RX_HT_SIG_INFO_INFO0_MCS GENMASK(6, 0)
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#define HAL_RX_HT_SIG_INFO_INFO0_BW BIT(7)
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@@ -212,25 +297,62 @@ enum hal_rx_vht_sig_a_gi_setting {
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HAL_RX_VHT_SIG_A_SHORT_GI_AMBIGUITY = 3,
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};
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+#define HAL_RX_SU_MU_CODING_LDPC 0x01
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+
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+#define HE_GI_0_8 0
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+#define HE_GI_0_4 1
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+#define HE_GI_1_6 2
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+#define HE_GI_3_2 3
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+
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+#define HE_LTF_1_X 0
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+#define HE_LTF_2_X 1
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+#define HE_LTF_4_X 2
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+#define HE_LTF_UNKNOWN 3
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+
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#define HAL_RX_HE_SIG_A_SU_INFO_INFO0_TRANSMIT_MCS GENMASK(6, 3)
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#define HAL_RX_HE_SIG_A_SU_INFO_INFO0_DCM BIT(7)
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#define HAL_RX_HE_SIG_A_SU_INFO_INFO0_TRANSMIT_BW GENMASK(20, 19)
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#define HAL_RX_HE_SIG_A_SU_INFO_INFO0_CP_LTF_SIZE GENMASK(22, 21)
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#define HAL_RX_HE_SIG_A_SU_INFO_INFO0_NSTS GENMASK(25, 23)
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+#define HAL_RX_HE_SIG_A_SU_INFO_INFO0_BSS_COLOR GENMASK(13, 8)
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+#define HAL_RX_HE_SIG_A_SU_INFO_INFO0_SPATIAL_REUSE GENMASK(18, 15)
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+#define HAL_RX_HE_SIG_A_SU_INFO_INFO0_FORMAT_IND BIT(0)
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+#define HAL_RX_HE_SIG_A_SU_INFO_INFO0_BEAM_CHANGE BIT(1)
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+#define HAL_RX_HE_SIG_A_SU_INFO_INFO0_DL_UL_FLAG BIT(2)
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+#define HAL_RX_HE_SIG_A_SU_INFO_INFO1_TXOP_DURATION GENMASK(6, 0)
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#define HAL_RX_HE_SIG_A_SU_INFO_INFO1_CODING BIT(7)
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+#define HAL_RX_HE_SIG_A_SU_INFO_INFO1_LDPC_EXTRA BIT(8)
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#define HAL_RX_HE_SIG_A_SU_INFO_INFO1_STBC BIT(9)
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#define HAL_RX_HE_SIG_A_SU_INFO_INFO1_TXBF BIT(10)
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+#define HAL_RX_HE_SIG_A_SU_INFO_INFO1_PKT_EXT_FACTOR GENMASK(12, 11)
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+#define HAL_RX_HE_SIG_A_SU_INFO_INFO1_PKT_EXT_PE_DISAM BIT(13)
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+#define HAL_RX_HE_SIG_A_SU_INFO_INFO1_DOPPLER_IND BIT(15)
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struct hal_rx_he_sig_a_su_info {
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__le32 info0;
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__le32 info1;
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} __packed;
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-#define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO0_TRANSMIT_BW GENMASK(17, 15)
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-#define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO0_CP_LTF_SIZE GENMASK(24, 23)
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-
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+#define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO0_UL_FLAG BIT(1)
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+#define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO0_MCS_OF_SIGB GENMASK(3, 1)
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+#define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO0_DCM_OF_SIGB BIT(4)
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+#define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO0_BSS_COLOR GENMASK(10, 5)
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+#define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO0_SPATIAL_REUSE GENMASK(14, 11)
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+#define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO0_TRANSMIT_BW GENMASK(17, 15)
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+#define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO0_NUM_SIGB_SYMB GENMASK(21, 18)
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+#define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO0_COMP_MODE_SIGB BIT(22)
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+#define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO0_CP_LTF_SIZE GENMASK(24, 23)
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+#define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO0_DOPPLER_INDICATION BIT(25)
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+
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+#define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO1_TXOP_DURATION GENMASK(6, 0)
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+#define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO1_CODING BIT(7)
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+#define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO1_NUM_LTF_SYMB GENMASK(10, 8)
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+#define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO1_LDPC_EXTRA BIT(11)
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#define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO1_STBC BIT(12)
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+#define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO1_TXBF BIT(10)
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+#define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO1_PKT_EXT_FACTOR GENMASK(14, 13)
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+#define HAL_RX_HE_SIG_A_MU_DL_INFO_INFO1_PKT_EXT_PE_DISAM BIT(15)
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struct hal_rx_he_sig_a_mu_dl_info {
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__le32 info0;
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@@ -243,6 +365,7 @@ struct hal_rx_he_sig_b1_mu_info {
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__le32 info0;
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} __packed;
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+#define HAL_RX_HE_SIG_B2_MU_INFO_INFO0_STA_ID GENMASK(10, 0)
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#define HAL_RX_HE_SIG_B2_MU_INFO_INFO0_STA_MCS GENMASK(18, 15)
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#define HAL_RX_HE_SIG_B2_MU_INFO_INFO0_STA_CODING BIT(20)
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#define HAL_RX_HE_SIG_B2_MU_INFO_INFO0_STA_NSTS GENMASK(31, 29)
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@@ -251,6 +374,7 @@ struct hal_rx_he_sig_b2_mu_info {
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__le32 info0;
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} __packed;
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+#define HAL_RX_HE_SIG_B2_OFDMA_INFO_INFO0_STA_ID GENMASK(10, 0)
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#define HAL_RX_HE_SIG_B2_OFDMA_INFO_INFO0_STA_NSTS GENMASK(13, 11)
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#define HAL_RX_HE_SIG_B2_OFDMA_INFO_INFO0_STA_TXBF BIT(19)
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#define HAL_RX_HE_SIG_B2_OFDMA_INFO_INFO0_STA_MCS GENMASK(18, 15)
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@@ -279,11 +403,14 @@ struct hal_rx_phyrx_rssi_legacy_info {
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#define HAL_RX_MPDU_INFO_INFO0_PEERID GENMASK(31, 16)
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#define HAL_RX_MPDU_INFO_INFO0_PEERID_WCN6855 GENMASK(15, 0)
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+#define HAL_RX_MPDU_INFO_INFO1_MPDU_LEN GENMASK(13, 0)
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struct hal_rx_mpdu_info {
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__le32 rsvd0;
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__le32 info0;
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- __le32 rsvd1[21];
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+ __le32 rsvd1[11];
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+ __le32 info1;
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+ __le32 rsvd2[9];
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} __packed;
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struct hal_rx_mpdu_info_wcn6855 {
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