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d989a3256a
Refreshed patches for qualcommb/ipq95xx by running make target/linux/refresh after creating a .config containing: CONFIG_TARGET_qualcommbe=y CONFIG_TARGET_qualcommbe_ipq95xx=y CONFIG_TARGET_qualcommbe_ipq95xx_DEVICE_qcom_rdp433=y Signed-off-by: John Audia <therealgraysky@proton.me> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
63 lines
1.8 KiB
Diff
63 lines
1.8 KiB
Diff
From a6118ebc98ec0081064ccc01d0d23f029a504d71 Mon Sep 17 00:00:00 2001
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From: Christian Marangi <ansuelsmth@gmail.com>
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Date: Wed, 4 Dec 2024 01:49:09 +0100
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Subject: [PATCH] arm64: dts: qcom: Add label to EDMA port for IPQ9574 RDP433
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Add label to EDMA port for IPQ9574 RDP433 board.
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Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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---
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arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts | 6 ++++++
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1 file changed, 6 insertions(+)
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--- a/arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts
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+++ b/arch/arm64/boot/dts/qcom/ipq9574-rdp433.dts
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@@ -161,6 +161,7 @@
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reg = <1>;
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phy-mode = "qsgmii";
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managed = "in-band-status";
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+ label = "lan1";
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phy-handle = <&phy0>;
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pcs-handle = <&pcsuniphy0_ch0>;
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clocks = <&nsscc NSS_CC_PORT1_MAC_CLK>,
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@@ -181,6 +182,7 @@
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reg = <2>;
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phy-mode = "qsgmii";
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managed = "in-band-status";
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+ label = "lan2";
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phy-handle = <&phy1>;
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pcs-handle = <&pcsuniphy0_ch1>;
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clocks = <&nsscc NSS_CC_PORT2_MAC_CLK>,
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@@ -201,6 +203,7 @@
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reg = <3>;
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phy-mode = "qsgmii";
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managed = "in-band-status";
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+ label = "lan3";
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phy-handle = <&phy2>;
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pcs-handle = <&pcsuniphy0_ch2>;
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clocks = <&nsscc NSS_CC_PORT3_MAC_CLK>,
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@@ -221,6 +224,7 @@
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reg = <4>;
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phy-mode = "qsgmii";
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managed = "in-band-status";
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+ label = "lan4";
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phy-handle = <&phy3>;
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pcs-handle = <&pcsuniphy0_ch3>;
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clocks = <&nsscc NSS_CC_PORT4_MAC_CLK>,
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@@ -241,6 +245,7 @@
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reg = <5>;
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phy-mode = "usxgmii";
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managed = "in-band-status";
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+ label = "lan5";
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phy-handle = <&phy4>;
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pcs-handle = <&pcsuniphy1_ch0>;
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clocks = <&nsscc NSS_CC_PORT5_MAC_CLK>,
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@@ -261,6 +266,7 @@
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reg = <6>;
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phy-mode = "usxgmii";
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managed = "in-band-status";
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+ label = "wan";
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phy-handle = <&phy5>;
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pcs-handle = <&pcsuniphy2_ch0>;
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clocks = <&nsscc NSS_CC_PORT6_MAC_CLK>,
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