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d989a3256a
Refreshed patches for qualcommb/ipq95xx by running make target/linux/refresh after creating a .config containing: CONFIG_TARGET_qualcommbe=y CONFIG_TARGET_qualcommbe_ipq95xx=y CONFIG_TARGET_qualcommbe_ipq95xx_DEVICE_qcom_rdp433=y Signed-off-by: John Audia <therealgraysky@proton.me> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
43 lines
1.3 KiB
Diff
43 lines
1.3 KiB
Diff
From a471ccfd5b2c7810506aac71d4eb3616a3fb18f9 Mon Sep 17 00:00:00 2001
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From: Christian Marangi <ansuelsmth@gmail.com>
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Date: Wed, 4 Dec 2024 01:43:20 +0100
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Subject: [PATCH] arm64: dts: qcom: Add missing clock for nsscc from pcs uniphy
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Add missing clock for nsscc from PCS UNIPHY to scale frequency of each
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clock based on the requested PHY.
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Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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---
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arch/arm64/boot/dts/qcom/ipq9574.dtsi | 13 +++++++------
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1 file changed, 7 insertions(+), 6 deletions(-)
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--- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
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+++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
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@@ -14,6 +14,7 @@
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#include <dt-bindings/reset/qcom,ipq9574-gcc.h>
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#include <dt-bindings/clock/qcom,ipq9574-nsscc.h>
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#include <dt-bindings/reset/qcom,ipq9574-nsscc.h>
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+#include <dt-bindings/clock/qcom,ipq-pcs-uniphy.h>
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#include <dt-bindings/thermal/thermal.h>
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/ {
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@@ -832,12 +833,12 @@
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<&cmn_pll NSS_1200MHZ_CLK>,
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<&cmn_pll PPE_353MHZ_CLK>,
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<&gcc GPLL0_OUT_AUX>,
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- <0>,
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- <0>,
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- <0>,
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- <0>,
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- <0>,
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- <0>,
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+ <&pcsuniphy0 UNIPHY_NSS_RX_CLK>,
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+ <&pcsuniphy0 UNIPHY_NSS_TX_CLK>,
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+ <&pcsuniphy1 UNIPHY_NSS_RX_CLK>,
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+ <&pcsuniphy1 UNIPHY_NSS_TX_CLK>,
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+ <&pcsuniphy2 UNIPHY_NSS_RX_CLK>,
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+ <&pcsuniphy2 UNIPHY_NSS_TX_CLK>,
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<&gcc GCC_NSSCC_CLK>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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