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d989a3256a
Refreshed patches for qualcommb/ipq95xx by running make target/linux/refresh after creating a .config containing: CONFIG_TARGET_qualcommbe=y CONFIG_TARGET_qualcommbe_ipq95xx=y CONFIG_TARGET_qualcommbe_ipq95xx_DEVICE_qcom_rdp433=y Signed-off-by: John Audia <therealgraysky@proton.me> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
32 lines
1.0 KiB
Diff
32 lines
1.0 KiB
Diff
From 82a6de914d0d6ff82333a4b65c81f71335e1f9d0 Mon Sep 17 00:00:00 2001
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From: Christian Marangi <ansuelsmth@gmail.com>
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Date: Wed, 4 Dec 2024 01:31:46 +0100
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Subject: [PATCH] dt-bindings: clock: Add clock ID for IPQ PCS UNIPHY
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IPQ9574 expose 3 PCS UNIPHY that expose all the same clock ID for RX and
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TX clock. This is needed to correctly parent the EDMA ports and scale
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to the correct frequency to permit correct function of attached PHY.
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Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
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---
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include/dt-bindings/clock/qcom,ipq-pcs-uniphy.h | 13 +++++++++++++
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1 file changed, 13 insertions(+)
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create mode 100644 include/dt-bindings/clock/qcom,ipq-pcs-uniphy.h
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--- /dev/null
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+++ b/include/dt-bindings/clock/qcom,ipq-pcs-uniphy.h
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@@ -0,0 +1,13 @@
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+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
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+
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+#ifndef _DT_BINDINGS_CLK_QCOM_IPQ_PCS_UNIPHY_H
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+#define _DT_BINDINGS_CLK_QCOM_IPQ_PCS_UNIPHY_H
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+
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+/*
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+ * IPQ9574 expose 3 PCS UNIPHY that expose all
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+ * the same clock ID
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+ */
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+#define UNIPHY_NSS_RX_CLK 0
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+#define UNIPHY_NSS_TX_CLK 1
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+
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+#endif
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