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d989a3256a
Refreshed patches for qualcommb/ipq95xx by running make target/linux/refresh after creating a .config containing: CONFIG_TARGET_qualcommbe=y CONFIG_TARGET_qualcommbe_ipq95xx=y CONFIG_TARGET_qualcommbe_ipq95xx_DEVICE_qcom_rdp433=y Signed-off-by: John Audia <therealgraysky@proton.me> Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
79 lines
2.7 KiB
Diff
79 lines
2.7 KiB
Diff
From cf3e71b3c8bd63cd832c0512386700cac6a2c363 Mon Sep 17 00:00:00 2001
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From: Luo Jie <quic_luoj@quicinc.com>
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Date: Tue, 5 Mar 2024 16:42:56 +0800
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Subject: [PATCH 35/50] net: ethernet: qualcomm: Add API to configure PPE port
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max frame size
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This function is called when the MTU of an ethernet port is
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configured. It limits the size of packet passed through the
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ethernet port.
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Change-Id: I2a4dcd04407156d73770d2becbb7cbc0d56b3754
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Signed-off-by: Luo Jie <quic_luoj@quicinc.com>
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---
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drivers/net/ethernet/qualcomm/ppe/ppe_port.c | 44 ++++++++++++++++++++
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drivers/net/ethernet/qualcomm/ppe/ppe_port.h | 1 +
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2 files changed, 45 insertions(+)
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--- a/drivers/net/ethernet/qualcomm/ppe/ppe_port.c
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+++ b/drivers/net/ethernet/qualcomm/ppe/ppe_port.c
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@@ -537,6 +537,50 @@ int ppe_port_set_mac_eee(struct ppe_port
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return ret;
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}
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+/**
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+ * ppe_port_set_maxframe() - Set port maximum frame size
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+ * @ppe_port: PPE port structure
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+ * @maxframe_size: Maximum frame size supported by PPE port
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+ *
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+ * Description: Set MTU of network interface specified by @ppe_port.
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+ *
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+ * Return: 0 upon success or a negative error upon failure.
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+ */
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+int ppe_port_set_maxframe(struct ppe_port *ppe_port, int maxframe_size)
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+{
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+ struct ppe_device *ppe_dev = ppe_port->ppe_dev;
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+ u32 reg, val, mru_mtu_val[3];
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+ int port = ppe_port->port_id;
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+ int ret;
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+
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+ /* The max frame size should be MTU added by ETH_HLEN in PPE. */
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+ maxframe_size += ETH_HLEN;
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+
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+ /* MAC takes cover the FCS for the calculation of frame size. */
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+ if (maxframe_size > PPE_PORT_MAC_MAX_FRAME_SIZE - ETH_FCS_LEN)
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+ return -EINVAL;
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+
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+ reg = PPE_MC_MTU_CTRL_TBL_ADDR + PPE_MC_MTU_CTRL_TBL_INC * port;
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+ val = FIELD_PREP(PPE_MC_MTU_CTRL_TBL_MTU, maxframe_size);
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+ ret = regmap_update_bits(ppe_dev->regmap, reg,
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+ PPE_MC_MTU_CTRL_TBL_MTU,
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+ val);
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+ if (ret)
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+ return ret;
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+
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+ reg = PPE_MRU_MTU_CTRL_TBL_ADDR + PPE_MRU_MTU_CTRL_TBL_INC * port;
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+ ret = regmap_bulk_read(ppe_dev->regmap, reg,
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+ mru_mtu_val, ARRAY_SIZE(mru_mtu_val));
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+ if (ret)
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+ return ret;
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+
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+ PPE_MRU_MTU_CTRL_SET_MRU(mru_mtu_val, maxframe_size);
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+ PPE_MRU_MTU_CTRL_SET_MTU(mru_mtu_val, maxframe_size);
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+
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+ return regmap_bulk_write(ppe_dev->regmap, reg,
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+ mru_mtu_val, ARRAY_SIZE(mru_mtu_val));
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+}
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+
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/* PPE port and MAC reset */
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static int ppe_port_mac_reset(struct ppe_port *ppe_port)
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{
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--- a/drivers/net/ethernet/qualcomm/ppe/ppe_port.h
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+++ b/drivers/net/ethernet/qualcomm/ppe/ppe_port.h
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@@ -89,4 +89,5 @@ void ppe_port_get_stats64(struct ppe_por
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struct rtnl_link_stats64 *s);
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int ppe_port_set_mac_address(struct ppe_port *ppe_port, const u8 *addr);
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int ppe_port_set_mac_eee(struct ppe_port *ppe_port, struct ethtool_eee *eee);
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+int ppe_port_set_maxframe(struct ppe_port *ppe_port, int maxframe_size);
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#endif
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