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42 lines
1.5 KiB
Diff
42 lines
1.5 KiB
Diff
From 952b64575613d26163a5afa5ff8bfdb57840091b Mon Sep 17 00:00:00 2001
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From: Alexander Couzens <lynxis@fe80.eu>
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Date: Mon, 15 Aug 2022 15:00:14 +0200
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Subject: [PATCH 08/10] net: mtk_sgmii: set the speed according to the phy
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interface in AN
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The non auto-negotioting code path is setting the correct speed for the
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interface. Ensure auto-negotiation code path is doing it as well.
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Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
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---
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drivers/net/ethernet/mediatek/mtk_sgmii.c | 11 +++++++++--
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1 file changed, 9 insertions(+), 2 deletions(-)
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--- a/drivers/net/ethernet/mediatek/mtk_sgmii.c
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+++ b/drivers/net/ethernet/mediatek/mtk_sgmii.c
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@@ -20,12 +20,14 @@ static struct mtk_pcs *pcs_to_mtk_pcs(st
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}
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/* For SGMII interface mode */
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-static int mtk_pcs_setup_mode_an(struct mtk_pcs *mpcs)
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+static int mtk_pcs_setup_mode_an(struct mtk_pcs *mpcs, phy_interface_t interface)
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{
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unsigned int val;
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regmap_read(mpcs->regmap, mpcs->ana_rgc3, &val);
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val &= ~RG_PHY_SPEED_MASK;
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+ if (interface == PHY_INTERFACE_MODE_2500BASEX)
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+ val |= RG_PHY_SPEED_3_125G;
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regmap_write(mpcs->regmap, mpcs->ana_rgc3, val);
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/* Setup the link timer and QPHY power up inside SGMIISYS */
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@@ -94,7 +96,7 @@ static int mtk_pcs_config(struct phylink
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if (interface != PHY_INTERFACE_MODE_SGMII)
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err = mtk_pcs_setup_mode_force(mpcs, interface);
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else if (phylink_autoneg_inband(mode))
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- err = mtk_pcs_setup_mode_an(mpcs);
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+ err = mtk_pcs_setup_mode_an(mpcs, interface);
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/* Release PHYA power down state
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* Only removing bit SGMII_PHYA_PWD isn't enough.
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