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https://github.com/coolsnowwolf/lede.git
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124 lines
4.2 KiB
Diff
124 lines
4.2 KiB
Diff
From 8c4d0172657c1f2d86b9c19172150abcd0e35c39 Mon Sep 17 00:00:00 2001
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From: Michael Klein <michael@fossekall.de>
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Date: Sun, 4 May 2025 19:29:14 +0200
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Subject: [PATCH] net: phy: realtek: Group RTL82* macro definitions
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Group macro definitions by PHY in lexicographic order. Within each PHY
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block, definitions are order by page number and then register number.
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Signed-off-by: Michael Klein <michael@fossekall.de>
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Reviewed-by: Andrew Lunn <andrew@lunn.ch>
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Link: https://patch.msgid.link/20250504172916.243185-5-michael@fossekall.de
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Signed-off-by: Paolo Abeni <pabeni@redhat.com>
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---
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drivers/net/phy/realtek/realtek_main.c | 72 +++++++++++++-------------
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1 file changed, 37 insertions(+), 35 deletions(-)
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--- a/drivers/net/phy/realtek/realtek_main.c
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+++ b/drivers/net/phy/realtek/realtek_main.c
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@@ -18,6 +18,16 @@
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#include "realtek.h"
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+#define RTL8201F_IER 0x13
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+
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+#define RTL8201F_ISR 0x1e
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+#define RTL8201F_ISR_ANERR BIT(15)
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+#define RTL8201F_ISR_DUPLEX BIT(13)
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+#define RTL8201F_ISR_LINK BIT(11)
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+#define RTL8201F_ISR_MASK (RTL8201F_ISR_ANERR | \
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+ RTL8201F_ISR_DUPLEX | \
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+ RTL8201F_ISR_LINK)
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+
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#define RTL821x_INER 0x12
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#define RTL8211B_INER_INIT 0x6400
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#define RTL8211E_INER_LINK_STATUS BIT(10)
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@@ -30,9 +40,21 @@
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#define RTL821x_PAGE_SELECT 0x1f
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#define RTL821x_SET_EXT_PAGE 0x07
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+/* RTL8211E extension page 164/0xa4 */
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+#define RTL8211E_RGMII_EXT_PAGE 0xa4
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+#define RTL8211E_RGMII_DELAY 0x1c
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+#define RTL8211E_CTRL_DELAY BIT(13)
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+#define RTL8211E_TX_DELAY BIT(12)
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+#define RTL8211E_RX_DELAY BIT(11)
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+#define RTL8211E_DELAY_MASK GENMASK(13, 11)
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+
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/* RTL8211F PHY configuration */
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#define RTL8211F_PHYCR_PAGE 0xa43
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#define RTL8211F_PHYCR1 0x18
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+#define RTL8211F_ALDPS_PLL_OFF BIT(1)
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+#define RTL8211F_ALDPS_ENABLE BIT(2)
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+#define RTL8211F_ALDPS_XTAL_OFF BIT(12)
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+
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#define RTL8211F_PHYCR2 0x19
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#define RTL8211F_CLKOUT_EN BIT(0)
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#define RTL8211F_PHYCR2_PHY_EEE_ENABLE BIT(5)
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@@ -40,24 +62,6 @@
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#define RTL8211F_INSR_PAGE 0xa43
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#define RTL8211F_INSR 0x1d
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-/* RTL8211F WOL interrupt configuration */
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-#define RTL8211F_INTBCR_PAGE 0xd40
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-#define RTL8211F_INTBCR 0x16
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-#define RTL8211F_INTBCR_INTB_PMEB BIT(5)
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-
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-/* RTL8211F WOL settings */
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-#define RTL8211F_WOL_SETTINGS_PAGE 0xd8a
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-#define RTL8211F_WOL_SETTINGS_EVENTS 16
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-#define RTL8211F_WOL_EVENT_MAGIC BIT(12)
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-#define RTL8211F_WOL_SETTINGS_STATUS 17
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-#define RTL8211F_WOL_STATUS_RESET (BIT(15) | 0x1fff)
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-
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-/* RTL8211F Unique phyiscal and multicast address (WOL) */
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-#define RTL8211F_PHYSICAL_ADDR_PAGE 0xd8c
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-#define RTL8211F_PHYSICAL_ADDR_WORD0 16
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-#define RTL8211F_PHYSICAL_ADDR_WORD1 17
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-#define RTL8211F_PHYSICAL_ADDR_WORD2 18
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-
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/* RTL8211F LED configuration */
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#define RTL8211F_LEDCR_PAGE 0xd04
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#define RTL8211F_LEDCR 0x10
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@@ -78,25 +82,23 @@
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#define RTL8211F_RXCR 0x15
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#define RTL8211F_RX_DELAY BIT(3)
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-#define RTL8211F_ALDPS_PLL_OFF BIT(1)
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-#define RTL8211F_ALDPS_ENABLE BIT(2)
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-#define RTL8211F_ALDPS_XTAL_OFF BIT(12)
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+/* RTL8211F WOL interrupt configuration */
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+#define RTL8211F_INTBCR_PAGE 0xd40
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+#define RTL8211F_INTBCR 0x16
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+#define RTL8211F_INTBCR_INTB_PMEB BIT(5)
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-#define RTL8211E_RGMII_EXT_PAGE 0xa4
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-#define RTL8211E_RGMII_DELAY 0x1c
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-#define RTL8211E_CTRL_DELAY BIT(13)
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-#define RTL8211E_TX_DELAY BIT(12)
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-#define RTL8211E_RX_DELAY BIT(11)
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-#define RTL8211E_DELAY_MASK GENMASK(13, 11)
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+/* RTL8211F WOL settings */
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+#define RTL8211F_WOL_SETTINGS_PAGE 0xd8a
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+#define RTL8211F_WOL_SETTINGS_EVENTS 16
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+#define RTL8211F_WOL_EVENT_MAGIC BIT(12)
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+#define RTL8211F_WOL_SETTINGS_STATUS 17
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+#define RTL8211F_WOL_STATUS_RESET (BIT(15) | 0x1fff)
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-#define RTL8201F_ISR 0x1e
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-#define RTL8201F_ISR_ANERR BIT(15)
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-#define RTL8201F_ISR_DUPLEX BIT(13)
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-#define RTL8201F_ISR_LINK BIT(11)
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-#define RTL8201F_ISR_MASK (RTL8201F_ISR_ANERR | \
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- RTL8201F_ISR_DUPLEX | \
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- RTL8201F_ISR_LINK)
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-#define RTL8201F_IER 0x13
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+/* RTL8211F Unique phyiscal and multicast address (WOL) */
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+#define RTL8211F_PHYSICAL_ADDR_PAGE 0xd8c
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+#define RTL8211F_PHYSICAL_ADDR_WORD0 16
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+#define RTL8211F_PHYSICAL_ADDR_WORD1 17
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+#define RTL8211F_PHYSICAL_ADDR_WORD2 18
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#define RTL822X_VND1_SERDES_OPTION 0x697a
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#define RTL822X_VND1_SERDES_OPTION_MODE_MASK GENMASK(5, 0)
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