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d81c03f05e
These patches were generated from: https://github.com/raspberrypi/linux/commits/rpi-6.12.y With the following command: git format-patch -N v6.12.27..HEAD (HEAD -> 8d3206ee456a5ecdf9ddbfd8e5e231e4f0cd716e) Exceptions: - (def)configs patches - github workflows patches - applied & reverted patches - readme patches - wireless patches Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
51 lines
1.8 KiB
Diff
51 lines
1.8 KiB
Diff
From e11c3ae9e077de3fe3d507ae12abb6569be51be4 Mon Sep 17 00:00:00 2001
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From: Jonathan Bell <jonathan@raspberrypi.com>
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Date: Mon, 3 Mar 2025 15:01:28 +0000
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Subject: [PATCH] PCI: brcmstb: add NO_SSC quirk for BCM2712
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The PHY MDIO register map is different on BCM2712, and as the PHY input
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clock is 54MHz not 100MHz, enabling refclk SSC is both broken and
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unfixable.
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Mask out attempts to enable SSC with a controller quirk.
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Signed-off-by: Jonathan Bell <jonathan@raspberrypi.com>
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---
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drivers/pci/controller/pcie-brcmstb.c | 11 +++++++++--
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1 file changed, 9 insertions(+), 2 deletions(-)
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--- a/drivers/pci/controller/pcie-brcmstb.c
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+++ b/drivers/pci/controller/pcie-brcmstb.c
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@@ -259,6 +259,12 @@ struct inbound_win {
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*/
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#define CFG_QUIRK_AVOID_BRIDGE_SHUTDOWN BIT(0)
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+/*
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+ * MDIO register map differences and required changes to the defaults mean that refclk
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+ * spread-spectrum clocking isn't supportable.
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+ */
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+#define CFG_QUIRK_NO_SSC BIT(1)
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+
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struct pcie_cfg_data {
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const int *offsets;
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const enum pcie_soc_base soc_base;
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@@ -1811,7 +1817,7 @@ static const struct pcie_cfg_data bcm271
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.perst_set = brcm_pcie_perst_set_7278,
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.bridge_sw_init_set = brcm_pcie_bridge_sw_init_set_generic,
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.post_setup = brcm_pcie_post_setup_bcm2712,
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- .quirks = CFG_QUIRK_AVOID_BRIDGE_SHUTDOWN,
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+ .quirks = CFG_QUIRK_AVOID_BRIDGE_SHUTDOWN | CFG_QUIRK_NO_SSC,
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.num_inbound_wins = 10,
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};
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@@ -1928,7 +1934,8 @@ static int brcm_pcie_probe(struct platfo
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ret = of_pci_get_max_link_speed(np);
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pcie->gen = (ret < 0) ? 0 : ret;
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- pcie->ssc = of_property_read_bool(np, "brcm,enable-ssc");
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+ pcie->ssc = !(pcie->cfg->quirks & CFG_QUIRK_NO_SSC) &&
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+ of_property_read_bool(np, "brcm,enable-ssc");
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pcie->rescal = devm_reset_control_get_optional_shared(&pdev->dev, "rescal");
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if (IS_ERR(pcie->rescal))
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