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50 lines
1.6 KiB
Diff
50 lines
1.6 KiB
Diff
From f5e303aefc06b7508d7a490f9a2d80e4dc134c70 Mon Sep 17 00:00:00 2001
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From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Date: Fri, 9 Sep 2022 11:20:31 +0200
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Subject: [PATCH] arm64: dts: qcom: ipq6018: switch TCSR mutex to MMIO
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The TCSR mutex bindings allow device to be described only with address
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space (so it uses MMIO, not syscon regmap). This seems reasonable as
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TCSR mutex is actually a dedicated IO address space and it also fixes DT
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schema checks:
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qcom/ipq6018-cp01-c1.dtb: hwlock: 'reg' is a required property
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qcom/ipq6018-cp01-c1.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+'
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Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Link: https://lore.kernel.org/r/20220909092035.223915-12-krzysztof.kozlowski@linaro.org
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---
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arch/arm64/boot/dts/qcom/ipq6018.dtsi | 13 ++++---------
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1 file changed, 4 insertions(+), 9 deletions(-)
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--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
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+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
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@@ -129,12 +129,6 @@
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};
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};
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- tcsr_mutex: hwlock {
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- compatible = "qcom,tcsr-mutex";
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- syscon = <&tcsr_mutex_regs 0 0x80>;
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- #hwlock-cells = <1>;
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- };
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-
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pmuv8: pmu {
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compatible = "arm,cortex-a53-pmu";
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interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(4) |
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@@ -252,9 +246,10 @@
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#reset-cells = <1>;
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};
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- tcsr_mutex_regs: syscon@1905000 {
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- compatible = "syscon";
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- reg = <0x0 0x01905000 0x0 0x8000>;
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+ tcsr_mutex: hwlock@1905000 {
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+ compatible = "qcom,ipq6018-tcsr-mutex", "qcom,tcsr-mutex";
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+ reg = <0x0 0x01905000 0x0 0x1000>;
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+ #hwlock-cells = <1>;
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};
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tcsr: syscon@1937000 {
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