lede/target/linux/ipq60xx/patches-5.15/0160-arm64-dts-qcom-ipq6018-switch-TCSR-mutex-to-MMIO.patch
2022-11-17 18:23:03 +08:00

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1.6 KiB
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From f5e303aefc06b7508d7a490f9a2d80e4dc134c70 Mon Sep 17 00:00:00 2001
From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Date: Fri, 9 Sep 2022 11:20:31 +0200
Subject: [PATCH] arm64: dts: qcom: ipq6018: switch TCSR mutex to MMIO
The TCSR mutex bindings allow device to be described only with address
space (so it uses MMIO, not syscon regmap). This seems reasonable as
TCSR mutex is actually a dedicated IO address space and it also fixes DT
schema checks:
qcom/ipq6018-cp01-c1.dtb: hwlock: 'reg' is a required property
qcom/ipq6018-cp01-c1.dtb: hwlock: 'syscon' does not match any of the regexes: 'pinctrl-[0-9]+'
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220909092035.223915-12-krzysztof.kozlowski@linaro.org
---
arch/arm64/boot/dts/qcom/ipq6018.dtsi | 13 ++++---------
1 file changed, 4 insertions(+), 9 deletions(-)
--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
@@ -129,12 +129,6 @@
};
};
- tcsr_mutex: hwlock {
- compatible = "qcom,tcsr-mutex";
- syscon = <&tcsr_mutex_regs 0 0x80>;
- #hwlock-cells = <1>;
- };
-
pmuv8: pmu {
compatible = "arm,cortex-a53-pmu";
interrupts = <GIC_PPI 7 (GIC_CPU_MASK_SIMPLE(4) |
@@ -252,9 +246,10 @@
#reset-cells = <1>;
};
- tcsr_mutex_regs: syscon@1905000 {
- compatible = "syscon";
- reg = <0x0 0x01905000 0x0 0x8000>;
+ tcsr_mutex: hwlock@1905000 {
+ compatible = "qcom,ipq6018-tcsr-mutex", "qcom,tcsr-mutex";
+ reg = <0x0 0x01905000 0x0 0x1000>;
+ #hwlock-cells = <1>;
};
tcsr: syscon@1937000 {