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95 lines
2.7 KiB
Diff
95 lines
2.7 KiB
Diff
From 458ebdbb8e5d596a462d8125cec74142ff5dfa97 Mon Sep 17 00:00:00 2001
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From: David Heidelberg <david@ixit.cz>
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Date: Sun, 26 Jun 2022 12:57:59 +0200
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Subject: [PATCH] arm64: dts: qcom: timer should use only 32-bit size
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There's no reason the timer needs > 32-bits of address or size.
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Since we using 32-bit size, we need to define ranges properly.
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Fixes warnings as:
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```
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arch/arm64/boot/dts/qcom/sdm845-oneplus-fajita.dt.yaml: timer@17c90000: #size-cells:0:0: 1 was expected
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From schema: Documentation/devicetree/bindings/timer/arm,arch_timer_mmio.yaml
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```
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Signed-off-by: David Heidelberg <david@ixit.cz>
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Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Link: https://lore.kernel.org/r/20220626105800.35586-1-david@ixit.cz
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---
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arch/arm64/boot/dts/qcom/ipq6018.dtsi | 22 +++++++++++-----------
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1 files changed, 11 insertions(+), 11 deletions(-)
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--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
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+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
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@@ -525,9 +525,9 @@
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};
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timer@b120000 {
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- #address-cells = <2>;
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- #size-cells = <2>;
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- ranges;
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ ranges = <0 0 0 0x10000000>;
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compatible = "arm,armv7-timer-mem";
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reg = <0x0 0x0b120000 0x0 0x1000>;
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@@ -535,49 +535,49 @@
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frame-number = <0>;
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interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
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- reg = <0x0 0x0b121000 0x0 0x1000>,
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- <0x0 0x0b122000 0x0 0x1000>;
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+ reg = <0x0b121000 0x1000>,
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+ <0x0b122000 0x1000>;
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};
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frame@b123000 {
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frame-number = <1>;
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interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
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- reg = <0x0 0xb123000 0x0 0x1000>;
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+ reg = <0x0b123000 0x1000>;
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status = "disabled";
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};
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frame@b124000 {
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frame-number = <2>;
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interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
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- reg = <0x0 0x0b124000 0x0 0x1000>;
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+ reg = <0x0b124000 0x1000>;
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status = "disabled";
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};
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frame@b125000 {
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frame-number = <3>;
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interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
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- reg = <0x0 0x0b125000 0x0 0x1000>;
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+ reg = <0x0b125000 0x1000>;
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status = "disabled";
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};
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frame@b126000 {
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frame-number = <4>;
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interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
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- reg = <0x0 0x0b126000 0x0 0x1000>;
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+ reg = <0x0b126000 0x1000>;
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status = "disabled";
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};
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frame@b127000 {
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frame-number = <5>;
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interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
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- reg = <0x0 0x0b127000 0x0 0x1000>;
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+ reg = <0x0b127000 0x1000>;
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status = "disabled";
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};
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frame@b128000 {
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frame-number = <6>;
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interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
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- reg = <0x0 0x0b128000 0x0 0x1000>;
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+ reg = <0x0b128000 0x1000>;
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status = "disabled";
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};
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};
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