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85 lines
2.8 KiB
Diff
85 lines
2.8 KiB
Diff
From 28bbb5ffbe32741e65d798070986d212cc11e1bb Mon Sep 17 00:00:00 2001
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From: Sascha Hauer <s.hauer@pengutronix.de>
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Date: Fri, 22 Apr 2022 09:28:24 +0200
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Subject: [PATCH] drm/rockchip: dw_hdmi: add rk3568 support
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Add a new dw_hdmi_plat_data struct and new compatible for rk3568.
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Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
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Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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Tested-by: Michael Riesch <michael.riesch@wolfvision.net>
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Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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Link: https://patchwork.freedesktop.org/patch/msgid/20220422072841.2206452-8-s.hauer@pengutronix.de
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---
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drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c | 31 +++++++++++++++++++++
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1 file changed, 31 insertions(+)
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--- a/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
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+++ b/drivers/gpu/drm/rockchip/dw_hdmi-rockchip.c
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@@ -50,6 +50,10 @@
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#define RK3399_GRF_SOC_CON20 0x6250
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#define RK3399_HDMI_LCDC_SEL BIT(6)
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+#define RK3568_GRF_VO_CON1 0x0364
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+#define RK3568_HDMI_SDAIN_MSK BIT(15)
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+#define RK3568_HDMI_SCLIN_MSK BIT(14)
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+
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#define HIWORD_UPDATE(val, mask) (val | (mask) << 16)
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/**
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@@ -473,6 +477,19 @@ static const struct dw_hdmi_plat_data rk
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.use_drm_infoframe = true,
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};
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+static struct rockchip_hdmi_chip_data rk3568_chip_data = {
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+ .lcdsel_grf_reg = -1,
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+};
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+
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+static const struct dw_hdmi_plat_data rk3568_hdmi_drv_data = {
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+ .mode_valid = dw_hdmi_rockchip_mode_valid,
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+ .mpll_cfg = rockchip_mpll_cfg,
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+ .cur_ctr = rockchip_cur_ctr,
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+ .phy_config = rockchip_phy_config,
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+ .phy_data = &rk3568_chip_data,
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+ .use_drm_infoframe = true,
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+};
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+
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static const struct of_device_id dw_hdmi_rockchip_dt_ids[] = {
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{ .compatible = "rockchip,rk3228-dw-hdmi",
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.data = &rk3228_hdmi_drv_data
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@@ -486,6 +503,9 @@ static const struct of_device_id dw_hdmi
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{ .compatible = "rockchip,rk3399-dw-hdmi",
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.data = &rk3399_hdmi_drv_data
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},
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+ { .compatible = "rockchip,rk3568-dw-hdmi",
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+ .data = &rk3568_hdmi_drv_data
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+ },
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{},
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};
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MODULE_DEVICE_TABLE(of, dw_hdmi_rockchip_dt_ids);
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@@ -520,6 +540,9 @@ static int dw_hdmi_rockchip_bind(struct
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encoder = &hdmi->encoder.encoder;
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encoder->possible_crtcs = drm_of_find_possible_crtcs(drm, dev->of_node);
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+ rockchip_drm_encoder_set_crtc_endpoint_id(&hdmi->encoder,
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+ dev->of_node, 0, 0);
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+
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/*
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* If we failed to find the CRTC(s) which this encoder is
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* supposed to be connected to, it's because the CRTC has
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@@ -550,6 +573,14 @@ static int dw_hdmi_rockchip_bind(struct
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return ret;
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}
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+ if (hdmi->chip_data == &rk3568_chip_data) {
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+ regmap_write(hdmi->regmap, RK3568_GRF_VO_CON1,
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+ HIWORD_UPDATE(RK3568_HDMI_SDAIN_MSK |
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+ RK3568_HDMI_SCLIN_MSK,
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+ RK3568_HDMI_SDAIN_MSK |
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+ RK3568_HDMI_SCLIN_MSK));
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+ }
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+
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drm_encoder_helper_add(encoder, &dw_hdmi_rockchip_encoder_helper_funcs);
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drm_simple_encoder_init(drm, encoder, DRM_MODE_ENCODER_TMDS);
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