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https://github.com/coolsnowwolf/lede.git
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145 lines
4.9 KiB
Diff
145 lines
4.9 KiB
Diff
From 733a75729c1fbb478caaed875dd9c09a878a553d Mon Sep 17 00:00:00 2001
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From: Robert Marko <robimarko@gmail.com>
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Date: Fri, 5 Jun 2020 11:44:27 +0200
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Subject: [PATCH] Revert "ARM: dma-mapping: remove dmac_clean_range and
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dmac_inv_range"
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This partially reverts 'commit 702b94bff3c505 ("ARM: dma-mapping:
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remove dmac_clean_range and dmac_inv_range")'
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Some MSM drivers still use the dmac_clean and dmac_inv_range APIs.
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Bring back the defines and exports for v7 CPUs.
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Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
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Signed-off-by: Abhimanyu Kapur <abhimany@codeaurora.org>
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[sramana: resolved minor merge conflicts]
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Signed-off-by: Srinivas Ramana <sramana@codeaurora.org>
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(cherry picked from commit d6118c0a9f7ab2b131ca36dd3dbd5634603d14fe)
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Change-Id: Ib2ddb4452711c5c2013bf29f0b5d8a3572b10357
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Signed-off-by: Manoharan Vijaya Raghavan <mraghava@codeaurora.org>
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Signed-off-by: Robert Marko <robimarko@gmail.com>
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---
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arch/arm/include/asm/cacheflush.h | 21 +++++++++++++++++++++
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arch/arm/include/asm/glue-cache.h | 2 ++
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arch/arm/mm/cache-v7.S | 6 ++++--
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arch/arm/mm/proc-macros.S | 2 ++
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arch/arm/mm/proc-syms.c | 3 +++
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5 files changed, 32 insertions(+), 2 deletions(-)
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--- a/arch/arm/include/asm/cacheflush.h
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+++ b/arch/arm/include/asm/cacheflush.h
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@@ -91,6 +91,21 @@
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* DMA Cache Coherency
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* ===================
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*
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+ * dma_inv_range(start, end)
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+ *
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+ * Invalidate (discard) the specified virtual address range.
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+ * May not write back any entries. If 'start' or 'end'
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+ * are not cache line aligned, those lines must be written
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+ * back.
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+ * - start - virtual start address
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+ * - end - virtual end address
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+ *
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+ * dma_clean_range(start, end)
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+ *
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+ * Clean (write back) the specified virtual address range.
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+ * - start - virtual start address
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+ * - end - virtual end address
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+ *
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* dma_flush_range(start, end)
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*
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* Clean and invalidate the specified virtual address range.
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@@ -112,6 +127,8 @@ struct cpu_cache_fns {
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void (*dma_map_area)(const void *, size_t, int);
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void (*dma_unmap_area)(const void *, size_t, int);
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+ void (*dma_inv_range)(const void *, const void *);
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+ void (*dma_clean_range)(const void *, const void *);
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void (*dma_flush_range)(const void *, const void *);
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} __no_randomize_layout;
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@@ -137,6 +154,8 @@ extern struct cpu_cache_fns cpu_cache;
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* is visible to DMA, or data written by DMA to system memory is
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* visible to the CPU.
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*/
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+#define dmac_inv_range cpu_cache.dma_inv_range
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+#define dmac_clean_range cpu_cache.dma_clean_range
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#define dmac_flush_range cpu_cache.dma_flush_range
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#else
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@@ -156,6 +175,8 @@ extern void __cpuc_flush_dcache_area(voi
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* is visible to DMA, or data written by DMA to system memory is
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* visible to the CPU.
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*/
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+extern void dmac_inv_range(const void *, const void *);
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+extern void dmac_clean_range(const void *, const void *);
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extern void dmac_flush_range(const void *, const void *);
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#endif
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--- a/arch/arm/include/asm/glue-cache.h
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+++ b/arch/arm/include/asm/glue-cache.h
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@@ -156,6 +156,8 @@ static inline void nop_dma_unmap_area(co
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#define __cpuc_flush_dcache_area __glue(_CACHE,_flush_kern_dcache_area)
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#define dmac_flush_range __glue(_CACHE,_dma_flush_range)
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+#define dmac_inv_range __glue(_CACHE, _dma_inv_range)
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+#define dmac_clean_range __glue(_CACHE, _dma_clean_range)
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#endif
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#endif
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--- a/arch/arm/mm/cache-v7.S
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+++ b/arch/arm/mm/cache-v7.S
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@@ -363,7 +363,7 @@ ENDPROC(v7_flush_kern_dcache_area)
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* - start - virtual start address of region
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* - end - virtual end address of region
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*/
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-v7_dma_inv_range:
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+ENTRY(v7_dma_inv_range)
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dcache_line_size r2, r3
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sub r3, r2, #1
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tst r0, r3
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@@ -393,7 +393,7 @@ ENDPROC(v7_dma_inv_range)
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* - start - virtual start address of region
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* - end - virtual end address of region
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*/
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-v7_dma_clean_range:
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+ENTRY(v7_dma_clean_range)
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dcache_line_size r2, r3
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sub r3, r2, #1
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bic r0, r0, r3
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@@ -479,6 +479,8 @@ ENDPROC(v7_dma_unmap_area)
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globl_equ b15_dma_map_area, v7_dma_map_area
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globl_equ b15_dma_unmap_area, v7_dma_unmap_area
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+ globl_equ b15_dma_inv_range, v7_dma_inv_range
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+ globl_equ b15_dma_clean_range, v7_dma_clean_range
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globl_equ b15_dma_flush_range, v7_dma_flush_range
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define_cache_functions b15
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--- a/arch/arm/mm/proc-macros.S
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+++ b/arch/arm/mm/proc-macros.S
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@@ -336,6 +336,8 @@ ENTRY(\name\()_cache_fns)
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.long \name\()_flush_kern_dcache_area
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.long \name\()_dma_map_area
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.long \name\()_dma_unmap_area
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+ .long \name\()_dma_inv_range
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+ .long \name\()_dma_clean_range
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.long \name\()_dma_flush_range
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.size \name\()_cache_fns, . - \name\()_cache_fns
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.endm
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--- a/arch/arm/mm/proc-syms.c
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+++ b/arch/arm/mm/proc-syms.c
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@@ -27,6 +27,9 @@ EXPORT_SYMBOL(__cpuc_flush_user_all);
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EXPORT_SYMBOL(__cpuc_flush_user_range);
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EXPORT_SYMBOL(__cpuc_coherent_kern_range);
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EXPORT_SYMBOL(__cpuc_flush_dcache_area);
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+EXPORT_SYMBOL(dmac_inv_range);
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+EXPORT_SYMBOL(dmac_clean_range);
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+EXPORT_SYMBOL(dmac_flush_range);
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#else
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EXPORT_SYMBOL(cpu_cache);
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#endif
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