lede/target/linux/ipq806x/patches-4.9/141-qcom-ipq4019-add-second-i2c.patch
2017-09-06 19:19:45 +08:00

47 lines
1.3 KiB
Diff

From 5110346bcc17b037edd5b0193f31ad046e6242db Mon Sep 17 00:00:00 2001
From: Christian Lamparter <chunkeey@googlemail.com>
Date: Mon, 1 May 2017 13:53:07 +0200
Subject: [PATCH 2/2] qcom: ipq4019: add second i2c
This patch adds the second i2c block to the IPQ4019 platform.
The second i2c has been successfully tested on the
Cisco Meraki MR33.
Cc: Chris Blake <chrisrblake93@gmail.com>
Cc: Matthew McClintock <msm-oss@mcclintock.net>
Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
---
arch/arm/boot/dts/qcom-ipq4019.dtsi | 14 ++++++++++++++
1 file changed, 14 insertions(+)
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -26,6 +26,7 @@
aliases {
spi0 = &spi_0;
i2c0 = &i2c_0;
+ i2c1 = &i2c_1;
};
cpus {
@@ -196,6 +197,19 @@
status = "disabled";
};
+ i2c_1: i2c@78b8000 {
+ compatible = "qcom,i2c-qup-v2.2.1";
+ reg = <0x78b8000 0x600>;
+ interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&gcc GCC_BLSP1_AHB_CLK>,
+ <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>;
+ clock-names = "iface", "core";
+ dmas = <&blsp_dma 11>, <&blsp_dma 10>;
+ dma-names = "rx", "tx";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
cryptobam: dma@8e04000 {
compatible = "qcom,bam-v1.7.0";