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34 lines
1.2 KiB
Diff
34 lines
1.2 KiB
Diff
From f1aaa788b997ba8a7810da0696e89fd3f79ecce3 Mon Sep 17 00:00:00 2001
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From: devi priya <quic_devipriy@quicinc.com>
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Date: Thu, 16 May 2024 08:54:34 +0530
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Subject: [PATCH 1/3] phy: qcom-qmp: Add missing offsets for Qserdes PLL
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registers.
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Add missing register offsets for Qserdes PLL.
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Reviewed-by: Abel Vesa <abel.vesa@linaro.org>
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Signed-off-by: devi priya <quic_devipriy@quicinc.com>
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Link: https://lore.kernel.org/r/20240516032436.2681828-3-quic_devipriy@quicinc.com
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Signed-off-by: Vinod Koul <vkoul@kernel.org>
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---
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drivers/phy/qualcomm/phy-qcom-qmp-qserdes-pll.h | 3 +++
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1 file changed, 3 insertions(+)
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diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-qserdes-pll.h b/drivers/phy/qualcomm/phy-qcom-qmp-qserdes-pll.h
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index ad326e301a3a..231e59364e31 100644
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--- a/drivers/phy/qualcomm/phy-qcom-qmp-qserdes-pll.h
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+++ b/drivers/phy/qualcomm/phy-qcom-qmp-qserdes-pll.h
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@@ -8,6 +8,9 @@
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/* QMP V2 PHY for PCIE gen3 ports - QSERDES PLL registers */
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#define QSERDES_PLL_BG_TIMER 0x00c
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+#define QSERDES_PLL_SSC_EN_CENTER 0x010
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+#define QSERDES_PLL_SSC_ADJ_PER1 0x014
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+#define QSERDES_PLL_SSC_ADJ_PER2 0x018
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#define QSERDES_PLL_SSC_PER1 0x01c
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#define QSERDES_PLL_SSC_PER2 0x020
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#define QSERDES_PLL_SSC_STEP_SIZE1_MODE0 0x024
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--
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2.47.1
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