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c026408fae
Manually rebased: bcm27xx/patches-5.15/950-0600-xhci-quirks-add-link-TRB-quirk-for-VL805.patch bcm27xx/patches-5.15/950-0606-usb-xhci-add-VLI_TRB_CACHE_BUG-quirk.patch bcm27xx/patches-5.15/950-0717-usb-xhci-add-a-quirk-for-Superspeed-bulk-OUT-transfe.patch bcm53xx/patches-5.15/180-usb-xhci-add-support-for-performing-fake-doorbell.patch lantiq/patches-5.15/0028-NET-lantiq-various-etop-fixes.patch All other patches automatically rebased Co-authored-by: John Audia <therealgraysky@proton.me> Signed-off-by: John Audia <therealgraysky@proton.me>
27 lines
989 B
Diff
27 lines
989 B
Diff
From aa0c4a764d290cceba0a27fd5d81b30b54c5c81f Mon Sep 17 00:00:00 2001
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From: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
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Date: Sat, 30 Jan 2021 10:50:10 +0530
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Subject: [PATCH 128/137] dt-bindings: clock: qcom: Add reset for WCSSAON
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Add binding for WCSSAON reset required for Q6v5 reset on IPQ8074 SoC.
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Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
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Signed-off-by: Sricharan R <sricharan@codeaurora.org>
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Signed-off-by: Nikhil Prakash V <nprakash@codeaurora.org>
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Acked-by: Rob Herring <robh@kernel.org>
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Acked-by: Stephen Boyd <sboyd@kernel.org>
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---
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include/dt-bindings/clock/qcom,gcc-ipq8074.h | 1 +
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1 file changed, 1 insertion(+)
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--- a/include/dt-bindings/clock/qcom,gcc-ipq8074.h
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+++ b/include/dt-bindings/clock/qcom,gcc-ipq8074.h
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@@ -367,6 +367,7 @@
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#define GCC_PCIE1_AHB_ARES 129
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#define GCC_PCIE1_AXI_MASTER_STICKY_ARES 130
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#define GCC_PCIE0_AXI_SLAVE_STICKY_ARES 131
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+#define GCC_WCSSAON_RESET 132
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#define USB0_GDSC 0
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#define USB1_GDSC 1
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