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c026408fae
Manually rebased: bcm27xx/patches-5.15/950-0600-xhci-quirks-add-link-TRB-quirk-for-VL805.patch bcm27xx/patches-5.15/950-0606-usb-xhci-add-VLI_TRB_CACHE_BUG-quirk.patch bcm27xx/patches-5.15/950-0717-usb-xhci-add-a-quirk-for-Superspeed-bulk-OUT-transfe.patch bcm53xx/patches-5.15/180-usb-xhci-add-support-for-performing-fake-doorbell.patch lantiq/patches-5.15/0028-NET-lantiq-various-etop-fixes.patch All other patches automatically rebased Co-authored-by: John Audia <therealgraysky@proton.me> Signed-off-by: John Audia <therealgraysky@proton.me>
44 lines
1.2 KiB
Diff
44 lines
1.2 KiB
Diff
From e8516c04110438230314ddbe94879ecb4a5db5df Mon Sep 17 00:00:00 2001
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From: Robert Marko <robimarko@gmail.com>
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Date: Sun, 15 May 2022 23:00:48 +0200
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Subject: [PATCH 25/44] arm64: dts: qcom: ipq8074: add USB power domains
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Add USB power domains provided by GCC GDSCs.
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Add the required #power-domain-cells to the GCC as well.
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Signed-off-by: Robert Marko <robimarko@gmail.com>
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Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Link: https://lore.kernel.org/r/20220515210048.483898-11-robimarko@gmail.com
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---
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arch/arm64/boot/dts/qcom/ipq8074.dtsi | 5 +++++
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1 file changed, 5 insertions(+)
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--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
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+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
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@@ -347,6 +347,7 @@
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compatible = "qcom,gcc-ipq8074";
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reg = <0x01800000 0x80000>;
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#clock-cells = <0x1>;
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+ #power-domain-cells = <1>;
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#reset-cells = <0x1>;
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};
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@@ -575,6 +576,8 @@
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<133330000>,
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<19200000>;
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+ power-domains = <&gcc USB0_GDSC>;
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+
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resets = <&gcc GCC_USB0_BCR>;
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status = "disabled";
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@@ -615,6 +618,8 @@
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<133330000>,
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<19200000>;
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+ power-domains = <&gcc USB1_GDSC>;
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+
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resets = <&gcc GCC_USB1_BCR>;
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status = "disabled";
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