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c026408fae
Manually rebased: bcm27xx/patches-5.15/950-0600-xhci-quirks-add-link-TRB-quirk-for-VL805.patch bcm27xx/patches-5.15/950-0606-usb-xhci-add-VLI_TRB_CACHE_BUG-quirk.patch bcm27xx/patches-5.15/950-0717-usb-xhci-add-a-quirk-for-Superspeed-bulk-OUT-transfe.patch bcm53xx/patches-5.15/180-usb-xhci-add-support-for-performing-fake-doorbell.patch lantiq/patches-5.15/0028-NET-lantiq-various-etop-fixes.patch All other patches automatically rebased Co-authored-by: John Audia <therealgraysky@proton.me> Signed-off-by: John Audia <therealgraysky@proton.me>
38 lines
1.3 KiB
Diff
38 lines
1.3 KiB
Diff
From 04e91eb95f7a0a9dceed2c1fcb47fbbe7f96ec52 Mon Sep 17 00:00:00 2001
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From: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Date: Wed, 4 May 2022 15:19:16 +0200
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Subject: [PATCH 15/44] arm64: dts: qcom: correct DWC3 node names and unit
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addresses
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Align DWC3 USB node names with DT schema ("usb" is expected) and correct
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the unit addresses to match the "reg" property. This also implies
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overriding nodes by label, instead of full path.
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Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Link: https://lore.kernel.org/r/20220504131923.214367-7-krzysztof.kozlowski@linaro.org
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Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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---
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arch/arm64/boot/dts/qcom/ipq8074.dtsi | 4 ++--
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1 file changed, 2 insertions(+), 2 deletions(-)
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--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
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+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
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@@ -578,7 +578,7 @@
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resets = <&gcc GCC_USB0_BCR>;
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status = "disabled";
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- dwc_0: dwc3@8a00000 {
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+ dwc_0: usb@8a00000 {
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compatible = "snps,dwc3";
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reg = <0x8a00000 0xcd00>;
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interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
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@@ -618,7 +618,7 @@
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resets = <&gcc GCC_USB1_BCR>;
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status = "disabled";
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- dwc_1: dwc3@8c00000 {
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+ dwc_1: usb@8c00000 {
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compatible = "snps,dwc3";
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reg = <0x8c00000 0xcd00>;
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interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>;
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