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c026408fae
Manually rebased: bcm27xx/patches-5.15/950-0600-xhci-quirks-add-link-TRB-quirk-for-VL805.patch bcm27xx/patches-5.15/950-0606-usb-xhci-add-VLI_TRB_CACHE_BUG-quirk.patch bcm27xx/patches-5.15/950-0717-usb-xhci-add-a-quirk-for-Superspeed-bulk-OUT-transfe.patch bcm53xx/patches-5.15/180-usb-xhci-add-support-for-performing-fake-doorbell.patch lantiq/patches-5.15/0028-NET-lantiq-various-etop-fixes.patch All other patches automatically rebased Co-authored-by: John Audia <therealgraysky@proton.me> Signed-off-by: John Audia <therealgraysky@proton.me>
54 lines
1.8 KiB
Diff
54 lines
1.8 KiB
Diff
From 4ef751128de689e12e3eccb5d4e2562ef8b42758 Mon Sep 17 00:00:00 2001
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From: Shawn Guo <shawn.guo@linaro.org>
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Date: Wed, 29 Sep 2021 11:42:46 +0800
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Subject: [PATCH 04/44] arm64: dts: qcom: msm8996: Move '#clock-cells' to QMP
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PHY child node
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'#clock-cells' is a required property of QMP PHY child node, not itself.
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Move it to fix the dtbs_check warnings.
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There are only '#clock-cells' removal from SM8350 QMP PHY nodes, because
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child nodes already have the property.
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Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Link: https://lore.kernel.org/r/20210929034253.24570-4-shawn.guo@linaro.org
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---
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arch/arm64/boot/dts/qcom/ipq8074.dtsi | 4 ++--
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1 file changed, 2 insertions(+), 2 deletions(-)
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--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
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+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
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@@ -91,7 +91,6 @@
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ssphy_1: phy@58000 {
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compatible = "qcom,ipq8074-qmp-usb3-phy";
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reg = <0x00058000 0x1c4>;
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- #clock-cells = <1>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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@@ -112,6 +111,7 @@
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<0x00058800 0x1f8>, /* PCS */
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<0x00058600 0x044>; /* PCS misc*/
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#phy-cells = <0>;
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+ #clock-cells = <1>;
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clocks = <&gcc GCC_USB1_PIPE_CLK>;
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clock-names = "pipe0";
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clock-output-names = "gcc_usb1_pipe_clk_src";
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@@ -134,7 +134,6 @@
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ssphy_0: phy@78000 {
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compatible = "qcom,ipq8074-qmp-usb3-phy";
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reg = <0x00078000 0x1c4>;
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- #clock-cells = <1>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges;
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@@ -155,6 +154,7 @@
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<0x00078800 0x1f8>, /* PCS */
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<0x00078600 0x044>; /* PCS misc*/
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#phy-cells = <0>;
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+ #clock-cells = <1>;
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clocks = <&gcc GCC_USB0_PIPE_CLK>;
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clock-names = "pipe0";
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clock-output-names = "gcc_usb0_pipe_clk_src";
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