lede/target/linux/silicon/patches-5.19/0020-arm64-dts-apple-Add-CPUfreq-nodes-for-t6001.patch

487 lines
12 KiB
Diff

From 0bea0800d5e0e32323bbbe2b2edfe16e08116bc9 Mon Sep 17 00:00:00 2001
From: Hector Martin <marcan@marcan.st>
Date: Tue, 15 Feb 2022 21:34:10 +0900
Subject: [PATCH 020/171] arm64: dts: apple: Add CPUfreq nodes for t6001
Signed-off-by: Hector Martin <marcan@marcan.st>
---
arch/arm64/boot/dts/apple/t6001.dtsi | 7 +
arch/arm64/boot/dts/apple/t6002.dtsi | 81 +++++++++
arch/arm64/boot/dts/apple/t600x-common.dtsi | 188 ++++++++++++++++++++
arch/arm64/boot/dts/apple/t600x-die0.dtsi | 4 +
4 files changed, 280 insertions(+)
diff --git a/arch/arm64/boot/dts/apple/t6001.dtsi b/arch/arm64/boot/dts/apple/t6001.dtsi
index 620b17e4031f..832e9bedc1fb 100644
--- a/arch/arm64/boot/dts/apple/t6001.dtsi
+++ b/arch/arm64/boot/dts/apple/t6001.dtsi
@@ -47,6 +47,13 @@ soc {
#undef DIE_NO
+&cpufreq_hw {
+ reg = <0x2 0x10e20000 0 0x1000>,
+ <0x2 0x11e20000 0 0x1000>,
+ <0x2 0x12e20000 0 0x1000>;
+ reg-names = "cluster0", "cluster1", "cluster2";
+};
+
&aic {
affinities {
e-core-pmu-affinity {
diff --git a/arch/arm64/boot/dts/apple/t6002.dtsi b/arch/arm64/boot/dts/apple/t6002.dtsi
index 736f16aad70f..f3618df00518 100644
--- a/arch/arm64/boot/dts/apple/t6002.dtsi
+++ b/arch/arm64/boot/dts/apple/t6002.dtsi
@@ -23,12 +23,56 @@ / {
#size-cells = <2>;
cpus {
+ cpu-map {
+ cluster3 {
+ core0 {
+ cpu = <&cpu_e10>;
+ };
+ core1 {
+ cpu = <&cpu_e11>;
+ };
+ };
+
+ cluster4 {
+ core0 {
+ cpu = <&cpu_p20>;
+ };
+ core1 {
+ cpu = <&cpu_p21>;
+ };
+ core2 {
+ cpu = <&cpu_p22>;
+ };
+ core3 {
+ cpu = <&cpu_p23>;
+ };
+ };
+
+ cluster5 {
+ core0 {
+ cpu = <&cpu_p30>;
+ };
+ core1 {
+ cpu = <&cpu_p31>;
+ };
+ core2 {
+ cpu = <&cpu_p32>;
+ };
+ core3 {
+ cpu = <&cpu_p33>;
+ };
+ };
+ };
+
cpu_e10: cpu@800 {
compatible = "apple,icestorm";
device_type = "cpu";
reg = <0x0 0x800>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
+ operating-points-v2 = <&icestorm_opp>;
+ capacity-dmips-mhz = <714>;
+ apple,freq-domain = <&cpufreq_hw 3>;
};
cpu_e11: cpu@801 {
@@ -37,6 +81,9 @@ cpu_e11: cpu@801 {
reg = <0x0 0x801>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
+ operating-points-v2 = <&icestorm_opp>;
+ capacity-dmips-mhz = <714>;
+ apple,freq-domain = <&cpufreq_hw 3>;
};
cpu_p20: cpu@10900 {
@@ -45,6 +92,9 @@ cpu_p20: cpu@10900 {
reg = <0x0 0x10900>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
+ operating-points-v2 = <&firestorm_opp>;
+ capacity-dmips-mhz = <1024>;
+ apple,freq-domain = <&cpufreq_hw 4>;
};
cpu_p21: cpu@10901 {
@@ -53,6 +103,9 @@ cpu_p21: cpu@10901 {
reg = <0x0 0x10901>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
+ operating-points-v2 = <&firestorm_opp>;
+ capacity-dmips-mhz = <1024>;
+ apple,freq-domain = <&cpufreq_hw 4>;
};
cpu_p22: cpu@10902 {
@@ -61,6 +114,9 @@ cpu_p22: cpu@10902 {
reg = <0x0 0x10902>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
+ operating-points-v2 = <&firestorm_opp>;
+ capacity-dmips-mhz = <1024>;
+ apple,freq-domain = <&cpufreq_hw 4>;
};
cpu_p23: cpu@10903 {
@@ -69,6 +125,9 @@ cpu_p23: cpu@10903 {
reg = <0x0 0x10903>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
+ operating-points-v2 = <&firestorm_opp>;
+ capacity-dmips-mhz = <1024>;
+ apple,freq-domain = <&cpufreq_hw 4>;
};
cpu_p30: cpu@10a00 {
@@ -77,6 +136,9 @@ cpu_p30: cpu@10a00 {
reg = <0x0 0x10a00>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
+ operating-points-v2 = <&firestorm_opp>;
+ capacity-dmips-mhz = <1024>;
+ apple,freq-domain = <&cpufreq_hw 5>;
};
cpu_p31: cpu@10a01 {
@@ -85,6 +147,9 @@ cpu_p31: cpu@10a01 {
reg = <0x0 0x10a01>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
+ operating-points-v2 = <&firestorm_opp>;
+ capacity-dmips-mhz = <1024>;
+ apple,freq-domain = <&cpufreq_hw 5>;
};
cpu_p32: cpu@10a02 {
@@ -93,6 +158,9 @@ cpu_p32: cpu@10a02 {
reg = <0x0 0x10a02>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
+ operating-points-v2 = <&firestorm_opp>;
+ capacity-dmips-mhz = <1024>;
+ apple,freq-domain = <&cpufreq_hw 5>;
};
cpu_p33: cpu@10a03 {
@@ -101,6 +169,9 @@ cpu_p33: cpu@10a03 {
reg = <0x0 0x10a03>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
+ operating-points-v2 = <&firestorm_opp>;
+ capacity-dmips-mhz = <1024>;
+ apple,freq-domain = <&cpufreq_hw 5>;
};
};
@@ -162,6 +233,16 @@ die1 {
#undef DIE
#undef DIE_NO
+&cpufreq_hw {
+ reg = <0x2 0x10e20000 0 0x1000>,
+ <0x2 0x11e20000 0 0x1000>,
+ <0x2 0x12e20000 0 0x1000>,
+ <0x22 0x10e20000 0 0x1000>,
+ <0x22 0x11e20000 0 0x1000>,
+ <0x22 0x12e20000 0 0x1000>;
+ reg-names = "cluster0", "cluster1", "cluster2",
+ "cluster3", "cluster4", "cluster5";
+};
&aic {
affinities {
diff --git a/arch/arm64/boot/dts/apple/t600x-common.dtsi b/arch/arm64/boot/dts/apple/t600x-common.dtsi
index e29b88e2c853..06e160880407 100644
--- a/arch/arm64/boot/dts/apple/t600x-common.dtsi
+++ b/arch/arm64/boot/dts/apple/t600x-common.dtsi
@@ -15,12 +15,56 @@ cpus {
#address-cells = <2>;
#size-cells = <0>;
+ cpu-map {
+ cluster0 {
+ core0 {
+ cpu = <&cpu_e00>;
+ };
+ core1 {
+ cpu = <&cpu_e01>;
+ };
+ };
+
+ cluster1 {
+ core0 {
+ cpu = <&cpu_p00>;
+ };
+ core1 {
+ cpu = <&cpu_p01>;
+ };
+ core2 {
+ cpu = <&cpu_p02>;
+ };
+ core3 {
+ cpu = <&cpu_p03>;
+ };
+ };
+
+ cluster2 {
+ core0 {
+ cpu = <&cpu_p10>;
+ };
+ core1 {
+ cpu = <&cpu_p11>;
+ };
+ core2 {
+ cpu = <&cpu_p12>;
+ };
+ core3 {
+ cpu = <&cpu_p13>;
+ };
+ };
+ };
+
cpu_e00: cpu@0 {
compatible = "apple,icestorm";
device_type = "cpu";
reg = <0x0 0x0>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
+ operating-points-v2 = <&icestorm_opp>;
+ capacity-dmips-mhz = <714>;
+ apple,freq-domain = <&cpufreq_hw 0>;
};
cpu_e01: cpu@1 {
@@ -29,6 +73,9 @@ cpu_e01: cpu@1 {
reg = <0x0 0x1>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
+ operating-points-v2 = <&icestorm_opp>;
+ capacity-dmips-mhz = <714>;
+ apple,freq-domain = <&cpufreq_hw 0>;
};
cpu_p00: cpu@10100 {
@@ -37,6 +84,9 @@ cpu_p00: cpu@10100 {
reg = <0x0 0x10100>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
+ operating-points-v2 = <&firestorm_opp>;
+ capacity-dmips-mhz = <1024>;
+ apple,freq-domain = <&cpufreq_hw 1>;
};
cpu_p01: cpu@10101 {
@@ -45,6 +95,9 @@ cpu_p01: cpu@10101 {
reg = <0x0 0x10101>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
+ operating-points-v2 = <&firestorm_opp>;
+ capacity-dmips-mhz = <1024>;
+ apple,freq-domain = <&cpufreq_hw 1>;
};
cpu_p02: cpu@10102 {
@@ -53,6 +106,9 @@ cpu_p02: cpu@10102 {
reg = <0x0 0x10102>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
+ operating-points-v2 = <&firestorm_opp>;
+ capacity-dmips-mhz = <1024>;
+ apple,freq-domain = <&cpufreq_hw 1>;
};
cpu_p03: cpu@10103 {
@@ -61,6 +117,9 @@ cpu_p03: cpu@10103 {
reg = <0x0 0x10103>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
+ operating-points-v2 = <&firestorm_opp>;
+ capacity-dmips-mhz = <1024>;
+ apple,freq-domain = <&cpufreq_hw 1>;
};
cpu_p10: cpu@10200 {
@@ -69,6 +128,9 @@ cpu_p10: cpu@10200 {
reg = <0x0 0x10200>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
+ operating-points-v2 = <&firestorm_opp>;
+ capacity-dmips-mhz = <1024>;
+ apple,freq-domain = <&cpufreq_hw 2>;
};
cpu_p11: cpu@10201 {
@@ -77,6 +139,9 @@ cpu_p11: cpu@10201 {
reg = <0x0 0x10201>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
+ operating-points-v2 = <&firestorm_opp>;
+ capacity-dmips-mhz = <1024>;
+ apple,freq-domain = <&cpufreq_hw 2>;
};
cpu_p12: cpu@10202 {
@@ -85,6 +150,9 @@ cpu_p12: cpu@10202 {
reg = <0x0 0x10202>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
+ operating-points-v2 = <&firestorm_opp>;
+ capacity-dmips-mhz = <1024>;
+ apple,freq-domain = <&cpufreq_hw 2>;
};
cpu_p13: cpu@10203 {
@@ -93,7 +161,127 @@ cpu_p13: cpu@10203 {
reg = <0x0 0x10203>;
enable-method = "spin-table";
cpu-release-addr = <0 0>; /* To be filled by loader */
+ operating-points-v2 = <&firestorm_opp>;
+ capacity-dmips-mhz = <1024>;
+ apple,freq-domain = <&cpufreq_hw 2>;
+ };
+ };
+
+ icestorm_opp: opp-table-0 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp01 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-level = <1>;
+ clock-latency-ns = <7500>;
+ };
+ opp02 {
+ opp-hz = /bits/ 64 <972000000>;
+ opp-level = <2>;
+ clock-latency-ns = <23000>;
+ };
+ opp03 {
+ opp-hz = /bits/ 64 <1332000000>;
+ opp-level = <3>;
+ clock-latency-ns = <29000>;
+ };
+ opp04 {
+ opp-hz = /bits/ 64 <1704000000>;
+ opp-level = <4>;
+ clock-latency-ns = <40000>;
+ };
+ opp05 {
+ opp-hz = /bits/ 64 <2064000000>;
+ opp-level = <5>;
+ clock-latency-ns = <50000>;
+ };
+ };
+
+ firestorm_opp: opp-table-1 {
+ compatible = "operating-points-v2";
+ opp-shared;
+
+ opp01 {
+ opp-hz = /bits/ 64 <600000000>;
+ opp-level = <1>;
+ clock-latency-ns = <8000>;
+ };
+ opp02 {
+ opp-hz = /bits/ 64 <828000000>;
+ opp-level = <2>;
+ clock-latency-ns = <18000>;
+ };
+ opp03 {
+ opp-hz = /bits/ 64 <1056000000>;
+ opp-level = <3>;
+ clock-latency-ns = <19000>;
+ };
+ opp04 {
+ opp-hz = /bits/ 64 <1296000000>;
+ opp-level = <4>;
+ clock-latency-ns = <23000>;
+ };
+ opp05 {
+ opp-hz = /bits/ 64 <1524000000>;
+ opp-level = <5>;
+ clock-latency-ns = <24000>;
+ };
+ opp06 {
+ opp-hz = /bits/ 64 <1752000000>;
+ opp-level = <6>;
+ clock-latency-ns = <28000>;
+ };
+ opp07 {
+ opp-hz = /bits/ 64 <1980000000>;
+ opp-level = <7>;
+ clock-latency-ns = <31000>;
+ };
+ opp08 {
+ opp-hz = /bits/ 64 <2208000000>;
+ opp-level = <8>;
+ clock-latency-ns = <45000>;
+ };
+ opp09 {
+ opp-hz = /bits/ 64 <2448000000>;
+ opp-level = <9>;
+ clock-latency-ns = <49000>;
+ };
+ opp10 {
+ opp-hz = /bits/ 64 <2676000000>;
+ opp-level = <10>;
+ clock-latency-ns = <53000>;
+ };
+ opp11 {
+ opp-hz = /bits/ 64 <2904000000>;
+ opp-level = <11>;
+ clock-latency-ns = <56000>;
+ };
+ opp12 {
+ opp-hz = /bits/ 64 <3036000000>;
+ opp-level = <12>;
+ clock-latency-ns = <56000>;
+ };
+ /* Not available until CPU deep sleep is implemented
+ opp13 {
+ opp-hz = /bits/ 64 <3132000000>;
+ opp-level = <13>;
+ clock-latency-ns = <56000>;
+ turbo-mode;
+ };
+ opp14 {
+ opp-hz = /bits/ 64 <3168000000>;
+ opp-level = <14>;
+ clock-latency-ns = <56000>;
+ turbo-mode;
+ };
+ opp15 {
+ opp-hz = /bits/ 64 <3228000000>;
+ opp-level = <15>;
+ clock-latency-ns = <56000>;
+ turbo-mode;
};
+ */
};
pmu-e {
diff --git a/arch/arm64/boot/dts/apple/t600x-die0.dtsi b/arch/arm64/boot/dts/apple/t600x-die0.dtsi
index 8131352e3ccd..129984bd9a8b 100644
--- a/arch/arm64/boot/dts/apple/t600x-die0.dtsi
+++ b/arch/arm64/boot/dts/apple/t600x-die0.dtsi
@@ -6,6 +6,10 @@
* Copyright The Asahi Linux Contributors
*/
+ cpufreq_hw: cpufreq@210e20000 {
+ compatible = "apple,t6000-soc-cpufreq", "apple,soc-cpufreq";
+ #freq-domain-cells = <1>;
+ };
aic: interrupt-controller@28e100000 {
compatible = "apple,t6000-aic", "apple,aic2";
--
2.34.1