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35 lines
1.3 KiB
Diff
35 lines
1.3 KiB
Diff
From 5726079cd4860c190722445e01e1007e40a9ccb4 Mon Sep 17 00:00:00 2001
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From: Sean Anderson <sean.anderson@seco.com>
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Date: Thu, 27 Jan 2022 15:06:36 -0500
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Subject: [PATCH] arm64: dts: ipq6018: Use reference clock to set dwc3 period
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Instead of manually setting snps,ref-clock-period-ns, we can let the
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driver calculate it automatically from the "ref" clock. I haven't
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reviewed this board's schematics, so please let me know if this is the
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wrong 24MHz clock to use.
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Signed-off-by: Sean Anderson <sean.anderson@seco.com>
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Link: https://lore.kernel.org/r/20220127200636.1456175-8-sean.anderson@seco.com
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Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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---
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arch/arm64/boot/dts/qcom/ipq6018.dtsi | 3 ++-
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1 file changed, 2 insertions(+), 1 deletion(-)
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--- a/arch/arm64/boot/dts/qcom/ipq6018.dtsi
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+++ b/arch/arm64/boot/dts/qcom/ipq6018.dtsi
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@@ -737,12 +737,13 @@
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interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
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phys = <&qusb_phy_0>, <&usb0_ssphy>;
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phy-names = "usb2-phy", "usb3-phy";
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+ clocks = <&xo>;
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+ clock-names = "ref";
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tx-fifo-resize;
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snps,is-utmi-l1-suspend;
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snps,hird-threshold = /bits/ 8 <0x0>;
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snps,dis_u2_susphy_quirk;
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snps,dis_u3_susphy_quirk;
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- snps,ref-clock-period-ns = <0x29>;
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dr_mode = "host";
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};
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};
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