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https://github.com/coolsnowwolf/lede.git
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120 lines
3.8 KiB
Diff
120 lines
3.8 KiB
Diff
From 86e2ed4e9a9680013ec9ab7c0428c9b8c5108efe Mon Sep 17 00:00:00 2001
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From: Frank Wang <frank.wang@rock-chips.com>
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Date: Wed, 16 Oct 2024 15:37:10 +0800
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Subject: [PATCH] phy: rockchip: inno-usb2: convert clock management to bulk
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Since some Rockchip SoCs (e.g RK3576) have more than one clock,
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this converts the clock management from single to bulk method to
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make the driver more flexible.
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Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
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Reviewed-by: Heiko Stuebner <heiko@sntech.de>
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Link: https://lore.kernel.org/r/20241016073713.14133-1-frawang.cn@gmail.com
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Signed-off-by: Vinod Koul <vkoul@kernel.org>
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---
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drivers/phy/rockchip/phy-rockchip-inno-usb2.c | 45 +++++++++++++++----
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1 file changed, 37 insertions(+), 8 deletions(-)
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--- a/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
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+++ b/drivers/phy/rockchip/phy-rockchip-inno-usb2.c
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@@ -225,9 +225,10 @@ struct rockchip_usb2phy_port {
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* @dev: pointer to device.
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* @grf: General Register Files regmap.
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* @usbgrf: USB General Register Files regmap.
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- * @clk: clock struct of phy input clk.
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+ * @clks: array of phy input clocks.
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* @clk480m: clock struct of phy output clk.
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* @clk480m_hw: clock struct of phy output clk management.
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+ * @num_clks: number of phy input clocks.
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* @phy_reset: phy reset control.
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* @chg_state: states involved in USB charger detection.
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* @chg_type: USB charger types.
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@@ -242,9 +243,10 @@ struct rockchip_usb2phy {
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struct device *dev;
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struct regmap *grf;
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struct regmap *usbgrf;
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- struct clk *clk;
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+ struct clk_bulk_data *clks;
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struct clk *clk480m;
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struct clk_hw clk480m_hw;
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+ int num_clks;
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struct reset_control *phy_reset;
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enum usb_chg_state chg_state;
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enum power_supply_type chg_type;
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@@ -306,6 +308,13 @@ static int rockchip_usb2phy_reset(struct
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return 0;
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}
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+static void rockchip_usb2phy_clk_bulk_disable(void *data)
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+{
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+ struct rockchip_usb2phy *rphy = data;
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+
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+ clk_bulk_disable_unprepare(rphy->num_clks, rphy->clks);
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+}
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+
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static int rockchip_usb2phy_clk480m_prepare(struct clk_hw *hw)
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{
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struct rockchip_usb2phy *rphy =
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@@ -372,7 +381,9 @@ rockchip_usb2phy_clk480m_register(struct
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{
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struct device_node *node = rphy->dev->of_node;
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struct clk_init_data init;
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+ struct clk *refclk = NULL;
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const char *clk_name;
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+ int i;
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int ret = 0;
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init.flags = 0;
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@@ -382,8 +393,15 @@ rockchip_usb2phy_clk480m_register(struct
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/* optional override of the clockname */
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of_property_read_string(node, "clock-output-names", &init.name);
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- if (rphy->clk) {
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- clk_name = __clk_get_name(rphy->clk);
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+ for (i = 0; i < rphy->num_clks; i++) {
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+ if (!strncmp(rphy->clks[i].id, "phyclk", 6)) {
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+ refclk = rphy->clks[i].clk;
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+ break;
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+ }
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+ }
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+
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+ if (!IS_ERR(refclk)) {
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+ clk_name = __clk_get_name(refclk);
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init.parent_names = &clk_name;
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init.num_parents = 1;
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} else {
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@@ -1385,11 +1403,13 @@ static int rockchip_usb2phy_probe(struct
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if (IS_ERR(rphy->phy_reset))
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return PTR_ERR(rphy->phy_reset);
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- rphy->clk = devm_clk_get_optional_enabled(dev, "phyclk");
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- if (IS_ERR(rphy->clk)) {
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- return dev_err_probe(&pdev->dev, PTR_ERR(rphy->clk),
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- "failed to get phyclk\n");
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- }
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+ ret = devm_clk_bulk_get_all(dev, &rphy->clks);
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+ if (ret == -EPROBE_DEFER)
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+ return dev_err_probe(&pdev->dev, -EPROBE_DEFER,
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+ "failed to get phy clock\n");
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+
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+ /* Clocks are optional */
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+ rphy->num_clks = ret < 0 ? 0 : ret;
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ret = rockchip_usb2phy_clk480m_register(rphy);
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if (ret) {
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@@ -1397,6 +1417,14 @@ static int rockchip_usb2phy_probe(struct
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return ret;
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}
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+ ret = clk_bulk_prepare_enable(rphy->num_clks, rphy->clks);
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+ if (ret)
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+ return dev_err_probe(dev, ret, "failed to enable phy clock\n");
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+
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+ ret = devm_add_action_or_reset(dev, rockchip_usb2phy_clk_bulk_disable, rphy);
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+ if (ret)
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+ return ret;
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+
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if (rphy->phy_cfg->phy_tuning) {
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ret = rphy->phy_cfg->phy_tuning(rphy);
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if (ret)
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