lede/target/linux/phytium/files-5.10/Documentation/devicetree/bindings/interrupt-controller/phytium,ixic.txt
HunZI a462d2b757
target: add phytium support (#11798)
* target: add phytium support

* kernel/video: add phytium platform ARM GPU support

* config: add EFI support to phytium armv8

* target: phytium: remove rtl8821cs driver

* target: phytium: refresh dts
2024-01-18 15:16:24 +08:00

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Phytium INTx interrupt controller (IXIC)
This is a pseudo interrupt controller to handle PCI legacy interrupt on
some Phytium SoCs, which sits between the PCI INTx devices and the GIC
and forwards the 4 INTx input signals to 4 adjacent GICv3 SPIs.
Required properties:
- compatible : "phytium,ixic"
- reg : Specifies two regions of the register set, which
are called 'ctr' and 'hpb'.
- interrupt-controller : Identifies the node as an interrupt controller.
- #interrupt-cells : Specifies the number of cells needed to encode an
interrupt source. The value must be 3.
- intx-spi-base : The SPI number of the first SPI of the 4 adjacent
ones the IXIC forwards its interrupts to.
Example:
ixic: interrupt-controller@29000000 {
compatible = "phytium,ixic";
reg-names = "ctr", "hpb";
reg = <0x0 0x29000000 0x0 0x00060000>,
<0x0 0x29100000 0x0 0x00002000>;
interrupt-controller;
interrupt-parent = <&gic>;
#interrupt-cells = <3>;
intx-spi-base = <28>;
};