mirror of
https://github.com/coolsnowwolf/lede.git
synced 2025-04-16 04:13:31 +00:00
9fe455c514
This commit add basic support for Photonicat Board. Flash into lede: Run first: dd if=openwrt-xxx.img of=/dev/mmcblk0 Then brush the img file to sdcard and insert it, the system will boot from above. Note: Since rockchip does not release any code to power up their device, disabled emmc for now until we can remove rkbin.
209 lines
4.4 KiB
Diff
209 lines
4.4 KiB
Diff
--- a/arch/arm/dts/Makefile
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+++ b/arch/arm/dts/Makefile
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@@ -175,6 +175,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3399) += \
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rk3568-opc-h68k.dtb \
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rk3568-mrkaio-m68s.dtb \
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rk3568-nanopi-r5s.dtb \
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+ rk3568-photonicat.dtb \
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rk3566-quartz64-a.dtb \
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rk3568-rock-3a.dtb \
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rk3568-rock-pi-e25.dtb
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--- /dev/null
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+++ b/arch/arm/dts/rk3568-photonicat-u-boot.dtsi
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@@ -0,0 +1,33 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+
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+#include "rk3568-u-boot.dtsi"
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+
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+/ {
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+ chosen {
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+ stdout-path = &uart2;
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+ u-boot,spl-boot-order = "same-as-spl", &sdmmc0, &sdhci;
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+ };
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+};
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+
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+&gpio0 {
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+ u-boot,dm-spl;
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+};
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+
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+&pinctrl {
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+ u-boot,dm-spl;
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+};
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+
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+&sdmmc0 {
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+ bus-width = <4>;
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+ u-boot,spl-fifo-mode;
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+};
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+
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+&uart2 {
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+ u-boot,dm-spl;
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+ clock-frequency = <24000000>;
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+ status = "okay";
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+};
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+
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+&vcc3v3_sd {
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+ u-boot,dm-spl;
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+};
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--- /dev/null
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+++ b/arch/arm/dts/rk3568-photonicat.dts
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@@ -0,0 +1,54 @@
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+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
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+
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+/dts-v1/;
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+#include <dt-bindings/gpio/gpio.h>
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+#include <dt-bindings/pinctrl/rockchip.h>
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+#include "rk3568.dtsi"
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+
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+/ {
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+ model = "Ariaboard Photonicat";
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+ compatible = "ariaboard,photonicat", "rockchip,rk3568";
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+
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+ chosen: chosen {
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+ stdout-path = "serial2:1500000n8";
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+ };
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+
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+ vcc3v3_sd: vcc3v3_sd {
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+ compatible = "regulator-fixed";
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+ gpio = <&gpio0 RK_PB6 GPIO_ACTIVE_LOW>;
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&vcc_sd_h>;
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+ regulator-boot-on;
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+ regulator-name = "vcc3v3_sd";
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ };
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+};
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+
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+&pinctrl {
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+ vcc_sd {
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+ vcc_sd_h: vcc-sd-h {
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+ rockchip,pins = <0 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>;
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+ };
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+ };
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+};
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+
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+&sdhci {
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+ bus-width = <8>;
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+ max-frequency = <200000000>;
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+ non-removable;
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+ status = "okay";
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+};
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+
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+&sdmmc0 {
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+ max-frequency = <52000000>;
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+ status = "okay";
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+};
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+
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+&sdmmc1 {
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+ status = "okay";
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+};
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+
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+&uart2 {
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+ status = "okay";
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+};
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--- /dev/null
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+++ b/configs/photonicat-rk3568_defconfig
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@@ -0,0 +1,101 @@
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+CONFIG_ARM=y
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+CONFIG_SKIP_LOWLEVEL_INIT=y
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+CONFIG_ARCH_ROCKCHIP=y
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+CONFIG_SYS_TEXT_BASE=0x00a00000
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+CONFIG_SPL_LIBCOMMON_SUPPORT=y
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+CONFIG_SPL_LIBGENERIC_SUPPORT=y
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+CONFIG_NR_DRAM_BANKS=2
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+CONFIG_DEFAULT_DEVICE_TREE="rk3568-photonicat"
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+CONFIG_ROCKCHIP_RK3568=y
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+CONFIG_SPL_ROCKCHIP_BACK_TO_BROM=y
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+CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y
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+CONFIG_SPL_GPIO=y
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+CONFIG_SPL_MMC=y
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+CONFIG_SPL_SERIAL=y
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+CONFIG_SPL_STACK_R_ADDR=0x600000
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+CONFIG_TARGET_EVB_RK3568=y
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+CONFIG_DEBUG_UART_BASE=0xFE660000
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+CONFIG_DEBUG_UART_CLOCK=24000000
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+CONFIG_DEBUG_UART=y
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+CONFIG_SYS_LOAD_ADDR=0xc00800
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+CONFIG_API=y
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+CONFIG_FIT=y
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+CONFIG_FIT_VERBOSE=y
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+CONFIG_SPL_LOAD_FIT=y
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+CONFIG_OF_SYSTEM_SETUP=y
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+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3568-photonicat.dtb"
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+# CONFIG_SYS_DEVICE_NULLDEV is not set
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+CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS=2
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+# CONFIG_DISPLAY_CPUINFO is not set
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+CONFIG_DISPLAY_BOARDINFO_LATE=y
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+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
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+CONFIG_SPL_STACK_R=y
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+CONFIG_SPL_SEPARATE_BSS=y
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+CONFIG_SPL_ADC=y
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+CONFIG_SPL_ATF=y
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+CONFIG_SPL_BOARD_INIT=y
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+CONFIG_CMD_ADC=y
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+CONFIG_CMD_BIND=y
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+CONFIG_CMD_CLK=y
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+CONFIG_CMD_GPIO=y
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+CONFIG_CMD_GPT=y
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+CONFIG_CMD_I2C=y
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+CONFIG_CMD_MMC=y
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+CONFIG_CMD_USB=y
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+# CONFIG_CMD_SETEXPR is not set
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+CONFIG_CMD_PMIC=y
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+CONFIG_CMD_REGULATOR=y
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+# CONFIG_SPL_DOS_PARTITION is not set
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+CONFIG_SPL_OF_CONTROL=y
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+CONFIG_OF_LIVE=y
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+CONFIG_NET_RANDOM_ETHADDR=y
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+CONFIG_SPL_DM_WARN=y
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+CONFIG_SPL_REGMAP=y
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+CONFIG_SPL_SYSCON=y
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+CONFIG_SPL_CLK=y
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+CONFIG_ROCKCHIP_GPIO=y
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+CONFIG_ROCKCHIP_GPIO_V2=y
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+CONFIG_SYS_I2C_ROCKCHIP=y
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+CONFIG_MISC=y
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+CONFIG_MMC_IO_VOLTAGE=y
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+CONFIG_SPL_MMC_IO_VOLTAGE=y
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+CONFIG_MMC_HS200_SUPPORT=y
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+CONFIG_SPL_MMC_HS200_SUPPORT=y
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+CONFIG_MMC_DW=y
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+CONFIG_MMC_DW_ROCKCHIP=y
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+CONFIG_MMC_SDHCI=y
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+CONFIG_MMC_SDHCI_SDMA=y
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+CONFIG_MMC_SDHCI_ROCKCHIP=y
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+CONFIG_DM_ETH=y
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+CONFIG_ETH_DESIGNWARE=y
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+CONFIG_GMAC_ROCKCHIP=y
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+CONFIG_POWER_DOMAIN=y
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+CONFIG_DM_PMIC=y
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+CONFIG_PMIC_RK8XX=y
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+CONFIG_SPL_PMIC_RK8XX=y
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+CONFIG_REGULATOR_PWM=y
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+CONFIG_DM_REGULATOR_FIXED=y
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+CONFIG_SPL_DM_REGULATOR_FIXED=y
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+CONFIG_DM_REGULATOR_GPIO=y
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+CONFIG_REGULATOR_RK8XX=y
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+CONFIG_PWM_ROCKCHIP=y
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+CONFIG_SPL_RAM=y
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+CONFIG_DM_RESET=y
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+CONFIG_BAUDRATE=1500000
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+CONFIG_DEBUG_UART_SHIFT=2
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+CONFIG_SYSRESET=y
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+CONFIG_USB=y
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+CONFIG_USB_XHCI_HCD=y
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+CONFIG_USB_XHCI_DWC3=y
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+CONFIG_USB_EHCI_HCD=y
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+CONFIG_USB_EHCI_GENERIC=y
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+CONFIG_USB_OHCI_HCD=y
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+CONFIG_USB_OHCI_GENERIC=y
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+CONFIG_USB_DWC3=y
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+CONFIG_USB_DWC3_GENERIC=y
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+CONFIG_ROCKCHIP_USB2_PHY=y
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+CONFIG_USB_KEYBOARD=y
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+CONFIG_USB_HOST_ETHER=y
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+CONFIG_USB_ETHER_LAN75XX=y
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+CONFIG_USB_ETHER_LAN78XX=y
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+CONFIG_USB_ETHER_SMSC95XX=y
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+CONFIG_ERRNO_STR=y
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