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75 lines
3.5 KiB
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75 lines
3.5 KiB
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From patchwork Thu Jul 30 12:26:41 2020
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X-Patchwork-Submitter: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
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From: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
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To: gokulsri@codeaurora.org, agross@kernel.org,
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bjorn.andersson@linaro.org, david.brown@linaro.org,
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devicetree@vger.kernel.org, jassisinghbrar@gmail.com,
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linux-arm-msm@vger.kernel.org, linux-clk@vger.kernel.org,
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nprakash@codeaurora.org, ohad@wizery.com, robh+dt@kernel.org,
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sboyd@kernel.org, sricharan@codeaurora.org
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Subject: [PATCH v7 7/9] clk: qcom: Add WCSSAON reset
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Date: Thu, 30 Jul 2020 17:56:41 +0530
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Message-Id: <1596112003-31663-8-git-send-email-gokulsri@codeaurora.org>
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Add WCSSAON reset required for Q6v5 on IPQ8074 SoC.
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Signed-off-by: Gokul Sriram Palanisamy <gokulsri@codeaurora.org>
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Signed-off-by: Sricharan R <sricharan@codeaurora.org>
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Signed-off-by: Nikhil Prakash V <nprakash@codeaurora.org>
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Acked-by: Stephen Boyd <sboyd@kernel.org>
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---
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drivers/clk/qcom/gcc-ipq8074.c | 1 +
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1 file changed, 1 insertion(+)
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--- a/drivers/clk/qcom/gcc-ipq8074.c
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+++ b/drivers/clk/qcom/gcc-ipq8074.c
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@@ -4685,6 +4685,7 @@ static const struct qcom_reset_map gcc_i
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[GCC_PCIE1_AXI_SLAVE_ARES] = { 0x76040, 4 },
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[GCC_PCIE1_AHB_ARES] = { 0x76040, 5 },
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[GCC_PCIE1_AXI_MASTER_STICKY_ARES] = { 0x76040, 6 },
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+ [GCC_WCSSAON_RESET] = { 0x59010, 0 },
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};
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static const struct of_device_id gcc_ipq8074_match_table[] = {
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