lede/target/linux/ipq807x/patches-5.4/102-05-arm64-dts-ipq8074-Add-PMD9655-SPMI-PMIC-nodes.patch

85 lines
2.1 KiB
Diff

From 99007c6f1c4d4d97db51d59808f69505a8bad4fa Mon Sep 17 00:00:00 2001
From: Robert Marko <robimarko@gmail.com>
Date: Fri, 21 Aug 2020 17:19:00 +0200
Subject: [PATCH] arm64: dts: ipq8074: Add PMD9655 SPMI PMIC nodes
IPQ8074 uses these for CPU scaling, UBI/NSS scaling and
SD card.
So lets add the nodes.
Signed-off-by: Robert Marko <robimarko@gmail.com>
---
arch/arm64/boot/dts/qcom/ipq8074.dtsi | 46 ++++++++++++++++++++++++++++++++++++++++++++++
1 file changed, 46 insertions(+)
--- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi
@@ -5,6 +5,7 @@
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/qcom,gcc-ipq8074.h>
+#include <dt-bindings/spmi/spmi.h>
/ {
model = "Qualcomm Technologies, Inc. IPQ8074";
@@ -76,6 +77,15 @@
method = "smc";
};
+ e_smps1_reg: fixed-regulator@0 {
+ compatible = "regulator-fixed";
+ regulator-name = "e-smps1-reg";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
soc: soc {
#address-cells = <0x1>;
#size-cells = <0x1>;
@@ -549,6 +559,42 @@
interrupt-controller;
#interrupt-cells = <4>;
+
+ pmic@1 {
+ compatible = "qcom,spmi-pmic";
+ reg = <0x1 SPMI_USID>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ regulators {
+ compatible = "qcom,pmd9655-regulators";
+ vdd_s3-supply = <&e_smps1_reg>;
+ vdd_s4-supply = <&e_smps1_reg>;
+ vdd_ldo11-supply = <&e_smps1_reg>;
+
+ s3: s3 {
+ regulator-name = "pmd9655_s3";
+ regulator-min-microvolt = <592000>;
+ regulator-max-microvolt = <1064000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ s4: s4 {
+ regulator-name = "pmd9655_s4";
+ regulator-min-microvolt = <712000>;
+ regulator-max-microvolt = <992000>;
+ regulator-always-on;
+ regulator-boot-on;
+ };
+
+ ldo11: ldo11 {
+ regulator-name = "pmd9655_ldo11";
+ regulator-min-microvolt = <1104000>;
+ regulator-max-microvolt = <3300000>;
+ };
+ };
+ };
};
};
};