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66 lines
2.3 KiB
Diff
66 lines
2.3 KiB
Diff
From 80838ab7ebd416cbac38c1cd30a76d61641f7ee1 Mon Sep 17 00:00:00 2001
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From: Varadarajan Narayanan <quic_varada@quicinc.com>
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Date: Tue, 31 Oct 2023 12:41:39 +0530
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Subject: [PATCH 37/41] cpufreq: qcom-nvmem: Introduce cpufreq for ipq95xx
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IPQ95xx SoCs have different OPPs available for the CPU based on
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the SoC variant. This can be determined from an eFuse register
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present in the silicon.
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Added support for ipq95xx on nvmem driver which helps to
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determine OPPs at runtime based on the eFuse register which
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has the CPU frequency limits. opp-supported-hw dt binding
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can be used to indicate the available OPPs for each limit.
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Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
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Signed-off-by: Praveenkumar I <ipkumar@codeaurora.org>
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Signed-off-by: Kathiravan T <quic_kathirav@quicinc.com>
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Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
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[ Viresh: Fixed subject ]
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Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
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---
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drivers/cpufreq/cpufreq-dt-platdev.c | 1 +
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drivers/cpufreq/qcom-cpufreq-nvmem.c | 5 +++++
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include/dt-bindings/arm/qcom,ids.h | 6 ++++++
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3 files changed, 12 insertions(+)
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--- a/drivers/cpufreq/cpufreq-dt-platdev.c
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+++ b/drivers/cpufreq/cpufreq-dt-platdev.c
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@@ -164,6 +164,7 @@ static const struct of_device_id blockli
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{ .compatible = "ti,omap3", },
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{ .compatible = "qcom,ipq8064", },
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+ { .compatible = "qcom,ipq9574", },
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{ .compatible = "qcom,apq8064", },
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{ .compatible = "qcom,msm8974", },
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{ .compatible = "qcom,msm8960", },
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--- a/drivers/cpufreq/qcom-cpufreq-nvmem.c
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+++ b/drivers/cpufreq/qcom-cpufreq-nvmem.c
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@@ -149,6 +149,11 @@ static int qcom_cpufreq_kryo_name_versio
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switch (msm_id) {
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case QCOM_ID_MSM8996:
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case QCOM_ID_APQ8096:
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+ case QCOM_ID_IPQ9514:
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+ case QCOM_ID_IPQ9550:
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+ case QCOM_ID_IPQ9554:
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+ case QCOM_ID_IPQ9570:
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+ case QCOM_ID_IPQ9574:
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drv->versions = 1 << (unsigned int)(*speedbin);
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break;
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case QCOM_ID_MSM8996SG:
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--- a/include/dt-bindings/arm/qcom,ids.h
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+++ b/include/dt-bindings/arm/qcom,ids.h
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@@ -140,6 +140,12 @@
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#define QCOM_ID_SC7280 487
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#define QCOM_ID_SC7180P 495
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#define QCOM_ID_SM6375 507
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+#define QCOM_ID_IPQ9514 510
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+#define QCOM_ID_IPQ9550 511
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+#define QCOM_ID_IPQ9554 512
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+#define QCOM_ID_IPQ9570 513
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+#define QCOM_ID_IPQ9574 514
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+#define QCOM_ID_IPQ9510 521
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/*
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* The board type and revision information, used by Qualcomm bootloaders and
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