lede/target/linux/qualcommax/patches-6.6/0752-net-dsa-qca8k-support-PHY-to-PHY-CPU-link.patch
2025-02-07 12:04:28 +08:00

50 lines
1.4 KiB
Diff

From 8a56ac86c2eed13024413aa23a6cda85613d60f9 Mon Sep 17 00:00:00 2001
From: Ziyang Huang <hzyitc@outlook.com>
Date: Sat, 18 Jan 2025 16:18:40 +0800
Subject: [PATCH 1/2] net: dsa: qca8k: support PHY-to-PHY CPU link
PHY-to-PHY CPU link is a common/demo design in IPQ50xx platform, since it only has a SGMII/SGMII+ link and a MDI link.
For DSA, CPU tag is the only requirement. Fortunately, qca8337 can enable it on any port. So it's ok to trust a PHY-to-PHY link as a CPU link.
Signed-off-by: Ziyang Huang <hzyitc@outlook.com>
---
drivers/net/dsa/qca/qca8k-8xxx.c | 12 +++++++-----
1 file changed, 7 insertions(+), 5 deletions(-)
--- a/drivers/net/dsa/qca/qca8k-8xxx.c
+++ b/drivers/net/dsa/qca/qca8k-8xxx.c
@@ -1013,7 +1013,7 @@ qca8k_setup_mdio_bus(struct qca8k_priv *
return err;
}
- if (!dsa_is_user_port(priv->ds, reg))
+ if (reg == 0 || reg == 6)
continue;
of_get_phy_mode(port, &mode);
@@ -1088,17 +1088,19 @@ qca8k_setup_mac_pwr_sel(struct qca8k_pri
static int qca8k_find_cpu_port(struct dsa_switch *ds)
{
- struct qca8k_priv *priv = ds->priv;
+ int i;
- /* Find the connected cpu port. Valid port are 0 or 6 */
if (dsa_is_cpu_port(ds, 0))
return 0;
- dev_dbg(priv->dev, "port 0 is not the CPU port. Checking port 6");
-
if (dsa_is_cpu_port(ds, 6))
return 6;
+ /* PHY-to-PHY link */
+ for (i = 1; i <= 5; i++)
+ if (dsa_is_cpu_port(ds, i))
+ return i;
+
return -EINVAL;
}