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46 lines
1.2 KiB
Diff
46 lines
1.2 KiB
Diff
From 28490d95fe9e059c5ce74b2289d66e0d7ede2d50 Mon Sep 17 00:00:00 2001
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From: Ziyang Huang <hzyitc@outlook.com>
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Date: Sun, 8 Sep 2024 16:40:12 +0800
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Subject: [PATCH 3/3] arm64: dts: qcom: ipq5018: add ge_phy node
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Add the GE PHY node and register the output clocks in the GCC node.
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Signed-off-by: Ziyang Huang <hzyitc@outlook.com>
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Signed-off-by: George Moussalem <george.moussalem@outlook.com>
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---
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arch/arm64/boot/dts/qcom/ipq5018.dtsi | 16 ++++++++++++++--
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1 file changed, 14 insertions(+), 2 deletions(-)
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--- a/arch/arm64/boot/dts/qcom/ipq5018.dtsi
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+++ b/arch/arm64/boot/dts/qcom/ipq5018.dtsi
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@@ -200,6 +200,18 @@
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clocks = <&gcc GCC_MDIO0_AHB_CLK>;
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clock-names = "gcc_mdio_ahb_clk";
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status = "disabled";
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+
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+ ge_phy: ethernet-phy@7 {
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+ compatible = "ethernet-phy-id004d.d0c0";
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+ reg = <7>;
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+ resets = <&gcc GCC_GEPHY_BCR>,
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+ <&gcc GCC_GEPHY_MDC_SW_ARES>,
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+ <&gcc GCC_GEPHY_DSP_HW_ARES>,
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+ <&gcc GCC_GEPHY_RX_ARES>,
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+ <&gcc GCC_GEPHY_TX_ARES>;
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+ clocks = <&gcc GCC_GEPHY_RX_CLK>,
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+ <&gcc GCC_GEPHY_TX_CLK>;
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+ };
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};
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mdio1: mdio@90000 {
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@@ -394,8 +406,8 @@
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<&pcie0_phy>,
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<&pcie1_phy>,
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<0>,
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- <0>,
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- <0>,
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+ <&ge_phy 0>,
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+ <&ge_phy 1>,
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<0>,
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<0>;
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#clock-cells = <1>;
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