mirror of
https://github.com/coolsnowwolf/lede.git
synced 2025-06-07 14:52:04 +08:00

Follow the advise of Russell King allows to greatly improve the driver for RealTek's 1G and 2.5G Ethernet PHYs. The results are full/half duplex as well as Gbit master/slave property being read from PHY Specific Status Register (PHYSR), and fixes regarding link-partner advertisement. Signed-off-by: Daniel Golle <daniel@makrotopia.org>