Furong Xu 8563a8117b mediatek: enable sel_clk for spi-mt65xx ...

Without explicitly enabling sel_clk, clk_disable_unused() will disable
it when boot is done, causing CPU hang on SPI1 register access on MT7986.
Explicitly enable sel_clk to make SPI1 functional.

Signed-off-by: Furong Xu <xfr@outlook.com>
Signed-off-by: Chuanhong Guo <gch981213@gmail.com>

2022-12-17 11:22:54 +08:00

..

imagebuilder

sync with upstream (#10562)

2022-12-08 14:20:57 +08:00

linux

mediatek: enable sel_clk for spi-mt65xx

2022-12-17 11:22:54 +08:00

llvm-bpf

toolchain: add llvm-bpf

2022-04-07 01:01:05 +08:00

sdk

sync with upstream (#10562)

2022-12-08 14:20:57 +08:00

toolchain

sync with upstream (#10562)

2022-12-08 14:20:57 +08:00

Config.in

sync with upstream (#10562)

2022-12-08 14:20:57 +08:00

Makefile

ipq60xx: add dma arm64 api patch

2022-09-13 15:19:06 +08:00