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44 lines
1.6 KiB
Diff
44 lines
1.6 KiB
Diff
From e0d5c068d092b0c1a60f706cb18ac71ff4ec5268 Mon Sep 17 00:00:00 2001
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From: Corentin Labbe <clabbe@baylibre.com>
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Date: Tue, 27 Sep 2022 07:55:06 +0000
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Subject: [PATCH 44/49] arm64: dts: rockchip: rk3399: add crypto node
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The rk3399 has a crypto IP handled by the rk3288 crypto driver so adds a
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node for it.
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Tested-by Diederik de Haas <didi.debian@cknow.org>
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Signed-off-by: Corentin Labbe <clabbe@baylibre.com>
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---
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arch/arm64/boot/dts/rockchip/rk3399.dtsi | 20 ++++++++++++++++++++
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1 file changed, 20 insertions(+)
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--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
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+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
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@@ -582,6 +582,26 @@
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status = "disabled";
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};
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+ crypto0: crypto@ff8b0000 {
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+ compatible = "rockchip,rk3399-crypto";
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+ reg = <0x0 0xff8b0000 0x0 0x4000>;
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+ interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH 0>;
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+ clocks = <&cru HCLK_M_CRYPTO0>, <&cru HCLK_S_CRYPTO0>, <&cru SCLK_CRYPTO0>;
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+ clock-names = "hclk_master", "hclk_slave", "sclk";
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+ resets = <&cru SRST_CRYPTO0>, <&cru SRST_CRYPTO0_S>, <&cru SRST_CRYPTO0_M>;
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+ reset-names = "master", "lave", "crypto";
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+ };
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+
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+ crypto1: crypto@ff8b8000 {
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+ compatible = "rockchip,rk3399-crypto";
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+ reg = <0x0 0xff8b8000 0x0 0x4000>;
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+ interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH 0>;
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+ clocks = <&cru HCLK_M_CRYPTO1>, <&cru HCLK_S_CRYPTO1>, <&cru SCLK_CRYPTO1>;
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+ clock-names = "hclk_master", "hclk_slave", "sclk";
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+ resets = <&cru SRST_CRYPTO1>, <&cru SRST_CRYPTO1_S>, <&cru SRST_CRYPTO1_M>;
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+ reset-names = "master", "slave", "crypto";
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+ };
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+
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i2c1: i2c@ff110000 {
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compatible = "rockchip,rk3399-i2c";
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reg = <0x0 0xff110000 0x0 0x1000>;
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