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https://github.com/coolsnowwolf/lede.git
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162 lines
5.4 KiB
Diff
162 lines
5.4 KiB
Diff
From 0fce1109f894ec7fcd72cb098843a1eff786716a Mon Sep 17 00:00:00 2001
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From: Daniel Golle <daniel@makrotopia.org>
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Date: Fri, 16 Sep 2022 20:49:42 +0100
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Subject: [PATCH 16/16] rt2x00: import support for external LNA on MT7620
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To: linux-wireless@vger.kernel.org,
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Stanislaw Gruszka <stf_xl@wp.pl>,
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Helmut Schaa <helmut.schaa@googlemail.com>
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Cc: Kalle Valo <kvalo@kernel.org>,
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David S. Miller <davem@davemloft.net>,
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Eric Dumazet <edumazet@google.com>,
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Jakub Kicinski <kuba@kernel.org>,
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Paolo Abeni <pabeni@redhat.com>,
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Johannes Berg <johannes.berg@intel.com>
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In order to carry out calibration on boards with ePA or eLNA the PA pin
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needs to be switch to GPIO mode on MT7620. Implement that by selecting
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pinctrl state "pa_gpio" which should be defined for MT7620 boards with
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eLNA or ePA beside the "default" state.
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Reported-by: Serge Vasilugin <vasilugin@yandex.ru>
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Signed-off-by: Daniel Golle <daniel@makrotopia.org>
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---
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.../net/wireless/ralink/rt2x00/rt2800lib.c | 58 +++++++++++++++++++
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drivers/net/wireless/ralink/rt2x00/rt2x00.h | 5 ++
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.../net/wireless/ralink/rt2x00/rt2x00soc.c | 15 +++++
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3 files changed, 78 insertions(+)
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--- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
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+++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
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@@ -304,6 +304,24 @@ static void rt2800_rf_write(struct rt2x0
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mutex_unlock(&rt2x00dev->csr_mutex);
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}
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+void rt6352_enable_pa_pin(struct rt2x00_dev *rt2x00dev, int enable)
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+{
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+ if (!rt2x00dev->pinctrl)
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+ return;
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+
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+ if (enable) {
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+ if (!rt2x00dev->pins_default)
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+ return;
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+
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+ pinctrl_select_state(rt2x00dev->pinctrl, rt2x00dev->pins_default);
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+ } else {
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+ if (!rt2x00dev->pins_pa_gpio)
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+ return;
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+
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+ pinctrl_select_state(rt2x00dev->pinctrl, rt2x00dev->pins_pa_gpio);
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+ }
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+}
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+
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static const unsigned int rt2800_eeprom_map[EEPROM_WORD_COUNT] = {
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[EEPROM_CHIP_ID] = 0x0000,
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[EEPROM_VERSION] = 0x0001,
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@@ -4469,6 +4487,29 @@ static void rt2800_config_channel(struct
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rt2800_register_write(rt2x00dev, TX1_RF_GAIN_ATTEN,
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0x6C6C6B6C);
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}
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+
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+ if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
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+ reg = rt2800_register_read(rt2x00dev, RF_CONTROL3);
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+ reg |= 0x00000101;
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+ rt2800_register_write(rt2x00dev, RF_CONTROL3, reg);
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+
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+ reg = rt2800_register_read(rt2x00dev, RF_BYPASS3);
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+ reg |= 0x00000101;
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+ rt2800_register_write(rt2x00dev, RF_BYPASS3, reg);
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+
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+ rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x66);
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+ rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x20);
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+ rt2800_rfcsr_write_chanreg(rt2x00dev, 18, 0x42);
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+ rt2800_bbp_write(rt2x00dev, 75, 0x68);
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+ rt2800_bbp_write(rt2x00dev, 76, 0x4C);
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+ rt2800_bbp_write(rt2x00dev, 79, 0x1C);
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+ rt2800_bbp_write(rt2x00dev, 80, 0x0C);
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+ rt2800_bbp_write(rt2x00dev, 82, 0xB6);
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+ /* bank 0 RF reg 42 and glrt BBP reg 141 will be set in
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+ * config channel function in dependence of channel and
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+ * HT20/HT40 so don't touch it
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+ */
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+ }
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}
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bbp = rt2800_bbp_read(rt2x00dev, 4);
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@@ -10583,6 +10624,7 @@ static void rt2800_init_rfcsr_6352(struc
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rt2800_rfcsr_write_dccal(rt2x00dev, 5, 0x00);
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rt2800_rfcsr_write_dccal(rt2x00dev, 17, 0x7C);
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+ rt6352_enable_pa_pin(rt2x00dev, 0);
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rt2800_r_calibration(rt2x00dev);
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rt2800_rf_self_txdc_cal(rt2x00dev);
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rt2800_rxdcoc_calibration(rt2x00dev);
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@@ -10590,6 +10632,22 @@ static void rt2800_init_rfcsr_6352(struc
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rt2800_bw_filter_calibration(rt2x00dev, false);
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rt2800_loft_iq_calibration(rt2x00dev);
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rt2800_rxiq_calibration(rt2x00dev);
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+ rt6352_enable_pa_pin(rt2x00dev, 1);
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+
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+ if (rt2x00_has_cap_external_lna_bg(rt2x00dev)) {
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+ rt2800_rfcsr_write_chanreg(rt2x00dev, 14, 0x66);
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+ rt2800_rfcsr_write_chanreg(rt2x00dev, 17, 0x20);
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+ rt2800_rfcsr_write_chanreg(rt2x00dev, 18, 0x42);
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+ rt2800_bbp_write(rt2x00dev, 75, 0x68);
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+ rt2800_bbp_write(rt2x00dev, 76, 0x4C);
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+ rt2800_bbp_write(rt2x00dev, 79, 0x1C);
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+ rt2800_bbp_write(rt2x00dev, 80, 0x0C);
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+ rt2800_bbp_write(rt2x00dev, 82, 0xB6);
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+ /* bank 0 RF reg 42 and glrt BBP reg 141 will be set in config
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+ * channel function in dependence of channel and HT20/HT40,
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+ * so don't touch them here.
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+ */
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+ }
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}
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static void rt2800_init_rfcsr(struct rt2x00_dev *rt2x00dev)
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--- a/drivers/net/wireless/ralink/rt2x00/rt2x00.h
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+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00.h
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@@ -28,6 +28,7 @@
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#include <linux/average.h>
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#include <linux/usb.h>
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#include <linux/clk.h>
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+#include <linux/pinctrl/consumer.h>
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#include <linux/rt2x00_platform.h>
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#include <net/mac80211.h>
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@@ -1029,6 +1030,11 @@ struct rt2x00_dev {
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/* Clock for System On Chip devices. */
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struct clk *clk;
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+
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+ /* pinctrl and states for System On Chip devices with PA/LNA. */
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+ struct pinctrl *pinctrl;
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+ struct pinctrl_state *pins_default;
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+ struct pinctrl_state *pins_pa_gpio;
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};
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struct rt2x00_bar_list_entry {
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--- a/drivers/net/wireless/ralink/rt2x00/rt2x00soc.c
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+++ b/drivers/net/wireless/ralink/rt2x00/rt2x00soc.c
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@@ -97,6 +97,21 @@ int rt2x00soc_probe(struct platform_devi
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if (retval)
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goto exit_free_reg;
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+ rt2x00dev->pinctrl = devm_pinctrl_get(&pdev->dev);
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+ if (IS_ERR(rt2x00dev->pinctrl)) {
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+ rt2x00dev->pinctrl = NULL;
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+ rt2x00dev->pins_default = NULL;
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+ rt2x00dev->pins_pa_gpio = NULL;
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+ } else {
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+ rt2x00dev->pins_default = pinctrl_lookup_state(rt2x00dev->pinctrl, "default");
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+ if (IS_ERR(rt2x00dev->pins_default))
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+ rt2x00dev->pins_default = NULL;
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+
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+ rt2x00dev->pins_pa_gpio = pinctrl_lookup_state(rt2x00dev->pinctrl, "pa_gpio");
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+ if (IS_ERR(rt2x00dev->pins_pa_gpio))
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+ rt2x00dev->pins_pa_gpio = NULL;
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+ }
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+
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return 0;
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exit_free_reg:
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